sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   5  *                              Pilo Chambert <pilo.c@wanadoo.fr>
   6  *
   7  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   8  *                         Henk Hesselink <henk@anda.nl>
   9  *                         for writing the digi96-driver
  10  *                         and RME for all informations.
  11  *
  12  *   This program is free software; you can redistribute it and/or modify
  13  *   it under the terms of the GNU General Public License as published by
  14  *   the Free Software Foundation; either version 2 of the License, or
  15  *   (at your option) any later version.
  16  *
  17  *   This program is distributed in the hope that it will be useful,
  18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *   GNU General Public License for more details.
  21  *
  22  *   You should have received a copy of the GNU General Public License
  23  *   along with this program; if not, write to the Free Software
  24  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  * ****************************************************************************
  28  *
  29  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  30  *
  31  * Identical soundcards by Sek'd were labeled:
  32  * RME Digi 32     = Sek'd Prodif 32
  33  * RME Digi 32 Pro = Sek'd Prodif 96
  34  * RME Digi 32/8   = Sek'd Prodif Gold
  35  *
  36  * ****************************************************************************
  37  *
  38  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  39  *
  40  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  41  * in this mode. Rec data and play data are using the same buffer therefore. At
  42  * first you have got the playing bits in the buffer and then (after playing
  43  * them) they were overwitten by the captured sound of the CS8412/14. Both
  44  * modes (play/record) are running harmonically hand in hand in the same buffer
  45  * and you have only one start bit plus one interrupt bit to control this
  46  * paired action.
  47  * This is opposite to the latter rme96 where playing and capturing is totally
  48  * separated and so their full duplex mode is supported by alsa (using two
  49  * start bits and two interrupts for two different buffers).
  50  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  51  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  52  * able to solve it. Are you motivated enough to solve this problem now? Your
  53  * patch would be welcome!
  54  *
  55  * ****************************************************************************
  56  *
  57  * "The story after the long seeking" -- tiwai
  58  *
  59  * Ok, the situation regarding the full duplex is now improved a bit.
  60  * In the fullduplex mode (given by the module parameter), the hardware buffer
  61  * is split to halves for read and write directions at the DMA pointer.
  62  * That is, the half above the current DMA pointer is used for write, and
  63  * the half below is used for read.  To mangle this strange behavior, an
  64  * software intermediate buffer is introduced.  This is, of course, not good
  65  * from the viewpoint of the data transfer efficiency.  However, this allows
  66  * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  67  *
  68  * ****************************************************************************
  69  */
  70
  71
  72 #include <linux/delay.h>
  73 #include <linux/gfp.h>
  74 #include <linux/init.h>
  75 #include <linux/interrupt.h>
  76 #include <linux/pci.h>
  77 #include <linux/module.h>
  78 #include <linux/io.h>
  79
  80 #include <sound/core.h>
  81 #include <sound/info.h>
  82 #include <sound/control.h>
  83 #include <sound/pcm.h>
  84 #include <sound/pcm_params.h>
  85 #include <sound/pcm-indirect.h>
  86 #include <sound/asoundef.h>
  87 #include <sound/initval.h>
  88
  89 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  90 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  91 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  92 static bool fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  93
  94 module_param_array(index, int, NULL, 0444);
  95 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  96 module_param_array(id, charp, NULL, 0444);
  97 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  98 module_param_array(enable, bool, NULL, 0444);
  99 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
 100 module_param_array(fullduplex, bool, NULL, 0444);
 101 MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
 102 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
 103 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
 104 MODULE_LICENSE("GPL");
 105 MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
 106
 107 /* Defines for RME Digi32 series */
 108 #define RME32_SPDIF_NCHANNELS 2
 109
 110 /* Playback and capture buffer size */
 111 #define RME32_BUFFER_SIZE 0x20000
 112
 113 /* IO area size */
 114 #define RME32_IO_SIZE 0x30000
 115
 116 /* IO area offsets */
 117 #define RME32_IO_DATA_BUFFER        0x0
 118 #define RME32_IO_CONTROL_REGISTER   0x20000
 119 #define RME32_IO_GET_POS            0x20000
 120 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 121 #define RME32_IO_RESET_POS          0x20100
 122
 123 /* Write control register bits */
 124 #define RME32_WCR_START     (1 << 0)    /* startbit */
 125 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 126                                            Setting the whole card to mono
 127                                            doesn't seem to be very useful.
 128                                            A software-solution can handle
 129                                            full-duplex with one direction in
 130                                            stereo and the other way in mono.
 131                                            So, the hardware should work all
 132                                            the time in stereo! */
 133 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 134 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 135 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 136 #define RME32_WCR_FREQ_1    (1 << 5)
 137 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 138 #define RME32_WCR_INP_1     (1 << 7)
 139 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 140 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 141 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 142 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 143 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 144 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 145 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 146 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 147
 148 #define RME32_WCR_BITPOS_FREQ_0 4
 149 #define RME32_WCR_BITPOS_FREQ_1 5
 150 #define RME32_WCR_BITPOS_INP_0 6
 151 #define RME32_WCR_BITPOS_INP_1 7
 152
 153 /* Read control register bits */
 154 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 155 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 156 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 157 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 158 #define RME32_RCR_FREQ_1    (1 << 28)
 159 #define RME32_RCR_FREQ_2    (1 << 29)
 160 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 161 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 162
 163 #define RME32_RCR_BITPOS_F0 27
 164 #define RME32_RCR_BITPOS_F1 28
 165 #define RME32_RCR_BITPOS_F2 29
 166
 167 /* Input types */
 168 #define RME32_INPUT_OPTICAL 0
 169 #define RME32_INPUT_COAXIAL 1
 170 #define RME32_INPUT_INTERNAL 2
 171 #define RME32_INPUT_XLR 3
 172
 173 /* Clock modes */
 174 #define RME32_CLOCKMODE_SLAVE 0
 175 #define RME32_CLOCKMODE_MASTER_32 1
 176 #define RME32_CLOCKMODE_MASTER_44 2
 177 #define RME32_CLOCKMODE_MASTER_48 3
 178
 179 /* Block sizes in bytes */
 180 #define RME32_BLOCK_SIZE 8192
 181
 182 /* Software intermediate buffer (max) size */
 183 #define RME32_MID_BUFFER_SIZE (1024*1024)
 184
 185 /* Hardware revisions */
 186 #define RME32_32_REVISION 192
 187 #define RME32_328_REVISION_OLD 100
 188 #define RME32_328_REVISION_NEW 101
 189 #define RME32_PRO_REVISION_WITH_8412 192
 190 #define RME32_PRO_REVISION_WITH_8414 150
 191
 192
 193 struct rme32 {
 194         spinlock_t lock;
 195         int irq;
 196         unsigned long port;
 197         void __iomem *iobase;
 198
 199         u32 wcreg;              /* cached write control register value */
 200         u32 wcreg_spdif;        /* S/PDIF setup */
 201         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 202         u32 rcreg;              /* cached read control register value */
 203
 204         u8 rev;                 /* card revision number */
 205
 206         struct snd_pcm_substream *playback_substream;
 207         struct snd_pcm_substream *capture_substream;
 208
 209         int playback_frlog;     /* log2 of framesize */
 210         int capture_frlog;
 211
 212         size_t playback_periodsize;     /* in bytes, zero if not used */
 213         size_t capture_periodsize;      /* in bytes, zero if not used */
 214
 215         unsigned int fullduplex_mode;
 216         int running;
 217
 218         struct snd_pcm_indirect playback_pcm;
 219         struct snd_pcm_indirect capture_pcm;
 220
 221         struct snd_card *card;
 222         struct snd_pcm *spdif_pcm;
 223         struct snd_pcm *adat_pcm;
 224         struct pci_dev *pci;
 225         struct snd_kcontrol *spdif_ctl;
 226 };
 227
 228 static const struct pci_device_id snd_rme32_ids[] = {
 229         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32), 0,},
 230         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8), 0,},
 231         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO), 0,},
 232         {0,}
 233 };
 234
 235 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 236
 237 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 238 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 239
 240 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
 241
 242 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
 243
 244 static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
 245
 246 static void snd_rme32_proc_init(struct rme32 * rme32);
 247
 248 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
 249
 250 static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
 251 {
 252         return (readl(rme32->iobase + RME32_IO_GET_POS)
 253                 & RME32_RCR_AUDIO_ADDR_MASK);
 254 }
 255
 256 /* silence callback for halfduplex mode */
 257 static int snd_rme32_playback_silence(struct snd_pcm_substream *substream, int channel, /* not used (interleaved data) */
 258                                       snd_pcm_uframes_t pos,
 259                                       snd_pcm_uframes_t count)
 260 {
 261         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 262         count <<= rme32->playback_frlog;
 263         pos <<= rme32->playback_frlog;
 264         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 265         return 0;
 266 }
 267
 268 /* copy callback for halfduplex mode */
 269 static int snd_rme32_playback_copy(struct snd_pcm_substream *substream, int channel,    /* not used (interleaved data) */
 270                                    snd_pcm_uframes_t pos,
 271                                    void __user *src, snd_pcm_uframes_t count)
 272 {
 273         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 274         count <<= rme32->playback_frlog;
 275         pos <<= rme32->playback_frlog;
 276         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 277                             src, count))
 278                 return -EFAULT;
 279         return 0;
 280 }
 281
 282 /* copy callback for halfduplex mode */
 283 static int snd_rme32_capture_copy(struct snd_pcm_substream *substream, int channel,     /* not used (interleaved data) */
 284                                   snd_pcm_uframes_t pos,
 285                                   void __user *dst, snd_pcm_uframes_t count)
 286 {
 287         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 288         count <<= rme32->capture_frlog;
 289         pos <<= rme32->capture_frlog;
 290         if (copy_to_user_fromio(dst,
 291                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 292                             count))
 293                 return -EFAULT;
 294         return 0;
 295 }
 296
 297 /*
 298  * SPDIF I/O capabilities (half-duplex mode)
 299  */
 300 static struct snd_pcm_hardware snd_rme32_spdif_info = {
 301         .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 302                          SNDRV_PCM_INFO_MMAP_VALID |
 303                          SNDRV_PCM_INFO_INTERLEAVED |
 304                          SNDRV_PCM_INFO_PAUSE |
 305                          SNDRV_PCM_INFO_SYNC_START),
 306         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 307                          SNDRV_PCM_FMTBIT_S32_LE),
 308         .rates =        (SNDRV_PCM_RATE_32000 |
 309                          SNDRV_PCM_RATE_44100 |
 310                          SNDRV_PCM_RATE_48000),
 311         .rate_min =     32000,
 312         .rate_max =     48000,
 313         .channels_min = 2,
 314         .channels_max = 2,
 315         .buffer_bytes_max = RME32_BUFFER_SIZE,
 316         .period_bytes_min = RME32_BLOCK_SIZE,
 317         .period_bytes_max = RME32_BLOCK_SIZE,
 318         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 319         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 320         .fifo_size =    0,
 321 };
 322
 323 /*
 324  * ADAT I/O capabilities (half-duplex mode)
 325  */
 326 static struct snd_pcm_hardware snd_rme32_adat_info =
 327 {
 328         .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 329                               SNDRV_PCM_INFO_MMAP_VALID |
 330                               SNDRV_PCM_INFO_INTERLEAVED |
 331                               SNDRV_PCM_INFO_PAUSE |
 332                               SNDRV_PCM_INFO_SYNC_START),
 333         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 334         .rates =             (SNDRV_PCM_RATE_44100 |
 335                               SNDRV_PCM_RATE_48000),
 336         .rate_min =          44100,
 337         .rate_max =          48000,
 338         .channels_min =      8,
 339         .channels_max =      8,
 340         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 341         .period_bytes_min =  RME32_BLOCK_SIZE,
 342         .period_bytes_max =  RME32_BLOCK_SIZE,
 343         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 344         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 345         .fifo_size =        0,
 346 };
 347
 348 /*
 349  * SPDIF I/O capabilities (full-duplex mode)
 350  */
 351 static struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
 352         .info =         (SNDRV_PCM_INFO_MMAP |
 353                          SNDRV_PCM_INFO_MMAP_VALID |
 354                          SNDRV_PCM_INFO_INTERLEAVED |
 355                          SNDRV_PCM_INFO_PAUSE |
 356                          SNDRV_PCM_INFO_SYNC_START),
 357         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 358                          SNDRV_PCM_FMTBIT_S32_LE),
 359         .rates =        (SNDRV_PCM_RATE_32000 |
 360                          SNDRV_PCM_RATE_44100 |
 361                          SNDRV_PCM_RATE_48000),
 362         .rate_min =     32000,
 363         .rate_max =     48000,
 364         .channels_min = 2,
 365         .channels_max = 2,
 366         .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 367         .period_bytes_min = RME32_BLOCK_SIZE,
 368         .period_bytes_max = RME32_BLOCK_SIZE,
 369         .periods_min =  2,
 370         .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 371         .fifo_size =    0,
 372 };
 373
 374 /*
 375  * ADAT I/O capabilities (full-duplex mode)
 376  */
 377 static struct snd_pcm_hardware snd_rme32_adat_fd_info =
 378 {
 379         .info =              (SNDRV_PCM_INFO_MMAP |
 380                               SNDRV_PCM_INFO_MMAP_VALID |
 381                               SNDRV_PCM_INFO_INTERLEAVED |
 382                               SNDRV_PCM_INFO_PAUSE |
 383                               SNDRV_PCM_INFO_SYNC_START),
 384         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 385         .rates =             (SNDRV_PCM_RATE_44100 |
 386                               SNDRV_PCM_RATE_48000),
 387         .rate_min =          44100,
 388         .rate_max =          48000,
 389         .channels_min =      8,
 390         .channels_max =      8,
 391         .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 392         .period_bytes_min =  RME32_BLOCK_SIZE,
 393         .period_bytes_max =  RME32_BLOCK_SIZE,
 394         .periods_min =      2,
 395         .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 396         .fifo_size =        0,
 397 };
 398
 399 static void snd_rme32_reset_dac(struct rme32 *rme32)
 400 {
 401         writel(rme32->wcreg | RME32_WCR_PD,
 402                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 403         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 404 }
 405
 406 static int snd_rme32_playback_getrate(struct rme32 * rme32)
 407 {
 408         int rate;
 409
 410         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 411                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 412         switch (rate) {
 413         case 1:
 414                 rate = 32000;
 415                 break;
 416         case 2:
 417                 rate = 44100;
 418                 break;
 419         case 3:
 420                 rate = 48000;
 421                 break;
 422         default:
 423                 return -1;
 424         }
 425         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 426 }
 427
 428 static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
 429 {
 430         int n;
 431
 432         *is_adat = 0;
 433         if (rme32->rcreg & RME32_RCR_LOCK) {
 434                 /* ADAT rate */
 435                 *is_adat = 1;
 436         }
 437         if (rme32->rcreg & RME32_RCR_ERF) {
 438                 return -1;
 439         }
 440
 441         /* S/PDIF rate */
 442         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 443                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 444                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 445
 446         if (RME32_PRO_WITH_8414(rme32))
 447                 switch (n) {    /* supporting the CS8414 */
 448                 case 0:
 449                 case 1:
 450                 case 2:
 451                         return -1;
 452                 case 3:
 453                         return 96000;
 454                 case 4:
 455                         return 88200;
 456                 case 5:
 457                         return 48000;
 458                 case 6:
 459                         return 44100;
 460                 case 7:
 461                         return 32000;
 462                 default:
 463                         return -1;
 464                         break;
 465                 }
 466         else
 467                 switch (n) {    /* supporting the CS8412 */
 468                 case 0:
 469                         return -1;
 470                 case 1:
 471                         return 48000;
 472                 case 2:
 473                         return 44100;
 474                 case 3:
 475                         return 32000;
 476                 case 4:
 477                         return 48000;
 478                 case 5:
 479                         return 44100;
 480                 case 6:
 481                         return 44056;
 482                 case 7:
 483                         return 32000;
 484                 default:
 485                         break;
 486                 }
 487         return -1;
 488 }
 489
 490 static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
 491 {
 492         int ds;
 493
 494         ds = rme32->wcreg & RME32_WCR_DS_BM;
 495         switch (rate) {
 496         case 32000:
 497                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 498                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 499                         ~RME32_WCR_FREQ_1;
 500                 break;
 501         case 44100:
 502                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 503                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 504                         ~RME32_WCR_FREQ_0;
 505                 break;
 506         case 48000:
 507                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 508                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 509                         RME32_WCR_FREQ_1;
 510                 break;
 511         case 64000:
 512                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 513                         return -EINVAL;
 514                 rme32->wcreg |= RME32_WCR_DS_BM;
 515                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 516                         ~RME32_WCR_FREQ_1;
 517                 break;
 518         case 88200:
 519                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 520                         return -EINVAL;
 521                 rme32->wcreg |= RME32_WCR_DS_BM;
 522                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 523                         ~RME32_WCR_FREQ_0;
 524                 break;
 525         case 96000:
 526                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 527                         return -EINVAL;
 528                 rme32->wcreg |= RME32_WCR_DS_BM;
 529                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 530                         RME32_WCR_FREQ_1;
 531                 break;
 532         default:
 533                 return -EINVAL;
 534         }
 535         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 536             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 537         {
 538                 /* change to/from double-speed: reset the DAC (if available) */
 539                 snd_rme32_reset_dac(rme32);
 540         } else {
 541                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 542         }
 543         return 0;
 544 }
 545
 546 static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
 547 {
 548         switch (mode) {
 549         case RME32_CLOCKMODE_SLAVE:
 550                 /* AutoSync */
 551                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 552                         ~RME32_WCR_FREQ_1;
 553                 break;
 554         case RME32_CLOCKMODE_MASTER_32:
 555                 /* Internal 32.0kHz */
 556                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 557                         ~RME32_WCR_FREQ_1;
 558                 break;
 559         case RME32_CLOCKMODE_MASTER_44:
 560                 /* Internal 44.1kHz */
 561                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 562                         RME32_WCR_FREQ_1;
 563                 break;
 564         case RME32_CLOCKMODE_MASTER_48:
 565                 /* Internal 48.0kHz */
 566                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 567                         RME32_WCR_FREQ_1;
 568                 break;
 569         default:
 570                 return -EINVAL;
 571         }
 572         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 573         return 0;
 574 }
 575
 576 static int snd_rme32_getclockmode(struct rme32 * rme32)
 577 {
 578         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 579             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 580 }
 581
 582 static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
 583 {
 584         switch (type) {
 585         case RME32_INPUT_OPTICAL:
 586                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 587                         ~RME32_WCR_INP_1;
 588                 break;
 589         case RME32_INPUT_COAXIAL:
 590                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 591                         ~RME32_WCR_INP_1;
 592                 break;
 593         case RME32_INPUT_INTERNAL:
 594                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 595                         RME32_WCR_INP_1;
 596                 break;
 597         case RME32_INPUT_XLR:
 598                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 599                         RME32_WCR_INP_1;
 600                 break;
 601         default:
 602                 return -EINVAL;
 603         }
 604         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 605         return 0;
 606 }
 607
 608 static int snd_rme32_getinputtype(struct rme32 * rme32)
 609 {
 610         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 611             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 612 }
 613
 614 static void
 615 snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
 616 {
 617         int frlog;
 618
 619         if (n_channels == 2) {
 620                 frlog = 1;
 621         } else {
 622                 /* assume 8 channels */
 623                 frlog = 3;
 624         }
 625         if (is_playback) {
 626                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 627                 rme32->playback_frlog = frlog;
 628         } else {
 629                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 630                 rme32->capture_frlog = frlog;
 631         }
 632 }
 633
 634 static int snd_rme32_setformat(struct rme32 *rme32, snd_pcm_format_t format)
 635 {
 636         switch (format) {
 637         case SNDRV_PCM_FORMAT_S16_LE:
 638                 rme32->wcreg &= ~RME32_WCR_MODE24;
 639                 break;
 640         case SNDRV_PCM_FORMAT_S32_LE:
 641                 rme32->wcreg |= RME32_WCR_MODE24;
 642                 break;
 643         default:
 644                 return -EINVAL;
 645         }
 646         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 647         return 0;
 648 }
 649
 650 static int
 651 snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
 652                              struct snd_pcm_hw_params *params)
 653 {
 654         int err, rate, dummy;
 655         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 656         struct snd_pcm_runtime *runtime = substream->runtime;
 657
 658         if (rme32->fullduplex_mode) {
 659                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 660                 if (err < 0)
 661                         return err;
 662         } else {
 663                 runtime->dma_area = (void __force *)(rme32->iobase +
 664                                                      RME32_IO_DATA_BUFFER);
 665                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 666                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 667         }
 668
 669         spin_lock_irq(&rme32->lock);
 670         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 671             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 672                 /* AutoSync */
 673                 if ((int)params_rate(params) != rate) {
 674                         spin_unlock_irq(&rme32->lock);
 675                         return -EIO;
 676                 }
 677         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 678                 spin_unlock_irq(&rme32->lock);
 679                 return err;
 680         }
 681         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 682                 spin_unlock_irq(&rme32->lock);
 683                 return err;
 684         }
 685
 686         snd_rme32_setframelog(rme32, params_channels(params), 1);
 687         if (rme32->capture_periodsize != 0) {
 688                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 689                         spin_unlock_irq(&rme32->lock);
 690                         return -EBUSY;
 691                 }
 692         }
 693         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 694         /* S/PDIF setup */
 695         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 696                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 697                 rme32->wcreg |= rme32->wcreg_spdif_stream;
 698                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 699         }
 700         spin_unlock_irq(&rme32->lock);
 701
 702         return 0;
 703 }
 704
 705 static int
 706 snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
 707                             struct snd_pcm_hw_params *params)
 708 {
 709         int err, isadat, rate;
 710         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 711         struct snd_pcm_runtime *runtime = substream->runtime;
 712
 713         if (rme32->fullduplex_mode) {
 714                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 715                 if (err < 0)
 716                         return err;
 717         } else {
 718                 runtime->dma_area = (void __force *)rme32->iobase +
 719                                         RME32_IO_DATA_BUFFER;
 720                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 721                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 722         }
 723
 724         spin_lock_irq(&rme32->lock);
 725         /* enable AutoSync for record-preparing */
 726         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 727         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 728
 729         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 730                 spin_unlock_irq(&rme32->lock);
 731                 return err;
 732         }
 733         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 734                 spin_unlock_irq(&rme32->lock);
 735                 return err;
 736         }
 737         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 738                 if ((int)params_rate(params) != rate) {
 739                         spin_unlock_irq(&rme32->lock);
 740                         return -EIO;
 741                 }
 742                 if ((isadat && runtime->hw.channels_min == 2) ||
 743                     (!isadat && runtime->hw.channels_min == 8)) {
 744                         spin_unlock_irq(&rme32->lock);
 745                         return -EIO;
 746                 }
 747         }
 748         /* AutoSync off for recording */
 749         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 750         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 751
 752         snd_rme32_setframelog(rme32, params_channels(params), 0);
 753         if (rme32->playback_periodsize != 0) {
 754                 if (params_period_size(params) << rme32->capture_frlog !=
 755                     rme32->playback_periodsize) {
 756                         spin_unlock_irq(&rme32->lock);
 757                         return -EBUSY;
 758                 }
 759         }
 760         rme32->capture_periodsize =
 761             params_period_size(params) << rme32->capture_frlog;
 762         spin_unlock_irq(&rme32->lock);
 763
 764         return 0;
 765 }
 766
 767 static int snd_rme32_pcm_hw_free(struct snd_pcm_substream *substream)
 768 {
 769         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 770         if (! rme32->fullduplex_mode)
 771                 return 0;
 772         return snd_pcm_lib_free_pages(substream);
 773 }
 774
 775 static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
 776 {
 777         if (!from_pause) {
 778                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 779         }
 780
 781         rme32->wcreg |= RME32_WCR_START;
 782         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 783 }
 784
 785 static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
 786 {
 787         /*
 788          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 789          * the hardware will not stop generating interrupts
 790          */
 791         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 792         if (rme32->rcreg & RME32_RCR_IRQ) {
 793                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 794         }
 795         rme32->wcreg &= ~RME32_WCR_START;
 796         if (rme32->wcreg & RME32_WCR_SEL)
 797                 rme32->wcreg |= RME32_WCR_MUTE;
 798         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 799         if (! to_pause)
 800                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 801 }
 802
 803 static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
 804 {
 805         struct rme32 *rme32 = (struct rme32 *) dev_id;
 806
 807         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 808         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 809                 return IRQ_NONE;
 810         } else {
 811                 if (rme32->capture_substream) {
 812                         snd_pcm_period_elapsed(rme32->capture_substream);
 813                 }
 814                 if (rme32->playback_substream) {
 815                         snd_pcm_period_elapsed(rme32->playback_substream);
 816                 }
 817                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 818         }
 819         return IRQ_HANDLED;
 820 }
 821
 822 static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 823
 824
 825 static struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
 826         .count = ARRAY_SIZE(period_bytes),
 827         .list = period_bytes,
 828         .mask = 0
 829 };
 830
 831 static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
 832 {
 833         if (! rme32->fullduplex_mode) {
 834                 snd_pcm_hw_constraint_single(runtime,
 835                                              SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 836                                              RME32_BUFFER_SIZE);
 837                 snd_pcm_hw_constraint_list(runtime, 0,
 838                                            SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 839                                            &hw_constraints_period_bytes);
 840         }
 841 }
 842
 843 static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
 844 {
 845         int rate, dummy;
 846         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 847         struct snd_pcm_runtime *runtime = substream->runtime;
 848
 849         snd_pcm_set_sync(substream);
 850
 851         spin_lock_irq(&rme32->lock);
 852         if (rme32->playback_substream != NULL) {
 853                 spin_unlock_irq(&rme32->lock);
 854                 return -EBUSY;
 855         }
 856         rme32->wcreg &= ~RME32_WCR_ADAT;
 857         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 858         rme32->playback_substream = substream;
 859         spin_unlock_irq(&rme32->lock);
 860
 861         if (rme32->fullduplex_mode)
 862                 runtime->hw = snd_rme32_spdif_fd_info;
 863         else
 864                 runtime->hw = snd_rme32_spdif_info;
 865         if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
 866                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 867                 runtime->hw.rate_max = 96000;
 868         }
 869         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 870             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 871                 /* AutoSync */
 872                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 873                 runtime->hw.rate_min = rate;
 874                 runtime->hw.rate_max = rate;
 875         }
 876
 877         snd_rme32_set_buffer_constraint(rme32, runtime);
 878
 879         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 880         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 881         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 882                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 883         return 0;
 884 }
 885
 886 static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
 887 {
 888         int isadat, rate;
 889         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 890         struct snd_pcm_runtime *runtime = substream->runtime;
 891
 892         snd_pcm_set_sync(substream);
 893
 894         spin_lock_irq(&rme32->lock);
 895         if (rme32->capture_substream != NULL) {
 896                 spin_unlock_irq(&rme32->lock);
 897                 return -EBUSY;
 898         }
 899         rme32->capture_substream = substream;
 900         spin_unlock_irq(&rme32->lock);
 901
 902         if (rme32->fullduplex_mode)
 903                 runtime->hw = snd_rme32_spdif_fd_info;
 904         else
 905                 runtime->hw = snd_rme32_spdif_info;
 906         if (RME32_PRO_WITH_8414(rme32)) {
 907                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 908                 runtime->hw.rate_max = 96000;
 909         }
 910         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 911                 if (isadat) {
 912                         return -EIO;
 913                 }
 914                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 915                 runtime->hw.rate_min = rate;
 916                 runtime->hw.rate_max = rate;
 917         }
 918
 919         snd_rme32_set_buffer_constraint(rme32, runtime);
 920
 921         return 0;
 922 }
 923
 924 static int
 925 snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
 926 {
 927         int rate, dummy;
 928         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 929         struct snd_pcm_runtime *runtime = substream->runtime;
 930
 931         snd_pcm_set_sync(substream);
 932
 933         spin_lock_irq(&rme32->lock);
 934         if (rme32->playback_substream != NULL) {
 935                 spin_unlock_irq(&rme32->lock);
 936                 return -EBUSY;
 937         }
 938         rme32->wcreg |= RME32_WCR_ADAT;
 939         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 940         rme32->playback_substream = substream;
 941         spin_unlock_irq(&rme32->lock);
 942
 943         if (rme32->fullduplex_mode)
 944                 runtime->hw = snd_rme32_adat_fd_info;
 945         else
 946                 runtime->hw = snd_rme32_adat_info;
 947         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 948             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 949                 /* AutoSync */
 950                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 951                 runtime->hw.rate_min = rate;
 952                 runtime->hw.rate_max = rate;
 953         }
 954
 955         snd_rme32_set_buffer_constraint(rme32, runtime);
 956         return 0;
 957 }
 958
 959 static int
 960 snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
 961 {
 962         int isadat, rate;
 963         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 964         struct snd_pcm_runtime *runtime = substream->runtime;
 965
 966         if (rme32->fullduplex_mode)
 967                 runtime->hw = snd_rme32_adat_fd_info;
 968         else
 969                 runtime->hw = snd_rme32_adat_info;
 970         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 971                 if (!isadat) {
 972                         return -EIO;
 973                 }
 974                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 975                 runtime->hw.rate_min = rate;
 976                 runtime->hw.rate_max = rate;
 977         }
 978
 979         snd_pcm_set_sync(substream);
 980
 981         spin_lock_irq(&rme32->lock);
 982         if (rme32->capture_substream != NULL) {
 983                 spin_unlock_irq(&rme32->lock);
 984                 return -EBUSY;
 985         }
 986         rme32->capture_substream = substream;
 987         spin_unlock_irq(&rme32->lock);
 988
 989         snd_rme32_set_buffer_constraint(rme32, runtime);
 990         return 0;
 991 }
 992
 993 static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
 994 {
 995         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 996         int spdif = 0;
 997
 998         spin_lock_irq(&rme32->lock);
 999         rme32->playback_substream = NULL;
1000         rme32->playback_periodsize = 0;
1001         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1002         spin_unlock_irq(&rme32->lock);
1003         if (spdif) {
1004                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1005                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1006                                SNDRV_CTL_EVENT_MASK_INFO,
1007                                &rme32->spdif_ctl->id);
1008         }
1009         return 0;
1010 }
1011
1012 static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1013 {
1014         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1015
1016         spin_lock_irq(&rme32->lock);
1017         rme32->capture_substream = NULL;
1018         rme32->capture_periodsize = 0;
1019         spin_unlock_irq(&rme32->lock);
1020         return 0;
1021 }
1022
1023 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1024 {
1025         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1026
1027         spin_lock_irq(&rme32->lock);
1028         if (rme32->fullduplex_mode) {
1029                 memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1030                 rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1031                 rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1032         } else {
1033                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1034         }
1035         if (rme32->wcreg & RME32_WCR_SEL)
1036                 rme32->wcreg &= ~RME32_WCR_MUTE;
1037         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1038         spin_unlock_irq(&rme32->lock);
1039         return 0;
1040 }
1041
1042 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1043 {
1044         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1045
1046         spin_lock_irq(&rme32->lock);
1047         if (rme32->fullduplex_mode) {
1048                 memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1049                 rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1050                 rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1051                 rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1052         } else {
1053                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1054         }
1055         spin_unlock_irq(&rme32->lock);
1056         return 0;
1057 }
1058
1059 static int
1060 snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1061 {
1062         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1063         struct snd_pcm_substream *s;
1064
1065         spin_lock(&rme32->lock);
1066         snd_pcm_group_for_each_entry(s, substream) {
1067                 if (s != rme32->playback_substream &&
1068                     s != rme32->capture_substream)
1069                         continue;
1070                 switch (cmd) {
1071                 case SNDRV_PCM_TRIGGER_START:
1072                         rme32->running |= (1 << s->stream);
1073                         if (rme32->fullduplex_mode) {
1074                                 /* remember the current DMA position */
1075                                 if (s == rme32->playback_substream) {
1076                                         rme32->playback_pcm.hw_io =
1077                                         rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1078                                 } else {
1079                                         rme32->capture_pcm.hw_io =
1080                                         rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1081                                 }
1082                         }
1083                         break;
1084                 case SNDRV_PCM_TRIGGER_STOP:
1085                         rme32->running &= ~(1 << s->stream);
1086                         break;
1087                 }
1088                 snd_pcm_trigger_done(s, substream);
1089         }
1090
1091         /* prefill playback buffer */
1092         if (cmd == SNDRV_PCM_TRIGGER_START && rme32->fullduplex_mode) {
1093                 snd_pcm_group_for_each_entry(s, substream) {
1094                         if (s == rme32->playback_substream) {
1095                                 s->ops->ack(s);
1096                                 break;
1097                         }
1098                 }
1099         }
1100
1101         switch (cmd) {
1102         case SNDRV_PCM_TRIGGER_START:
1103                 if (rme32->running && ! RME32_ISWORKING(rme32))
1104                         snd_rme32_pcm_start(rme32, 0);
1105                 break;
1106         case SNDRV_PCM_TRIGGER_STOP:
1107                 if (! rme32->running && RME32_ISWORKING(rme32))
1108                         snd_rme32_pcm_stop(rme32, 0);
1109                 break;
1110         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1111                 if (rme32->running && RME32_ISWORKING(rme32))
1112                         snd_rme32_pcm_stop(rme32, 1);
1113                 break;
1114         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1115                 if (rme32->running && ! RME32_ISWORKING(rme32))
1116                         snd_rme32_pcm_start(rme32, 1);
1117                 break;
1118         }
1119         spin_unlock(&rme32->lock);
1120         return 0;
1121 }
1122
1123 /* pointer callback for halfduplex mode */
1124 static snd_pcm_uframes_t
1125 snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1126 {
1127         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1128         return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1129 }
1130
1131 static snd_pcm_uframes_t
1132 snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1133 {
1134         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1135         return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1136 }
1137
1138
1139 /* ack and pointer callbacks for fullduplex mode */
1140 static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1141                                     struct snd_pcm_indirect *rec, size_t bytes)
1142 {
1143         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1144         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1145                     substream->runtime->dma_area + rec->sw_data, bytes);
1146 }
1147
1148 static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1149 {
1150         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1151         struct snd_pcm_indirect *rec, *cprec;
1152
1153         rec = &rme32->playback_pcm;
1154         cprec = &rme32->capture_pcm;
1155         spin_lock(&rme32->lock);
1156         rec->hw_queue_size = RME32_BUFFER_SIZE;
1157         if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1158                 rec->hw_queue_size -= cprec->hw_ready;
1159         spin_unlock(&rme32->lock);
1160         snd_pcm_indirect_playback_transfer(substream, rec,
1161                                            snd_rme32_pb_trans_copy);
1162         return 0;
1163 }
1164
1165 static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1166                                     struct snd_pcm_indirect *rec, size_t bytes)
1167 {
1168         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1169         memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1170                       rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1171                       bytes);
1172 }
1173
1174 static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1175 {
1176         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1177         snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1178                                           snd_rme32_cp_trans_copy);
1179         return 0;
1180 }
1181
1182 static snd_pcm_uframes_t
1183 snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1184 {
1185         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1186         return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1187                                                  snd_rme32_pcm_byteptr(rme32));
1188 }
1189
1190 static snd_pcm_uframes_t
1191 snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1192 {
1193         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1194         return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1195                                                 snd_rme32_pcm_byteptr(rme32));
1196 }
1197
1198 /* for halfduplex mode */
1199 static struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1200         .open =         snd_rme32_playback_spdif_open,
1201         .close =        snd_rme32_playback_close,
1202         .ioctl =        snd_pcm_lib_ioctl,
1203         .hw_params =    snd_rme32_playback_hw_params,
1204         .hw_free =      snd_rme32_pcm_hw_free,
1205         .prepare =      snd_rme32_playback_prepare,
1206         .trigger =      snd_rme32_pcm_trigger,
1207         .pointer =      snd_rme32_playback_pointer,
1208         .copy =         snd_rme32_playback_copy,
1209         .silence =      snd_rme32_playback_silence,
1210         .mmap =         snd_pcm_lib_mmap_iomem,
1211 };
1212
1213 static struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1214         .open =         snd_rme32_capture_spdif_open,
1215         .close =        snd_rme32_capture_close,
1216         .ioctl =        snd_pcm_lib_ioctl,
1217         .hw_params =    snd_rme32_capture_hw_params,
1218         .hw_free =      snd_rme32_pcm_hw_free,
1219         .prepare =      snd_rme32_capture_prepare,
1220         .trigger =      snd_rme32_pcm_trigger,
1221         .pointer =      snd_rme32_capture_pointer,
1222         .copy =         snd_rme32_capture_copy,
1223         .mmap =         snd_pcm_lib_mmap_iomem,
1224 };
1225
1226 static struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1227         .open =         snd_rme32_playback_adat_open,
1228         .close =        snd_rme32_playback_close,
1229         .ioctl =        snd_pcm_lib_ioctl,
1230         .hw_params =    snd_rme32_playback_hw_params,
1231         .prepare =      snd_rme32_playback_prepare,
1232         .trigger =      snd_rme32_pcm_trigger,
1233         .pointer =      snd_rme32_playback_pointer,
1234         .copy =         snd_rme32_playback_copy,
1235         .silence =      snd_rme32_playback_silence,
1236         .mmap =         snd_pcm_lib_mmap_iomem,
1237 };
1238
1239 static struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1240         .open =         snd_rme32_capture_adat_open,
1241         .close =        snd_rme32_capture_close,
1242         .ioctl =        snd_pcm_lib_ioctl,
1243         .hw_params =    snd_rme32_capture_hw_params,
1244         .prepare =      snd_rme32_capture_prepare,
1245         .trigger =      snd_rme32_pcm_trigger,
1246         .pointer =      snd_rme32_capture_pointer,
1247         .copy =         snd_rme32_capture_copy,
1248         .mmap =         snd_pcm_lib_mmap_iomem,
1249 };
1250
1251 /* for fullduplex mode */
1252 static struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1253         .open =         snd_rme32_playback_spdif_open,
1254         .close =        snd_rme32_playback_close,
1255         .ioctl =        snd_pcm_lib_ioctl,
1256         .hw_params =    snd_rme32_playback_hw_params,
1257         .hw_free =      snd_rme32_pcm_hw_free,
1258         .prepare =      snd_rme32_playback_prepare,
1259         .trigger =      snd_rme32_pcm_trigger,
1260         .pointer =      snd_rme32_playback_fd_pointer,
1261         .ack =          snd_rme32_playback_fd_ack,
1262 };
1263
1264 static struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1265         .open =         snd_rme32_capture_spdif_open,
1266         .close =        snd_rme32_capture_close,
1267         .ioctl =        snd_pcm_lib_ioctl,
1268         .hw_params =    snd_rme32_capture_hw_params,
1269         .hw_free =      snd_rme32_pcm_hw_free,
1270         .prepare =      snd_rme32_capture_prepare,
1271         .trigger =      snd_rme32_pcm_trigger,
1272         .pointer =      snd_rme32_capture_fd_pointer,
1273         .ack =          snd_rme32_capture_fd_ack,
1274 };
1275
1276 static struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1277         .open =         snd_rme32_playback_adat_open,
1278         .close =        snd_rme32_playback_close,
1279         .ioctl =        snd_pcm_lib_ioctl,
1280         .hw_params =    snd_rme32_playback_hw_params,
1281         .prepare =      snd_rme32_playback_prepare,
1282         .trigger =      snd_rme32_pcm_trigger,
1283         .pointer =      snd_rme32_playback_fd_pointer,
1284         .ack =          snd_rme32_playback_fd_ack,
1285 };
1286
1287 static struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1288         .open =         snd_rme32_capture_adat_open,
1289         .close =        snd_rme32_capture_close,
1290         .ioctl =        snd_pcm_lib_ioctl,
1291         .hw_params =    snd_rme32_capture_hw_params,
1292         .prepare =      snd_rme32_capture_prepare,
1293         .trigger =      snd_rme32_pcm_trigger,
1294         .pointer =      snd_rme32_capture_fd_pointer,
1295         .ack =          snd_rme32_capture_fd_ack,
1296 };
1297
1298 static void snd_rme32_free(void *private_data)
1299 {
1300         struct rme32 *rme32 = (struct rme32 *) private_data;
1301
1302         if (rme32 == NULL) {
1303                 return;
1304         }
1305         if (rme32->irq >= 0) {
1306                 snd_rme32_pcm_stop(rme32, 0);
1307                 free_irq(rme32->irq, (void *) rme32);
1308                 rme32->irq = -1;
1309         }
1310         if (rme32->iobase) {
1311                 iounmap(rme32->iobase);
1312                 rme32->iobase = NULL;
1313         }
1314         if (rme32->port) {
1315                 pci_release_regions(rme32->pci);
1316                 rme32->port = 0;
1317         }
1318         pci_disable_device(rme32->pci);
1319 }
1320
1321 static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1322 {
1323         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1324         rme32->spdif_pcm = NULL;
1325 }
1326
1327 static void
1328 snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1329 {
1330         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1331         rme32->adat_pcm = NULL;
1332 }
1333
1334 static int snd_rme32_create(struct rme32 *rme32)
1335 {
1336         struct pci_dev *pci = rme32->pci;
1337         int err;
1338
1339         rme32->irq = -1;
1340         spin_lock_init(&rme32->lock);
1341
1342         if ((err = pci_enable_device(pci)) < 0)
1343                 return err;
1344
1345         if ((err = pci_request_regions(pci, "RME32")) < 0)
1346                 return err;
1347         rme32->port = pci_resource_start(rme32->pci, 0);
1348
1349         rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE);
1350         if (!rme32->iobase) {
1351                 dev_err(rme32->card->dev,
1352                         "unable to remap memory region 0x%lx-0x%lx\n",
1353                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1354                 return -ENOMEM;
1355         }
1356
1357         if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1358                         KBUILD_MODNAME, rme32)) {
1359                 dev_err(rme32->card->dev, "unable to grab IRQ %d\n", pci->irq);
1360                 return -EBUSY;
1361         }
1362         rme32->irq = pci->irq;
1363
1364         /* read the card's revision number */
1365         pci_read_config_byte(pci, 8, &rme32->rev);
1366
1367         /* set up ALSA pcm device for S/PDIF */
1368         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1369                 return err;
1370         }
1371         rme32->spdif_pcm->private_data = rme32;
1372         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1373         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1374         if (rme32->fullduplex_mode) {
1375                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1376                                 &snd_rme32_playback_spdif_fd_ops);
1377                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1378                                 &snd_rme32_capture_spdif_fd_ops);
1379                 snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1380                                                       snd_dma_continuous_data(GFP_KERNEL),
1381                                                       0, RME32_MID_BUFFER_SIZE);
1382                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1383         } else {
1384                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1385                                 &snd_rme32_playback_spdif_ops);
1386                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1387                                 &snd_rme32_capture_spdif_ops);
1388                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1389         }
1390
1391         /* set up ALSA pcm device for ADAT */
1392         if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1393             (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1394                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1395                 rme32->adat_pcm = NULL;
1396         }
1397         else {
1398                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1399                                        1, 1, &rme32->adat_pcm)) < 0)
1400                 {
1401                         return err;
1402                 }
1403                 rme32->adat_pcm->private_data = rme32;
1404                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1405                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1406                 if (rme32->fullduplex_mode) {
1407                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1408                                         &snd_rme32_playback_adat_fd_ops);
1409                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1410                                         &snd_rme32_capture_adat_fd_ops);
1411                         snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1412                                                               snd_dma_continuous_data(GFP_KERNEL),
1413                                                               0, RME32_MID_BUFFER_SIZE);
1414                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1415                 } else {
1416                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1417                                         &snd_rme32_playback_adat_ops);
1418                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1419                                         &snd_rme32_capture_adat_ops);
1420                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1421                 }
1422         }
1423
1424
1425         rme32->playback_periodsize = 0;
1426         rme32->capture_periodsize = 0;
1427
1428         /* make sure playback/capture is stopped, if by some reason active */
1429         snd_rme32_pcm_stop(rme32, 0);
1430
1431         /* reset DAC */
1432         snd_rme32_reset_dac(rme32);
1433
1434         /* reset buffer pointer */
1435         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1436
1437         /* set default values in registers */
1438         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1439                 RME32_WCR_INP_0 | /* input select */
1440                 RME32_WCR_MUTE;  /* muting on */
1441         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1442
1443
1444         /* init switch interface */
1445         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1446                 return err;
1447         }
1448
1449         /* init proc interface */
1450         snd_rme32_proc_init(rme32);
1451
1452         rme32->capture_substream = NULL;
1453         rme32->playback_substream = NULL;
1454
1455         return 0;
1456 }
1457
1458 /*
1459  * proc interface
1460  */
1461
1462 static void
1463 snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1464 {
1465         int n;
1466         struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1467
1468         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1469
1470         snd_iprintf(buffer, rme32->card->longname);
1471         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1472
1473         snd_iprintf(buffer, "\nGeneral settings\n");
1474         if (rme32->fullduplex_mode)
1475                 snd_iprintf(buffer, "  Full-duplex mode\n");
1476         else
1477                 snd_iprintf(buffer, "  Half-duplex mode\n");
1478         if (RME32_PRO_WITH_8414(rme32)) {
1479                 snd_iprintf(buffer, "  receiver: CS8414\n");
1480         } else {
1481                 snd_iprintf(buffer, "  receiver: CS8412\n");
1482         }
1483         if (rme32->wcreg & RME32_WCR_MODE24) {
1484                 snd_iprintf(buffer, "  format: 24 bit");
1485         } else {
1486                 snd_iprintf(buffer, "  format: 16 bit");
1487         }
1488         if (rme32->wcreg & RME32_WCR_MONO) {
1489                 snd_iprintf(buffer, ", Mono\n");
1490         } else {
1491                 snd_iprintf(buffer, ", Stereo\n");
1492         }
1493
1494         snd_iprintf(buffer, "\nInput settings\n");
1495         switch (snd_rme32_getinputtype(rme32)) {
1496         case RME32_INPUT_OPTICAL:
1497                 snd_iprintf(buffer, "  input: optical");
1498                 break;
1499         case RME32_INPUT_COAXIAL:
1500                 snd_iprintf(buffer, "  input: coaxial");
1501                 break;
1502         case RME32_INPUT_INTERNAL:
1503                 snd_iprintf(buffer, "  input: internal");
1504                 break;
1505         case RME32_INPUT_XLR:
1506                 snd_iprintf(buffer, "  input: XLR");
1507                 break;
1508         }
1509         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1510                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1511         } else {
1512                 if (n) {
1513                         snd_iprintf(buffer, " (8 channels)\n");
1514                 } else {
1515                         snd_iprintf(buffer, " (2 channels)\n");
1516                 }
1517                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1518                             snd_rme32_capture_getrate(rme32, &n));
1519         }
1520
1521         snd_iprintf(buffer, "\nOutput settings\n");
1522         if (rme32->wcreg & RME32_WCR_SEL) {
1523                 snd_iprintf(buffer, "  output signal: normal playback");
1524         } else {
1525                 snd_iprintf(buffer, "  output signal: same as input");
1526         }
1527         if (rme32->wcreg & RME32_WCR_MUTE) {
1528                 snd_iprintf(buffer, " (muted)\n");
1529         } else {
1530                 snd_iprintf(buffer, "\n");
1531         }
1532
1533         /* master output frequency */
1534         if (!
1535             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1536              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1537                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1538                             snd_rme32_playback_getrate(rme32));
1539         }
1540         if (rme32->rcreg & RME32_RCR_KMODE) {
1541                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1542         } else {
1543                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1544         }
1545         if (rme32->wcreg & RME32_WCR_PRO) {
1546                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1547         } else {
1548                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1549         }
1550         if (rme32->wcreg & RME32_WCR_EMP) {
1551                 snd_iprintf(buffer, "  emphasis: on\n");
1552         } else {
1553                 snd_iprintf(buffer, "  emphasis: off\n");
1554         }
1555 }
1556
1557 static void snd_rme32_proc_init(struct rme32 *rme32)
1558 {
1559         struct snd_info_entry *entry;
1560
1561         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1562                 snd_info_set_text_ops(entry, rme32, snd_rme32_proc_read);
1563 }
1564
1565 /*
1566  * control interface
1567  */
1568
1569 #define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1570
1571 static int
1572 snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1573                                struct snd_ctl_elem_value *ucontrol)
1574 {
1575         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1576
1577         spin_lock_irq(&rme32->lock);
1578         ucontrol->value.integer.value[0] =
1579             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1580         spin_unlock_irq(&rme32->lock);
1581         return 0;
1582 }
1583 static int
1584 snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1585                                struct snd_ctl_elem_value *ucontrol)
1586 {
1587         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1588         unsigned int val;
1589         int change;
1590
1591         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1592         spin_lock_irq(&rme32->lock);
1593         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1594         change = val != rme32->wcreg;
1595         if (ucontrol->value.integer.value[0])
1596                 val &= ~RME32_WCR_MUTE;
1597         else
1598                 val |= RME32_WCR_MUTE;
1599         rme32->wcreg = val;
1600         writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1601         spin_unlock_irq(&rme32->lock);
1602         return change;
1603 }
1604
1605 static int
1606 snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1607                                  struct snd_ctl_elem_info *uinfo)
1608 {
1609         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1610         static const char * const texts[4] = {
1611                 "Optical", "Coaxial", "Internal", "XLR"
1612         };
1613         int num_items;
1614
1615         switch (rme32->pci->device) {
1616         case PCI_DEVICE_ID_RME_DIGI32:
1617         case PCI_DEVICE_ID_RME_DIGI32_8:
1618                 num_items = 3;
1619                 break;
1620         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1621                 num_items = 4;
1622                 break;
1623         default:
1624                 snd_BUG();
1625                 return -EINVAL;
1626         }
1627         return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1628 }
1629 static int
1630 snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1631                                 struct snd_ctl_elem_value *ucontrol)
1632 {
1633         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1634         unsigned int items = 3;
1635
1636         spin_lock_irq(&rme32->lock);
1637         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1638
1639         switch (rme32->pci->device) {
1640         case PCI_DEVICE_ID_RME_DIGI32:
1641         case PCI_DEVICE_ID_RME_DIGI32_8:
1642                 items = 3;
1643                 break;
1644         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1645                 items = 4;
1646                 break;
1647         default:
1648                 snd_BUG();
1649                 break;
1650         }
1651         if (ucontrol->value.enumerated.item[0] >= items) {
1652                 ucontrol->value.enumerated.item[0] = items - 1;
1653         }
1654
1655         spin_unlock_irq(&rme32->lock);
1656         return 0;
1657 }
1658 static int
1659 snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1660                                 struct snd_ctl_elem_value *ucontrol)
1661 {
1662         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1663         unsigned int val;
1664         int change, items = 3;
1665
1666         switch (rme32->pci->device) {
1667         case PCI_DEVICE_ID_RME_DIGI32:
1668         case PCI_DEVICE_ID_RME_DIGI32_8:
1669                 items = 3;
1670                 break;
1671         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1672                 items = 4;
1673                 break;
1674         default:
1675                 snd_BUG();
1676                 break;
1677         }
1678         val = ucontrol->value.enumerated.item[0] % items;
1679
1680         spin_lock_irq(&rme32->lock);
1681         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1682         snd_rme32_setinputtype(rme32, val);
1683         spin_unlock_irq(&rme32->lock);
1684         return change;
1685 }
1686
1687 static int
1688 snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1689                                  struct snd_ctl_elem_info *uinfo)
1690 {
1691         static const char * const texts[4] = { "AutoSync",
1692                                   "Internal 32.0kHz",
1693                                   "Internal 44.1kHz",
1694                                   "Internal 48.0kHz" };
1695
1696         return snd_ctl_enum_info(uinfo, 1, 4, texts);
1697 }
1698 static int
1699 snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1700                                 struct snd_ctl_elem_value *ucontrol)
1701 {
1702         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1703
1704         spin_lock_irq(&rme32->lock);
1705         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1706         spin_unlock_irq(&rme32->lock);
1707         return 0;
1708 }
1709 static int
1710 snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1711                                 struct snd_ctl_elem_value *ucontrol)
1712 {
1713         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1714         unsigned int val;
1715         int change;
1716
1717         val = ucontrol->value.enumerated.item[0] % 3;
1718         spin_lock_irq(&rme32->lock);
1719         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1720         snd_rme32_setclockmode(rme32, val);
1721         spin_unlock_irq(&rme32->lock);
1722         return change;
1723 }
1724
1725 static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1726 {
1727         u32 val = 0;
1728         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1729         if (val & RME32_WCR_PRO)
1730                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1731         else
1732                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1733         return val;
1734 }
1735
1736 static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1737 {
1738         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1739         if (val & RME32_WCR_PRO)
1740                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1741         else
1742                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1743 }
1744
1745 static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1746                                         struct snd_ctl_elem_info *uinfo)
1747 {
1748         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1749         uinfo->count = 1;
1750         return 0;
1751 }
1752
1753 static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1754                                        struct snd_ctl_elem_value *ucontrol)
1755 {
1756         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1757
1758         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1759                                  rme32->wcreg_spdif);
1760         return 0;
1761 }
1762
1763 static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1764                                        struct snd_ctl_elem_value *ucontrol)
1765 {
1766         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1767         int change;
1768         u32 val;
1769
1770         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1771         spin_lock_irq(&rme32->lock);
1772         change = val != rme32->wcreg_spdif;
1773         rme32->wcreg_spdif = val;
1774         spin_unlock_irq(&rme32->lock);
1775         return change;
1776 }
1777
1778 static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1779                                                struct snd_ctl_elem_info *uinfo)
1780 {
1781         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1782         uinfo->count = 1;
1783         return 0;
1784 }
1785
1786 static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1787                                               struct snd_ctl_elem_value *
1788                                               ucontrol)
1789 {
1790         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1791
1792         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1793                                  rme32->wcreg_spdif_stream);
1794         return 0;
1795 }
1796
1797 static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1798                                               struct snd_ctl_elem_value *
1799                                               ucontrol)
1800 {
1801         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1802         int change;
1803         u32 val;
1804
1805         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1806         spin_lock_irq(&rme32->lock);
1807         change = val != rme32->wcreg_spdif_stream;
1808         rme32->wcreg_spdif_stream = val;
1809         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1810         rme32->wcreg |= val;
1811         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1812         spin_unlock_irq(&rme32->lock);
1813         return change;
1814 }
1815
1816 static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1817                                              struct snd_ctl_elem_info *uinfo)
1818 {
1819         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1820         uinfo->count = 1;
1821         return 0;
1822 }
1823
1824 static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1825                                             struct snd_ctl_elem_value *
1826                                             ucontrol)
1827 {
1828         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1829         return 0;
1830 }
1831
1832 static struct snd_kcontrol_new snd_rme32_controls[] = {
1833         {
1834                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1835                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1836                 .info = snd_rme32_control_spdif_info,
1837                 .get =  snd_rme32_control_spdif_get,
1838                 .put =  snd_rme32_control_spdif_put
1839         },
1840         {
1841                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1842                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1843                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1844                 .info = snd_rme32_control_spdif_stream_info,
1845                 .get =  snd_rme32_control_spdif_stream_get,
1846                 .put =  snd_rme32_control_spdif_stream_put
1847         },
1848         {
1849                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1850                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1851                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1852                 .info = snd_rme32_control_spdif_mask_info,
1853                 .get =  snd_rme32_control_spdif_mask_get,
1854                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1855         },
1856         {
1857                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1858                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1859                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1860                 .info = snd_rme32_control_spdif_mask_info,
1861                 .get =  snd_rme32_control_spdif_mask_get,
1862                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1863         },
1864         {
1865                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1866                 .name = "Input Connector",
1867                 .info = snd_rme32_info_inputtype_control,
1868                 .get =  snd_rme32_get_inputtype_control,
1869                 .put =  snd_rme32_put_inputtype_control
1870         },
1871         {
1872                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1873                 .name = "Loopback Input",
1874                 .info = snd_rme32_info_loopback_control,
1875                 .get =  snd_rme32_get_loopback_control,
1876                 .put =  snd_rme32_put_loopback_control
1877         },
1878         {
1879                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1880                 .name = "Sample Clock Source",
1881                 .info = snd_rme32_info_clockmode_control,
1882                 .get =  snd_rme32_get_clockmode_control,
1883                 .put =  snd_rme32_put_clockmode_control
1884         }
1885 };
1886
1887 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1888 {
1889         int idx, err;
1890         struct snd_kcontrol *kctl;
1891
1892         for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1893                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1894                         return err;
1895                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1896                         rme32->spdif_ctl = kctl;
1897         }
1898
1899         return 0;
1900 }
1901
1902 /*
1903  * Card initialisation
1904  */
1905
1906 static void snd_rme32_card_free(struct snd_card *card)
1907 {
1908         snd_rme32_free(card->private_data);
1909 }
1910
1911 static int
1912 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1913 {
1914         static int dev;
1915         struct rme32 *rme32;
1916         struct snd_card *card;
1917         int err;
1918
1919         if (dev >= SNDRV_CARDS) {
1920                 return -ENODEV;
1921         }
1922         if (!enable[dev]) {
1923                 dev++;
1924                 return -ENOENT;
1925         }
1926
1927         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1928                            sizeof(struct rme32), &card);
1929         if (err < 0)
1930                 return err;
1931         card->private_free = snd_rme32_card_free;
1932         rme32 = (struct rme32 *) card->private_data;
1933         rme32->card = card;
1934         rme32->pci = pci;
1935         if (fullduplex[dev])
1936                 rme32->fullduplex_mode = 1;
1937         if ((err = snd_rme32_create(rme32)) < 0) {
1938                 snd_card_free(card);
1939                 return err;
1940         }
1941
1942         strcpy(card->driver, "Digi32");
1943         switch (rme32->pci->device) {
1944         case PCI_DEVICE_ID_RME_DIGI32:
1945                 strcpy(card->shortname, "RME Digi32");
1946                 break;
1947         case PCI_DEVICE_ID_RME_DIGI32_8:
1948                 strcpy(card->shortname, "RME Digi32/8");
1949                 break;
1950         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1951                 strcpy(card->shortname, "RME Digi32 PRO");
1952                 break;
1953         }
1954         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1955                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1956
1957         if ((err = snd_card_register(card)) < 0) {
1958                 snd_card_free(card);
1959                 return err;
1960         }
1961         pci_set_drvdata(pci, card);
1962         dev++;
1963         return 0;
1964 }
1965
1966 static void snd_rme32_remove(struct pci_dev *pci)
1967 {
1968         snd_card_free(pci_get_drvdata(pci));
1969 }
1970
1971 static struct pci_driver rme32_driver = {
1972         .name =         KBUILD_MODNAME,
1973         .id_table =     snd_rme32_ids,
1974         .probe =        snd_rme32_probe,
1975         .remove =       snd_rme32_remove,
1976 };
1977
1978 module_pci_driver(rme32_driver);