arm: sunxi: Add clock to pinctrl node

The port controller needs the apb0_pio clock enabled to be able to
work. This commit declares that on the device tree.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 6b3a6b25f1f860382d97ddfcab8e35f7395b20d2..f6405204e7e219d095170c3e9e2b6d05e9e330b4 100644 (file)
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -21,6 +21,7 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun4i-a10-pinctrl";
                        reg = <0x01c20800 0x400>;
+                       clocks = <&apb0_gates 5>;
                        gpio-controller;
                        #address-cells = <1>;
                        #size-cells = <0>;

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 945bfacb0561953d6e47bd00ffb3ceb7aca7474b..10ee8eedd36bb462923f3051fe7290ce27fcd670 100644 (file)
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -22,6 +22,7 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun5i-a13-pinctrl";
                        reg = <0x01c20800 0x400>;
+                       clocks = <&apb0_gates 5>;
                        gpio-controller;
                        #address-cells = <1>;
                        #size-cells = <0>;