ARM: msm: Remove pen_release usage

pen_release is no longer required as the synchronization
is now managed by generic arm code.
This is done as suggested in https://lkml.org/lkml/2013/6/4/184

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>

diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 8e307a10d3c344a5dd2acb6900812baef9e4b43c..721f27f50d96877863142a2943d52dcae52cd69b 100644 (file)
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -19,7 +19,7 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
 CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
 
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-obj-$(CONFIG_SMP) += headsmp.o platsmp.o
+obj-$(CONFIG_SMP) += platsmp.o
 
 obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
 obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o

diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
deleted file mode 100644 (file)
index 6c62c3f..0000000
--- a/arch/arm/mach-msm/headsmp.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- *  linux/arch/arm/mach-realview/headsmp.S
- *
- *  Copyright (c) 2003 ARM Limited
- *  All Rights Reserved
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-/*
- * MSM specific entry point for secondary CPUs.  This provides
- * a "holding pen" into which all secondary cores are held until we're
- * ready for them to initialise.
- */
-ENTRY(msm_secondary_startup)
-       mrc     p15, 0, r0, c0, c0, 5
-       and     r0, r0, #15
-       adr     r4, 1f
-       ldmia   r4, {r5, r6}
-       sub     r4, r4, r5
-       add     r6, r6, r4
-pen:   ldr     r7, [r6]
-       cmp     r7, r0
-       bne     pen
-
-       /*
-        * we've been released from the holding pen: secondary_stack
-        * should now contain the SVC stack for this core
-        */
-       b       secondary_startup
-ENDPROC(msm_secondary_startup)
-
-       .align
-1:     .long   .
-       .long   pen_release

diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
index 326a87261f9ac039248bd33f77f516f8c3fef87b..cea80fc6e48ee3f7a6286efb85146044974852f8 100644 (file)
--- a/arch/arm/mach-msm/hotplug.c
+++ b/arch/arm/mach-msm/hotplug.c
@@ -24,33 +24,10 @@ static inline void cpu_leave_lowpower(void)
 
 static inline void platform_do_lowpower(unsigned int cpu)
 {
-       /* Just enter wfi for now. TODO: Properly shut off the cpu. */
-       for (;;) {
-               /*
-                * here's the WFI
-                */
-               asm("wfi"
-                   :
-                   :
-                   : "memory", "cc");
-
-               if (pen_release == cpu_logical_map(cpu)) {
-                       /*
-                        * OK, proper wakeup, we're done
-                        */
-                       break;
-               }
-
-               /*
-                * getting here, means that we have come out of WFI without
-                * having been woken up - this shouldn't happen
-                *
-                * The trouble is, letting people know about this is not really
-                * possible, since we are currently running incoherently, and
-                * therefore cannot safely call printk() or anything else
-                */
-               pr_debug("CPU%u: spurious wakeup call\n", cpu);
-       }
+       asm("wfi"
+           :
+           :
+           : "memory", "cc");
 }
 
 /*

diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index f10a1f58fde96a0cb70b6cfc43ae4b5203f67466..3721b31ef6ae7f46b65a0965886a72afb6a7c71e 100644 (file)
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -12,13 +12,10 @@
 #include <linux/errno.h>
 #include <linux/delay.h>
 #include <linux/device.h>
-#include <linux/jiffies.h>
 #include <linux/smp.h>
 #include <linux/io.h>
 
-#include <asm/cacheflush.h>
 #include <asm/cputype.h>
-#include <asm/mach-types.h>
 #include <asm/smp_plat.h>
 
 #include "scm-boot.h"
@@ -28,7 +25,7 @@
 #define SCSS_CPU1CORE_RESET 0xD80
 #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64
 
-extern void msm_secondary_startup(void);
+extern void secondary_startup(void);
 
 static DEFINE_SPINLOCK(boot_lock);
 
@@ -40,13 +37,6 @@ static inline int get_core_count(void)
 
 static void msm_secondary_init(unsigned int cpu)
 {
-       /*
-        * let the primary processor know we're out of the
-        * pen, then head off into the C entry point
-        */
-       pen_release = -1;
-       smp_wmb();
-
        /*
         * Synchronise with the boot thread.
         */
@@ -57,7 +47,7 @@ static void msm_secondary_init(unsigned int cpu)
 static void prepare_cold_cpu(unsigned int cpu)
 {
        int ret;
-       ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
+       ret = scm_set_boot_addr(virt_to_phys(secondary_startup),
                                SCM_FLAG_COLDBOOT_CPU1);
        if (ret == 0) {
                void __iomem *sc1_base_ptr;
@@ -75,7 +65,6 @@ static void prepare_cold_cpu(unsigned int cpu)
 
 static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
-       unsigned long timeout;
        static int cold_boot_done;
 
        /* Only need to bring cpu out of reset this way once */
@@ -90,17 +79,6 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
         */
        spin_lock(&boot_lock);
 
-       /*
-        * The secondary processor is waiting to be released from
-        * the holding pen - release it, then wait for it to flag
-        * that it has been released by resetting pen_release.
-        *
-        * Note that "pen_release" is the hardware CPU ID, whereas
-        * "cpu" is Linux's internal ID.
-        */
-       pen_release = cpu_logical_map(cpu);
-       sync_cache_w(&pen_release);
-
        /*
         * Send the secondary CPU a soft interrupt, thereby causing
         * the boot monitor to read the system wide flags register,
@@ -108,22 +86,13 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
         */
        arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 
-       timeout = jiffies + (1 * HZ);
-       while (time_before(jiffies, timeout)) {
-               smp_rmb();
-               if (pen_release == -1)
-                       break;
-
-               udelay(10);
-       }
-
        /*
         * now the secondary core is starting up let it run its
         * calibrations, then wait for it to finish
         */
        spin_unlock(&boot_lock);
 
-       return pen_release != -1 ? -ENOSYS : 0;
+       return 0;
 }
 
 /*