]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: dts: Add basic support for TMDSEVM3730 (Mistral AM/DM37x EVM)
authorTony Lindgren <tony@atomide.com>
Mon, 14 Oct 2013 18:31:43 +0000 (11:31 -0700)
committerTony Lindgren <tony@atomide.com>
Mon, 14 Oct 2013 18:34:37 +0000 (11:34 -0700)
I've tested the serial, MMC, smsc911x, wl12xx, and off-idle support
with the pinctrl patches, so it probably works better than the
board-*.c files ever did. Also the board-omap3evm.c file is broken
for the DSS, and has been for a while. Patches are welcome to fix
it in this .dts file, let's just drop the board-*.c file for this.

Note that off-idle currently requires doing request_irq() on the
wake-up pin from pinctrl-single IRQ domain until we can handle
that in some Linux generic way.

[tony@atomide.com: updated for make dtbs build fix]
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/omap3-evm-37xx.dts [new file with mode: 0644]
arch/arm/boot/dts/omap3-evm-common.dtsi

index 9df7d2c15e7d2b1a3f81cfb8913b4a6076ba775d..96d8f1f5043089780bce57c6a2197e8b9de5a5e5 100644 (file)
@@ -172,6 +172,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
        omap3-devkit8000.dtb \
        omap3-beagle-xm.dtb \
        omap3-evm.dtb \
+       omap3-evm-37xx.dtb \
        omap3-n900.dtb \
        omap3-tobi.dtb \
        omap3-gta04.dtb \
diff --git a/arch/arm/boot/dts/omap3-evm-37xx.dts b/arch/arm/boot/dts/omap3-evm-37xx.dts
new file mode 100644 (file)
index 0000000..4df68ad
--- /dev/null
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "omap36xx.dtsi"
+#include "omap3-evm-common.dtsi"
+
+
+/ {
+       model = "TI OMAP37XX EVM (TMDSEVM3730)";
+       compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x10000000>; /* 256 MB */
+       };
+
+       wl12xx_vmmc: wl12xx_vmmc {
+               pinctrl-names = "default";
+               pinctrl-0 = <&wl12xx_gpio>;
+       };
+};
+
+&omap3_pmx_core {
+       mmc1_pins: pinmux_mmc1_pins {
+               pinctrl-single,pins = <
+                       0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
+                       0x116 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_cmd.sdmmc1_cmd */
+                       0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat0.sdmmc1_dat0 */
+                       0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
+                       0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
+                       0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
+                       0x120 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat4.sdmmc1_dat4 */
+                       0x122 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat5.sdmmc1_dat5 */
+                       0x124 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat6.sdmmc1_dat6 */
+                       0x126 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat7.sdmmc1_dat7 */
+               >;
+       };
+
+       /* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
+       mmc2_pins: pinmux_mmc2_pins {
+               pinctrl-single,pins = <
+                       0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
+                       0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
+                       0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
+                       0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
+                       0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
+                       0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc2_dat3 */
+               >;
+       };
+
+       uart3_pins: pinmux_uart3_pins {
+               pinctrl-single,pins = <
+                       0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
+                       0x170 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx_irtx.uart3_tx_irtx */
+               >;
+       };
+
+       wl12xx_gpio: pinmux_wl12xx_gpio {
+               pinctrl-single,pins = <
+                       0x150 (PIN_OUTPUT | MUX_MODE4)          /* uart1_cts.gpio_150 */
+                       0x14e (PIN_INPUT | MUX_MODE4)           /* uart1_rts.gpio_149 */
+               >;
+       };
+
+       smsc911x_pins: pinmux_smsc911x_pins {
+               pinctrl-single,pins = <
+                       0x1a2 (PIN_INPUT | MUX_MODE4)           /* mcspi1_cs2.gpio_176 */
+               >;
+       };
+};
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_pins>;
+};
+
+&mmc3 {
+       status = "disabled";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+};
+
+&gpmc {
+       ranges = <0 0 0x00000000 0x20000000>,
+                <5 0 0x2c000000 0x01000000>;
+
+       nand@0,0 {
+               linux,mtd-name= "hynix,h8kds0un0mer-4em";
+               reg = <0 0 0>;
+               nand-bus-width = <16>;
+               ti,nand-ecc-opt = "bch8";
+
+               gpmc,sync-clk-ps = <0>;
+               gpmc,cs-on-ns = <0>;
+               gpmc,cs-rd-off-ns = <44>;
+               gpmc,cs-wr-off-ns = <44>;
+               gpmc,adv-on-ns = <6>;
+               gpmc,adv-rd-off-ns = <34>;
+               gpmc,adv-wr-off-ns = <44>;
+               gpmc,we-off-ns = <40>;
+               gpmc,oe-off-ns = <54>;
+               gpmc,access-ns = <64>;
+               gpmc,rd-cycle-ns = <82>;
+               gpmc,wr-cycle-ns = <82>;
+               gpmc,wr-access-ns = <40>;
+               gpmc,wr-data-mux-bus-ns = <0>;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partition@0 {
+                       label = "X-Loader";
+                       reg = <0 0x80000>;
+               };
+               partition@0x80000 {
+                       label = "U-Boot";
+                       reg = <0x80000 0x1c0000>;
+               };
+               partition@0x1c0000 {
+                       label = "Environment";
+                       reg = <0x240000 0x40000>;
+               };
+               partition@0x280000 {
+                       label = "Kernel";
+                       reg = <0x280000 0x500000>;
+               };
+               partition@0x780000 {
+                       label = "Filesystem";
+                       reg = <0x780000 0x1f880000>;
+               };
+       };
+
+       ethernet@gpmc {
+               pinctrl-names = "default";
+               pinctrl-0 = <&smsc911x_pins>;
+       };
+};
index 75753bb28535b077bb5a9f075c3c9299940daeaf..b5493296d1038949cc8b08bf8097979b4b9f7f1d 100644 (file)
@@ -2,6 +2,8 @@
  * Common support for omap3 EVM boards
  */
 
+#include "omap-gpmc-smsc911x.dtsi"
+
 / {
        cpus {
                cpu@0 {
                        linux,default-trigger = "default-on";
                };
        };
+
+       wl12xx_vmmc: wl12xx_vmmc {
+               compatible = "regulator-fixed";
+               regulator-name = "vwl1271";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               gpio = <&gpio5 22 0>;   /* gpio150 */
+               startup-delay-us = <70000>;
+               enable-active-high;
+               vin-supply = <&vmmc2>;
+       };
 };
 
 &i2c1 {
        };
 };
 
+&mmc1 {
+       vmmc-supply = <&vmmc1>;
+       vmmc_aux-supply = <&vsim>;
+       bus-width = <8>;
+};
+
+&mmc2 {
+       vmmc-supply = <&wl12xx_vmmc>;
+       non-removable;
+       bus-width = <4>;
+       cap-power-off-card;
+};
+
 &twl_gpio {
        ti,use-leds;
 };
        mode = <3>;
        power = <50>;
 };
+
+&gpmc {
+       ethernet@gpmc {
+               interrupt-parent = <&gpio6>;
+               interrupts = <16 8>;
+               reg = <5 0 0xff>;
+       };
+};