ARM: dts: imx6: edmqmx6: add SPI bus and flash

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index aac4690afed3a215e49b715f7a49bab433db65a0..5b45270e1176924eb88d572c3720e45109db6f8f 100644 (file)
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -95,6 +95,20 @@
        };
 };
 
+&ecspi5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi5>;
+       fsl,spi-num-chipselects = <1>;
+       cs-gpios = <&gpio1 12 0>;
+       status = "okay";
+
+       flash: m25p80@0 {
+               compatible = "m25p80";
+               spi-max-frequency = <40000000>;
+               reg = <0>;
+       };
+};
+
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
@@ -268,6 +282,15 @@
                        >;
                };
 
+               pinctrl_ecspi5: ecspi5rp-1 {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x80000000
+                               MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x80000000
+                               MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x80000000
+                               MX6QDL_PAD_SD2_DAT3__GPIO1_IO12         0x80000000
+                       >;
+               };
+
                pinctrl_enet: enetgrp {
                        fsl,pins = <
                                MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0