Merge git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac

Pull EDAC patches from Mauro Carvalho Chehab:

 - the second part of the EDAC rework:
    - Add the sysfs nodes that exports the real memory layout, instead
      of the fake one (needed to properly represent Intel memory
      controllers since 2002)
    - convert EDAC MC to use "struct device" instead of creating the
      sysfs nodes via the kobj API
    - adds a tracepoint to represent memory errors

 - some cleanup patches

 - some fixes at i5000, i5400 and EDAC core

 - a new EDAC driver for Caldera.

* git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac: (33 commits)
  edac i5000, i5400: fix pointer math in i5000_get_mc_regs()
  edac: allow specifying the error count with fake_inject
  edac: add support for Calxeda highbank L2 cache ecc
  edac: add support for Calxeda highbank memory controller
  edac: create top-level debugfs directory
  sb_edac: properly handle error count
  i7core_edac: properly handle error count
  edac: edac_mc_handle_error(): add an error_count parameter
  edac: remove arch-specific parameter for the error handler
  amd64_edac: Don't pass driver name as an error parameter
  edac_mc: check for allocation failure in edac_mc_alloc()
  edac: Increase version to 3.0.0
  edac_mc: Cleanup per-dimm_info debug messages
  edac: Convert debugfX to edac_dbg(X,
  edac: Use more normal debugging macro style
  edac: Don't add __func__ or __FILE__ for debugf[0-9] msgs
  Edac: Add ABI Documentation for the new device nodes
  edac: move documentation ABI to ABI/testing/sysfs-devices-edac
  i7core_edac: change the mem allocation scheme to make Documentation/kobject.txt happy
  edac: change the mem allocation scheme to make Documentation/kobject.txt happy
  ...

diff --cc arch/arm/boot/dts/highbank.dts
index 2e1cfa00c25b4af5bd81f328f775471f9ed2bee9,4d641ea4e27119f4e622df1f234fc89bb94ff82d..9fecf1ae777bac14b2770c0cf09dd601e85b73b8
--- 1/arch/arm/boot/dts/highbank.dts
--- 2/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@@ -127,9 -116,14 +127,15 @@@
                        compatible = "calxeda,hb-sdhci";
                        reg = <0xffe0e000 0x1000>;
                        interrupts = <0 90 4>;
 +                      clocks = <&eclk>;
                };
  
+               memory-controller@fff00000 {
+                       compatible = "calxeda,hb-ddr-ctrl";
+                       reg = <0xfff00000 0x1000>;
+                       interrupts = <0 91 4>;
+               };
+ 
                ipc@fff20000 {
                        compatible = "arm,pl320", "arm,primecell";
                        reg = <0xfff20000 0x1000>;
@@@ -214,67 -192,14 +220,73 @@@
                sregs@fff3c000 {
                        compatible = "calxeda,hb-sregs";
                        reg = <0xfff3c000 0x1000>;
 +
 +                      clocks {
 +                              #address-cells = <1>;
 +                              #size-cells = <0>;
 +
 +                              osc: oscillator {
 +                                      #clock-cells = <0>;
 +                                      compatible = "fixed-clock";
 +                                      clock-frequency = <33333000>;
 +                              };
 +
 +                              ddrpll: ddrpll {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-pll-clock";
 +                                      clocks = <&osc>;
 +                                      reg = <0x108>;
 +                              };
 +
 +                              a9pll: a9pll {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-pll-clock";
 +                                      clocks = <&osc>;
 +                                      reg = <0x100>;
 +                              };
 +
 +                              a9periphclk: a9periphclk {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-a9periph-clock";
 +                                      clocks = <&a9pll>;
 +                                      reg = <0x104>;
 +                              };
 +
 +                              a9bclk: a9bclk {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-a9bus-clock";
 +                                      clocks = <&a9pll>;
 +                                      reg = <0x104>;
 +                              };
 +
 +                              emmcpll: emmcpll {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-pll-clock";
 +                                      clocks = <&osc>;
 +                                      reg = <0x10C>;
 +                              };
 +
 +                              eclk: eclk {
 +                                      #clock-cells = <0>;
 +                                      compatible = "calxeda,hb-emmc-clock";
 +                                      clocks = <&emmcpll>;
 +                                      reg = <0x114>;
 +                              };
 +
 +                              pclk: pclk {
 +                                      #clock-cells = <0>;
 +                                      compatible = "fixed-clock";
 +                                      clock-frequency = <150000000>;
 +                              };
 +                      };
                };
  
+               sregs@fff3c200 {
+                       compatible = "calxeda,hb-sregs-l2-ecc";
+                       reg = <0xfff3c200 0x100>;
+                       interrupts = <0 71 4  0 72 4>;
+               };
+ 
                dma@fff3d000 {
                        compatible = "arm,pl330", "arm,primecell";
                        reg = <0xfff3d000 0x1000>;