ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes

The xdmac channel configuration is done in one cell not two. This error
prevents from probing devices correctly.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Fixes: 83906783b766 ("ARM: at91/dt: sama5d4: add aes, sha and tdes nodes")
Cc: stable@vger.kernel.org # 4.1
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index bafdb3af19aa1892861e3f09ab3eabe886189aea..653a1f851f2b8f5bf641cb586ede4f0841105c6b 100644 (file)
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1240,10 +1240,10 @@
                                compatible = "atmel,at91sam9g46-aes";
                                reg = <0xfc044000 0x100>;
                                interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
-                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
-                                       AT91_XDMAC_DT_PERID(41)>,
-                                      <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
-                                       AT91_XDMAC_DT_PERID(40)>;
+                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                       | AT91_XDMAC_DT_PERID(41))>,
+                                      <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                       | AT91_XDMAC_DT_PERID(40))>;
                                dma-names = "tx", "rx";
                                clocks = <&aes_clk>;
                                clock-names = "aes_clk";
@@ -1254,10 +1254,10 @@
                                compatible = "atmel,at91sam9g46-tdes";
                                reg = <0xfc04c000 0x100>;
                                interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
-                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
-                                       AT91_XDMAC_DT_PERID(42)>,
-                                      <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
-                                       AT91_XDMAC_DT_PERID(43)>;
+                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                       | AT91_XDMAC_DT_PERID(42))>,
+                                      <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                       | AT91_XDMAC_DT_PERID(43))>;
                                dma-names = "tx", "rx";
                                clocks = <&tdes_clk>;
                                clock-names = "tdes_clk";
@@ -1268,8 +1268,8 @@
                                compatible = "atmel,at91sam9g46-sha";
                                reg = <0xfc050000 0x100>;
                                interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
-                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
-                                       AT91_XDMAC_DT_PERID(44)>;
+                               dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+                                       | AT91_XDMAC_DT_PERID(44))>;
                                dma-names = "tx";
                                clocks = <&sha_clk>;
                                clock-names = "sha_clk";