]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: shmobile: r8a7791: add ADSP clocks
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tue, 30 Dec 2014 20:20:34 +0000 (23:20 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 23 Feb 2015 21:30:57 +0000 (06:30 +0900)
Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.

Based on the original patch by Konstantin Kozhevnikov
<konstantin.kozhevnikov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7791.dtsi
include/dt-bindings/clock/r8a7791-clock.h

index ff49b95df0ecc7505953fea38981ca5184cdba87..1e593a2b55fa6fe42bc9b88eba05a6b4b7ef50f1 100644 (file)
                        #clock-cells = <1>;
                        clock-output-names = "main", "pll0", "pll1", "pll3",
                                             "lb", "qspi", "sdh", "sd0", "z",
-                                            "rcan";
+                                            "rcan", "adsp";
                };
 
                /* Variable factor clocks */
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-                       clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
+                       clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
+                                <&extal_clk>, <&p_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
-                               R8A7791_CLK_THERMAL R8A7791_CLK_PWM
+                               R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
+                               R8A7791_CLK_PWM
                        >;
-                       clock-output-names = "audmac0", "audmac1", "thermal", "pwm";
+                       clock-output-names = "audmac0", "audmac1", "adsp_mod",
+                                            "thermal", "pwm";
                };
                mstp7_clks: mstp7_clks@e615014c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
index a45a36307895f69ef40108e6dd13fb321372c4bd..8fc5dc8faeea40517f25ef8811c3a97f75bfad93 100644 (file)
@@ -21,6 +21,7 @@
 #define R8A7791_CLK_SD0                        7
 #define R8A7791_CLK_Z                  8
 #define R8A7791_CLK_RCAN               9
+#define R8A7791_CLK_ADSP               10
 
 /* MSTP0 */
 #define R8A7791_CLK_MSIOF0             0
@@ -72,6 +73,7 @@
 /* MSTP5 */
 #define R8A7791_CLK_AUDIO_DMAC1                1
 #define R8A7791_CLK_AUDIO_DMAC0                2
+#define R8A7791_CLK_ADSP_MOD           6
 #define R8A7791_CLK_THERMAL            22
 #define R8A7791_CLK_PWM                        23