]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
x86, cacheinfo: Unify AMD L3 cache index disable checking
authorBorislav Petkov <borislav.petkov@amd.com>
Thu, 22 Apr 2010 14:06:58 +0000 (16:06 +0200)
committerH. Peter Anvin <hpa@zytor.com>
Fri, 23 Apr 2010 00:17:20 +0000 (17:17 -0700)
All F10h CPUs starting with model 8 resp. 9, stepping 1, support L3
cache index disable. Concentrate the family, model, stepping checking at
one place and enable the feature implicitly on upcoming Fam10h models.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1271945222-5283-2-git-send-email-bp@amd64.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/kernel/cpu/intel_cacheinfo.c

index b3eeb66c0a51af93e3d7015aa737ce3af66ed1e3..acfb08383908072a48d9f9fe3f4d1c73ac197e0d 100644 (file)
@@ -328,18 +328,22 @@ static unsigned int __cpuinit amd_calc_l3_indices(void)
 static void __cpuinit
 amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
 {
-       if (index < 3)
+       if (boot_cpu_data.x86 != 0x10)
                return;
 
-       if (boot_cpu_data.x86 == 0x11)
+       if (index < 3)
                return;
 
        /* see errata #382 and #388 */
-       if ((boot_cpu_data.x86 == 0x10) &&
-           ((boot_cpu_data.x86_model < 0x8) ||
-            (boot_cpu_data.x86_mask  < 0x1)))
+       if (boot_cpu_data.x86_model < 0x8)
                return;
 
+       if ((boot_cpu_data.x86_model == 0x8 ||
+            boot_cpu_data.x86_model == 0x9)
+               &&
+            boot_cpu_data.x86_mask < 0x1)
+                       return;
+
        this_leaf->can_disable = true;
        this_leaf->l3_indices  = amd_calc_l3_indices();
 }
@@ -443,8 +447,7 @@ __cpuinit cpuid4_cache_lookup_regs(int index,
 
        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
                amd_cpuid4(index, &eax, &ebx, &ecx);
-               if (boot_cpu_data.x86 >= 0x10)
-                       amd_check_l3_disable(index, this_leaf);
+               amd_check_l3_disable(index, this_leaf);
        } else {
                cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
        }