ARM: dts: mx6qdl: Add CAAM device node

Add CAAM device node to the i.MX6 device tree.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e6d13592080d7c701056c2f6a73326aa11e715b5..b5c89cd5c4a1acdf3b2f8afde15bde14318762bb 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -836,10 +836,31 @@
                        reg = <0x02100000 0x100000>;
                        ranges;
 
-                       caam@02100000 {
-                               reg = <0x02100000 0x40000>;
-                               interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
-                                            <0 106 IRQ_TYPE_LEVEL_HIGH>;
+                       crypto: caam@2100000 {
+                               compatible = "fsl,sec-v4.0";
+                               fsl,sec-era = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               reg = <0x2100000 0x10000>;
+                               ranges = <0 0x2100000 0x10000>;
+                               interrupt-parent = <&intc>;
+                               clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
+                                        <&clks IMX6QDL_CLK_CAAM_ACLK>,
+                                        <&clks IMX6QDL_CLK_CAAM_IPG>,
+                                        <&clks IMX6QDL_CLK_EIM_SLOW>;
+                               clock-names = "mem", "aclk", "ipg", "emi_slow";
+
+                               sec_jr0: jr0@1000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x1000 0x1000>;
+                                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                               };
+
+                               sec_jr1: jr1@2000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x2000 0x1000>;
+                                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                               };
                        };
 
                        aipstz@0217c000 { /* AIPSTZ2 */