We want the staging fixes here as well.
on-chip EEPROM. After power-up or chip reset the device will
automatically load the saved configuration.
+What: /sys/.../iio:deviceX/in_proximity_raw
+What: /sys/.../iio:deviceX/in_proximity_input
+What: /sys/.../iio:deviceX/in_proximityY_raw
+KernelVersion: 3.4
+Contact: linux-iio@vger.kernel.org
+Description:
+ Proximity measurement indicating that some
+ object is near the sensor, usually be observing
+ reflectivity of infrared or ultrasound emitted.
+ Often these sensors are unit less and as such conversion
+ to SI units is not possible. Where it is, the units should
+ be meters.
+
What: /sys/.../iio:deviceX/in_illuminanceY_input
What: /sys/.../iio:deviceX/in_illuminanceY_raw
What: /sys/.../iio:deviceX/in_illuminanceY_mean_raw
S: Odd Fixes
F: drivers/staging/comedi/
-STAGING - CRYSTAL HD VIDEO DECODER
-M: Naren Sankar <nsankar@broadcom.com>
-M: Jarod Wilson <jarod@wilsonet.com>
-M: Scott Davilla <davilla@4pi.com>
-M: Manu Abraham <abraham.manu@gmail.com>
-S: Odd Fixes
-F: drivers/staging/crystalhd/
-
STAGING - ECHO CANCELLER
M: Steve Underwood <steveu@coppice.org>
M: David Rowe <david@rowetel.com>
for (index = 0; index < num_ports; index++) {
int ipd_port = cvmx_helper_get_ipd_port(interface, index);
__cvmx_helper_sgmii_hardware_init_one_time(interface, index);
- __cvmx_helper_sgmii_link_set(ipd_port,
- __cvmx_helper_sgmii_link_get
- (ipd_port));
-
+ /* Linux kernel driver will call ....link_set with the
+ * proper link state. In the simulator there is no
+ * link state polling and hence it is set from
+ * here.
+ */
+ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
+ __cvmx_helper_sgmii_link_set(ipd_port,
+ __cvmx_helper_sgmii_link_get(ipd_port));
}
return 0;
To compile this driver as a module, choose M here: the module
will be called mma8452.
+config KXCJK1013
+ tristate "Kionix 3-Axis Accelerometer Driver"
+ depends on I2C
+ select IIO_BUFFER
+ select IIO_TRIGGERED_BUFFER
+ help
+ Say Y here if you want to build a driver for the Kionix KXCJK-1013
+ triaxial acceleration sensor.
+
+ To compile this driver as a module, choose M here: the module will
+ be called kxcjk-1013.
+
endmenu
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_BMA180) += bma180.o
obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
+obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
obj-$(CONFIG_KXSD9) += kxsd9.o
obj-$(CONFIG_MMA8452) += mma8452.o
--- /dev/null
+/*
+ * KXCJK-1013 3-axis accelerometer driver
+ * Copyright (c) 2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/acpi.h>
+#include <linux/gpio/consumer.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/trigger.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/triggered_buffer.h>
+#include <linux/iio/accel/kxcjk_1013.h>
+
+#define KXCJK1013_DRV_NAME "kxcjk1013"
+#define KXCJK1013_IRQ_NAME "kxcjk1013_event"
+
+#define KXCJK1013_REG_XOUT_L 0x06
+/*
+ * From low byte X axis register, all the other addresses of Y and Z can be
+ * obtained by just applying axis offset. The following axis defines are just
+ * provide clarity, but not used.
+ */
+#define KXCJK1013_REG_XOUT_H 0x07
+#define KXCJK1013_REG_YOUT_L 0x08
+#define KXCJK1013_REG_YOUT_H 0x09
+#define KXCJK1013_REG_ZOUT_L 0x0A
+#define KXCJK1013_REG_ZOUT_H 0x0B
+
+#define KXCJK1013_REG_DCST_RESP 0x0C
+#define KXCJK1013_REG_WHO_AM_I 0x0F
+#define KXCJK1013_REG_INT_SRC1 0x16
+#define KXCJK1013_REG_INT_SRC2 0x17
+#define KXCJK1013_REG_STATUS_REG 0x18
+#define KXCJK1013_REG_INT_REL 0x1A
+#define KXCJK1013_REG_CTRL1 0x1B
+#define KXCJK1013_REG_CTRL2 0x1D
+#define KXCJK1013_REG_INT_CTRL1 0x1E
+#define KXCJK1013_REG_INT_CTRL2 0x1F
+#define KXCJK1013_REG_DATA_CTRL 0x21
+#define KXCJK1013_REG_WAKE_TIMER 0x29
+#define KXCJK1013_REG_SELF_TEST 0x3A
+#define KXCJK1013_REG_WAKE_THRES 0x6A
+
+#define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
+#define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
+#define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
+#define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
+#define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
+#define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
+#define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4)
+#define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5)
+
+#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
+#define KXCJK1013_MAX_STARTUP_TIME_US 100000
+
+struct kxcjk1013_data {
+ struct i2c_client *client;
+ struct iio_trigger *trig;
+ bool trig_mode;
+ struct mutex mutex;
+ s16 buffer[8];
+ int power_state;
+ u8 odr_bits;
+ bool active_high_intr;
+};
+
+enum kxcjk1013_axis {
+ AXIS_X,
+ AXIS_Y,
+ AXIS_Z,
+};
+
+enum kxcjk1013_mode {
+ STANDBY,
+ OPERATION,
+};
+
+static const struct {
+ int val;
+ int val2;
+ int odr_bits;
+} samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09},
+ {3, 125000, 0x0A}, {6, 25000, 0x0B}, {12, 5000, 0},
+ {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03},
+ {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06},
+ {1600, 0, 0x07} };
+
+/* Refer to section 4 of the specification */
+static const struct {
+ int odr_bits;
+ int usec;
+} odr_start_up_times[] = { {0x08, 100000}, {0x09, 100000}, {0x0A, 100000},
+ {0x0B, 100000}, { 0, 80000}, {0x01, 41000},
+ {0x02, 21000}, {0x03, 11000}, {0x04, 6400},
+ {0x05, 3900}, {0x06, 2700}, {0x07, 2100} };
+
+static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
+ enum kxcjk1013_mode mode)
+{
+ int ret;
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
+ return ret;
+ }
+
+ if (mode == STANDBY)
+ ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
+ else
+ ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
+
+ ret = i2c_smbus_write_byte_data(data->client,
+ KXCJK1013_REG_CTRL1, ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int kxcjk1013_chip_ack_intr(struct kxcjk1013_data *data)
+{
+ int ret;
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_rel\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
+{
+ int ret;
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading who_am_i\n");
+ return ret;
+ }
+
+ dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
+
+ ret = kxcjk1013_set_mode(data, STANDBY);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
+ return ret;
+ }
+
+ /* Setting range to 4G */
+ ret |= KXCJK1013_REG_CTRL1_BIT_GSEL0;
+ ret &= ~KXCJK1013_REG_CTRL1_BIT_GSEL1;
+
+ /* Set 12 bit mode */
+ ret |= KXCJK1013_REG_CTRL1_BIT_RES;
+
+ ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
+ ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_ctrl\n");
+ return ret;
+ }
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
+ return ret;
+ }
+
+ data->odr_bits = ret;
+
+ /* Set up INT polarity */
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
+ return ret;
+ }
+
+ if (data->active_high_intr)
+ ret |= KXCJK1013_REG_INT_REG1_BIT_IEA;
+ else
+ ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA;
+
+ ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
+ ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int kxcjk1013_chip_setup_interrupt(struct kxcjk1013_data *data,
+ bool status)
+{
+ int ret;
+
+ /* This is requirement by spec to change state to STANDBY */
+ ret = kxcjk1013_set_mode(data, STANDBY);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
+ return ret;
+ }
+
+ if (status)
+ ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
+ else
+ ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
+
+ ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
+ ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
+ return ret;
+ }
+
+ ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
+ return ret;
+ }
+
+ if (status)
+ ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
+ else
+ ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
+
+ ret = i2c_smbus_write_byte_data(data->client,
+ KXCJK1013_REG_CTRL1, ret);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+static int kxcjk1013_convert_freq_to_bit(int val, int val2)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
+ if (samp_freq_table[i].val == val &&
+ samp_freq_table[i].val2 == val2) {
+ return samp_freq_table[i].odr_bits;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
+{
+ int ret;
+ int odr_bits;
+
+ odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
+ if (odr_bits < 0)
+ return odr_bits;
+
+ /* To change ODR, the chip must be set to STANDBY as per spec */
+ ret = kxcjk1013_set_mode(data, STANDBY);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
+ odr_bits);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Error writing data_ctrl\n");
+ return ret;
+ }
+
+ data->odr_bits = odr_bits;
+
+ /* Check, if the ODR is changed after data enable */
+ if (data->power_state) {
+ /* Set the state back to operation */
+ ret = kxcjk1013_set_mode(data, OPERATION);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
+ if (samp_freq_table[i].odr_bits == data->odr_bits) {
+ *val = samp_freq_table[i].val;
+ *val2 = samp_freq_table[i].val2;
+ return IIO_VAL_INT_PLUS_MICRO;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
+{
+ u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
+ int ret;
+
+ ret = i2c_smbus_read_word_data(data->client, reg);
+ if (ret < 0) {
+ dev_err(&data->client->dev,
+ "failed to read accel_%c registers\n", 'x' + axis);
+ return ret;
+ }
+
+ return ret;
+}
+
+static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(odr_start_up_times); ++i) {
+ if (odr_start_up_times[i].odr_bits == data->odr_bits)
+ return odr_start_up_times[i].usec;
+ }
+
+ return KXCJK1013_MAX_STARTUP_TIME_US;
+}
+
+static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, int *val,
+ int *val2, long mask)
+{
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+ int ret;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ mutex_lock(&data->mutex);
+ if (iio_buffer_enabled(indio_dev))
+ ret = -EBUSY;
+ else {
+ int sleep_val;
+
+ ret = kxcjk1013_set_mode(data, OPERATION);
+ if (ret < 0) {
+ mutex_unlock(&data->mutex);
+ return ret;
+ }
+ ++data->power_state;
+ sleep_val = kxcjk1013_get_startup_times(data);
+ if (sleep_val < 20000)
+ usleep_range(sleep_val, 20000);
+ else
+ msleep_interruptible(sleep_val/1000);
+ ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
+ if (--data->power_state == 0)
+ kxcjk1013_set_mode(data, STANDBY);
+ }
+ mutex_unlock(&data->mutex);
+
+ if (ret < 0)
+ return ret;
+
+ *val = sign_extend32(ret >> 4, 11);
+ return IIO_VAL_INT;
+
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ *val2 = 19163; /* range +-4g (4/2047*9.806650) */
+ return IIO_VAL_INT_PLUS_MICRO;
+
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ mutex_lock(&data->mutex);
+ ret = kxcjk1013_get_odr(data, val, val2);
+ mutex_unlock(&data->mutex);
+ return ret;
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, int val,
+ int val2, long mask)
+{
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+ int ret;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_SAMP_FREQ:
+ mutex_lock(&data->mutex);
+ ret = kxcjk1013_set_odr(data, val, val2);
+ mutex_unlock(&data->mutex);
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
+ struct iio_trigger *trig)
+{
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+
+ if (data->trig != trig)
+ return -EINVAL;
+
+ return 0;
+}
+
+static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
+ "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
+
+static struct attribute *kxcjk1013_attributes[] = {
+ &iio_const_attr_sampling_frequency_available.dev_attr.attr,
+ NULL,
+};
+
+static const struct attribute_group kxcjk1013_attrs_group = {
+ .attrs = kxcjk1013_attributes,
+};
+
+#define KXCJK1013_CHANNEL(_axis) { \
+ .type = IIO_ACCEL, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##_axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
+ BIT(IIO_CHAN_INFO_SAMP_FREQ), \
+ .scan_index = AXIS_##_axis, \
+ .scan_type = { \
+ .sign = 's', \
+ .realbits = 12, \
+ .storagebits = 16, \
+ .shift = 4, \
+ .endianness = IIO_LE, \
+ }, \
+}
+
+static const struct iio_chan_spec kxcjk1013_channels[] = {
+ KXCJK1013_CHANNEL(X),
+ KXCJK1013_CHANNEL(Y),
+ KXCJK1013_CHANNEL(Z),
+ IIO_CHAN_SOFT_TIMESTAMP(3),
+};
+
+static const struct iio_info kxcjk1013_info = {
+ .attrs = &kxcjk1013_attrs_group,
+ .read_raw = kxcjk1013_read_raw,
+ .write_raw = kxcjk1013_write_raw,
+ .validate_trigger = kxcjk1013_validate_trigger,
+ .driver_module = THIS_MODULE,
+};
+
+static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
+{
+ struct iio_poll_func *pf = p;
+ struct iio_dev *indio_dev = pf->indio_dev;
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+ int bit, ret, i = 0;
+
+ mutex_lock(&data->mutex);
+
+ for_each_set_bit(bit, indio_dev->buffer->scan_mask,
+ indio_dev->masklength) {
+ ret = kxcjk1013_get_acc_reg(data, bit);
+ if (ret < 0) {
+ kxcjk1013_chip_ack_intr(data);
+ mutex_unlock(&data->mutex);
+ goto err;
+ }
+ data->buffer[i++] = ret;
+ }
+
+ kxcjk1013_chip_ack_intr(data);
+
+ mutex_unlock(&data->mutex);
+
+ iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
+ pf->timestamp);
+err:
+ iio_trigger_notify_done(indio_dev->trig);
+
+ return IRQ_HANDLED;
+}
+
+static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
+ bool state)
+{
+ struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+
+ mutex_lock(&data->mutex);
+ if (state) {
+ kxcjk1013_chip_setup_interrupt(data, true);
+ kxcjk1013_set_mode(data, OPERATION);
+ ++data->power_state;
+ } else {
+ if (--data->power_state) {
+ mutex_unlock(&data->mutex);
+ return 0;
+ }
+ kxcjk1013_chip_setup_interrupt(data, false);
+ kxcjk1013_set_mode(data, STANDBY);
+ }
+ mutex_unlock(&data->mutex);
+
+ return 0;
+}
+
+static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
+ .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
+ .owner = THIS_MODULE,
+};
+
+static int kxcjk1013_acpi_gpio_probe(struct i2c_client *client,
+ struct kxcjk1013_data *data)
+{
+ const struct acpi_device_id *id;
+ struct device *dev;
+ struct gpio_desc *gpio;
+ int ret;
+
+ if (!client)
+ return -EINVAL;
+
+ dev = &client->dev;
+ if (!ACPI_HANDLE(dev))
+ return -ENODEV;
+
+ id = acpi_match_device(dev->driver->acpi_match_table, dev);
+ if (!id)
+ return -ENODEV;
+
+ /* data ready gpio interrupt pin */
+ gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0);
+ if (IS_ERR(gpio)) {
+ dev_err(dev, "acpi gpio get index failed\n");
+ return PTR_ERR(gpio);
+ }
+
+ ret = gpiod_direction_input(gpio);
+ if (ret)
+ return ret;
+
+ ret = gpiod_to_irq(gpio);
+
+ dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
+
+ return ret;
+}
+
+static int kxcjk1013_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct kxcjk1013_data *data;
+ struct iio_dev *indio_dev;
+ struct iio_trigger *trig = NULL;
+ struct kxcjk_1013_platform_data *pdata;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ i2c_set_clientdata(client, indio_dev);
+ data->client = client;
+
+ pdata = dev_get_platdata(&client->dev);
+ if (pdata)
+ data->active_high_intr = pdata->active_high_intr;
+ else
+ data->active_high_intr = true; /* default polarity */
+
+ ret = kxcjk1013_chip_init(data);
+ if (ret < 0)
+ return ret;
+
+ mutex_init(&data->mutex);
+
+ indio_dev->dev.parent = &client->dev;
+ indio_dev->channels = kxcjk1013_channels;
+ indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
+ indio_dev->name = KXCJK1013_DRV_NAME;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &kxcjk1013_info;
+
+ if (client->irq < 0)
+ client->irq = kxcjk1013_acpi_gpio_probe(client, data);
+
+ if (client->irq >= 0) {
+ trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
+ indio_dev->id);
+ if (!trig)
+ return -ENOMEM;
+
+ data->trig_mode = true;
+
+ ret = devm_request_irq(&client->dev, client->irq,
+ iio_trigger_generic_data_rdy_poll,
+ IRQF_TRIGGER_RISING,
+ KXCJK1013_IRQ_NAME,
+ trig);
+ if (ret) {
+ dev_err(&client->dev, "unable to request IRQ\n");
+ goto err_trigger_free;
+ }
+
+ trig->dev.parent = &client->dev;
+ trig->ops = &kxcjk1013_trigger_ops;
+ iio_trigger_set_drvdata(trig, indio_dev);
+ data->trig = trig;
+ indio_dev->trig = trig;
+
+ ret = iio_trigger_register(trig);
+ if (ret)
+ goto err_trigger_free;
+
+ ret = iio_triggered_buffer_setup(indio_dev,
+ &iio_pollfunc_store_time,
+ kxcjk1013_trigger_handler,
+ NULL);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "iio triggered buffer setup failed\n");
+ goto err_trigger_unregister;
+ }
+ }
+
+ ret = devm_iio_device_register(&client->dev, indio_dev);
+ if (ret < 0) {
+ dev_err(&client->dev, "unable to register iio device\n");
+ goto err_buffer_cleanup;
+ }
+
+ return 0;
+
+err_buffer_cleanup:
+ if (data->trig_mode)
+ iio_triggered_buffer_cleanup(indio_dev);
+err_trigger_unregister:
+ if (data->trig_mode)
+ iio_trigger_unregister(trig);
+err_trigger_free:
+ if (data->trig_mode)
+ iio_trigger_free(trig);
+
+ return ret;
+}
+
+static int kxcjk1013_remove(struct i2c_client *client)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(client);
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+
+ if (data->trig_mode) {
+ iio_triggered_buffer_cleanup(indio_dev);
+ iio_trigger_unregister(data->trig);
+ iio_trigger_free(data->trig);
+ }
+
+ mutex_lock(&data->mutex);
+ kxcjk1013_set_mode(data, STANDBY);
+ mutex_unlock(&data->mutex);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int kxcjk1013_suspend(struct device *dev)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+
+ mutex_lock(&data->mutex);
+ kxcjk1013_set_mode(data, STANDBY);
+ mutex_unlock(&data->mutex);
+
+ return 0;
+}
+
+static int kxcjk1013_resume(struct device *dev)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
+ struct kxcjk1013_data *data = iio_priv(indio_dev);
+
+ mutex_lock(&data->mutex);
+
+ if (data->power_state)
+ kxcjk1013_set_mode(data, OPERATION);
+
+ mutex_unlock(&data->mutex);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(kxcjk1013_pm_ops, kxcjk1013_suspend, kxcjk1013_resume);
+#define KXCJK1013_PM_OPS (&kxcjk1013_pm_ops)
+#else
+#define KXCJK1013_PM_OPS NULL
+#endif
+
+static const struct acpi_device_id kx_acpi_match[] = {
+ {"KXCJ1013", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
+
+static const struct i2c_device_id kxcjk1013_id[] = {
+ {"kxcjk1013", 0},
+ {}
+};
+
+MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
+
+static struct i2c_driver kxcjk1013_driver = {
+ .driver = {
+ .name = KXCJK1013_DRV_NAME,
+ .acpi_match_table = ACPI_PTR(kx_acpi_match),
+ .pm = KXCJK1013_PM_OPS,
+ },
+ .probe = kxcjk1013_probe,
+ .remove = kxcjk1013_remove,
+ .id_table = kxcjk1013_id,
+};
+module_i2c_driver(kxcjk1013_driver);
+
+MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/interrupt.h>
+#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/platform_data/ad7298.h>
-#define AD7298_WRITE (1 << 15) /* write to the control register */
-#define AD7298_REPEAT (1 << 14) /* repeated conversion enable */
-#define AD7298_CH(x) (1 << (13 - (x))) /* channel select */
-#define AD7298_TSENSE (1 << 5) /* temperature conversion enable */
-#define AD7298_EXTREF (1 << 2) /* external reference enable */
-#define AD7298_TAVG (1 << 1) /* temperature sensor averaging enable */
-#define AD7298_PDD (1 << 0) /* partial power down enable */
+#define AD7298_WRITE BIT(15) /* write to the control register */
+#define AD7298_REPEAT BIT(14) /* repeated conversion enable */
+#define AD7298_CH(x) BIT(13 - (x)) /* channel select */
+#define AD7298_TSENSE BIT(5) /* temperature conversion enable */
+#define AD7298_EXTREF BIT(2) /* external reference enable */
+#define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
+#define AD7298_PDD BIT(0) /* partial power down enable */
#define AD7298_MAX_CHAN 8
-#define AD7298_BITS 12
-#define AD7298_STORAGE_BITS 16
#define AD7298_INTREF_mV 2500
#define AD7298_CH_TEMP 9
-#define RES_MASK(bits) ((1 << (bits)) - 1)
-
struct ad7298_state {
struct spi_device *spi;
struct regulator *reg;
return ret;
if (chan->address != AD7298_CH_TEMP)
- *val = ret & RES_MASK(AD7298_BITS);
+ *val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/module.h>
+#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
-#define RES_MASK(bits) ((1 << (bits)) - 1)
-
struct ad7476_state;
struct ad7476_chip_info {
if (ret < 0)
return ret;
*val = (ret >> st->chip_info->channel[0].scan_type.shift) &
- RES_MASK(st->chip_info->channel[0].scan_type.realbits);
+ GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (!st->chip_info->int_vref_uv) {
#include <linux/err.h>
#include <linux/module.h>
#include <linux/interrupt.h>
+#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/platform_data/ad7887.h>
-#define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */
-#define AD7887_DUAL (1 << 4) /* dual-channel mode */
-#define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */
-#define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */
-#define AD7887_PM_MODE1 (0) /* CS based shutdown */
-#define AD7887_PM_MODE2 (1) /* full on */
-#define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */
-#define AD7887_PM_MODE4 (3) /* standby mode */
+#define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
+#define AD7887_DUAL BIT(4) /* dual-channel mode */
+#define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
+#define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
+#define AD7887_PM_MODE1 0 /* CS based shutdown */
+#define AD7887_PM_MODE2 1 /* full on */
+#define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
+#define AD7887_PM_MODE4 3 /* standby mode */
enum ad7887_channels {
AD7887_CH0,
AD7887_CH1,
};
-#define RES_MASK(bits) ((1 << (bits)) - 1)
-
/**
* struct ad7887_chip_info - chip specifc information
* @int_vref_mv: the internal reference voltage
if (ret < 0)
return ret;
*val = ret >> chan->scan_type.shift;
- *val &= RES_MASK(chan->scan_type.realbits);
+ *val &= GENMASK(chan->scan_type.realbits - 1, 0);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (st->reg) {
* struct ad799x_chip_info - chip specific information
* @channel: channel specification
* @num_channels: number of channels
- * @monitor_mode: whether the chip supports monitor interrupts
* @default_config: device default configuration
- * @event_attrs: pointer to the monitor event attribute group
+ * @info: pointer to iio_info struct
*/
struct ad799x_chip_info {
struct iio_chan_spec channel[9];
complete(&sigma_delta->completion);
disable_irq_nosync(irq);
sigma_delta->irq_dis = true;
- iio_trigger_poll(sigma_delta->trig, iio_get_time_ns());
+ iio_trigger_poll(sigma_delta->trig);
return IRQ_HANDLED;
}
if (iio_buffer_enabled(idev)) {
disable_irq_nosync(irq);
- iio_trigger_poll(idev->trig, iio_get_time_ns());
+ iio_trigger_poll(idev->trig);
} else {
st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
st->done = true;
return IRQ_NONE;
if ((status & XADC_AXI_INT_EOS) && xadc->trigger)
- iio_trigger_poll(xadc->trigger, 0);
+ iio_trigger_poll(xadc->trigger);
if (status & XADC_AXI_INT_ALARM_MASK) {
/*
#include <linux/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/module.h>
+#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/events.h>
#include <linux/iio/dac/ad5504.h>
-#define AD5505_BITS 12
-#define AD5504_RES_MASK ((1 << (AD5505_BITS)) - 1)
-
-#define AD5504_CMD_READ (1 << 15)
-#define AD5504_CMD_WRITE (0 << 15)
+#define AD5504_RES_MASK GENMASK(11, 0)
+#define AD5504_CMD_READ BIT(15)
+#define AD5504_CMD_WRITE 0
#define AD5504_ADDR(addr) ((addr) << 12)
/* Registers */
/**
* struct ad5446_state - driver instance specific data
- * @us: spi_device
+ * @spi: spi_device
* @reg: supply regulator
* @vref_mv: actual reference voltage used
* @pwr_down_mask power down mask
#include <linux/sysfs.h>
#include <linux/regulator/consumer.h>
#include <linux/module.h>
+#include <linux/bitops.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/dac/ad5791.h>
-#define AD5791_RES_MASK(x) ((1 << (x)) - 1)
-#define AD5791_DAC_MASK AD5791_RES_MASK(20)
-#define AD5791_DAC_MSB (1 << 19)
+#define AD5791_DAC_MASK GENMASK(19, 0)
-#define AD5791_CMD_READ (1 << 23)
-#define AD5791_CMD_WRITE (0 << 23)
+#define AD5791_CMD_READ BIT(23)
+#define AD5791_CMD_WRITE 0
#define AD5791_ADDR(addr) ((addr) << 20)
/* Registers */
#define AD5791_ADDR_SW_CTRL 4
/* Control Register */
-#define AD5791_CTRL_RBUF (1 << 1)
-#define AD5791_CTRL_OPGND (1 << 2)
-#define AD5791_CTRL_DACTRI (1 << 3)
-#define AD5791_CTRL_BIN2SC (1 << 4)
-#define AD5791_CTRL_SDODIS (1 << 5)
+#define AD5791_CTRL_RBUF BIT(1)
+#define AD5791_CTRL_OPGND BIT(2)
+#define AD5791_CTRL_DACTRI BIT(3)
+#define AD5791_CTRL_BIN2SC BIT(4)
+#define AD5791_CTRL_SDODIS BIT(5)
#define AD5761_CTRL_LINCOMP(x) ((x) << 6)
#define AD5791_LINCOMP_0_10 0
#define AD5780_LINCOMP_10_20 12
/* Software Control Register */
-#define AD5791_SWCTRL_LDAC (1 << 0)
-#define AD5791_SWCTRL_CLR (1 << 1)
-#define AD5791_SWCTRL_RESET (1 << 2)
+#define AD5791_SWCTRL_LDAC BIT(0)
+#define AD5791_SWCTRL_CLR BIT(1)
+#define AD5791_SWCTRL_RESET BIT(2)
#define AD5791_DAC_PWRDN_6K 0
#define AD5791_DAC_PWRDN_3STATE 1
/**
* struct ad5791_state - driver instance specific data
- * @us: spi_device
+ * @spi: spi_device
* @reg_vdd: positive supply regulator
* @reg_vss: negative supply regulator
* @chip_info: chip model specific constants
switch (mask) {
case IIO_CHAN_INFO_RAW:
- val &= AD5791_RES_MASK(chan->scan_type.realbits);
+ val &= GENMASK(chan->scan_type.realbits - 1, 0);
val <<= chan->scan_type.shift;
return ad5791_spi_write(st, chan->address, val);
return trig;
}
-void iio_trigger_poll(struct iio_trigger *trig, s64 time)
+void iio_trigger_poll(struct iio_trigger *trig)
{
int i;
irqreturn_t iio_trigger_generic_data_rdy_poll(int irq, void *private)
{
- iio_trigger_poll(private, iio_get_time_ns());
+ iio_trigger_poll(private);
return IRQ_HANDLED;
}
EXPORT_SYMBOL(iio_trigger_generic_data_rdy_poll);
-void iio_trigger_poll_chained(struct iio_trigger *trig, s64 time)
+void iio_trigger_poll_chained(struct iio_trigger *trig)
{
int i;
trig->ops->try_reenable)
if (trig->ops->try_reenable(trig))
/* Missed an interrupt so launch new poll now */
- iio_trigger_poll(trig, 0);
+ iio_trigger_poll(trig);
}
EXPORT_SYMBOL(iio_trigger_notify_done);
struct gp2ap020a00f_data *data =
container_of(work, struct gp2ap020a00f_data, work);
- iio_trigger_poll(data->trig, 0);
+ iio_trigger_poll(data->trig);
}
static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
To compile this driver as a module, choose M here: the module
will be called ak8975.
+config AK09911
+ tristate "Asahi Kasei AK09911 3-axis Compass"
+ depends on I2C
+ help
+ Say yes here to build support for Asahi Kasei AK09911 3-Axis
+ Magnetometer.
+
+ To compile this driver as a module, choose M here: the module
+ will be called ak09911.
+
config MAG3110
tristate "Freescale MAG3110 3-Axis Magnetometer"
depends on I2C
#
# When adding new entries keep the list in alphabetical order
+obj-$(CONFIG_AK09911) += ak09911.o
obj-$(CONFIG_AK8975) += ak8975.o
obj-$(CONFIG_MAG3110) += mag3110.o
obj-$(CONFIG_HID_SENSOR_MAGNETOMETER_3D) += hid-sensor-magn-3d.o
--- /dev/null
+/*
+ * AK09911 3-axis compass driver
+ * Copyright (c) 2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/iio/iio.h>
+
+#define AK09911_REG_WIA1 0x00
+#define AK09911_REG_WIA2 0x01
+#define AK09911_WIA1_VALUE 0x48
+#define AK09911_WIA2_VALUE 0x05
+
+#define AK09911_REG_ST1 0x10
+#define AK09911_REG_HXL 0x11
+#define AK09911_REG_HXH 0x12
+#define AK09911_REG_HYL 0x13
+#define AK09911_REG_HYH 0x14
+#define AK09911_REG_HZL 0x15
+#define AK09911_REG_HZH 0x16
+
+#define AK09911_REG_ASAX 0x60
+#define AK09911_REG_ASAY 0x61
+#define AK09911_REG_ASAZ 0x62
+
+#define AK09911_REG_CNTL1 0x30
+#define AK09911_REG_CNTL2 0x31
+#define AK09911_REG_CNTL3 0x32
+
+#define AK09911_MODE_SNG_MEASURE 0x01
+#define AK09911_MODE_SELF_TEST 0x10
+#define AK09911_MODE_FUSE_ACCESS 0x1F
+#define AK09911_MODE_POWERDOWN 0x00
+#define AK09911_RESET_DATA 0x01
+
+#define AK09911_REG_CNTL1 0x30
+#define AK09911_REG_CNTL2 0x31
+#define AK09911_REG_CNTL3 0x32
+
+#define AK09911_RAW_TO_GAUSS(asa) ((((asa) + 128) * 6000) / 256)
+
+#define AK09911_MAX_CONVERSION_TIMEOUT_MS 500
+#define AK09911_CONVERSION_DONE_POLL_TIME_MS 10
+
+struct ak09911_data {
+ struct i2c_client *client;
+ struct mutex lock;
+ u8 asa[3];
+ long raw_to_gauss[3];
+};
+
+static const int ak09911_index_to_reg[] = {
+ AK09911_REG_HXL, AK09911_REG_HYL, AK09911_REG_HZL,
+};
+
+static int ak09911_set_mode(struct i2c_client *client, u8 mode)
+{
+ int ret;
+
+ switch (mode) {
+ case AK09911_MODE_SNG_MEASURE:
+ case AK09911_MODE_SELF_TEST:
+ case AK09911_MODE_FUSE_ACCESS:
+ case AK09911_MODE_POWERDOWN:
+ ret = i2c_smbus_write_byte_data(client,
+ AK09911_REG_CNTL2, mode);
+ if (ret < 0) {
+ dev_err(&client->dev, "set_mode error\n");
+ return ret;
+ }
+ /* After mode change wait atleast 100us */
+ usleep_range(100, 500);
+ break;
+ default:
+ dev_err(&client->dev,
+ "%s: Unknown mode(%d).", __func__, mode);
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+/* Get Sensitivity Adjustment value */
+static int ak09911_get_asa(struct i2c_client *client)
+{
+ struct iio_dev *indio_dev = i2c_get_clientdata(client);
+ struct ak09911_data *data = iio_priv(indio_dev);
+ int ret;
+
+ ret = ak09911_set_mode(client, AK09911_MODE_FUSE_ACCESS);
+ if (ret < 0)
+ return ret;
+
+ /* Get asa data and store in the device data. */
+ ret = i2c_smbus_read_i2c_block_data(client, AK09911_REG_ASAX,
+ 3, data->asa);
+ if (ret < 0) {
+ dev_err(&client->dev, "Not able to read asa data\n");
+ return ret;
+ }
+
+ ret = ak09911_set_mode(client, AK09911_MODE_POWERDOWN);
+ if (ret < 0)
+ return ret;
+
+ data->raw_to_gauss[0] = AK09911_RAW_TO_GAUSS(data->asa[0]);
+ data->raw_to_gauss[1] = AK09911_RAW_TO_GAUSS(data->asa[1]);
+ data->raw_to_gauss[2] = AK09911_RAW_TO_GAUSS(data->asa[2]);
+
+ return 0;
+}
+
+static int ak09911_verify_chip_id(struct i2c_client *client)
+{
+ u8 wia_val[2];
+ int ret;
+
+ ret = i2c_smbus_read_i2c_block_data(client, AK09911_REG_WIA1,
+ 2, wia_val);
+ if (ret < 0) {
+ dev_err(&client->dev, "Error reading WIA\n");
+ return ret;
+ }
+
+ dev_dbg(&client->dev, "WIA %02x %02x\n", wia_val[0], wia_val[1]);
+
+ if (wia_val[0] != AK09911_WIA1_VALUE ||
+ wia_val[1] != AK09911_WIA2_VALUE) {
+ dev_err(&client->dev, "Device ak09911 not found\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int wait_conversion_complete_polled(struct ak09911_data *data)
+{
+ struct i2c_client *client = data->client;
+ u8 read_status;
+ u32 timeout_ms = AK09911_MAX_CONVERSION_TIMEOUT_MS;
+ int ret;
+
+ /* Wait for the conversion to complete. */
+ while (timeout_ms) {
+ msleep_interruptible(AK09911_CONVERSION_DONE_POLL_TIME_MS);
+ ret = i2c_smbus_read_byte_data(client, AK09911_REG_ST1);
+ if (ret < 0) {
+ dev_err(&client->dev, "Error in reading ST1\n");
+ return ret;
+ }
+ read_status = ret & 0x01;
+ if (read_status)
+ break;
+ timeout_ms -= AK09911_CONVERSION_DONE_POLL_TIME_MS;
+ }
+ if (!timeout_ms) {
+ dev_err(&client->dev, "Conversion timeout happened\n");
+ return -EIO;
+ }
+
+ return read_status;
+}
+
+static int ak09911_read_axis(struct iio_dev *indio_dev, int index, int *val)
+{
+ struct ak09911_data *data = iio_priv(indio_dev);
+ struct i2c_client *client = data->client;
+ int ret;
+
+ mutex_lock(&data->lock);
+
+ ret = ak09911_set_mode(client, AK09911_MODE_SNG_MEASURE);
+ if (ret < 0)
+ goto fn_exit;
+
+ ret = wait_conversion_complete_polled(data);
+ if (ret < 0)
+ goto fn_exit;
+
+ /* Read data */
+ ret = i2c_smbus_read_word_data(client, ak09911_index_to_reg[index]);
+ if (ret < 0) {
+ dev_err(&client->dev, "Read axis data fails\n");
+ goto fn_exit;
+ }
+
+ mutex_unlock(&data->lock);
+
+ /* Clamp to valid range. */
+ *val = sign_extend32(clamp_t(s16, ret, -8192, 8191), 13);
+
+ return IIO_VAL_INT;
+
+fn_exit:
+ mutex_unlock(&data->lock);
+
+ return ret;
+}
+
+static int ak09911_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2,
+ long mask)
+{
+ struct ak09911_data *data = iio_priv(indio_dev);
+
+ switch (mask) {
+ case IIO_CHAN_INFO_RAW:
+ return ak09911_read_axis(indio_dev, chan->address, val);
+ case IIO_CHAN_INFO_SCALE:
+ *val = 0;
+ *val2 = data->raw_to_gauss[chan->address];
+ return IIO_VAL_INT_PLUS_MICRO;
+ }
+
+ return -EINVAL;
+}
+
+#define AK09911_CHANNEL(axis, index) \
+ { \
+ .type = IIO_MAGN, \
+ .modified = 1, \
+ .channel2 = IIO_MOD_##axis, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+ BIT(IIO_CHAN_INFO_SCALE), \
+ .address = index, \
+ }
+
+static const struct iio_chan_spec ak09911_channels[] = {
+ AK09911_CHANNEL(X, 0), AK09911_CHANNEL(Y, 1), AK09911_CHANNEL(Z, 2),
+};
+
+static const struct iio_info ak09911_info = {
+ .read_raw = &ak09911_read_raw,
+ .driver_module = THIS_MODULE,
+};
+
+static const struct acpi_device_id ak_acpi_match[] = {
+ {"AK009911", 0},
+ { },
+};
+MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
+
+static int ak09911_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct iio_dev *indio_dev;
+ struct ak09911_data *data;
+ const char *name;
+ int ret;
+
+ ret = ak09911_verify_chip_id(client);
+ if (ret) {
+ dev_err(&client->dev, "AK00911 not detected\n");
+ return -ENODEV;
+ }
+
+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+ if (indio_dev == NULL)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ i2c_set_clientdata(client, indio_dev);
+
+ data->client = client;
+ mutex_init(&data->lock);
+
+ ret = ak09911_get_asa(client);
+ if (ret)
+ return ret;
+
+ if (id)
+ name = id->name;
+ else if (ACPI_HANDLE(&client->dev))
+ name = dev_name(&client->dev);
+ else
+ return -ENODEV;
+
+ dev_dbg(&client->dev, "Asahi compass chip %s\n", name);
+
+ indio_dev->dev.parent = &client->dev;
+ indio_dev->channels = ak09911_channels;
+ indio_dev->num_channels = ARRAY_SIZE(ak09911_channels);
+ indio_dev->info = &ak09911_info;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->name = name;
+
+ return devm_iio_device_register(&client->dev, indio_dev);
+}
+
+static const struct i2c_device_id ak09911_id[] = {
+ {"ak09911", 0},
+ {}
+};
+
+MODULE_DEVICE_TABLE(i2c, ak09911_id);
+
+static struct i2c_driver ak09911_driver = {
+ .driver = {
+ .name = "ak09911",
+ .acpi_match_table = ACPI_PTR(ak_acpi_match),
+ },
+ .probe = ak09911_probe,
+ .id_table = ak09911_id,
+};
+module_i2c_driver(ak09911_driver);
+
+MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("AK09911 Compass driver");
depends on IIO_ST_PRESS
depends on IIO_ST_SENSORS_SPI
+config T5403
+ tristate "EPCOS T5403 digital barometric pressure sensor driver"
+ depends on I2C
+ help
+ Say yes here to build support for the EPCOS T5403 pressure sensor
+ connected via I2C.
+
+ To compile this driver as a module, choose M here: the module
+ will be called t5403.
+
endmenu
obj-$(CONFIG_IIO_ST_PRESS) += st_pressure.o
st_pressure-y := st_pressure_core.o
st_pressure-$(CONFIG_IIO_BUFFER) += st_pressure_buffer.o
+obj-$(CONFIG_T5403) += t5403.o
obj-$(CONFIG_IIO_ST_PRESS_I2C) += st_pressure_i2c.o
obj-$(CONFIG_IIO_ST_PRESS_SPI) += st_pressure_spi.o
--- /dev/null
+/*
+ * t5403.c - Support for EPCOS T5403 pressure/temperature sensor
+ *
+ * Copyright (c) 2014 Peter Meerwald <pmeerw@pmeerw.net>
+ *
+ * This file is subject to the terms and conditions of version 2 of
+ * the GNU General Public License. See the file COPYING in the main
+ * directory of this archive for more details.
+ *
+ * (7-bit I2C slave address 0x77)
+ *
+ * TODO: end-of-conversion irq
+ */
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/delay.h>
+
+#define T5403_DATA 0xf5 /* data, LSB first, 16 bit */
+#define T5403_CALIB_DATA 0x8e /* 10 calibration coeff., LSB first, 16 bit */
+#define T5403_SLAVE_ADDR 0x88 /* I2C slave address, 0x77 */
+#define T5403_COMMAND 0xf1
+
+/* command bits */
+#define T5403_MODE_SHIFT 3 /* conversion time: 2, 8, 16, 66 ms */
+#define T5403_PT BIT(1) /* 0 .. pressure, 1 .. temperature measurement */
+#define T5403_SCO BIT(0) /* start conversion */
+
+#define T5403_MODE_LOW 0
+#define T5403_MODE_STANDARD 1
+#define T5403_MODE_HIGH 2
+#define T5403_MODE_ULTRA_HIGH 3
+
+#define T5403_I2C_MASK (~BIT(7))
+#define T5403_I2C_ADDR 0x77
+
+static const int t5403_pressure_conv_ms[] = {2, 8, 16, 66};
+
+struct t5403_data {
+ struct i2c_client *client;
+ struct mutex lock;
+ int mode;
+ __le16 c[10];
+};
+
+#define T5403_C_U16(i) le16_to_cpu(data->c[(i) - 1])
+#define T5403_C(i) sign_extend32(T5403_C_U16(i), 15)
+
+static int t5403_read(struct t5403_data *data, bool pressure)
+{
+ int wait_time = 3; /* wakeup time in ms */
+
+ int ret = i2c_smbus_write_byte_data(data->client, T5403_COMMAND,
+ (pressure ? (data->mode << T5403_MODE_SHIFT) : T5403_PT) |
+ T5403_SCO);
+ if (ret < 0)
+ return ret;
+
+ wait_time += pressure ? t5403_pressure_conv_ms[data->mode] : 2;
+
+ msleep(wait_time);
+
+ return i2c_smbus_read_word_data(data->client, T5403_DATA);
+}
+
+static int t5403_comp_pressure(struct t5403_data *data, int *val, int *val2)
+{
+ int ret;
+ s16 t_r;
+ u16 p_r;
+ s32 S, O, X;
+
+ mutex_lock(&data->lock);
+
+ ret = t5403_read(data, false);
+ if (ret < 0)
+ goto done;
+ t_r = ret;
+
+ ret = t5403_read(data, true);
+ if (ret < 0)
+ goto done;
+ p_r = ret;
+
+ /* see EPCOS application note */
+ S = T5403_C_U16(3) + (s32) T5403_C_U16(4) * t_r / 0x20000 +
+ T5403_C(5) * t_r / 0x8000 * t_r / 0x80000 +
+ T5403_C(9) * t_r / 0x8000 * t_r / 0x8000 * t_r / 0x10000;
+
+ O = T5403_C(6) * 0x4000 + T5403_C(7) * t_r / 8 +
+ T5403_C(8) * t_r / 0x8000 * t_r / 16 +
+ T5403_C(9) * t_r / 0x8000 * t_r / 0x10000 * t_r;
+
+ X = (S * p_r + O) / 0x4000;
+
+ X += ((X - 75000) * (X - 75000) / 0x10000 - 9537) *
+ T5403_C(10) / 0x10000;
+
+ *val = X / 1000;
+ *val2 = (X % 1000) * 1000;
+
+done:
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+static int t5403_comp_temp(struct t5403_data *data, int *val)
+{
+ int ret;
+ s16 t_r;
+
+ mutex_lock(&data->lock);
+ ret = t5403_read(data, false);
+ if (ret < 0)
+ goto done;
+ t_r = ret;
+
+ /* see EPCOS application note */
+ *val = ((s32) T5403_C_U16(1) * t_r / 0x100 +
+ (s32) T5403_C_U16(2) * 0x40) * 1000 / 0x10000;
+
+done:
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+static int t5403_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ struct t5403_data *data = iio_priv(indio_dev);
+ int ret;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_PROCESSED:
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ ret = t5403_comp_pressure(data, val, val2);
+ if (ret < 0)
+ return ret;
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_TEMP:
+ ret = t5403_comp_temp(data, val);
+ if (ret < 0)
+ return ret;
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
+ case IIO_CHAN_INFO_INT_TIME:
+ *val = 0;
+ *val2 = t5403_pressure_conv_ms[data->mode] * 1000;
+ return IIO_VAL_INT_PLUS_MICRO;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int t5403_write_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int val, int val2, long mask)
+{
+ struct t5403_data *data = iio_priv(indio_dev);
+ int i;
+
+ switch (mask) {
+ case IIO_CHAN_INFO_INT_TIME:
+ if (val != 0)
+ return -EINVAL;
+ for (i = 0; i < ARRAY_SIZE(t5403_pressure_conv_ms); i++)
+ if (val2 == t5403_pressure_conv_ms[i] * 1000) {
+ mutex_lock(&data->lock);
+ data->mode = i;
+ mutex_unlock(&data->lock);
+ return 0;
+ }
+ return -EINVAL;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct iio_chan_spec t5403_channels[] = {
+ {
+ .type = IIO_PRESSURE,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
+ BIT(IIO_CHAN_INFO_INT_TIME),
+ },
+ {
+ .type = IIO_TEMP,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
+ },
+};
+
+static IIO_CONST_ATTR_INT_TIME_AVAIL("0.002 0.008 0.016 0.066");
+
+static struct attribute *t5403_attributes[] = {
+ &iio_const_attr_integration_time_available.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group t5403_attribute_group = {
+ .attrs = t5403_attributes,
+};
+
+static const struct iio_info t5403_info = {
+ .read_raw = &t5403_read_raw,
+ .write_raw = &t5403_write_raw,
+ .attrs = &t5403_attribute_group,
+ .driver_module = THIS_MODULE,
+};
+
+static int t5403_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct t5403_data *data;
+ struct iio_dev *indio_dev;
+ int ret;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA |
+ I2C_FUNC_SMBUS_I2C_BLOCK))
+ return -ENODEV;
+
+ ret = i2c_smbus_read_byte_data(client, T5403_SLAVE_ADDR);
+ if (ret < 0)
+ return ret;
+ if ((ret & T5403_I2C_MASK) != T5403_I2C_ADDR)
+ return -ENODEV;
+
+ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ data = iio_priv(indio_dev);
+ data->client = client;
+ mutex_init(&data->lock);
+
+ i2c_set_clientdata(client, indio_dev);
+ indio_dev->info = &t5403_info;
+ indio_dev->name = id->name;
+ indio_dev->dev.parent = &client->dev;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->channels = t5403_channels;
+ indio_dev->num_channels = ARRAY_SIZE(t5403_channels);
+
+ data->mode = T5403_MODE_STANDARD;
+
+ ret = i2c_smbus_read_i2c_block_data(data->client, T5403_CALIB_DATA,
+ sizeof(data->c), (u8 *) data->c);
+ if (ret < 0)
+ return ret;
+
+ return devm_iio_device_register(&client->dev, indio_dev);
+}
+
+static const struct i2c_device_id t5403_id[] = {
+ { "t5403", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, t5403_id);
+
+static struct i2c_driver t5403_driver = {
+ .driver = {
+ .name = "t5403",
+ },
+ .probe = t5403_probe,
+ .id_table = t5403_id,
+};
+module_i2c_driver(t5403_driver);
+
+MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
+MODULE_DESCRIPTION("EPCOS T5403 pressure/temperature sensor driver");
+MODULE_LICENSE("GPL");
switch (val) {
case AS3935_EVENT_INT:
- iio_trigger_poll(st->trig, iio_get_time_ns());
+ iio_trigger_poll(st->trig);
break;
case AS3935_NOISE_INT:
dev_warn(&st->spi->dev, "noise level is too high");
static irqreturn_t iio_interrupt_trigger_poll(int irq, void *private)
{
- /* Timestamp not currently provided */
- iio_trigger_poll(private, 0);
+ iio_trigger_poll(private);
return IRQ_HANDLED;
}
struct iio_sysfs_trig *trig = container_of(work, struct iio_sysfs_trig,
work);
- iio_trigger_poll(trig->trig, 0);
+ iio_trigger_poll(trig->trig);
}
static ssize_t iio_sysfs_trigger_poll(struct device *dev,
source "drivers/staging/wlags49_h25/Kconfig"
-source "drivers/staging/crystalhd/Kconfig"
-
source "drivers/staging/cxt1e1/Kconfig"
source "drivers/staging/xgifb/Kconfig"
source "drivers/staging/quickstart/Kconfig"
+source "drivers/staging/emxx_udc/Kconfig"
+
source "drivers/staging/keucr/Kconfig"
source "drivers/staging/bcm/Kconfig"
source "drivers/staging/android/Kconfig"
+source "drivers/staging/board/Kconfig"
+
source "drivers/staging/ozwpan/Kconfig"
source "drivers/staging/gdm72xx/Kconfig"
obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_WLAGS49_H2) += wlags49_h2/
obj-$(CONFIG_WLAGS49_H25) += wlags49_h25/
-obj-$(CONFIG_CRYSTALHD) += crystalhd/
obj-$(CONFIG_CXT1E1) += cxt1e1/
obj-$(CONFIG_FB_XGI) += xgifb/
obj-$(CONFIG_TIDSPBRIDGE) += tidspbridge/
obj-$(CONFIG_ACPI_QUICKSTART) += quickstart/
+obj-$(CONFIG_USB_EMXX) += emxx_udc/
obj-$(CONFIG_USB_ENESTORAGE) += keucr/
obj-$(CONFIG_BCM_WIMAX) += bcm/
obj-$(CONFIG_FT1000) += ft1000/
obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += ste_rmi4/
obj-$(CONFIG_MFD_NVEC) += nvec/
obj-$(CONFIG_ANDROID) += android/
+obj-$(CONFIG_STAGING_BOARD) += board/
obj-$(CONFIG_USB_WPAN_HCD) += ozwpan/
obj-$(CONFIG_WIMAX_GDM72XX) += gdm72xx/
obj-$(CONFIG_LTE_GDM724X) += gdm724x/
Registers processes to be killed when memory is low
config ANDROID_INTF_ALARM_DEV
- bool "Android alarm driver"
+ tristate "Android alarm driver"
depends on RTC_CLASS
default n
---help---
module_init(alarm_dev_init);
module_exit(alarm_dev_exit);
-
+MODULE_LICENSE("GPL");
if (ion_buffer_cached(buffer))
dma_sync_sg_for_device(NULL, table->sgl, table->nents,
- DMA_BIDIRECTIONAL);
+ DMA_BIDIRECTIONAL);
for_each_sg(table->sgl, sg, table->nents, i) {
gen_pool_free(chunk_heap->pool, page_to_phys(sg_page(sg)),
struct ion_system_heap {
struct ion_heap heap;
- struct ion_page_pool **pools;
-};
-
-struct page_info {
- struct page *page;
- unsigned int order;
- struct list_head list;
+ struct ion_page_pool *pools[0];
};
static struct page *alloc_buffer_page(struct ion_system_heap *heap,
}
static void free_buffer_page(struct ion_system_heap *heap,
- struct ion_buffer *buffer, struct page *page,
- unsigned int order)
+ struct ion_buffer *buffer, struct page *page)
{
+ unsigned int order = compound_order(page);
bool cached = ion_buffer_cached(buffer);
if (!cached && !(buffer->private_flags & ION_PRIV_FLAG_SHRINKER_FREE)) {
}
-static struct page_info *alloc_largest_available(struct ion_system_heap *heap,
- struct ion_buffer *buffer,
- unsigned long size,
- unsigned int max_order)
+static struct page *alloc_largest_available(struct ion_system_heap *heap,
+ struct ion_buffer *buffer,
+ unsigned long size,
+ unsigned int max_order)
{
struct page *page;
- struct page_info *info;
int i;
- info = kmalloc(sizeof(struct page_info), GFP_KERNEL);
- if (!info)
- return NULL;
-
for (i = 0; i < num_orders; i++) {
if (size < order_to_size(orders[i]))
continue;
if (!page)
continue;
- info->page = page;
- info->order = orders[i];
- return info;
+ return page;
}
- kfree(info);
return NULL;
}
struct sg_table *table;
struct scatterlist *sg;
struct list_head pages;
- struct page_info *info, *tmp_info;
+ struct page *page, *tmp_page;
int i = 0;
unsigned long size_remaining = PAGE_ALIGN(size);
unsigned int max_order = orders[0];
INIT_LIST_HEAD(&pages);
while (size_remaining > 0) {
- info = alloc_largest_available(sys_heap, buffer, size_remaining,
+ page = alloc_largest_available(sys_heap, buffer, size_remaining,
max_order);
- if (!info)
+ if (!page)
goto free_pages;
- list_add_tail(&info->list, &pages);
- size_remaining -= PAGE_SIZE << info->order;
- max_order = info->order;
+ list_add_tail(&page->lru, &pages);
+ size_remaining -= PAGE_SIZE << compound_order(page);
+ max_order = compound_order(page);
i++;
}
table = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
goto free_table;
sg = table->sgl;
- list_for_each_entry_safe(info, tmp_info, &pages, list) {
- struct page *page = info->page;
- sg_set_page(sg, page, PAGE_SIZE << info->order, 0);
+ list_for_each_entry_safe(page, tmp_page, &pages, lru) {
+ sg_set_page(sg, page, PAGE_SIZE << compound_order(page), 0);
sg = sg_next(sg);
- list_del(&info->list);
- kfree(info);
+ list_del(&page->lru);
}
buffer->priv_virt = table;
free_table:
kfree(table);
free_pages:
- list_for_each_entry_safe(info, tmp_info, &pages, list) {
- free_buffer_page(sys_heap, buffer, info->page, info->order);
- kfree(info);
- }
+ list_for_each_entry_safe(page, tmp_page, &pages, lru)
+ free_buffer_page(sys_heap, buffer, page);
return -ENOMEM;
}
ion_heap_buffer_zero(buffer);
for_each_sg(table->sgl, sg, table->nents, i)
- free_buffer_page(sys_heap, buffer, sg_page(sg),
- get_order(sg->length));
+ free_buffer_page(sys_heap, buffer, sg_page(sg));
sg_free_table(table);
kfree(table);
}
struct ion_system_heap *heap;
int i;
- heap = kzalloc(sizeof(struct ion_system_heap), GFP_KERNEL);
+ heap = kzalloc(sizeof(struct ion_system_heap) +
+ sizeof(struct ion_page_pool *) * num_orders,
+ GFP_KERNEL);
if (!heap)
return ERR_PTR(-ENOMEM);
heap->heap.ops = &system_heap_ops;
heap->heap.type = ION_HEAP_TYPE_SYSTEM;
heap->heap.flags = ION_HEAP_FLAG_DEFER_FREE;
- heap->pools = kzalloc(sizeof(struct ion_page_pool *) * num_orders,
- GFP_KERNEL);
- if (!heap->pools)
- goto free_heap;
+
for (i = 0; i < num_orders; i++) {
struct ion_page_pool *pool;
gfp_t gfp_flags = low_order_gfp_flags;
destroy_pools:
while (i--)
ion_page_pool_destroy(heap->pools[i]);
- kfree(heap->pools);
-free_heap:
kfree(heap);
return ERR_PTR(-ENOMEM);
}
for (i = 0; i < num_orders; i++)
ion_page_pool_destroy(sys_heap->pools[i]);
- kfree(sys_heap->pools);
kfree(sys_heap);
}
ReadOffset = sFlash2xRead.offset;
OutPutBuff = IoBuffer.OutputBuffer;
- pReadBuff = (PCHAR)kzalloc(BuffSize , GFP_KERNEL);
+ pReadBuff = kzalloc(BuffSize , GFP_KERNEL);
if (pReadBuff == NULL) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0,
ulAddrSFParamSet = ntohl(ulAddrSFParamSet);
/* Read out the SF Param Set At the indicated Location */
- if (rdm(Adapter, ulAddrSFParamSet,(PUCHAR)pucDestBuffer, nBytesToRead) < 0)
+ if (rdm(Adapter, ulAddrSFParamSet, (PUCHAR)pucDestBuffer, nBytesToRead) < 0)
return STATUS_FAILURE;
return 1;
Adapter->LinkStatus = SYNC_UP_REQUEST;
Adapter->TransferMode = IP_PACKET_ONLY_MODE;
Adapter->usBestEffortQueueIndex = -1;
- return;
}
int InitAdapter(struct bcm_mini_adapter *psAdapter)
{
int i = 0;
int Status = STATUS_SUCCESS;
+
BCM_DEBUG_PRINT(psAdapter, DBG_TYPE_INITEXIT, MP_INIT, DBG_LVL_ALL, "Initialising Adapter = %p", psAdapter);
if (psAdapter == NULL) {
void AdapterFree(struct bcm_mini_adapter *Adapter)
{
int count;
+
beceem_protocol_reset(Adapter);
vendorextnExit(Adapter);
static struct file *open_firmware_file(struct bcm_mini_adapter *Adapter, const char *path)
{
struct file *flp = filp_open(path, O_RDONLY, S_IRWXU);
+
if (IS_ERR(flp)) {
pr_err(DRV_NAME "Unable To Open File %s, err %ld", path, PTR_ERR(flp));
flp = NULL;
pLeader->Status == CM_CONTROL_NEWDSX_MULTICLASSIFIER_REQ) {
if ((pLeader->Status == LINK_UP_CONTROL_REQ) && (pLinkReq->szData[0] == LINK_DOWN_REQ_PAYLOAD)) {
- if ((pLinkReq->szData[1] == LINK_SYNC_DOWN_SUBTYPE)) {
+ if (pLinkReq->szData[1] == LINK_SYNC_DOWN_SUBTYPE) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TX_CONTROL, DBG_LVL_ALL, "Link Down Sent in Idle Mode\n");
Adapter->usIdleModePattern = ABORT_IDLE_SYNCDOWN; /* LINK DOWN sent in Idle Mode */
} else {
void LinkMessage(struct bcm_mini_adapter *Adapter)
{
struct bcm_link_request *pstLinkRequest = NULL;
+
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, LINK_UP_MSG, DBG_LVL_ALL, "=====>");
if (Adapter->LinkStatus == SYNC_UP_REQUEST && Adapter->AutoSyncup) {
pstLinkRequest = kzalloc(sizeof(struct bcm_link_request), GFP_ATOMIC);
Adapter->StatisticsPointer = ntohl(*(__be32 *)pvBuffer);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "Stats at %x", (unsigned int)Adapter->StatisticsPointer);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "%s <====", __func__);
- return;
}
/**********************************************************************
}
} else if (SET_MAC_ADDRESS_RESPONSE == *pucBuffer) {
PUCHAR puMacAddr = (pucBuffer + 1);
+
Adapter->LinkStatus = SYNC_UP_REQUEST;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "MAC address response, sending SYNC_UP");
LinkMessage(Adapter);
memcpy(Adapter->dev->dev_addr, puMacAddr, MAC_ADDRESS_SIZE);
}
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_RX, RX_DPC, DBG_LVL_ALL, "%s <=====", __func__);
- return;
}
void SendIdleModeResponse(struct bcm_mini_adapter *Adapter)
int status = 0, NVMAccess = 0, lowPwrAbortMsg = 0;
struct timeval tv;
struct bcm_link_request stIdleResponse = {{0} };
+
memset(&tv, 0, sizeof(tv));
stIdleResponse.Leader.Status = IDLE_MESSAGE;
stIdleResponse.Leader.PLength = IDLE_MODE_PAYLOAD_LENGTH;
}
status = CopyBufferToControlPacket(Adapter, &stIdleResponse);
- if ((status != STATUS_SUCCESS)) {
+ if (status != STATUS_SUCCESS) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_PRINTK, 0, 0, "fail to send the Idle mode Request\n");
Adapter->bPreparingForLowPowerMode = false;
StartInterruptUrb((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
for (uiLoopIndex = 0; uiLoopIndex < MIBS_MAX_HIST_ENTRIES; uiLoopIndex++)
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "Adapter->aTxPktSizeHist[%x] = %x\n", uiLoopIndex, Adapter->aTxPktSizeHist[uiLoopIndex]);
-
- return;
}
int reset_card_proc(struct bcm_mini_adapter *ps_adapter)
int wrmWithLock(struct bcm_mini_adapter *Adapter, unsigned int uiAddress, PCHAR pucBuff, size_t sSize)
{
int status = STATUS_SUCCESS;
+
down(&Adapter->rdmwrmsync);
if ((Adapter->IdleMode == TRUE) ||
static void HandleShutDownModeWakeup(struct bcm_mini_adapter *Adapter)
{
int clear_abort_pattern = 0, Status = 0;
+
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "====>\n");
/* target has woken up From Shut Down */
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "Clearing Shut Down Software abort pattern\n");
}
Status = CopyBufferToControlPacket(Adapter, &stShutdownResponse);
- if ((Status != STATUS_SUCCESS)) {
+ if (Status != STATUS_SUCCESS) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "fail to send the Idle mode Request\n");
Adapter->bPreparingForLowPowerMode = false;
StartInterruptUrb((struct bcm_interface_adapter *)(Adapter->pvInterfaceAdapter));
}
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, MP_SHUTDOWN, DBG_LVL_ALL, "<====\n");
- return;
}
void ResetCounters(struct bcm_mini_adapter *Adapter)
struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIP)
{
unsigned int uiIndex = 0;
+
for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) &&
(Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) &&
void AddFragIPClsEntry(struct bcm_mini_adapter *Adapter, struct bcm_fragmented_packet_info *psFragPktInfo)
{
unsigned int uiIndex = 0;
+
for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
if (!Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) {
memcpy(&Adapter->astFragmentedPktClassifierTable[uiIndex], psFragPktInfo, sizeof(struct bcm_fragmented_packet_info));
void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIp)
{
unsigned int uiIndex = 0;
+
for (uiIndex = 0; uiIndex < MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES; uiIndex++) {
if ((Adapter->astFragmentedPktClassifierTable[uiIndex].bUsed) &&
(Adapter->astFragmentedPktClassifierTable[uiIndex].usIpIdentification == usIpIdentification) &&
{
struct sk_buff *PacketToDrop = NULL;
struct net_device_stats *netstats = &Adapter->dev->stats;
+
spin_lock_bh(&Adapter->PackInfo[iQIndex].SFQueueLock);
while (Adapter->PackInfo[iQIndex].FirstTxQueue && atomic_read(&Adapter->TotalPacketCount)) {
static void beceem_protocol_reset(struct bcm_mini_adapter *Adapter)
{
int i;
+
if (netif_msg_link(Adapter))
pr_notice(PFX "%s: protocol reset\n", Adapter->dev->name);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, PHS_RECEIVE, DBG_LVL_ALL, "====>\n");
*header_size = 0;
- if ((decomp_phs_rules == NULL))
+ if (decomp_phs_rules == NULL)
return 0;
tmp_memb = decomp_phs_rules;
VOID LinkControlResponseMessage(struct bcm_mini_adapter *Adapter, PUCHAR pucBuffer);
-VOID StatisticsResponse(struct bcm_mini_adapter *Adapter,PVOID pvBuffer);
+VOID StatisticsResponse(struct bcm_mini_adapter *Adapter, PVOID pvBuffer);
-VOID IdleModeResponse(struct bcm_mini_adapter *Adapter,PUINT puiBuffer);
+VOID IdleModeResponse(struct bcm_mini_adapter *Adapter, PUINT puiBuffer);
-int control_packet_handler (struct bcm_mini_adapter *Adapter);
+int control_packet_handler(struct bcm_mini_adapter *Adapter);
-VOID DeleteAllClassifiersForSF(struct bcm_mini_adapter *Adapter,UINT uiSearchRuleIndex);
+VOID DeleteAllClassifiersForSF(struct bcm_mini_adapter *Adapter, UINT uiSearchRuleIndex);
VOID flush_all_queues(struct bcm_mini_adapter *Adapter);
VOID PruneQueueAllSF(struct bcm_mini_adapter *Adapter);
-INT SearchSfid(struct bcm_mini_adapter *Adapter,UINT uiSfid);
+INT SearchSfid(struct bcm_mini_adapter *Adapter, UINT uiSfid);
-USHORT ClassifyPacket(struct bcm_mini_adapter *Adapter,struct sk_buff* skb);
+USHORT ClassifyPacket(struct bcm_mini_adapter *Adapter, struct sk_buff *skb);
-bool MatchSrcPort(struct bcm_classifier_rule *pstClassifierRule,USHORT ushSrcPort);
-bool MatchDestPort(struct bcm_classifier_rule *pstClassifierRule,USHORT ushSrcPort);
-bool MatchProtocol(struct bcm_classifier_rule *pstClassifierRule,UCHAR ucProtocol);
+bool MatchSrcPort(struct bcm_classifier_rule *pstClassifierRule, USHORT ushSrcPort);
+bool MatchDestPort(struct bcm_classifier_rule *pstClassifierRule, USHORT ushSrcPort);
+
+bool MatchProtocol(struct bcm_classifier_rule *pstClassifierRule, UCHAR ucProtocol);
INT SetupNextSend(struct bcm_mini_adapter *Adapter, /**<Logical Adapter*/
struct sk_buff *Packet, /**<data buffer*/
- USHORT Vcid) ;
+ USHORT Vcid);
VOID LinkMessage(struct bcm_mini_adapter *Adapter);
char *pControlPacket/**<Control Packet*/
);
-
int register_networkdev(struct bcm_mini_adapter *Adapter);
+
void unregister_networkdev(struct bcm_mini_adapter *Adapter);
INT AllocAdapterDsxBuffer(struct bcm_mini_adapter *Adapter);
int tx_pkt_handler(struct bcm_mini_adapter *Adapter);
-int reset_card_proc(struct bcm_mini_adapter *Adapter );
+int reset_card_proc(struct bcm_mini_adapter *Adapter);
-int run_card_proc(struct bcm_mini_adapter *Adapter );
+int run_card_proc(struct bcm_mini_adapter *Adapter);
int InitCardAndDownloadFirmware(struct bcm_mini_adapter *ps_adapter);
-
INT ReadMacAddressFromNVM(struct bcm_mini_adapter *Adapter);
int register_control_device_interface(struct bcm_mini_adapter *ps_adapter);
int wrm(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size);
-int wrmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
+int wrmalt(struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
-int rdmalt (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
+int rdmalt(struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
-int get_dsx_sf_data_to_application(struct bcm_mini_adapter *Adapter, UINT uiSFId, void __user * user_buffer);
+int get_dsx_sf_data_to_application(struct bcm_mini_adapter *Adapter, UINT uiSFId, void __user *user_buffer);
void SendIdleModeResponse(struct bcm_mini_adapter *Adapter);
+int ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, struct bcm_host_stats_mibs *buf);
-int ProcessGetHostMibs(struct bcm_mini_adapter *Adapter, struct bcm_host_stats_mibs *buf);
void GetDroppedAppCntrlPktMibs(struct bcm_host_stats_mibs *ioBuffer, struct bcm_tarang_data *pTarang);
+
void beceem_parse_target_struct(struct bcm_mini_adapter *Adapter);
int bcm_ioctl_fw_download(struct bcm_mini_adapter *Adapter, struct bcm_firmware_info *psFwInfo);
int InitLedSettings(struct bcm_mini_adapter *Adapter);
-struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter,USHORT usIpIdentification,ULONG SrcIP);
+struct bcm_classifier_rule *GetFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIP);
void AddFragIPClsEntry(struct bcm_mini_adapter *Adapter, struct bcm_fragmented_packet_info *psFragPktInfo);
-void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter,USHORT usIpIdentification,ULONG SrcIp);
-
-void update_per_cid_rx (struct bcm_mini_adapter *Adapter);
+void DelFragIPClsEntry(struct bcm_mini_adapter *Adapter, USHORT usIpIdentification, ULONG SrcIp);
-void update_per_sf_desc_cnts( struct bcm_mini_adapter *Adapter);
+void update_per_cid_rx(struct bcm_mini_adapter *Adapter);
-void ClearTargetDSXBuffer(struct bcm_mini_adapter *Adapter,B_UINT16 TID,bool bFreeAll);
+void update_per_sf_desc_cnts(struct bcm_mini_adapter *Adapter);
+void ClearTargetDSXBuffer(struct bcm_mini_adapter *Adapter, B_UINT16 TID, bool bFreeAll);
void flush_queue(struct bcm_mini_adapter *Adapter, UINT iQIndex);
-
INT flushAllAppQ(VOID);
-
INT BeceemEEPROMBulkRead(
struct bcm_mini_adapter *Adapter,
PUINT pBuffer,
UINT uiOffset,
UINT uiNumBytes);
-
-
-INT WriteBeceemEEPROM(struct bcm_mini_adapter *Adapter,UINT uiEEPROMOffset, UINT uiData);
+INT WriteBeceemEEPROM(struct bcm_mini_adapter *Adapter, UINT uiEEPROMOffset, UINT uiData);
INT PropagateCalParamsFromFlashToMemory(struct bcm_mini_adapter *Adapter);
-
INT BeceemEEPROMBulkWrite(
struct bcm_mini_adapter *Adapter,
PUCHAR pBuffer,
UINT uiNumBytes,
bool bVerify);
-
-INT ReadBeceemEEPROM(struct bcm_mini_adapter *Adapter,UINT dwAddress, UINT *pdwData);
-
+INT ReadBeceemEEPROM(struct bcm_mini_adapter *Adapter, UINT dwAddress, UINT *pdwData);
INT BeceemNVMRead(
struct bcm_mini_adapter *Adapter,
UINT uiNumBytes,
bool bVerify);
-
INT BcmInitNVM(struct bcm_mini_adapter *Adapter);
-INT BcmUpdateSectorSize(struct bcm_mini_adapter *Adapter,UINT uiSectorSize);
+INT BcmUpdateSectorSize(struct bcm_mini_adapter *Adapter, UINT uiSectorSize);
+
bool IsSectionExistInFlash(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val section);
INT BcmGetFlash2xSectionalBitMap(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_bitmap *psFlash2xBitMap);
INT BcmGetSectionValStartOffset(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal);
INT BcmSetActiveSection(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectVal);
+
INT BcmAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter);
+
INT BcmDeAllocFlashCSStructure(struct bcm_mini_adapter *psAdapter);
INT BcmCopyISO(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_copy_section sCopySectStrut);
+
INT BcmFlash2xCorruptSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlash2xSectionVal);
+
INT BcmFlash2xWriteSig(struct bcm_mini_adapter *Adapter, enum bcm_flash2x_section_val eFlashSectionVal);
-INT validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_readwrite *psFlash2xReadWrite);
+
+INT validateFlash2xReadWrite(struct bcm_mini_adapter *Adapter, struct bcm_flash2x_readwrite *psFlash2xReadWrite);
+
INT IsFlash2x(struct bcm_mini_adapter *Adapter);
-INT BcmCopySection(struct bcm_mini_adapter *Adapter,
+
+INT BcmCopySection(struct bcm_mini_adapter *Adapter,
enum bcm_flash2x_section_val SrcSection,
enum bcm_flash2x_section_val DstSection,
UINT offset,
UINT numOfBytes);
-
bool IsNonCDLessDevice(struct bcm_mini_adapter *Adapter);
+VOID OverrideServiceFlowParams(struct bcm_mini_adapter *Adapter, PUINT puiBuffer);
-VOID OverrideServiceFlowParams(struct bcm_mini_adapter *Adapter,PUINT puiBuffer);
+int wrmaltWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
-int wrmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
-int rdmaltWithLock (struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
+int rdmaltWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, unsigned int *pucBuff, size_t sSize);
int wrmWithLock(struct bcm_mini_adapter *Adapter, UINT uiAddress, PCHAR pucBuff, size_t size);
+
INT buffDnldVerify(struct bcm_mini_adapter *Adapter, unsigned char *mappedbuffer, unsigned int u32FirmwareLength,
unsigned long u32StartingAddress);
-
VOID putUsbSuspend(struct work_struct *work);
-bool IsReqGpioIsLedInNVM(struct bcm_mini_adapter *Adapter, UINT gpios);
+bool IsReqGpioIsLedInNVM(struct bcm_mini_adapter *Adapter, UINT gpios);
#endif
-
-
-
-
/**
-@file Qos.C
-This file contains the routines related to Quality of Service.
+ * @file Qos.C
+ * This file contains the routines related to Quality of Service.
*/
#include "headers.h"
return false;
}
/**
-@ingroup tx_functions
-Compares IPV4 Ip address and port number
-@return Queue Index.
+ * @ingroup tx_functions
+ * Compares IPV4 Ip address and port number
+ * @return Queue Index.
*/
static USHORT IpVersion4(struct bcm_mini_adapter *Adapter,
struct iphdr *iphd,
pstClassifierRule->ucDirection,
pstClassifierRule->usVCID_Value);
- //Checking classifier validity
+ /* Checking classifier validity */
if (!pstClassifierRule->bUsed || pstClassifierRule->ucDirection == DOWNLINK_DIR)
break;
if (pstClassifierRule->bIpv6Protocol)
break;
- //**************Checking IP header parameter**************************//
+ /* Checking IP header parameter */
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "Trying to match Source IP Address");
if (!MatchSrcIpAddress(pstClassifierRule, iphd->saddr))
break;
break;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "Protocol Matched");
- //if protocol is not TCP or UDP then no need of comparing source port and destination port
+ /*
+ * if protocol is not TCP or UDP then no
+ * need of comparing source port and destination port
+ */
if (iphd->protocol != TCP && iphd->protocol != UDP) {
bClassificationSucceed = TRUE;
break;
}
- //******************Checking Transport Layer Header field if present *****************//
+ /* Checking Transport Layer Header field if present */
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "Source Port %04x",
(iphd->protocol == UDP) ? xprt_hdr->uhdr.source : xprt_hdr->thdr.source);
/**
-@ingroup tx_functions
-This function checks if the max queue size for a queue
-is less than number of bytes in the queue. If so -
-drops packets from the Head till the number of bytes is
-less than or equal to max queue size for the queue.
-*/
+ * @ingroup tx_functions
+ * This function checks if the max queue size for a queue
+ * is less than number of bytes in the queue. If so -
+ * drops packets from the Head till the number of bytes is
+ * less than or equal to max queue size for the queue.
+ */
static VOID PruneQueue(struct bcm_mini_adapter *Adapter, INT iIndex)
{
- struct sk_buff* PacketToDrop = NULL;
+ struct sk_buff *PacketToDrop = NULL;
struct net_device_stats *netstats;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, PRUNE_QUEUE, DBG_LVL_ALL, "=====> Index %d", iIndex);
DEQUEUEPACKET(Adapter->PackInfo[iIndex].FirstTxQueue,
Adapter->PackInfo[iIndex].LastTxQueue);
- /// update current bytes and packets count
+ /* update current bytes and packets count */
Adapter->PackInfo[iIndex].uiCurrentBytesOnHost -=
PacketToDrop->len;
Adapter->PackInfo[iIndex].uiCurrentPacketsOnHost--;
- /// update dropped bytes and packets counts
+ /* update dropped bytes and packets counts */
Adapter->PackInfo[iIndex].uiDroppedCountBytes += PacketToDrop->len;
Adapter->PackInfo[iIndex].uiDroppedCountPackets++;
dev_kfree_skb(PacketToDrop);
VOID flush_all_queues(struct bcm_mini_adapter *Adapter)
{
- INT iQIndex;
- UINT uiTotalPacketLength;
- struct sk_buff* PacketToDrop = NULL;
+ INT iQIndex;
+ UINT uiTotalPacketLength;
+ struct sk_buff *PacketToDrop = NULL;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "=====>");
/* Free the skb */
dev_kfree_skb(PacketToDrop);
- /// update current bytes and packets count
+ /* update current bytes and packets count */
Adapter->PackInfo[iQIndex].uiCurrentBytesOnHost -= uiTotalPacketLength;
Adapter->PackInfo[iQIndex].uiCurrentPacketsOnHost--;
- /// update dropped bytes and packets counts
+ /* update dropped bytes and packets counts */
Adapter->PackInfo[iQIndex].uiDroppedCountBytes += uiTotalPacketLength;
Adapter->PackInfo[iQIndex].uiDroppedCountPackets++;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, DUMP_INFO, DBG_LVL_ALL, "<=====");
}
-USHORT ClassifyPacket(struct bcm_mini_adapter *Adapter, struct sk_buff* skb)
+USHORT ClassifyPacket(struct bcm_mini_adapter *Adapter, struct sk_buff *skb)
{
- INT uiLoopIndex = 0;
+ INT uiLoopIndex = 0;
struct bcm_classifier_rule *pstClassifierRule = NULL;
struct bcm_eth_packet_info stEthCsPktInfo;
PVOID pvEThPayload = NULL;
struct iphdr *pIpHeader = NULL;
- INT uiSfIndex = 0;
- USHORT usIndex = Adapter->usBestEffortQueueIndex;
- bool bFragmentedPkt = false, bClassificationSucceed = false;
- USHORT usCurrFragment = 0;
+ INT uiSfIndex = 0;
+ USHORT usIndex = Adapter->usBestEffortQueueIndex;
+ bool bFragmentedPkt = false, bClassificationSucceed = false;
+ USHORT usCurrFragment = 0;
struct bcm_tcp_header *pTcpHeader;
UCHAR IpHeaderLength;
UCHAR TcpHeaderLength;
pvEThPayload = skb->data;
- *((UINT32*) (skb->cb) +SKB_CB_TCPACK_OFFSET) = 0;
+ *((UINT32 *) (skb->cb) + SKB_CB_TCPACK_OFFSET) = 0;
EThCSGetPktInfo(Adapter, pvEThPayload, &stEthCsPktInfo);
switch (stEthCsPktInfo.eNwpktEthFrameType) {
bFragmentedPkt = TRUE;
if (bFragmentedPkt) {
- //Fragmented Packet. Get Frag Classifier Entry.
+ /* Fragmented Packet. Get Frag Classifier Entry. */
pstClassifierRule = GetFragIPClsEntry(Adapter, pIpHeader->id, pIpHeader->saddr);
if (pstClassifierRule) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "It is next Fragmented pkt");
bClassificationSucceed = TRUE;
}
if (!(ntohs(pIpHeader->frag_off) & IP_MF)) {
- //Fragmented Last packet . Remove Frag Classifier Entry
+ /* Fragmented Last packet . Remove Frag Classifier Entry */
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "This is the last fragmented Pkt");
DelFragIPClsEntry(Adapter, pIpHeader->id, pIpHeader->saddr);
}
for (uiLoopIndex = MAX_CLASSIFIERS - 1; uiLoopIndex >= 0; uiLoopIndex--) {
if (bClassificationSucceed)
break;
- //Iterate through all classifiers which are already in order of priority
- //to classify the packet until match found
+ /*
+ * Iterate through all classifiers which are already in order of priority
+ * to classify the packet until match found
+ */
do {
if (false == Adapter->astClassifierTable[uiLoopIndex].bUsed) {
bClassificationSucceed = false;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "Adapter->PackInfo[%d].bvalid=True\n", uiLoopIndex);
if (0 == Adapter->astClassifierTable[uiLoopIndex].ucDirection) {
- bClassificationSucceed = false;//cannot be processed for classification.
- break; // it is a down link connection
+ bClassificationSucceed = false; /* cannot be processed for classification. */
+ break; /* it is a down link connection */
}
pstClassifierRule = &Adapter->astClassifierTable[uiLoopIndex];
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "ClassifyPacket : Ethernet CS Classification Failed\n");
break;
}
- } else { // No ETH Supported on this SF
+ } else { /* No ETH Supported on this SF */
if (eEthOtherFrame != stEthCsPktInfo.eNwpktEthFrameType) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, " ClassifyPacket : Packet Not a 802.3 Ethernet Frame... hence not allowed over non-ETH CS SF\n");
bClassificationSucceed = false;
if (bClassificationSucceed == TRUE) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "CF id : %d, SF ID is =%lu", pstClassifierRule->uiClassifierRuleIndex, pstClassifierRule->ulSFID);
- //Store The matched Classifier in SKB
- *((UINT32*)(skb->cb)+SKB_CB_CLASSIFICATION_OFFSET) = pstClassifierRule->uiClassifierRuleIndex;
+ /* Store The matched Classifier in SKB */
+ *((UINT32 *)(skb->cb)+SKB_CB_CLASSIFICATION_OFFSET) = pstClassifierRule->uiClassifierRuleIndex;
if ((TCP == pIpHeader->protocol) && !bFragmentedPkt && (ETH_AND_IP_HEADER_LEN + TCP_HEADER_LEN <= skb->len)) {
- IpHeaderLength = pIpHeader->ihl;
- pTcpHeader = (struct bcm_tcp_header *)(((PUCHAR)pIpHeader)+(IpHeaderLength*4));
- TcpHeaderLength = GET_TCP_HEADER_LEN(pTcpHeader->HeaderLength);
+ IpHeaderLength = pIpHeader->ihl;
+ pTcpHeader = (struct bcm_tcp_header *)(((PUCHAR)pIpHeader)+(IpHeaderLength*4));
+ TcpHeaderLength = GET_TCP_HEADER_LEN(pTcpHeader->HeaderLength);
if ((pTcpHeader->ucFlags & TCP_ACK) &&
(ntohs(pIpHeader->tot_len) == (IpHeaderLength*4)+(TcpHeaderLength*4)))
- *((UINT32*) (skb->cb) + SKB_CB_TCPACK_OFFSET) = TCP_ACK;
+ *((UINT32 *) (skb->cb) + SKB_CB_TCPACK_OFFSET) = TCP_ACK;
}
usIndex = SearchSfid(Adapter, pstClassifierRule->ulSFID);
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "index is =%d", usIndex);
- //If this is the first fragment of a Fragmented pkt, add this CF. Only This CF should be used for all other fragment of this Pkt.
+ /*
+ * If this is the first fragment of a Fragmented pkt,
+ * add this CF. Only This CF should be used for all other
+ * fragment of this Pkt.
+ */
if (bFragmentedPkt && (usCurrFragment == 0)) {
- //First Fragment of Fragmented Packet. Create Frag CLS Entry
+ /*
+ * First Fragment of Fragmented Packet.
+ * Create Frag CLS Entry
+ */
struct bcm_fragmented_packet_info stFragPktInfo;
stFragPktInfo.bUsed = TRUE;
stFragPktInfo.ulSrcIpAddress = pIpHeader->saddr;
return TRUE;
}
-static bool EthCSMatchEThTypeSAP(struct bcm_classifier_rule *pstClassifierRule, struct sk_buff* skb, struct bcm_eth_packet_info *pstEthCsPktInfo)
+static bool EthCSMatchEThTypeSAP(struct bcm_classifier_rule *pstClassifierRule, struct sk_buff *skb, struct bcm_eth_packet_info *pstEthCsPktInfo)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(gblpnetdev);
if ((pstClassifierRule->ucEtherTypeLen == 0) ||
}
-static bool EthCSMatchVLANRules(struct bcm_classifier_rule *pstClassifierRule, struct sk_buff* skb, struct bcm_eth_packet_info *pstEthCsPktInfo)
+static bool EthCSMatchVLANRules(struct bcm_classifier_rule *pstClassifierRule, struct sk_buff *skb, struct bcm_eth_packet_info *pstEthCsPktInfo)
{
bool bClassificationSucceed = false;
USHORT usVLANID;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "%s CLS UserPrio:%x CLS VLANID:%x\n", __func__, ntohs(*((USHORT *)pstClassifierRule->usUserPriority)), pstClassifierRule->usVLANID);
- /* In case FW didn't receive the TLV, the priority field should be ignored */
+ /*
+ * In case FW didn't receive the TLV,
+ * the priority field should be ignored
+ */
if (pstClassifierRule->usValidityBitMap & (1<<PKT_CLASSIFICATION_USER_PRIORITY_VALID)) {
if (pstEthCsPktInfo->eNwpktEthFrameType != eEth802QVLANFrame)
return false;
}
-static bool EThCSClassifyPkt(struct bcm_mini_adapter *Adapter, struct sk_buff* skb,
+static bool EThCSClassifyPkt(struct bcm_mini_adapter *Adapter, struct sk_buff *skb,
struct bcm_eth_packet_info *pstEthCsPktInfo,
struct bcm_classifier_rule *pstClassifierRule,
B_UINT8 EthCSCupport)
return false;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "ETH CS DestMAC Matched\n");
- //classify on ETHType/802.2SAP TLV
+ /* classify on ETHType/802.2SAP TLV */
bClassificationSucceed = EthCSMatchEThTypeSAP(pstClassifierRule, skb, pstEthCsPktInfo);
if (!bClassificationSucceed)
return false;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "ETH CS EthType/802.2SAP Matched\n");
- //classify on 802.1VLAN Header Parameters
-
+ /* classify on 802.1VLAN Header Parameters */
bClassificationSucceed = EthCSMatchVLANRules(pstClassifierRule, skb, pstEthCsPktInfo);
if (!bClassificationSucceed)
return false;
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "EthCSGetPktInfo : Eth Hdr Type : %X\n", u16Etype);
if (u16Etype > 0x5dc) {
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "EthCSGetPktInfo : ETH2 Frame\n");
- //ETH2 Frame
+ /* ETH2 Frame */
if (u16Etype == ETHERNET_FRAMETYPE_802QVLAN) {
- //802.1Q VLAN Header
+ /* 802.1Q VLAN Header */
pstEthCsPktInfo->eNwpktEthFrameType = eEth802QVLANFrame;
u16Etype = ((struct bcm_eth_q_frame *)pvEthPayload)->EthType;
//((ETH_CS_802_Q_FRAME*)pvEthPayload)->UserPriority
u16Etype = ntohs(u16Etype);
}
} else {
- //802.2 LLC
+ /* 802.2 LLC */
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, IPV4_DBG, DBG_LVL_ALL, "802.2 LLC Frame\n");
pstEthCsPktInfo->eNwpktEthFrameType = eEth802LLCFrame;
pstEthCsPktInfo->ucDSAP = ((struct bcm_eth_llc_frame *)pvEthPayload)->DSAP;
if (pstEthCsPktInfo->ucDSAP == 0xAA && ((struct bcm_eth_llc_frame *)pvEthPayload)->SSAP == 0xAA) {
- //SNAP Frame
+ /* SNAP Frame */
pstEthCsPktInfo->eNwpktEthFrameType = eEth802LLCSNAPFrame;
u16Etype = ((struct bcm_eth_llc_snap_frame *)pvEthPayload)->usEtherType;
}
/*************************************
-* Queue.h
+* Queue.h
**************************************/
#ifndef __QUEUE_H__
#define __QUEUE_H__
-#define ENQUEUEPACKET(_Head, _Tail,_Packet) \
-do \
-{ \
- if (!_Head) { \
- _Head = _Packet; \
- } \
- else { \
- (_Tail)->next = _Packet; \
- } \
- (_Packet)->next = NULL; \
- _Tail = _Packet; \
-}while(0)
-#define DEQUEUEPACKET(Head, Tail ) \
-do \
-{ if(Head) \
- { \
- if (!Head->next) { \
- Tail = NULL; \
- } \
- Head = Head->next; \
- } \
-}while(0)
-#endif //__QUEUE_H__
+#define ENQUEUEPACKET(_Head, _Tail, _Packet) \
+do { \
+ if (!_Head) { \
+ _Head = _Packet; \
+ } \
+ else { \
+ (_Tail)->next = _Packet; \
+ } \
+ (_Packet)->next = NULL; \
+ _Tail = _Packet; \
+} while (0)
+#define DEQUEUEPACKET(Head, Tail) \
+do { \
+ if (Head) { \
+ if (!Head->next) { \
+ Tail = NULL; \
+ } \
+ Head = Head->next; \
+ } \
+} while (0)
+#endif /* __QUEUE_H__ */
if (IsThisHeaderSector == TRUE) {
/* If this is header sector write 0xFFFFFFFF at the sig time and in last write sig */
- memcpy(SigBuff, Buff + sigOffset, MAX_RW_SIZE);
+ memcpy(SigBuff, Buff + sigOffset, sizeof(SigBuff));
for (i = 0; i < MAX_RW_SIZE; i++)
*(Buff + sigOffset + i) = 0xFF;
if (IsThisHeaderSector == TRUE) {
/* If this is header sector write 0xFFFFFFFF at the sig time and in last write sig */
- memcpy(SigBuff, Buff + sigOffset, MAX_RW_SIZE);
+ memcpy(SigBuff, Buff + sigOffset, sizeof(SigBuff));
for (i = 0; i < MAX_RW_SIZE; i++)
*(Buff + sigOffset + i) = 0xFF;
--- /dev/null
+config STAGING_BOARD
+ boolean "Staging Board Support"
+ depends on OF_ADDRESS
+ help
+ Select to enable per-board staging support code.
+
+ If in doubt, say N here.
+
--- /dev/null
+obj-y := board.o
+obj-$(CONFIG_ARCH_EMEV2) += kzm9d.o
--- /dev/null
+* replace platform device code with DT nodes once the driver supports DT
+* remove staging board code when no more platform devices are needed
--- /dev/null
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include "board.h"
+
+static bool find_by_address(u64 base_address)
+{
+ struct device_node *dn = of_find_all_nodes(NULL);
+ struct resource res;
+
+ while (dn) {
+ if (of_can_translate_address(dn)
+ && !of_address_to_resource(dn, 0, &res)) {
+ if (res.start == base_address) {
+ of_node_put(dn);
+ return true;
+ }
+ }
+ dn = of_find_all_nodes(dn);
+ }
+
+ return false;
+}
+
+bool __init board_staging_dt_node_available(const struct resource *resource,
+ unsigned int num_resources)
+{
+ unsigned int i;
+
+ for (i = 0; i < num_resources; i++) {
+ const struct resource *r = resource + i;
+
+ if (resource_type(r) == IORESOURCE_MEM)
+ if (find_by_address(r->start))
+ return true; /* DT node available */
+ }
+
+ return false; /* Nothing found */
+}
--- /dev/null
+#ifndef __BOARD_H__
+#define __BOARD_H__
+#include <linux/init.h>
+#include <linux/of.h>
+
+bool board_staging_dt_node_available(const struct resource *resource,
+ unsigned int num_resources);
+
+#define board_staging(str, fn) \
+static int __init runtime_board_check(void) \
+{ \
+ if (of_machine_is_compatible(str)) \
+ fn(); \
+ \
+ return 0; \
+} \
+ \
+late_initcall(runtime_board_check)
+
+#endif /* __BOARD_H__ */
--- /dev/null
+/* Staging board support for KZM9D. Enable not-yet-DT-capable devices here. */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include "board.h"
+
+static const struct resource usbs1_res[] __initconst = {
+ DEFINE_RES_MEM(0xe2800000, 0x2000),
+ DEFINE_RES_IRQ(159),
+};
+
+static void __init kzm9d_init(void)
+{
+ if (!board_staging_dt_node_available(usbs1_res, ARRAY_SIZE(usbs1_res)))
+ platform_device_register_simple("emxx_udc", -1, usbs1_res,
+ ARRAY_SIZE(usbs1_res));
+}
+
+board_staging("renesas,kzm9d", kzm9d_init);
&dwBytes, NULL);
if (iOK) /* Device IO control OK ? */
{
- if (dwBytes >= 0) /* If driver OK */
- {
- strcpy(pBuffer, tstr);
- sErr = U14ERR_NOERROR;
- }
- else
- sErr = U14ERR_DRIVCOMMS;
+ strcpy(pBuffer, tstr);
+ sErr = U14ERR_NOERROR;
}
else
{
support driver.
Supported boards include:
- Advantech PCL-724 24 channels
- Advantech PCL-722 144 (or 96) channels
- Advantech PCL-731 48 channels
- ADlink ACL-7122 144 (or 96) channels
- ADlink ACL-7124 24 channels
- ADlink PET-48DIO 48 channels
- WinSystems PCM-IO48 48 channels (PC/104)
+ Advantech PCL-724 24 channels
+ Advantech PCL-722 144 (or 96) channels
+ Advantech PCL-731 48 channels
+ ADlink ACL-7122 144 (or 96) channels
+ ADlink ACL-7124 24 channels
+ ADlink PET-48DIO 48 channels
+ WinSystems PCM-IO48 48 channels (PC/104)
+ Diamond Systems ONYX-MM-DIO 48 channels (PC/104)
To compile this driver as a module, choose M here: the module will be
called pcl724.
Advantech PCL-734 iso - 32 out
Diamond Systems OPMM-1616-XT iso - 16 in/16 out
Diamond Systems PEARL-MM-P iso - 16 out
+ Diamond Systems IR104-PBF iso - 20 in/20 out
To compile this driver as a module, choose M here: the module will be
called pcl730.
if (copy_from_user(&insnlist, arg, sizeof(insnlist)))
return -EFAULT;
- data = kmalloc(sizeof(unsigned int) * MAX_SAMPLES, GFP_KERNEL);
+ data = kmalloc_array(MAX_SAMPLES, sizeof(unsigned int), GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto error;
unsigned int *data = NULL;
int ret = 0;
- data = kmalloc(sizeof(unsigned int) * MAX_SAMPLES, GFP_KERNEL);
+ data = kmalloc_array(MAX_SAMPLES, sizeof(unsigned int), GFP_KERNEL);
if (!data) {
ret = -ENOMEM;
goto error;
struct kref refcount;
};
+/**
+ * struct comedi_async - control data for asynchronous comedi commands
+ * @prealloc_buf: preallocated buffer
+ * @prealloc_bufsz: buffer size (in bytes)
+ * @buf_map: map of buffer pages
+ * @max_bufsize: maximum buffer size (in bytes)
+ * @buf_write_count: "write completed" count (in bytes, modulo 2**32)
+ * @buf_write_alloc_count: "allocated for writing" count (in bytes,
+ * modulo 2**32)
+ * @buf_read_count: "read completed" count (in bytes, modulo 2**32)
+ * @buf_read_alloc_count: "allocated for reading" count (in bytes,
+ * modulo 2**32)
+ * @buf_write_ptr: buffer position for writer
+ * @buf_read_ptr: buffer position for reader
+ * @cur_chan: current position in chanlist for scan (for those
+ * drivers that use it)
+ * @scan_progress: amount received or sent for current scan (in bytes)
+ * @munge_chan: current position in chanlist for "munging"
+ * @munge_count: "munge" count (in bytes, modulo 2**32)
+ * @munge_ptr: buffer position for "munging"
+ * @events: bit-vector of events that have occurred
+ * @cmd: details of comedi command in progress
+ * @wait_head: task wait queue for file reader or writer
+ * @cb_mask: bit-vector of events that should wake waiting tasks
+ * @inttrig: software trigger function for command, or NULL
+ *
+ * Note about the ..._count and ..._ptr members:
+ *
+ * Think of the _Count values being integers of unlimited size, indexing
+ * into a buffer of infinite length (though only an advancing portion
+ * of the buffer of fixed length prealloc_bufsz is accessible at any time).
+ * Then:
+ *
+ * Buf_Read_Count <= Buf_Read_Alloc_Count <= Munge_Count <=
+ * Buf_Write_Count <= Buf_Write_Alloc_Count <=
+ * (Buf_Read_Count + prealloc_bufsz)
+ *
+ * (Those aren't the actual members, apart from prealloc_bufsz.) When
+ * the buffer is reset, those _Count values start at 0 and only increase
+ * in value, maintaining the above inequalities until the next time the
+ * buffer is reset. The buffer is divided into the following regions by
+ * the inequalities:
+ *
+ * [0, Buf_Read_Count):
+ * old region no longer accessible
+ * [Buf_Read_Count, Buf_Read_Alloc_Count):
+ * filled and munged region allocated for reading but not yet read
+ * [Buf_Read_Alloc_Count, Munge_Count):
+ * filled and munged region not yet allocated for reading
+ * [Munge_Count, Buf_Write_Count):
+ * filled region not yet munged
+ * [Buf_Write_Count, Buf_Write_Alloc_Count):
+ * unfilled region allocated for writing but not yet written
+ * [Buf_Write_Alloc_Count, Buf_Read_Count + prealloc_bufsz):
+ * unfilled region not yet allocated for writing
+ * [Buf_Read_Count + prealloc_bufsz, infinity):
+ * unfilled region not yet accessible
+ *
+ * Data needs to be written into the buffer before it can be read out,
+ * and may need to be converted (or "munged") between the two
+ * operations. Extra unfilled buffer space may need to allocated for
+ * writing (advancing Buf_Write_Alloc_Count) before new data is written.
+ * After writing new data, the newly filled space needs to be released
+ * (advancing Buf_Write_Count). This also results in the new data being
+ * "munged" (advancing Munge_Count). Before data is read out of the
+ * buffer, extra space may need to be allocated for reading (advancing
+ * Buf_Read_Alloc_Count). After the data has been read out, the space
+ * needs to be released (advancing Buf_Read_Count).
+ *
+ * The actual members, buf_read_count, buf_read_alloc_count,
+ * munge_count, buf_write_count, and buf_write_alloc_count take the
+ * value of the corresponding capitalized _Count values modulo 2^32
+ * (UINT_MAX+1). Subtracting a "higher" _count value from a "lower"
+ * _count value gives the same answer as subtracting a "higher" _Count
+ * value from a lower _Count value because prealloc_bufsz < UINT_MAX+1.
+ * The modulo operation is done implicitly.
+ *
+ * The buf_read_ptr, munge_ptr, and buf_write_ptr members take the value
+ * of the corresponding capitalized _Count values modulo prealloc_bufsz.
+ * These correspond to byte indices in the physical buffer. The modulo
+ * operation is done by subtracting prealloc_bufsz when the value
+ * exceeds prealloc_bufsz (assuming prealloc_bufsz plus the increment is
+ * less than or equal to UINT_MAX).
+ */
struct comedi_async {
- void *prealloc_buf; /* pre-allocated buffer */
- unsigned int prealloc_bufsz; /* buffer size, in bytes */
- struct comedi_buf_map *buf_map; /* map of buffer pages */
-
- unsigned int max_bufsize; /* maximum buffer size, bytes */
-
- /* byte count for writer (write completed) */
+ void *prealloc_buf;
+ unsigned int prealloc_bufsz;
+ struct comedi_buf_map *buf_map;
+ unsigned int max_bufsize;
unsigned int buf_write_count;
- /* byte count for writer (allocated for writing) */
unsigned int buf_write_alloc_count;
- /* byte count for reader (read completed) */
unsigned int buf_read_count;
- /* byte count for reader (allocated for reading) */
unsigned int buf_read_alloc_count;
-
- unsigned int buf_write_ptr; /* buffer marker for writer */
- unsigned int buf_read_ptr; /* buffer marker for reader */
-
- unsigned int cur_chan; /* useless channel marker for interrupt */
- /* number of bytes that have been received for current scan */
+ unsigned int buf_write_ptr;
+ unsigned int buf_read_ptr;
+ unsigned int cur_chan;
unsigned int scan_progress;
- /* keeps track of where we are in chanlist as for munging */
unsigned int munge_chan;
- /* number of bytes that have been munged */
unsigned int munge_count;
- /* buffer marker for munging */
unsigned int munge_ptr;
-
- unsigned int events; /* events that have occurred */
-
+ unsigned int events;
struct comedi_cmd cmd;
-
wait_queue_head_t wait_head;
-
unsigned int cb_mask;
-
int (*inttrig)(struct comedi_device *dev, struct comedi_subdevice *s,
unsigned int x);
};
s->subdev_flags =
SDF_READABLE | SDF_COMMON | SDF_GROUND
| SDF_DIFF;
- if (devpriv->s_EeParameters.i_NbrAiChannel) {
- s->n_chan =
- devpriv->s_EeParameters.i_NbrAiChannel;
- devpriv->b_SingelDiff = 0;
- } else {
+ if (devpriv->s_EeParameters.i_NbrAiChannel)
+ s->n_chan = devpriv->s_EeParameters.i_NbrAiChannel;
+ else
s->n_chan = this_board->i_NbrAiChannelDiff;
- devpriv->b_SingelDiff = 1;
- }
s->maxdata = devpriv->s_EeParameters.i_AiMaxdata;
s->len_chanlist = this_board->i_AiChannelList;
s->range_table = this_board->pr_AiRangelist;
#include <linux/sched.h>
#include <linux/interrupt.h>
-#define LOWORD(W) (unsigned short)((W) & 0xFFFF)
-#define HIWORD(W) (unsigned short)(((W) >> 16) & 0xFFFF)
-
-#define ADDI_ENABLE 1
-#define ADDI_DISABLE 0
-#define APCI1710_SAVE_INTERRUPT 1
-
-#define ADDIDATA_EEPROM 1
-#define ADDIDATA_NO_EEPROM 0
-#define ADDIDATA_93C76 "93C76"
-#define ADDIDATA_S5920 "S5920"
-
-/* ADDIDATA Enable Disable */
-#define ADDIDATA_ENABLE 1
-#define ADDIDATA_DISABLE 0
-
-/* Structures */
-
-/* structure for the boardtype */
struct addi_board {
const char *pc_DriverName; /* driver name */
int i_IorangeBase1;
unsigned char b_InterruptMode; /* eoc eos or dma */
unsigned char b_EocEosInterrupt; /* Enable disable eoc eos interrupt */
unsigned int ui_EocEosConversionTime;
- unsigned char b_SingelDiff;
unsigned char b_ExttrigEnable; /* To enable or disable external trigger */
/* Pointer to the current process */
/* Disable the hardware trigger */
ui_Command = ui_Command & 0xFFFFF89FUL;
- if (data[4] == ADDIDATA_ENABLE) {
-
+ if (data[4] == 1) {
/* Set the hardware trigger level */
ui_Command = ui_Command | (data[5] << 5);
}
/* Disable the hardware gate */
ui_Command = ui_Command & 0xFFFFF87FUL;
- if (data[6] == ADDIDATA_ENABLE) {
-
+ if (data[6] == 1) {
/* Set the hardware gate level */
ui_Command = ui_Command | (data[7] << 7);
}
/* Set the hardware output level */
ui_Command = ui_Command | (data[8] << 2);
outl(ui_Command, devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12);
- if (data[9] == ADDIDATA_ENABLE) {
-
+ if (data[9] == 1) {
/* Set the reload value */
outl(data[11],
devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 24);
devpriv->tsk_Current = current;
/* Set the digital input logic */
- if (data[0] == ADDIDATA_ENABLE) {
+ if (data[0] == 1) {
data[2] = data[2] << 4;
data[3] = data[3] << 4;
outl(data[2], devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);
}
if (data[0])
- devpriv->b_OutputMemoryStatus = ADDIDATA_ENABLE;
+ devpriv->b_OutputMemoryStatus = 1;
else
- devpriv->b_OutputMemoryStatus = ADDIDATA_DISABLE;
+ devpriv->b_OutputMemoryStatus = 0;
- if (data[1] == ADDIDATA_ENABLE)
+ if (data[1] == 1)
ul_Command = ul_Command | 0x1;
else
ul_Command = ul_Command & 0xFFFFFFFE;
- if (data[2] == ADDIDATA_ENABLE)
+ if (data[2] == 1)
ul_Command = ul_Command | 0x2;
else
ul_Command = ul_Command & 0xFFFFFFFD;
b_DigitalOutputRegister) & 0xF0) |
APCI3120_SELECT_TIMER_2_LOW_WORD;
outb(b_Tmp, dev->iobase + APCI3120_TIMER_CRT0);
- outw(LOWORD(ui_TimerValue2),
+ outw(ui_TimerValue2 & 0xffff,
dev->iobase + APCI3120_TIMER_VALUE);
/* Writing HIGH unsigned short */
b_DigitalOutputRegister) & 0xF0) |
APCI3120_SELECT_TIMER_2_HIGH_WORD;
outb(b_Tmp, dev->iobase + APCI3120_TIMER_CRT0);
- outw(HIWORD(ui_TimerValue2),
+ outw((ui_TimerValue2 >> 16) & 0xffff,
dev->iobase + APCI3120_TIMER_VALUE);
/* (2) Reset FC_TIMER BIT Clearing timer status register */
b_DigitalOutputRegister) & 0xF0) |
APCI3120_SELECT_TIMER_2_LOW_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(LOWORD(ui_Timervalue2),
+ outw(ui_Timervalue2 & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
/* Writing HIGH unsigned short */
b_DigitalOutputRegister) & 0xF0) |
APCI3120_SELECT_TIMER_2_HIGH_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(HIWORD(ui_Timervalue2),
+ outw((ui_Timervalue2 >> 16) & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
/* timer2 in Timer mode enabled */
devpriv->b_Timer2Mode = APCI3120_TIMER;
b_DigitalOutputRegister) & 0xF0) |
APCI3120_SELECT_TIMER_2_LOW_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(LOWORD(ui_Timervalue2),
+ outw(ui_Timervalue2 & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
/* Writing HIGH unsigned short */
APCI3120_SELECT_TIMER_2_HIGH_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(HIWORD(ui_Timervalue2),
+ outw((ui_Timervalue2 >> 16) & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
/* watchdog enabled */
devpriv->b_Timer2Mode = APCI3120_WATCHDOG;
APCI3120_SELECT_TIMER_2_LOW_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(LOWORD(ui_Timervalue2),
+ outw(ui_Timervalue2 & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
/* Writing HIGH unsigned short */
APCI3120_SELECT_TIMER_2_HIGH_WORD;
outb(b_Tmp, devpriv->iobase + APCI3120_TIMER_CRT0);
- outw(HIWORD(ui_Timervalue2),
+ outw((ui_Timervalue2 >> 16) & 0xffff,
devpriv->iobase + APCI3120_TIMER_VALUE);
break;
ui_CommandRegister = ui_ChannelNo | (ui_ChannelNo << 8) | 0x80000;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
-
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
- /************************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/* Enable the interrupt */
- /************************/
ui_CommandRegister = ui_CommandRegister | 0x00100000;
- } /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
+ }
/******************************/
/* Write the command register */
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /*****************************/
/*Test if interrupt is enable */
- /*****************************/
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*************************/
/*Read the EOC Status bit */
s_BoardInfos[dev->minor].i_Offset + 28);
/* END JK 06.07.04: Management of sevrals boards */
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
ui_CommandRegister = 0;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
-
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
-
- /**********************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/*Enable the interrupt */
- /**********************/
-
ui_CommandRegister = ui_CommandRegister | 0x00100000;
-
- } /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
+ }
/**********************/
/*Start the conversion */
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /*****************************/
/*Test if interrupt is enable */
- /*****************************/
-
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
-
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*******************/
/*Read the EOC flag */
data[0] =
inl(devpriv->iobase +
s_BoardInfos[dev->minor].i_Offset + 28);
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
ui_CommandRegister = 0;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
-
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
-
- /**********************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/*Enable the interrupt */
- /**********************/
-
ui_CommandRegister = ui_CommandRegister | 0x00100000;
-
- } /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
+ }
/**********************/
/*Start the conversion */
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /*****************************/
/*Test if interrupt is enable */
- /*****************************/
-
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
-
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*******************/
inl(devpriv->iobase +
s_BoardInfos[dev->minor].i_Offset + 28);
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
/*Initialise dw_CommandRegister */
/*******************************/
ui_CommandRegister = 0;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
- /**********************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/*Enable the interrupt */
- /**********************/
ui_CommandRegister = ui_CommandRegister | 0x00100000;
}
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /*****************************/
/*Test if interrupt is enable */
- /*****************************/
-
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*******************/
data[0] =
inl(devpriv->iobase +
s_BoardInfos[dev->minor].i_Offset + 28);
-
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
/*Initialise ui_CommandRegister */
/*******************************/
ui_CommandRegister = 0;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
-
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
- /**********************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/*Enable the interrupt */
- /**********************/
ui_CommandRegister = ui_CommandRegister | 0x00100000;
-
}
/**********************/
/* outl(ui_CommandRegister,devpriv->iobase+i_Offset + 8); */
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*******************/
/*Read the EOC flag */
data[0] =
inl(devpriv->iobase +
s_BoardInfos[dev->minor].i_Offset + 28);
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
/*Initialise dw_CommandRegister */
/*******************************/
ui_CommandRegister = 0;
- /*********************************/
/*Test if the interrupt is enable */
- /*********************************/
- /* if (i_InterruptFlag == ADDIDATA_ENABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_ENABLE) {
- /**********************/
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 1) {
/*Enable the interrupt */
- /**********************/
ui_CommandRegister = ui_CommandRegister | 0x00100000;
}
/**********************/
/* outl(ui_CommandRegister ,devpriv->iobase+i_Offset + 8); */
outl(ui_CommandRegister,
devpriv->iobase + s_BoardInfos[dev->minor].i_Offset + 8);
- /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
- if (s_BoardInfos[dev->minor].i_InterruptFlag == ADDIDATA_DISABLE) {
+ if (s_BoardInfos[dev->minor].i_InterruptFlag == 0) {
do {
/*******************/
/*Read the EOC flag */
data[0] =
inl(devpriv->iobase +
s_BoardInfos[dev->minor].i_Offset + 28);
- } /* if (i_InterruptFlag == ADDIDATA_DISABLE) */
+ }
return 0;
}
i_ADDIDATAConversionTimeUnit= 1; */
/* i_Temp= i_InterruptFlag ; */
i_Temp = s_BoardInfos[dev->minor].i_InterruptFlag;
- /* i_InterruptFlag = ADDIDATA_DISABLE; */
- s_BoardInfos[dev->minor].i_InterruptFlag = ADDIDATA_DISABLE;
+ s_BoardInfos[dev->minor].i_InterruptFlag = 0;
i_APCI3200_Read1AnalogInputChannel(dev, s, insn, data);
/* if(i_AutoCalibration == FALSE) */
if (s_BoardInfos[dev->minor].i_AutoCalibration == FALSE) {
i_ADDIDATAConversionTimeUnit= 1; */
/* i_Temp= i_InterruptFlag ; */
i_Temp = s_BoardInfos[dev->minor].i_InterruptFlag;
- /* i_InterruptFlag = ADDIDATA_DISABLE; */
- s_BoardInfos[dev->minor].i_InterruptFlag = ADDIDATA_DISABLE;
+ s_BoardInfos[dev->minor].i_InterruptFlag = 0;
i_APCI3200_Read1AnalogInputChannel(dev, s, insn, data);
/* if(i_AutoCalibration == FALSE) */
if (s_BoardInfos[dev->minor].i_AutoCalibration == FALSE) {
.pc_DriverName = "apci035",
.i_IorangeBase1 = APCI035_ADDRESS_RANGE,
.i_PCIEeprom = 1,
- .pc_EepromChip = ADDIDATA_S5920,
+ .pc_EepromChip = "S5920",
.i_NbrAiChannel = 16,
.i_NbrAiChannelDiff = 8,
.i_AiChannelList = 16,
{
.pc_DriverName = "apci1500",
.i_IorangeBase1 = APCI1500_ADDRESS_RANGE,
- .i_PCIEeprom = ADDIDATA_NO_EEPROM,
+ .i_PCIEeprom = 0,
.i_NbrDiChannel = 16,
.i_NbrDoChannel = 16,
.i_DoMaxdata = 0xffff,
dev->irq = pcidev->irq;
}
- devpriv->us_UseDma = ADDI_ENABLE;
+ devpriv->us_UseDma = 1;
/* Allocate DMA buffers */
devpriv->b_DmaDoubleBuffer = 0;
}
}
if (!devpriv->ul_DmaBufferVirtual[0])
- devpriv->us_UseDma = ADDI_DISABLE;
+ devpriv->us_UseDma = 0;
if (devpriv->ul_DmaBufferVirtual[1])
devpriv->b_DmaDoubleBuffer = 1;
s->subdev_flags =
SDF_READABLE | SDF_COMMON | SDF_GROUND
| SDF_DIFF;
- if (this_board->i_NbrAiChannel) {
+ if (this_board->i_NbrAiChannel)
s->n_chan = this_board->i_NbrAiChannel;
- devpriv->b_SingelDiff = 0;
- } else {
+ else
s->n_chan = this_board->i_NbrAiChannelDiff;
- devpriv->b_SingelDiff = 1;
- }
s->maxdata = this_board->i_AiMaxdata;
s->len_chanlist = this_board->i_AiChannelList;
s->range_table = &range_apci3120_ai;
[BOARD_APCI3200] = {
.pc_DriverName = "apci3200",
.i_IorangeBase1 = 256,
- .i_PCIEeprom = ADDIDATA_EEPROM,
- .pc_EepromChip = ADDIDATA_S5920,
+ .i_PCIEeprom = 1,
+ .pc_EepromChip = "S5920",
.i_NbrAiChannel = 16,
.i_NbrAiChannelDiff = 8,
.i_AiChannelList = 16,
[BOARD_APCI3300] = {
.pc_DriverName = "apci3300",
.i_IorangeBase1 = 256,
- .i_PCIEeprom = ADDIDATA_EEPROM,
- .pc_EepromChip = ADDIDATA_S5920,
+ .i_PCIEeprom = 1,
+ .pc_EepromChip = "S5920",
.i_NbrAiChannelDiff = 8,
.i_AiChannelList = 8,
.i_AiMaxdata = 0x3ffff,
#include "plx9052.h"
#include "comedi_fc.h"
-#define PCI9111_DRIVER_NAME "adl_pci9111"
-#define PCI9111_HR_DEVICE_ID 0x9111
-
#define PCI9111_FIFO_HALF_SIZE 512
#define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
i8254_write(timer_base, 1, 1, dev_private->div1);
}
-enum pci9111_trigger_sources {
- software,
- timer_pacer,
- external
-};
-
-static void pci9111_trigger_source_set(struct comedi_device *dev,
- enum pci9111_trigger_sources source)
-{
- int flags;
-
- /* Read the current trigger mode control bits */
- flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
- /* Mask off the EITS and TPST bits */
- flags &= 0x9;
-
- switch (source) {
- case software:
- break;
-
- case timer_pacer:
- flags |= PCI9111_AI_TRIG_CTRL_TPST;
- break;
-
- case external:
- flags |= PCI9111_AI_TRIG_CTRL_ETIS;
- break;
- }
-
- outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
-}
-
-static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
-{
- int flags;
-
- /* Read the current trigger mode control bits */
- flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
- /* Mask off the PTRG bit */
- flags &= 0x7;
-
- if (pretrigger)
- flags |= PCI9111_AI_TRIG_CTRL_PTRG;
-
- outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
-}
-
-static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
-{
- int flags;
-
- /* Read the current trigger mode control bits */
- flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
- /* Mask off the ASCAN bit */
- flags &= 0xe;
-
- if (autoscan)
- flags |= PCI9111_AI_TRIG_CTRL_ASCAN;
-
- outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
-}
-
enum pci9111_ISC0_sources {
irq_on_eoc,
irq_on_fifo_half_full
plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
true, false);
- pci9111_trigger_source_set(dev, software);
-
- pci9111_autoscan_set(dev, false);
+ /* disable A/D triggers (software trigger mode) and auto scan off */
+ outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
pci9111_fifo_reset(dev);
{
struct pci9111_private_data *dev_private = dev->private;
struct comedi_cmd *cmd = &s->async->cmd;
+ unsigned int last_chan = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
+ unsigned int trig = 0;
/* Set channel scan limit */
/* PCI9111 allows only scanning from channel 0 to channel n */
/* TODO: handle the case of an external multiplexer */
- if (cmd->chanlist_len > 1) {
- outb(cmd->chanlist_len - 1,
- dev->iobase + PCI9111_AI_CHANNEL_REG);
- pci9111_autoscan_set(dev, true);
- } else {
- outb(CR_CHAN(cmd->chanlist[0]),
- dev->iobase + PCI9111_AI_CHANNEL_REG);
- pci9111_autoscan_set(dev, false);
- }
+ if (cmd->chanlist_len > 1)
+ trig |= PCI9111_AI_TRIG_CTRL_ASCAN;
+
+ outb(last_chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
/* Set gain */
/* This is the same gain on every channel */
/* Set timer pacer */
dev_private->scan_delay = 0;
if (cmd->convert_src == TRIG_TIMER) {
- pci9111_trigger_source_set(dev, software);
+ trig |= PCI9111_AI_TRIG_CTRL_TPST;
pci9111_timer_set(dev);
pci9111_fifo_reset(dev);
pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
irq_on_timer_tick);
- pci9111_trigger_source_set(dev, timer_pacer);
plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
false, true, true);
(cmd->convert_arg * cmd->chanlist_len)) - 1;
}
} else { /* TRIG_EXT */
- pci9111_trigger_source_set(dev, external);
+ trig |= PCI9111_AI_TRIG_CTRL_ETIS;
pci9111_fifo_reset(dev);
pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
irq_on_timer_tick);
plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
false, true, true);
-
}
+ outb(trig, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
dev_private->stop_counter *= (1 + dev_private->scan_delay);
dev_private->chunk_counter = 0;
/* '0' means FIFO is full, data may have been lost */
if (!(status & PCI9111_AI_STAT_FF_FF)) {
spin_unlock_irqrestore(&dev->spinlock, irq_flags);
- comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
+ dev_dbg(dev->class_dev, "fifo overflow\n");
outb(0, dev->iobase + PCI9111_INT_CLR_REG);
async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
cfc_handle_events(dev, s);
plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
true, false);
- pci9111_trigger_source_set(dev, software);
- pci9111_pretrigger_set(dev, false);
- pci9111_autoscan_set(dev, false);
+ /* disable A/D triggers (software trigger mode) and auto scan off */
+ outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
/* Reset 8254 chip */
dev_private->div1 = 0;
}
static const struct pci_device_id pci9111_pci_table[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
+ { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x9111) },
/* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
{ 0 }
};
#include "../comedidev.h"
/* address scheme (page 2.17 of the manual) */
-#define ADQ12B_SIZE 16
-
-#define ADQ12B_CTREG 0x00
-#define ADQ12B_STINR 0x00
-#define ADQ12B_OUTBR 0x04
-#define ADQ12B_ADLOW 0x08
-#define ADQ12B_ADHIG 0x09
-#define ADQ12B_CONT0 0x0c
-#define ADQ12B_CONT1 0x0d
-#define ADQ12B_CONT2 0x0e
-#define ADQ12B_COWORD 0x0f
-
-/* mask of the bit at STINR to check end of conversion */
-#define ADQ12B_EOC 0x20
+#define ADQ12B_CTREG 0x00
+#define ADQ12B_CTREG_MSKP (1 << 7) /* enable pacer interrupt */
+#define ADQ12B_CTREG_GTP (1 << 6) /* enable pacer */
+#define ADQ12B_CTREG_RANGE(x) ((x) << 4)
+#define ADQ12B_CTREG_CHAN(x) ((x) << 0)
+#define ADQ12B_STINR 0x00
+#define ADQ12B_STINR_OUT2 (1 << 7) /* timer 2 output state */
+#define ADQ12B_STINR_OUTP (1 << 6) /* pacer output state */
+#define ADQ12B_STINR_EOC (1 << 5) /* A/D end-of-conversion */
+#define ADQ12B_STINR_IN_MASK (0x1f << 0)
+#define ADQ12B_OUTBR 0x04
+#define ADQ12B_ADLOW 0x08
+#define ADQ12B_ADHIG 0x09
+#define ADQ12B_TIMER_BASE 0x0c
/* available ranges through the PGA gains */
static const struct comedi_lrange range_adq12b_ai_bipolar = {
};
struct adq12b_private {
- int unipolar; /* option 2 of comedi_config (1 is iobase) */
- int differential; /* option 3 of comedi_config */
- int last_channel;
- int last_range;
+ unsigned int last_ctreg;
};
static int adq12b_ai_eoc(struct comedi_device *dev,
unsigned char status;
status = inb(dev->iobase + ADQ12B_STINR);
- if (status & ADQ12B_EOC)
+ if (status & ADQ12B_STINR_EOC)
return 0;
return -EBUSY;
}
-static int adq12b_ai_rinsn(struct comedi_device *dev,
- struct comedi_subdevice *s, struct comedi_insn *insn,
- unsigned int *data)
+static int adq12b_ai_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct adq12b_private *devpriv = dev->private;
- int n;
- int range, channel;
- unsigned char hi, lo, status;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int range = CR_RANGE(insn->chanspec);
+ unsigned int val;
int ret;
+ int i;
/* change channel and range only if it is different from the previous */
- range = CR_RANGE(insn->chanspec);
- channel = CR_CHAN(insn->chanspec);
- if (channel != devpriv->last_channel || range != devpriv->last_range) {
- outb((range << 4) | channel, dev->iobase + ADQ12B_CTREG);
+ val = ADQ12B_CTREG_RANGE(range) | ADQ12B_CTREG_CHAN(chan);
+ if (val != devpriv->last_ctreg) {
+ outb(val, dev->iobase + ADQ12B_CTREG);
+ devpriv->last_ctreg = val;
udelay(50); /* wait for the mux to settle */
}
- /* trigger conversion */
- status = inb(dev->iobase + ADQ12B_ADLOW);
-
- /* convert n samples */
- for (n = 0; n < insn->n; n++) {
+ val = inb(dev->iobase + ADQ12B_ADLOW); /* trigger A/D */
- /* wait for end of conversion */
+ for (i = 0; i < insn->n; i++) {
ret = comedi_timeout(dev, s, insn, adq12b_ai_eoc, 0);
if (ret)
return ret;
- /* read data */
- hi = inb(dev->iobase + ADQ12B_ADHIG);
- lo = inb(dev->iobase + ADQ12B_ADLOW);
-
- data[n] = (hi << 8) | lo;
+ val = inb(dev->iobase + ADQ12B_ADHIG) << 8;
+ val |= inb(dev->iobase + ADQ12B_ADLOW); /* retriggers A/D */
+ data[i] = val;
}
- /* return the number of samples read/written */
- return n;
+ return insn->n;
}
static int adq12b_di_insn_bits(struct comedi_device *dev,
{
/* only bits 0-4 have information about digital inputs */
- data[1] = (inb(dev->iobase + ADQ12B_STINR) & (0x1f));
+ data[1] = (inb(dev->iobase + ADQ12B_STINR) & ADQ12B_STINR_IN_MASK);
return insn->n;
}
struct comedi_subdevice *s;
int ret;
- ret = comedi_request_region(dev, it->options[0], ADQ12B_SIZE);
+ ret = comedi_request_region(dev, it->options[0], 0x10);
if (ret)
return ret;
if (!devpriv)
return -ENOMEM;
- devpriv->unipolar = it->options[1];
- devpriv->differential = it->options[2];
- /*
- * initialize channel and range to -1 so we make sure we
- * always write at least once to the CTREG in the instruction
- */
- devpriv->last_channel = -1;
- devpriv->last_range = -1;
+ devpriv->last_ctreg = -1; /* force ctreg update */
ret = comedi_alloc_subdevices(dev, 3);
if (ret)
return ret;
+ /* Analog Input subdevice */
s = &dev->subdevices[0];
- /* analog input subdevice */
- s->type = COMEDI_SUBD_AI;
- if (devpriv->differential) {
- s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
- s->n_chan = 8;
+ s->type = COMEDI_SUBD_AI;
+ if (it->options[2]) {
+ s->subdev_flags = SDF_READABLE | SDF_DIFF;
+ s->n_chan = 8;
} else {
- s->subdev_flags = SDF_READABLE | SDF_GROUND;
- s->n_chan = 16;
+ s->subdev_flags = SDF_READABLE | SDF_GROUND;
+ s->n_chan = 16;
}
+ s->maxdata = 0xfff;
+ s->range_table = it->options[1] ? &range_adq12b_ai_unipolar
+ : &range_adq12b_ai_bipolar;
+ s->insn_read = adq12b_ai_insn_read;
- if (devpriv->unipolar)
- s->range_table = &range_adq12b_ai_unipolar;
- else
- s->range_table = &range_adq12b_ai_bipolar;
-
- s->maxdata = 0xfff;
-
- s->len_chanlist = 4; /* This is the maximum chanlist length that
- the board can handle */
- s->insn_read = adq12b_ai_rinsn;
-
+ /* Digital Input subdevice */
s = &dev->subdevices[1];
- /* digital input subdevice */
- s->type = COMEDI_SUBD_DI;
- s->subdev_flags = SDF_READABLE;
- s->n_chan = 5;
- s->maxdata = 1;
- s->range_table = &range_digital;
- s->insn_bits = adq12b_di_insn_bits;
-
+ s->type = COMEDI_SUBD_DI;
+ s->subdev_flags = SDF_READABLE;
+ s->n_chan = 5;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_bits = adq12b_di_insn_bits;
+
+ /* Digital Output subdevice */
s = &dev->subdevices[2];
- /* digital output subdevice */
- s->type = COMEDI_SUBD_DO;
- s->subdev_flags = SDF_WRITABLE;
- s->n_chan = 8;
- s->maxdata = 1;
- s->range_table = &range_digital;
- s->insn_bits = adq12b_do_insn_bits;
+ s->type = COMEDI_SUBD_DO;
+ s->subdev_flags = SDF_WRITABLE;
+ s->n_chan = 8;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_bits = adq12b_do_insn_bits;
return 0;
}
return insn->n;
}
+static void ke_counter_reset(struct comedi_device *dev)
+{
+ unsigned int chan;
+
+ for (chan = 0; chan < 3; chan++)
+ outb(0, dev->iobase + KE_RESET_REG(chan));
+}
+
+static int ke_counter_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case KE_OSC_SEL_EXT: /* Pin 21 on D-sub */
+ case KE_OSC_SEL_4MHZ: /* option */
+ case KE_OSC_SEL_20MHZ: /* default */
+ break;
+ default:
+ return -EINVAL;
+ }
+ outb(data[1], dev->iobase + KE_OSC_SEL_REG);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ data[1] = inb(dev->iobase + KE_OSC_SEL_REG);
+ switch (data[1]) {
+ case KE_OSC_SEL_EXT:
+ data[2] = 0; /* Unknown */
+ break;
+ case KE_OSC_SEL_4MHZ:
+ data[2] = 250; /* 250ns */
+ break;
+ case KE_OSC_SEL_20MHZ:
+ data[2] = 50; /* 50ns */
+ break;
+ default:
+ data[2] = 0; /* Invalid? */
+ break;
+ }
+ break;
+ case INSN_CONFIG_RESET:
+ ke_counter_reset(dev);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
static int ke_counter_do_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
s->range_table = &range_unknown;
s->insn_read = ke_counter_insn_read;
s->insn_write = ke_counter_insn_write;
+ s->insn_config = ke_counter_insn_config;
s = &dev->subdevices[1];
s->type = COMEDI_SUBD_DO;
outb(KE_OSC_SEL_20MHZ, dev->iobase + KE_OSC_SEL_REG);
- outb(0, dev->iobase + KE_RESET_REG(0));
- outb(0, dev->iobase + KE_RESET_REG(1));
- outb(0, dev->iobase + KE_RESET_REG(2));
+ ke_counter_reset(dev);
return 0;
}
#define NI_SIZE 0x20
-#define MAX_N_CALDACS 32
-
static const struct ni_board_struct ni_boards[] = {
{.device_id = 44,
.isapnp_id = 0x0000, /* XXX unknown */
#define NI_E_IRQ_FLAGS 0
-struct ni_private {
- struct pnp_dev *isapnp_dev;
- NI_PRIVATE_COMMON
-
-};
-
-/* How we access registers */
-
-#define ni_writel(a, b) (outl((a), (b)+dev->iobase))
-#define ni_readl(a) (inl((a)+dev->iobase))
-#define ni_writew(a, b) (outw((a), (b)+dev->iobase))
-#define ni_readw(a) (inw((a)+dev->iobase))
-#define ni_writeb(a, b) (outb((a), (b)+dev->iobase))
-#define ni_readb(a) (inb((a)+dev->iobase))
-
-/* How we access windowed registers */
-
-/* We automatically take advantage of STC registers that can be
- * read/written directly in the I/O space of the board. The
- * AT-MIO devices map the low 8 STC registers to iobase+addr*2. */
-
-static void ni_atmio_win_out(struct comedi_device *dev, uint16_t data, int addr)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- if ((addr) < 8) {
- ni_writew(data, addr * 2);
- } else {
- ni_writew(addr, Window_Address);
- ni_writew(data, Window_Data);
- }
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-}
-
-static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
- uint16_t ret;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- if (addr < 8) {
- ret = ni_readw(addr * 2);
- } else {
- ni_writew(addr, Window_Address);
- ret = ni_readw(Window_Data);
- }
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-
- return ret;
-}
+#include "ni_mio_common.c"
static struct pnp_device_id device_ids[] = {
{.id = "NIC1900", .driver_data = 0},
MODULE_DEVICE_TABLE(pnp, device_ids);
-#include "ni_mio_common.c"
-
static int ni_isapnp_find_board(struct pnp_dev **dev)
{
struct pnp_dev *isapnp_dev = NULL;
return ret;
devpriv = dev->private;
- devpriv->stc_writew = &ni_atmio_win_out;
- devpriv->stc_readw = &ni_atmio_win_in;
- devpriv->stc_writel = &win_out2;
- devpriv->stc_readl = &win_in2;
-
iobase = it->options[0];
irq = it->options[1];
isapnp_dev = NULL;
iobase = pnp_port_start(isapnp_dev, 0);
irq = pnp_irq(isapnp_dev, 0);
- devpriv->isapnp_dev = isapnp_dev;
+ comedi_set_hw_dev(dev, &isapnp_dev->dev);
}
ret = comedi_request_region(dev, iobase, NI_SIZE);
static void ni_atmio_detach(struct comedi_device *dev)
{
- struct ni_private *devpriv = dev->private;
+ struct pnp_dev *isapnp_dev;
mio_common_detach(dev);
comedi_legacy_detach(dev);
- if (devpriv->isapnp_dev)
- pnp_device_detach(devpriv->isapnp_dev);
+
+ isapnp_dev = dev->hw_dev ? to_pnp_dev(dev->hw_dev) : NULL;
+ if (isapnp_dev)
+ pnp_device_detach(isapnp_dev);
}
static struct comedi_driver ni_atmio_driver = {
*/
/*
-Driver: ni_daq_700
-Description: National Instruments PCMCIA DAQCard-700 DIO only
-Author: Fred Brooks <nsaspook@nsaspook.com>,
- based on ni_daq_dio24 by Daniel Vecino Castel <dvecino@able.es>
-Devices: [National Instruments] PCMCIA DAQ-Card-700 (ni_daq_700)
-Status: works
-Updated: Wed, 19 Sep 2012 12:07:20 +0000
-
-The daqcard-700 appears in Comedi as a digital I/O subdevice (0) with
-16 channels and a analog input subdevice (1) with 16 single-ended channels.
-
-Digital: The channel 0 corresponds to the daqcard-700's output
-port, bit 0; channel 8 corresponds to the input port, bit 0.
-
-Digital direction configuration: channels 0-7 output, 8-15 input (8225 device
-emu as port A output, port B input, port C N/A).
-
-Analog: The input range is 0 to 4095 for -10 to +10 volts
-IRQ is assigned but not used.
-
-Version 0.1 Original DIO only driver
-Version 0.2 DIO and basic AI analog input support on 16 se channels
-
-Manuals: Register level: http://www.ni.com/pdf/manuals/340698.pdf
- User Manual: http://www.ni.com/pdf/manuals/320676d.pdf
-*/
+ * Driver: ni_daq_700
+ * Description: National Instruments PCMCIA DAQCard-700
+ * Author: Fred Brooks <nsaspook@nsaspook.com>,
+ * based on ni_daq_dio24 by Daniel Vecino Castel <dvecino@able.es>
+ * Devices: [National Instruments] PCMCIA DAQ-Card-700 (ni_daq_700)
+ * Status: works
+ * Updated: Wed, 21 May 2014 12:07:20 +0000
+ *
+ * The daqcard-700 appears in Comedi as a digital I/O subdevice (0) with
+ * 16 channels and a analog input subdevice (1) with 16 single-ended channels
+ * or 8 differential channels, and three input ranges.
+ *
+ * Digital: The channel 0 corresponds to the daqcard-700's output
+ * port, bit 0; channel 8 corresponds to the input port, bit 0.
+ *
+ * Digital direction configuration: channels 0-7 output, 8-15 input.
+ *
+ * Analog: The input range is 0 to 4095 with a default of -10 to +10 volts.
+ * Valid ranges:
+ * 0 for -10 to 10V bipolar
+ * 1 for -5 to 5V bipolar
+ * 2 for -2.5 to 2.5V bipolar
+ *
+ * IRQ is assigned but not used.
+ *
+ * Version 0.1 Original DIO only driver
+ * Version 0.2 DIO and basic AI analog input support on 16 se channels
+ * Version 0.3 Add SE or DIFF mode and range switching +-10,+-5,+-2.5
+ * Clear the FIFO of data before the conversion to handle card
+ * mode switching glitches.
+ *
+ * Manuals: Register level: http://www.ni.com/pdf/manuals/340698.pdf
+ * User Manual: http://www.ni.com/pdf/manuals/320676d.pdf
+ */
#include <linux/module.h>
#include <linux/delay.h>
#define CDA_R2 0x0A /* RW 8bit */
#define CMO_R 0x0B /* RO 8bit */
#define TIC_R 0x06 /* WO 8bit */
+/* daqcard700 modes */
+#define CMD_R3_DIFF 0x04 /* diff mode */
+
+static const struct comedi_lrange range_daq700_ai = {
+ 3,
+ {
+ BIP_RANGE(10),
+ BIP_RANGE(5),
+ BIP_RANGE(2.5)
+ }
+};
static int daq700_dio_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
- int n, chan;
+ int n;
int d;
int ret;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int aref = CR_AREF(insn->chanspec);
+ unsigned int range = CR_RANGE(insn->chanspec);
+ unsigned int r3_bits = 0;
+
+ /* set channel input modes */
+ if (aref == AREF_DIFF)
+ r3_bits |= CMD_R3_DIFF;
+ /* write channel mode/range */
+ if (range >= 1)
+ range++; /* convert range to hardware value */
+ outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3);
- chan = CR_CHAN(insn->chanspec);
/* write channel to multiplexer */
/* set mask scan bit high to disable scanning */
outb(chan | 0x80, dev->iobase + CMD_R1);
/* trigger conversion with out0 L to H */
outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */
outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */
+ outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */
+ /* read 16bit junk from FIFO to clear */
+ inw(dev->iobase + ADFIFO_R);
/* mode 1 out0 H, L to H, start conversion */
outb(0x32, dev->iobase + CMO_R);
/* DAQCard-700 ai */
s = &dev->subdevices[1];
s->type = COMEDI_SUBD_AI;
- /* we support single-ended (ground) */
- s->subdev_flags = SDF_READABLE | SDF_GROUND;
+ s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
s->n_chan = 16;
s->maxdata = (1 << 12) - 1;
- s->range_table = &range_bipolar10;
+ s->range_table = &range_daq700_ai;
s->insn_read = daq700_ai_rinsn;
daq700_ai_config(dev, s);
MODULE_AUTHOR("Fred Brooks <nsaspook@nsaspook.com>");
MODULE_DESCRIPTION(
"Comedi driver for National Instruments PCMCIA DAQCard-700 DIO/AI");
-MODULE_VERSION("0.2.00");
+MODULE_VERSION("0.3.00");
MODULE_LICENSE("GPL");
[ai_gain_6143] = &range_bipolar5
};
-static int ni_dio_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_dio_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_cdio_cmdtest(struct comedi_device *dev,
- struct comedi_subdevice *s, struct comedi_cmd *cmd);
-static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
-static int ni_cdio_cancel(struct comedi_device *dev,
- struct comedi_subdevice *s);
-static void handle_cdio_interrupt(struct comedi_device *dev);
-static int ni_cdo_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
- unsigned int trignum);
-
-static int ni_serial_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_serial_hw_readwrite8(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned char data_out,
- unsigned char *data_in);
-static int ni_serial_sw_readwrite8(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned char data_out,
- unsigned char *data_in);
-
-static int ni_calib_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_calib_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-
-static int ni_eeprom_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_m_series_eeprom_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data);
-
-static int ni_pfi_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_pfi_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static unsigned ni_old_get_pfi_routing(struct comedi_device *dev,
- unsigned chan);
-
-static void ni_rtsi_init(struct comedi_device *dev);
-static int ni_rtsi_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_rtsi_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-
-static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s);
-static int ni_read_eeprom(struct comedi_device *dev, int addr);
-
-#ifndef PCIDMA
-static void ni_handle_fifo_half_full(struct comedi_device *dev);
-static int ni_ao_fifo_half_empty(struct comedi_device *dev,
- struct comedi_subdevice *s);
-#endif
-static void ni_handle_fifo_dregs(struct comedi_device *dev);
-static int ni_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
- unsigned int trignum);
-static void ni_load_channelgain_list(struct comedi_device *dev,
- unsigned int n_chan, unsigned int *list);
-static void shutdown_ai_command(struct comedi_device *dev);
-
-static int ni_ao_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
- unsigned int trignum);
-
-static int ni_8255_callback(int dir, int port, int data, unsigned long arg);
-
-#ifdef PCIDMA
-static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
-static int ni_gpct_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
-#endif
-static void handle_gpct_interrupt(struct comedi_device *dev,
- unsigned short counter_index);
-
-static int init_cs5529(struct comedi_device *dev);
-static int cs5529_do_conversion(struct comedi_device *dev,
- unsigned short *data);
-static int cs5529_ai_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static void cs5529_config_write(struct comedi_device *dev, unsigned int value,
- unsigned int reg_select_bits);
-
-static int ni_m_series_pwm_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-static int ni_6143_pwm_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data);
-
-static int ni_set_master_clock(struct comedi_device *dev, unsigned source,
- unsigned period_ns);
-static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status);
-static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status);
-
enum aimodes {
AIMODE_NONE = 0,
AIMODE_HALF_FULL = 1,
static const int num_adc_stages_611x = 3;
-static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
- unsigned ai_mite_status);
-static void handle_b_interrupt(struct comedi_device *dev, unsigned short status,
- unsigned ao_mite_status);
-static void get_last_sample_611x(struct comedi_device *dev);
-static void get_last_sample_6143(struct comedi_device *dev);
+static void ni_writel(struct comedi_device *dev, uint32_t data, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ writel(data, devpriv->mite->daq_io_addr + reg);
+ else
+ outl(data, dev->iobase + reg);
+}
+
+static void ni_writew(struct comedi_device *dev, uint16_t data, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ writew(data, devpriv->mite->daq_io_addr + reg);
+ else
+ outw(data, dev->iobase + reg);
+}
+
+static void ni_writeb(struct comedi_device *dev, uint8_t data, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ writeb(data, devpriv->mite->daq_io_addr + reg);
+ else
+ outb(data, dev->iobase + reg);
+}
+
+static uint32_t ni_readl(struct comedi_device *dev, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ return readl(devpriv->mite->daq_io_addr + reg);
+ else
+ return inl(dev->iobase + reg);
+}
+
+static uint16_t ni_readw(struct comedi_device *dev, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ return readw(devpriv->mite->daq_io_addr + reg);
+ else
+ return inw(dev->iobase + reg);
+}
+
+static uint8_t ni_readb(struct comedi_device *dev, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->mite)
+ return readb(devpriv->mite->daq_io_addr + reg);
+ else
+ return inb(dev->iobase + reg);
+}
+
+/*
+ * We automatically take advantage of STC registers that can be
+ * read/written directly in the I/O space of the board.
+ *
+ * The AT-MIO and DAQCard devices map the low 8 STC registers to
+ * iobase+reg*2.
+ *
+ * Most PCIMIO devices also map the low 8 STC registers but the
+ * 611x devices map the read registers to iobase+(addr-1)*2.
+ * For now non-windowed STC access is disabled if a PCIMIO device
+ * is detected (devpriv->mite has been initialized).
+ *
+ * The M series devices do not used windowed registers for the
+ * STC registers. The functions below handle the mapping of the
+ * windowed STC registers to the m series register offsets.
+ */
+
+static void m_series_stc_writel(struct comedi_device *dev,
+ uint32_t data, int reg)
+{
+ unsigned offset;
+
+ switch (reg) {
+ case AI_SC_Load_A_Registers:
+ offset = M_Offset_AI_SC_Load_A;
+ break;
+ case AI_SI_Load_A_Registers:
+ offset = M_Offset_AI_SI_Load_A;
+ break;
+ case AO_BC_Load_A_Register:
+ offset = M_Offset_AO_BC_Load_A;
+ break;
+ case AO_UC_Load_A_Register:
+ offset = M_Offset_AO_UC_Load_A;
+ break;
+ case AO_UI_Load_A_Register:
+ offset = M_Offset_AO_UI_Load_A;
+ break;
+ case G_Load_A_Register(0):
+ offset = M_Offset_G0_Load_A;
+ break;
+ case G_Load_A_Register(1):
+ offset = M_Offset_G1_Load_A;
+ break;
+ case G_Load_B_Register(0):
+ offset = M_Offset_G0_Load_B;
+ break;
+ case G_Load_B_Register(1):
+ offset = M_Offset_G1_Load_B;
+ break;
+ default:
+ dev_warn(dev->class_dev,
+ "%s: bug! unhandled register=0x%x in switch\n",
+ __func__, reg);
+ return;
+ }
+ ni_writel(dev, data, offset);
+}
+
+static void m_series_stc_writew(struct comedi_device *dev,
+ uint16_t data, int reg)
+{
+ unsigned offset;
+
+ switch (reg) {
+ case ADC_FIFO_Clear:
+ offset = M_Offset_AI_FIFO_Clear;
+ break;
+ case AI_Command_1_Register:
+ offset = M_Offset_AI_Command_1;
+ break;
+ case AI_Command_2_Register:
+ offset = M_Offset_AI_Command_2;
+ break;
+ case AI_Mode_1_Register:
+ offset = M_Offset_AI_Mode_1;
+ break;
+ case AI_Mode_2_Register:
+ offset = M_Offset_AI_Mode_2;
+ break;
+ case AI_Mode_3_Register:
+ offset = M_Offset_AI_Mode_3;
+ break;
+ case AI_Output_Control_Register:
+ offset = M_Offset_AI_Output_Control;
+ break;
+ case AI_Personal_Register:
+ offset = M_Offset_AI_Personal;
+ break;
+ case AI_SI2_Load_A_Register:
+ /* this is a 32 bit register on m series boards */
+ ni_writel(dev, data, M_Offset_AI_SI2_Load_A);
+ return;
+ case AI_SI2_Load_B_Register:
+ /* this is a 32 bit register on m series boards */
+ ni_writel(dev, data, M_Offset_AI_SI2_Load_B);
+ return;
+ case AI_START_STOP_Select_Register:
+ offset = M_Offset_AI_START_STOP_Select;
+ break;
+ case AI_Trigger_Select_Register:
+ offset = M_Offset_AI_Trigger_Select;
+ break;
+ case Analog_Trigger_Etc_Register:
+ offset = M_Offset_Analog_Trigger_Etc;
+ break;
+ case AO_Command_1_Register:
+ offset = M_Offset_AO_Command_1;
+ break;
+ case AO_Command_2_Register:
+ offset = M_Offset_AO_Command_2;
+ break;
+ case AO_Mode_1_Register:
+ offset = M_Offset_AO_Mode_1;
+ break;
+ case AO_Mode_2_Register:
+ offset = M_Offset_AO_Mode_2;
+ break;
+ case AO_Mode_3_Register:
+ offset = M_Offset_AO_Mode_3;
+ break;
+ case AO_Output_Control_Register:
+ offset = M_Offset_AO_Output_Control;
+ break;
+ case AO_Personal_Register:
+ offset = M_Offset_AO_Personal;
+ break;
+ case AO_Start_Select_Register:
+ offset = M_Offset_AO_Start_Select;
+ break;
+ case AO_Trigger_Select_Register:
+ offset = M_Offset_AO_Trigger_Select;
+ break;
+ case Clock_and_FOUT_Register:
+ offset = M_Offset_Clock_and_FOUT;
+ break;
+ case Configuration_Memory_Clear:
+ offset = M_Offset_Configuration_Memory_Clear;
+ break;
+ case DAC_FIFO_Clear:
+ offset = M_Offset_AO_FIFO_Clear;
+ break;
+ case DIO_Control_Register:
+ dev_dbg(dev->class_dev,
+ "%s: FIXME: register 0x%x does not map cleanly on to m-series boards\n",
+ __func__, reg);
+ return;
+ case G_Autoincrement_Register(0):
+ offset = M_Offset_G0_Autoincrement;
+ break;
+ case G_Autoincrement_Register(1):
+ offset = M_Offset_G1_Autoincrement;
+ break;
+ case G_Command_Register(0):
+ offset = M_Offset_G0_Command;
+ break;
+ case G_Command_Register(1):
+ offset = M_Offset_G1_Command;
+ break;
+ case G_Input_Select_Register(0):
+ offset = M_Offset_G0_Input_Select;
+ break;
+ case G_Input_Select_Register(1):
+ offset = M_Offset_G1_Input_Select;
+ break;
+ case G_Mode_Register(0):
+ offset = M_Offset_G0_Mode;
+ break;
+ case G_Mode_Register(1):
+ offset = M_Offset_G1_Mode;
+ break;
+ case Interrupt_A_Ack_Register:
+ offset = M_Offset_Interrupt_A_Ack;
+ break;
+ case Interrupt_A_Enable_Register:
+ offset = M_Offset_Interrupt_A_Enable;
+ break;
+ case Interrupt_B_Ack_Register:
+ offset = M_Offset_Interrupt_B_Ack;
+ break;
+ case Interrupt_B_Enable_Register:
+ offset = M_Offset_Interrupt_B_Enable;
+ break;
+ case Interrupt_Control_Register:
+ offset = M_Offset_Interrupt_Control;
+ break;
+ case IO_Bidirection_Pin_Register:
+ offset = M_Offset_IO_Bidirection_Pin;
+ break;
+ case Joint_Reset_Register:
+ offset = M_Offset_Joint_Reset;
+ break;
+ case RTSI_Trig_A_Output_Register:
+ offset = M_Offset_RTSI_Trig_A_Output;
+ break;
+ case RTSI_Trig_B_Output_Register:
+ offset = M_Offset_RTSI_Trig_B_Output;
+ break;
+ case RTSI_Trig_Direction_Register:
+ offset = M_Offset_RTSI_Trig_Direction;
+ break;
+ /*
+ * FIXME: DIO_Output_Register (16 bit reg) is replaced by
+ * M_Offset_Static_Digital_Output (32 bit) and
+ * M_Offset_SCXI_Serial_Data_Out (8 bit)
+ */
+ default:
+ dev_warn(dev->class_dev,
+ "%s: bug! unhandled register=0x%x in switch\n",
+ __func__, reg);
+ return;
+ }
+ ni_writew(dev, data, offset);
+}
+
+static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
+{
+ unsigned offset;
+
+ switch (reg) {
+ case G_HW_Save_Register(0):
+ offset = M_Offset_G0_HW_Save;
+ break;
+ case G_HW_Save_Register(1):
+ offset = M_Offset_G1_HW_Save;
+ break;
+ case G_Save_Register(0):
+ offset = M_Offset_G0_Save;
+ break;
+ case G_Save_Register(1):
+ offset = M_Offset_G1_Save;
+ break;
+ default:
+ dev_warn(dev->class_dev,
+ "%s: bug! unhandled register=0x%x in switch\n",
+ __func__, reg);
+ return 0;
+ }
+ return ni_readl(dev, offset);
+}
+
+static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
+{
+ unsigned offset;
+
+ switch (reg) {
+ case AI_Status_1_Register:
+ offset = M_Offset_AI_Status_1;
+ break;
+ case AO_Status_1_Register:
+ offset = M_Offset_AO_Status_1;
+ break;
+ case AO_Status_2_Register:
+ offset = M_Offset_AO_Status_2;
+ break;
+ case DIO_Serial_Input_Register:
+ return ni_readb(dev, M_Offset_SCXI_Serial_Data_In);
+ case Joint_Status_1_Register:
+ offset = M_Offset_Joint_Status_1;
+ break;
+ case Joint_Status_2_Register:
+ offset = M_Offset_Joint_Status_2;
+ break;
+ case G_Status_Register:
+ offset = M_Offset_G01_Status;
+ break;
+ default:
+ dev_warn(dev->class_dev,
+ "%s: bug! unhandled register=0x%x in switch\n",
+ __func__, reg);
+ return 0;
+ }
+ return ni_readw(dev, offset);
+}
+
+static void ni_stc_writew(struct comedi_device *dev, uint16_t data, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+ unsigned long flags;
+
+ if (devpriv->is_m_series) {
+ m_series_stc_writew(dev, data, reg);
+ } else {
+ spin_lock_irqsave(&devpriv->window_lock, flags);
+ if (!devpriv->mite && reg < 8) {
+ ni_writew(dev, data, reg * 2);
+ } else {
+ ni_writew(dev, reg, Window_Address);
+ ni_writew(dev, data, Window_Data);
+ }
+ spin_unlock_irqrestore(&devpriv->window_lock, flags);
+ }
+}
+
+static void ni_stc_writel(struct comedi_device *dev, uint32_t data, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->is_m_series) {
+ m_series_stc_writel(dev, data, reg);
+ } else {
+ ni_stc_writew(dev, data >> 16, reg);
+ ni_stc_writew(dev, data & 0xffff, reg + 1);
+ }
+}
+
+static uint16_t ni_stc_readw(struct comedi_device *dev, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+ unsigned long flags;
+ uint16_t val;
+
+ if (devpriv->is_m_series) {
+ val = m_series_stc_readw(dev, reg);
+ } else {
+ spin_lock_irqsave(&devpriv->window_lock, flags);
+ if (!devpriv->mite && reg < 8) {
+ val = ni_readw(dev, reg * 2);
+ } else {
+ ni_writew(dev, reg, Window_Address);
+ val = ni_readw(dev, Window_Data);
+ }
+ spin_unlock_irqrestore(&devpriv->window_lock, flags);
+ }
+ return val;
+}
+
+static uint32_t ni_stc_readl(struct comedi_device *dev, int reg)
+{
+ struct ni_private *devpriv = dev->private;
+ uint32_t val;
+
+ if (devpriv->is_m_series) {
+ val = m_series_stc_readl(dev, reg);
+ } else {
+ val = ni_stc_readw(dev, reg) << 16;
+ val |= ni_stc_readw(dev, reg + 1);
+ }
+ return val;
+}
static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
unsigned bit_mask, unsigned bit_values)
case Interrupt_A_Enable_Register:
devpriv->int_a_enable_reg &= ~bit_mask;
devpriv->int_a_enable_reg |= bit_values & bit_mask;
- devpriv->stc_writew(dev, devpriv->int_a_enable_reg,
- Interrupt_A_Enable_Register);
+ ni_stc_writew(dev, devpriv->int_a_enable_reg,
+ Interrupt_A_Enable_Register);
break;
case Interrupt_B_Enable_Register:
devpriv->int_b_enable_reg &= ~bit_mask;
devpriv->int_b_enable_reg |= bit_values & bit_mask;
- devpriv->stc_writew(dev, devpriv->int_b_enable_reg,
- Interrupt_B_Enable_Register);
+ ni_stc_writew(dev, devpriv->int_b_enable_reg,
+ Interrupt_B_Enable_Register);
break;
case IO_Bidirection_Pin_Register:
devpriv->io_bidirection_pin_reg &= ~bit_mask;
devpriv->io_bidirection_pin_reg |= bit_values & bit_mask;
- devpriv->stc_writew(dev, devpriv->io_bidirection_pin_reg,
- IO_Bidirection_Pin_Register);
+ ni_stc_writew(dev, devpriv->io_bidirection_pin_reg,
+ IO_Bidirection_Pin_Register);
break;
case AI_AO_Select:
devpriv->ai_ao_select_reg &= ~bit_mask;
devpriv->ai_ao_select_reg |= bit_values & bit_mask;
- ni_writeb(devpriv->ai_ao_select_reg, AI_AO_Select);
+ ni_writeb(dev, devpriv->ai_ao_select_reg, AI_AO_Select);
break;
case G0_G1_Select:
devpriv->g0_g1_select_reg &= ~bit_mask;
devpriv->g0_g1_select_reg |= bit_values & bit_mask;
- ni_writeb(devpriv->g0_g1_select_reg, G0_G1_Select);
+ ni_writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
break;
default:
printk("Warning %s() called with invalid register\n", __func__);
}
#ifdef PCIDMA
-static int ni_ai_drain_dma(struct comedi_device *dev);
-
/* DMA channel setup */
/* negative channel means no channel */
(ni_stc_dma_channel_select_bitfield(mite_channel) <<
CDO_DMA_Select_Shift) & CDO_DMA_Select_Mask;
}
- ni_writeb(devpriv->cdio_dma_select_reg, M_Offset_CDIO_DMA_Select);
+ ni_writeb(dev, devpriv->cdio_dma_select_reg, M_Offset_CDIO_DMA_Select);
mmiowb();
spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags);
}
#endif /* PCIDMA */
}
-/* e-series boards use the second irq signals to generate dma requests for their counters */
#ifdef PCIDMA
static void ni_e_series_enable_second_irq(struct comedi_device *dev,
unsigned gpct_index, short enable)
{
- const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
+ uint16_t val = 0;
+ int reg;
- if (board->reg_type & ni_reg_m_series_mask)
+ if (devpriv->is_m_series || gpct_index > 1)
return;
- switch (gpct_index) {
- case 0:
- if (enable) {
- devpriv->stc_writew(dev, G0_Gate_Second_Irq_Enable,
- Second_IRQ_A_Enable_Register);
- } else {
- devpriv->stc_writew(dev, 0,
- Second_IRQ_A_Enable_Register);
- }
- break;
- case 1:
- if (enable) {
- devpriv->stc_writew(dev, G1_Gate_Second_Irq_Enable,
- Second_IRQ_B_Enable_Register);
- } else {
- devpriv->stc_writew(dev, 0,
- Second_IRQ_B_Enable_Register);
- }
- break;
- default:
- BUG();
- break;
- }
-}
-#endif /* PCIDMA */
+
+ /*
+ * e-series boards use the second irq signals to generate
+ * dma requests for their counters
+ */
+ if (gpct_index == 0) {
+ reg = Second_IRQ_A_Enable_Register;
+ if (enable)
+ val = G0_Gate_Second_Irq_Enable;
+ } else {
+ reg = Second_IRQ_B_Enable_Register;
+ if (enable)
+ val = G1_Gate_Second_Irq_Enable;
+ }
+ ni_stc_writew(dev, val, reg);
+}
+#endif /* PCIDMA */
static void ni_clear_ai_fifo(struct comedi_device *dev)
{
const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
static const int timeout = 10000;
int i;
if (board->reg_type == ni_reg_6143) {
/* Flush the 6143 data FIFO */
- ni_writel(0x10, AIFIFO_Control_6143); /* Flush fifo */
- ni_writel(0x00, AIFIFO_Control_6143); /* Flush fifo */
+ ni_writel(dev, 0x10, AIFIFO_Control_6143);
+ ni_writel(dev, 0x00, AIFIFO_Control_6143);
/* Wait for complete */
for (i = 0; i < timeout; i++) {
- if (!(ni_readl(AIFIFO_Status_6143) & 0x10))
+ if (!(ni_readl(dev, AIFIFO_Status_6143) & 0x10))
break;
udelay(1);
}
comedi_error(dev, "FIFO flush timeout.");
}
} else {
- devpriv->stc_writew(dev, 1, ADC_FIFO_Clear);
+ ni_stc_writew(dev, 1, ADC_FIFO_Clear);
if (board->reg_type == ni_reg_625x) {
- ni_writeb(0, M_Offset_Static_AI_Control(0));
- ni_writeb(1, M_Offset_Static_AI_Control(0));
+ ni_writeb(dev, 0, M_Offset_Static_AI_Control(0));
+ ni_writeb(dev, 1, M_Offset_Static_AI_Control(0));
#if 0
/* the NI example code does 3 convert pulses for 625x boards,
but that appears to be wrong in practice. */
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
#endif
}
}
}
-static void win_out2(struct comedi_device *dev, uint32_t data, int reg)
-{
- struct ni_private *devpriv = dev->private;
-
- devpriv->stc_writew(dev, data >> 16, reg);
- devpriv->stc_writew(dev, data & 0xffff, reg + 1);
-}
-
-static uint32_t win_in2(struct comedi_device *dev, int reg)
-{
- struct ni_private *devpriv = dev->private;
- uint32_t bits;
-
- bits = devpriv->stc_readw(dev, reg) << 16;
- bits |= devpriv->stc_readw(dev, reg + 1);
- return bits;
-}
-
#define ao_win_out(data, addr) ni_ao_win_outw(dev, data, addr)
static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data,
int addr)
unsigned long flags;
spin_lock_irqsave(&devpriv->window_lock, flags);
- ni_writew(addr, AO_Window_Address_611x);
- ni_writew(data, AO_Window_Data_611x);
+ ni_writew(dev, addr, AO_Window_Address_611x);
+ ni_writew(dev, data, AO_Window_Data_611x);
spin_unlock_irqrestore(&devpriv->window_lock, flags);
}
unsigned long flags;
spin_lock_irqsave(&devpriv->window_lock, flags);
- ni_writew(addr, AO_Window_Address_611x);
- ni_writel(data, AO_Window_Data_611x);
+ ni_writew(dev, addr, AO_Window_Address_611x);
+ ni_writel(dev, data, AO_Window_Data_611x);
spin_unlock_irqrestore(&devpriv->window_lock, flags);
}
unsigned short data;
spin_lock_irqsave(&devpriv->window_lock, flags);
- ni_writew(addr, AO_Window_Address_611x);
- data = ni_readw(AO_Window_Data_611x);
+ ni_writew(dev, addr, AO_Window_Address_611x);
+ data = ni_readw(dev, AO_Window_Data_611x);
spin_unlock_irqrestore(&devpriv->window_lock, flags);
return data;
}
ni_set_bitfield(dev, reg, bits, bit_values);
}
-static irqreturn_t ni_E_interrupt(int irq, void *d)
+#ifdef PCIDMA
+static void ni_sync_ai_dma(struct comedi_device *dev)
{
- struct comedi_device *dev = d;
struct ni_private *devpriv = dev->private;
- unsigned short a_status;
- unsigned short b_status;
- unsigned int ai_mite_status = 0;
- unsigned int ao_mite_status = 0;
+ struct comedi_subdevice *s = dev->read_subdev;
unsigned long flags;
-#ifdef PCIDMA
- struct mite_struct *mite = devpriv->mite;
-#endif
-
- if (!dev->attached)
- return IRQ_NONE;
- smp_mb(); /* make sure dev->attached is checked before handler does anything else. */
-
- /* lock to avoid race with comedi_poll */
- spin_lock_irqsave(&dev->spinlock, flags);
- a_status = devpriv->stc_readw(dev, AI_Status_1_Register);
- b_status = devpriv->stc_readw(dev, AO_Status_1_Register);
-#ifdef PCIDMA
- if (mite) {
- unsigned long flags_too;
-
- spin_lock_irqsave(&devpriv->mite_channel_lock, flags_too);
- if (devpriv->ai_mite_chan) {
- ai_mite_status = mite_get_status(devpriv->ai_mite_chan);
- if (ai_mite_status & CHSR_LINKC)
- writel(CHOR_CLRLC,
- devpriv->mite->mite_io_addr +
- MITE_CHOR(devpriv->
- ai_mite_chan->channel));
- }
- if (devpriv->ao_mite_chan) {
- ao_mite_status = mite_get_status(devpriv->ao_mite_chan);
- if (ao_mite_status & CHSR_LINKC)
- writel(CHOR_CLRLC,
- mite->mite_io_addr +
- MITE_CHOR(devpriv->
- ao_mite_chan->channel));
- }
- spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags_too);
- }
-#endif
- ack_a_interrupt(dev, a_status);
- ack_b_interrupt(dev, b_status);
- if ((a_status & Interrupt_A_St) || (ai_mite_status & CHSR_INT))
- handle_a_interrupt(dev, a_status, ai_mite_status);
- if ((b_status & Interrupt_B_St) || (ao_mite_status & CHSR_INT))
- handle_b_interrupt(dev, b_status, ao_mite_status);
- handle_gpct_interrupt(dev, 0);
- handle_gpct_interrupt(dev, 1);
- handle_cdio_interrupt(dev);
- spin_unlock_irqrestore(&dev->spinlock, flags);
- return IRQ_HANDLED;
+ spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
+ if (devpriv->ai_mite_chan)
+ mite_sync_input_dma(devpriv->ai_mite_chan, s);
+ spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
}
-#ifdef PCIDMA
-static void ni_sync_ai_dma(struct comedi_device *dev)
+static int ni_ai_drain_dma(struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
+ int i;
+ static const int timeout = 10000;
unsigned long flags;
+ int retval = 0;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ai_mite_chan)
- mite_sync_input_dma(devpriv->ai_mite_chan, s);
+ if (devpriv->ai_mite_chan) {
+ for (i = 0; i < timeout; i++) {
+ if ((ni_stc_readw(dev, AI_Status_1_Register) &
+ AI_FIFO_Empty_St)
+ && mite_bytes_in_transit(devpriv->ai_mite_chan) ==
+ 0)
+ break;
+ udelay(5);
+ }
+ if (i == timeout) {
+ printk("ni_mio_common: wait for dma drain timed out\n");
+ printk
+ ("mite_bytes_in_transit=%i, AI_Status1_Register=0x%x\n",
+ mite_bytes_in_transit(devpriv->ai_mite_chan),
+ ni_stc_readw(dev, AI_Status_1_Register));
+ retval = -1;
+ }
+ }
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
+
+ ni_sync_ai_dma(dev);
+
+ return retval;
}
static void mite_handle_b_linkc(struct mite_struct *mite,
struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
+ struct comedi_subdevice *s = dev->write_subdev;
unsigned long flags;
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
static int ni_ao_wait_for_dma_load(struct comedi_device *dev)
{
- struct ni_private *devpriv = dev->private;
static const int timeout = 10000;
int i;
for (i = 0; i < timeout; i++) {
unsigned short b_status;
- b_status = devpriv->stc_readw(dev, AO_Status_1_Register);
+ b_status = ni_stc_readw(dev, AO_Status_1_Register);
if (b_status & AO_FIFO_Half_Full_St)
break;
/* if we poll too often, the pci bus activity seems
}
return 0;
}
-
#endif /* PCIDMA */
-static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s)
+
+#ifndef PCIDMA
+
+static void ni_ao_fifo_load(struct comedi_device *dev,
+ struct comedi_subdevice *s, int n)
{
- struct ni_private *devpriv = dev->private;
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct comedi_async *async = s->async;
+ struct comedi_cmd *cmd = &async->cmd;
+ int chan;
+ int i;
+ unsigned short d;
+ u32 packed_data;
+ int range;
+ int err = 1;
- if (devpriv->aimode == AIMODE_SCAN) {
-#ifdef PCIDMA
- static const int timeout = 10;
- int i;
+ chan = async->cur_chan;
+ for (i = 0; i < n; i++) {
+ err &= comedi_buf_get(s, &d);
+ if (err == 0)
+ break;
- for (i = 0; i < timeout; i++) {
- ni_sync_ai_dma(dev);
- if ((s->async->events & COMEDI_CB_EOS))
- break;
- udelay(1);
+ range = CR_RANGE(cmd->chanlist[chan]);
+
+ if (board->reg_type & ni_reg_6xxx_mask) {
+ packed_data = d & 0xffff;
+ /* 6711 only has 16 bit wide ao fifo */
+ if (board->reg_type != ni_reg_6711) {
+ err &= comedi_buf_get(s, &d);
+ if (err == 0)
+ break;
+ chan++;
+ i++;
+ packed_data |= (d << 16) & 0xffff0000;
+ }
+ ni_writel(dev, packed_data, DAC_FIFO_Data_611x);
+ } else {
+ ni_writew(dev, d, DAC_FIFO_Data);
}
-#else
- ni_handle_fifo_dregs(dev);
- s->async->events |= COMEDI_CB_EOS;
-#endif
+ chan++;
+ chan %= cmd->chanlist_len;
}
- /* handle special case of single scan using AI_End_On_End_Of_Scan */
- if ((devpriv->ai_cmd2 & AI_End_On_End_Of_Scan))
- shutdown_ai_command(dev);
+ async->cur_chan = chan;
+ if (err == 0)
+ async->events |= COMEDI_CB_OVERFLOW;
}
-static void shutdown_ai_command(struct comedi_device *dev)
+/*
+ * There's a small problem if the FIFO gets really low and we
+ * don't have the data to fill it. Basically, if after we fill
+ * the FIFO with all the data available, the FIFO is _still_
+ * less than half full, we never clear the interrupt. If the
+ * IRQ is in edge mode, we never get another interrupt, because
+ * this one wasn't cleared. If in level mode, we get flooded
+ * with interrupts that we can't fulfill, because nothing ever
+ * gets put into the buffer.
+ *
+ * This kind of situation is recoverable, but it is easier to
+ * just pretend we had a FIFO underrun, since there is a good
+ * chance it will happen anyway. This is _not_ the case for
+ * RT code, as RT code might purposely be running close to the
+ * metal. Needs to be fixed eventually.
+ */
+static int ni_ao_fifo_half_empty(struct comedi_device *dev,
+ struct comedi_subdevice *s)
{
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
+ const struct ni_board_struct *board = comedi_board(dev);
+ int n;
-#ifdef PCIDMA
- ni_ai_drain_dma(dev);
-#endif
- ni_handle_fifo_dregs(dev);
- get_last_sample_611x(dev);
- get_last_sample_6143(dev);
+ n = comedi_buf_read_n_available(s);
+ if (n == 0) {
+ s->async->events |= COMEDI_CB_OVERFLOW;
+ return 0;
+ }
- s->async->events |= COMEDI_CB_EOA;
-}
+ n /= sizeof(short);
+ if (n > board->ao_fifo_depth / 2)
+ n = board->ao_fifo_depth / 2;
-static void handle_gpct_interrupt(struct comedi_device *dev,
- unsigned short counter_index)
-{
-#ifdef PCIDMA
- struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s;
+ ni_ao_fifo_load(dev, s, n);
- s = &dev->subdevices[NI_GPCT_SUBDEV(counter_index)];
+ s->async->events |= COMEDI_CB_BLOCK;
- ni_tio_handle_interrupt(&devpriv->counter_dev->counters[counter_index],
- s);
- cfc_handle_events(dev, s);
-#endif
+ return 1;
}
-static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status)
+static int ni_ao_prep_fifo(struct comedi_device *dev,
+ struct comedi_subdevice *s)
{
- struct ni_private *devpriv = dev->private;
- unsigned short ack = 0;
+ const struct ni_board_struct *board = comedi_board(dev);
+ int n;
- if (a_status & AI_SC_TC_St)
- ack |= AI_SC_TC_Interrupt_Ack;
- if (a_status & AI_START1_St)
- ack |= AI_START1_Interrupt_Ack;
- if (a_status & AI_START_St)
- ack |= AI_START_Interrupt_Ack;
- if (a_status & AI_STOP_St)
- /* not sure why we used to ack the START here also, instead of doing it independently. Frank Hess 2007-07-06 */
- ack |= AI_STOP_Interrupt_Ack /*| AI_START_Interrupt_Ack */;
- if (ack)
- devpriv->stc_writew(dev, ack, Interrupt_A_Ack_Register);
+ /* reset fifo */
+ ni_stc_writew(dev, 1, DAC_FIFO_Clear);
+ if (board->reg_type & ni_reg_6xxx_mask)
+ ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
+
+ /* load some data */
+ n = comedi_buf_read_n_available(s);
+ if (n == 0)
+ return 0;
+
+ n /= sizeof(short);
+ if (n > board->ao_fifo_depth)
+ n = board->ao_fifo_depth;
+
+ ni_ao_fifo_load(dev, s, n);
+
+ return n;
}
-static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
- unsigned ai_mite_status)
+static void ni_ai_fifo_read(struct comedi_device *dev,
+ struct comedi_subdevice *s, int n)
{
+ const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
-
- /* 67xx boards don't have ai subdevice, but their gpct0 might generate an a interrupt */
- if (s->type == COMEDI_SUBD_UNUSED)
- return;
+ struct comedi_async *async = s->async;
+ int i;
+
+ if (board->reg_type == ni_reg_611x) {
+ unsigned short data[2];
+ u32 dl;
+
+ for (i = 0; i < n / 2; i++) {
+ dl = ni_readl(dev, ADC_FIFO_Data_611x);
+ /* This may get the hi/lo data in the wrong order */
+ data[0] = (dl >> 16) & 0xffff;
+ data[1] = dl & 0xffff;
+ cfc_write_array_to_buffer(s, data, sizeof(data));
+ }
+ /* Check if there's a single sample stuck in the FIFO */
+ if (n % 2) {
+ dl = ni_readl(dev, ADC_FIFO_Data_611x);
+ data[0] = dl & 0xffff;
+ cfc_write_to_buffer(s, data[0]);
+ }
+ } else if (board->reg_type == ni_reg_6143) {
+ unsigned short data[2];
+ u32 dl;
+
+ /* This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
+ for (i = 0; i < n / 2; i++) {
+ dl = ni_readl(dev, AIFIFO_Data_6143);
+
+ data[0] = (dl >> 16) & 0xffff;
+ data[1] = dl & 0xffff;
+ cfc_write_array_to_buffer(s, data, sizeof(data));
+ }
+ if (n % 2) {
+ /* Assume there is a single sample stuck in the FIFO */
+ /* Get stranded sample into FIFO */
+ ni_writel(dev, 0x01, AIFIFO_Control_6143);
+ dl = ni_readl(dev, AIFIFO_Data_6143);
+ data[0] = (dl >> 16) & 0xffff;
+ cfc_write_to_buffer(s, data[0]);
+ }
+ } else {
+ if (n > sizeof(devpriv->ai_fifo_buffer) /
+ sizeof(devpriv->ai_fifo_buffer[0])) {
+ comedi_error(dev, "bug! ai_fifo_buffer too small");
+ async->events |= COMEDI_CB_ERROR;
+ return;
+ }
+ for (i = 0; i < n; i++) {
+ devpriv->ai_fifo_buffer[i] =
+ ni_readw(dev, ADC_FIFO_Data_Register);
+ }
+ cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
+ n *
+ sizeof(devpriv->ai_fifo_buffer[0]));
+ }
+}
+
+static void ni_handle_fifo_half_full(struct comedi_device *dev)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct comedi_subdevice *s = dev->read_subdev;
+ int n;
+
+ n = board->ai_fifo_depth / 2;
+
+ ni_ai_fifo_read(dev, s, n);
+}
+#endif
+
+/*
+ Empties the AI fifo
+*/
+static void ni_handle_fifo_dregs(struct comedi_device *dev)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
+ struct comedi_subdevice *s = dev->read_subdev;
+ unsigned short data[2];
+ u32 dl;
+ unsigned short fifo_empty;
+ int i;
+
+ if (board->reg_type == ni_reg_611x) {
+ while ((ni_stc_readw(dev, AI_Status_1_Register) &
+ AI_FIFO_Empty_St) == 0) {
+ dl = ni_readl(dev, ADC_FIFO_Data_611x);
+
+ /* This may get the hi/lo data in the wrong order */
+ data[0] = (dl >> 16);
+ data[1] = (dl & 0xffff);
+ cfc_write_array_to_buffer(s, data, sizeof(data));
+ }
+ } else if (board->reg_type == ni_reg_6143) {
+ i = 0;
+ while (ni_readl(dev, AIFIFO_Status_6143) & 0x04) {
+ dl = ni_readl(dev, AIFIFO_Data_6143);
+
+ /* This may get the hi/lo data in the wrong order */
+ data[0] = (dl >> 16);
+ data[1] = (dl & 0xffff);
+ cfc_write_array_to_buffer(s, data, sizeof(data));
+ i += 2;
+ }
+ /* Check if stranded sample is present */
+ if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
+ /* Get stranded sample into FIFO */
+ ni_writel(dev, 0x01, AIFIFO_Control_6143);
+ dl = ni_readl(dev, AIFIFO_Data_6143);
+ data[0] = (dl >> 16) & 0xffff;
+ cfc_write_to_buffer(s, data[0]);
+ }
+
+ } else {
+ fifo_empty = ni_stc_readw(dev, AI_Status_1_Register) &
+ AI_FIFO_Empty_St;
+ while (fifo_empty == 0) {
+ for (i = 0;
+ i <
+ sizeof(devpriv->ai_fifo_buffer) /
+ sizeof(devpriv->ai_fifo_buffer[0]); i++) {
+ fifo_empty = ni_stc_readw(dev,
+ AI_Status_1_Register) &
+ AI_FIFO_Empty_St;
+ if (fifo_empty)
+ break;
+ devpriv->ai_fifo_buffer[i] =
+ ni_readw(dev, ADC_FIFO_Data_Register);
+ }
+ cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
+ i *
+ sizeof(devpriv->
+ ai_fifo_buffer[0]));
+ }
+ }
+}
+
+static void get_last_sample_611x(struct comedi_device *dev)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct comedi_subdevice *s = dev->read_subdev;
+ unsigned short data;
+ u32 dl;
+
+ if (board->reg_type != ni_reg_611x)
+ return;
+
+ /* Check if there's a single sample stuck in the FIFO */
+ if (ni_readb(dev, XXX_Status) & 0x80) {
+ dl = ni_readl(dev, ADC_FIFO_Data_611x);
+ data = (dl & 0xffff);
+ cfc_write_to_buffer(s, data);
+ }
+}
+
+static void get_last_sample_6143(struct comedi_device *dev)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct comedi_subdevice *s = dev->read_subdev;
+ unsigned short data;
+ u32 dl;
+
+ if (board->reg_type != ni_reg_6143)
+ return;
+
+ /* Check if there's a single sample stuck in the FIFO */
+ if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
+ /* Get stranded sample into FIFO */
+ ni_writel(dev, 0x01, AIFIFO_Control_6143);
+ dl = ni_readl(dev, AIFIFO_Data_6143);
+
+ /* This may get the hi/lo data in the wrong order */
+ data = (dl >> 16) & 0xffff;
+ cfc_write_to_buffer(s, data);
+ }
+}
+
+static void shutdown_ai_command(struct comedi_device *dev)
+{
+ struct comedi_subdevice *s = dev->read_subdev;
+
+#ifdef PCIDMA
+ ni_ai_drain_dma(dev);
+#endif
+ ni_handle_fifo_dregs(dev);
+ get_last_sample_611x(dev);
+ get_last_sample_6143(dev);
+
+ s->async->events |= COMEDI_CB_EOA;
+}
+
+static void ni_handle_eos(struct comedi_device *dev, struct comedi_subdevice *s)
+{
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->aimode == AIMODE_SCAN) {
+#ifdef PCIDMA
+ static const int timeout = 10;
+ int i;
+
+ for (i = 0; i < timeout; i++) {
+ ni_sync_ai_dma(dev);
+ if ((s->async->events & COMEDI_CB_EOS))
+ break;
+ udelay(1);
+ }
+#else
+ ni_handle_fifo_dregs(dev);
+ s->async->events |= COMEDI_CB_EOS;
+#endif
+ }
+ /* handle special case of single scan using AI_End_On_End_Of_Scan */
+ if ((devpriv->ai_cmd2 & AI_End_On_End_Of_Scan))
+ shutdown_ai_command(dev);
+}
+
+static void handle_gpct_interrupt(struct comedi_device *dev,
+ unsigned short counter_index)
+{
+#ifdef PCIDMA
+ struct ni_private *devpriv = dev->private;
+ struct comedi_subdevice *s;
+
+ s = &dev->subdevices[NI_GPCT_SUBDEV(counter_index)];
+
+ ni_tio_handle_interrupt(&devpriv->counter_dev->counters[counter_index],
+ s);
+ cfc_handle_events(dev, s);
+#endif
+}
+
+static void ack_a_interrupt(struct comedi_device *dev, unsigned short a_status)
+{
+ unsigned short ack = 0;
+
+ if (a_status & AI_SC_TC_St)
+ ack |= AI_SC_TC_Interrupt_Ack;
+ if (a_status & AI_START1_St)
+ ack |= AI_START1_Interrupt_Ack;
+ if (a_status & AI_START_St)
+ ack |= AI_START_Interrupt_Ack;
+ if (a_status & AI_STOP_St)
+ /* not sure why we used to ack the START here also, instead of doing it independently. Frank Hess 2007-07-06 */
+ ack |= AI_STOP_Interrupt_Ack /*| AI_START_Interrupt_Ack */;
+ if (ack)
+ ni_stc_writew(dev, ack, Interrupt_A_Ack_Register);
+}
+
+static void handle_a_interrupt(struct comedi_device *dev, unsigned short status,
+ unsigned ai_mite_status)
+{
+ struct ni_private *devpriv = dev->private;
+ struct comedi_subdevice *s = dev->read_subdev;
+
+ /* 67xx boards don't have ai subdevice, but their gpct0 might generate an a interrupt */
+ if (s->type == COMEDI_SUBD_UNUSED)
+ return;
#ifdef PCIDMA
if (ai_mite_status & CHSR_LINKC)
*fail to get the fifo less than half full, so loop to be sure.*/
for (i = 0; i < timeout; ++i) {
ni_handle_fifo_half_full(dev);
- if ((devpriv->stc_readw(dev,
- AI_Status_1_Register) &
+ if ((ni_stc_readw(dev, AI_Status_1_Register) &
AI_FIFO_Half_Full_St) == 0)
break;
}
static void ack_b_interrupt(struct comedi_device *dev, unsigned short b_status)
{
- struct ni_private *devpriv = dev->private;
unsigned short ack = 0;
if (b_status & AO_BC_TC_St)
if (b_status & AO_UPDATE_St)
ack |= AO_UPDATE_Interrupt_Ack;
if (ack)
- devpriv->stc_writew(dev, ack, Interrupt_B_Ack_Register);
+ ni_stc_writew(dev, ack, Interrupt_B_Ack_Register);
}
static void handle_b_interrupt(struct comedi_device *dev,
unsigned short b_status, unsigned ao_mite_status)
{
- struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
+ struct comedi_subdevice *s = dev->write_subdev;
/* unsigned short ack=0; */
#ifdef PCIDMA
/* Currently, mite.c requires us to handle LINKC */
- if (ao_mite_status & CHSR_LINKC)
+ if (ao_mite_status & CHSR_LINKC) {
+ struct ni_private *devpriv = dev->private;
+
mite_handle_b_linkc(devpriv->mite, dev);
+ }
if (ao_mite_status & ~(CHSR_INT | CHSR_LINKC | CHSR_DONE | CHSR_MRDY |
CHSR_DRDY | CHSR_DRQ1 | CHSR_DRQ0 | CHSR_ERROR |
if (b_status & AO_Overrun_St) {
printk
("ni_mio_common: AO FIFO underrun status=0x%04x status2=0x%04x\n",
- b_status, devpriv->stc_readw(dev, AO_Status_2_Register));
+ b_status, ni_stc_readw(dev, AO_Status_2_Register));
s->async->events |= COMEDI_CB_OVERFLOW;
}
cfc_handle_events(dev, s);
}
-#ifndef PCIDMA
-
-static void ni_ao_fifo_load(struct comedi_device *dev,
- struct comedi_subdevice *s, int n)
+static void ni_ai_munge(struct comedi_device *dev, struct comedi_subdevice *s,
+ void *data, unsigned int num_bytes,
+ unsigned int chan_index)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
- int chan;
- int i;
- unsigned short d;
- u32 packed_data;
- int range;
- int err = 1;
-
- chan = async->cur_chan;
- for (i = 0; i < n; i++) {
- err &= comedi_buf_get(s, &d);
- if (err == 0)
- break;
-
- range = CR_RANGE(cmd->chanlist[chan]);
+ unsigned int length = num_bytes / bytes_per_sample(s);
+ unsigned short *array = data;
+ unsigned int *larray = data;
+ unsigned int i;
- if (board->reg_type & ni_reg_6xxx_mask) {
- packed_data = d & 0xffff;
- /* 6711 only has 16 bit wide ao fifo */
- if (board->reg_type != ni_reg_6711) {
- err &= comedi_buf_get(s, &d);
- if (err == 0)
- break;
- chan++;
- i++;
- packed_data |= (d << 16) & 0xffff0000;
- }
- ni_writel(packed_data, DAC_FIFO_Data_611x);
- } else {
- ni_writew(d, DAC_FIFO_Data);
- }
- chan++;
- chan %= cmd->chanlist_len;
+ for (i = 0; i < length; i++) {
+#ifdef PCIDMA
+ if (s->subdev_flags & SDF_LSAMPL)
+ larray[i] = le32_to_cpu(larray[i]);
+ else
+ array[i] = le16_to_cpu(array[i]);
+#endif
+ if (s->subdev_flags & SDF_LSAMPL)
+ larray[i] += devpriv->ai_offset[chan_index];
+ else
+ array[i] += devpriv->ai_offset[chan_index];
+ chan_index++;
+ chan_index %= cmd->chanlist_len;
}
- async->cur_chan = chan;
- if (err == 0)
- async->events |= COMEDI_CB_OVERFLOW;
}
-/*
- * There's a small problem if the FIFO gets really low and we
- * don't have the data to fill it. Basically, if after we fill
- * the FIFO with all the data available, the FIFO is _still_
- * less than half full, we never clear the interrupt. If the
- * IRQ is in edge mode, we never get another interrupt, because
- * this one wasn't cleared. If in level mode, we get flooded
- * with interrupts that we can't fulfill, because nothing ever
- * gets put into the buffer.
- *
- * This kind of situation is recoverable, but it is easier to
- * just pretend we had a FIFO underrun, since there is a good
- * chance it will happen anyway. This is _not_ the case for
- * RT code, as RT code might purposely be running close to the
- * metal. Needs to be fixed eventually.
- */
-static int ni_ao_fifo_half_empty(struct comedi_device *dev,
- struct comedi_subdevice *s)
+#ifdef PCIDMA
+
+static int ni_ai_setup_MITE_dma(struct comedi_device *dev)
{
const struct ni_board_struct *board = comedi_board(dev);
- int n;
+ struct ni_private *devpriv = dev->private;
+ struct comedi_subdevice *s = dev->read_subdev;
+ int retval;
+ unsigned long flags;
- n = comedi_buf_read_n_available(s);
- if (n == 0) {
- s->async->events |= COMEDI_CB_OVERFLOW;
- return 0;
- }
+ retval = ni_request_ai_mite_channel(dev);
+ if (retval)
+ return retval;
+/* printk("comedi_debug: using mite channel %i for ai.\n", devpriv->ai_mite_chan->channel); */
- n /= sizeof(short);
- if (n > board->ao_fifo_depth / 2)
- n = board->ao_fifo_depth / 2;
+ /* write alloc the entire buffer */
+ comedi_buf_write_alloc(s, s->async->prealloc_bufsz);
- ni_ao_fifo_load(dev, s, n);
+ spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
+ if (devpriv->ai_mite_chan == NULL) {
+ spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
+ return -EIO;
+ }
- s->async->events |= COMEDI_CB_BLOCK;
+ switch (board->reg_type) {
+ case ni_reg_611x:
+ case ni_reg_6143:
+ mite_prep_dma(devpriv->ai_mite_chan, 32, 16);
+ break;
+ case ni_reg_628x:
+ mite_prep_dma(devpriv->ai_mite_chan, 32, 32);
+ break;
+ default:
+ mite_prep_dma(devpriv->ai_mite_chan, 16, 16);
+ break;
+ }
+ /*start the MITE */
+ mite_dma_arm(devpriv->ai_mite_chan);
+ spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
- return 1;
+ return 0;
}
-static int ni_ao_prep_fifo(struct comedi_device *dev,
- struct comedi_subdevice *s)
+static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
{
const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- int n;
-
- /* reset fifo */
- devpriv->stc_writew(dev, 1, DAC_FIFO_Clear);
- if (board->reg_type & ni_reg_6xxx_mask)
- ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
+ struct comedi_subdevice *s = dev->write_subdev;
+ int retval;
+ unsigned long flags;
- /* load some data */
- n = comedi_buf_read_n_available(s);
- if (n == 0)
- return 0;
+ retval = ni_request_ao_mite_channel(dev);
+ if (retval)
+ return retval;
- n /= sizeof(short);
- if (n > board->ao_fifo_depth)
- n = board->ao_fifo_depth;
+ /* read alloc the entire buffer */
+ comedi_buf_read_alloc(s, s->async->prealloc_bufsz);
- ni_ao_fifo_load(dev, s, n);
+ spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
+ if (devpriv->ao_mite_chan) {
+ if (board->reg_type & (ni_reg_611x | ni_reg_6713)) {
+ mite_prep_dma(devpriv->ao_mite_chan, 32, 32);
+ } else {
+ /* doing 32 instead of 16 bit wide transfers from memory
+ makes the mite do 32 bit pci transfers, doubling pci bandwidth. */
+ mite_prep_dma(devpriv->ao_mite_chan, 16, 32);
+ }
+ mite_dma_arm(devpriv->ao_mite_chan);
+ } else
+ retval = -EIO;
+ spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
- return n;
+ return retval;
}
-static void ni_ai_fifo_read(struct comedi_device *dev,
- struct comedi_subdevice *s, int n)
+#endif /* PCIDMA */
+
+/*
+ used for both cancel ioctl and board initialization
+
+ this is pretty harsh for a cancel, but it works...
+ */
+
+static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
{
const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- struct comedi_async *async = s->async;
- int i;
- if (board->reg_type == ni_reg_611x) {
- unsigned short data[2];
- u32 dl;
+ ni_release_ai_mite_channel(dev);
+ /* ai configuration */
+ ni_stc_writew(dev, AI_Configuration_Start | AI_Reset,
+ Joint_Reset_Register);
- for (i = 0; i < n / 2; i++) {
- dl = ni_readl(ADC_FIFO_Data_611x);
- /* This may get the hi/lo data in the wrong order */
- data[0] = (dl >> 16) & 0xffff;
- data[1] = dl & 0xffff;
- cfc_write_array_to_buffer(s, data, sizeof(data));
- }
- /* Check if there's a single sample stuck in the FIFO */
- if (n % 2) {
- dl = ni_readl(ADC_FIFO_Data_611x);
- data[0] = dl & 0xffff;
- cfc_write_to_buffer(s, data[0]);
- }
- } else if (board->reg_type == ni_reg_6143) {
- unsigned short data[2];
- u32 dl;
+ ni_set_bits(dev, Interrupt_A_Enable_Register,
+ AI_SC_TC_Interrupt_Enable | AI_START1_Interrupt_Enable |
+ AI_START2_Interrupt_Enable | AI_START_Interrupt_Enable |
+ AI_STOP_Interrupt_Enable | AI_Error_Interrupt_Enable |
+ AI_FIFO_Interrupt_Enable, 0);
- /* This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
- for (i = 0; i < n / 2; i++) {
- dl = ni_readl(AIFIFO_Data_6143);
+ ni_clear_ai_fifo(dev);
- data[0] = (dl >> 16) & 0xffff;
- data[1] = dl & 0xffff;
- cfc_write_array_to_buffer(s, data, sizeof(data));
- }
- if (n % 2) {
- /* Assume there is a single sample stuck in the FIFO */
- ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
- dl = ni_readl(AIFIFO_Data_6143);
- data[0] = (dl >> 16) & 0xffff;
- cfc_write_to_buffer(s, data[0]);
- }
+ if (board->reg_type != ni_reg_6143)
+ ni_writeb(dev, 0, Misc_Command);
+
+ ni_stc_writew(dev, AI_Disarm, AI_Command_1_Register); /* reset pulses */
+ ni_stc_writew(dev, AI_Start_Stop | AI_Mode_1_Reserved
+ /*| AI_Trigger_Once */,
+ AI_Mode_1_Register);
+ ni_stc_writew(dev, 0x0000, AI_Mode_2_Register);
+ /* generate FIFO interrupts on non-empty */
+ ni_stc_writew(dev, (0 << 6) | 0x0000, AI_Mode_3_Register);
+ if (board->reg_type == ni_reg_611x) {
+ ni_stc_writew(dev,
+ AI_SHIFTIN_Pulse_Width |
+ AI_SOC_Polarity |
+ AI_LOCALMUX_CLK_Pulse_Width,
+ AI_Personal_Register);
+ ni_stc_writew(dev,
+ AI_SCAN_IN_PROG_Output_Select(3) |
+ AI_EXTMUX_CLK_Output_Select(0) |
+ AI_LOCALMUX_CLK_Output_Select(2) |
+ AI_SC_TC_Output_Select(3) |
+ AI_CONVERT_Output_Select
+ (AI_CONVERT_Output_Enable_High),
+ AI_Output_Control_Register);
+ } else if (board->reg_type == ni_reg_6143) {
+ ni_stc_writew(dev, AI_SHIFTIN_Pulse_Width |
+ AI_SOC_Polarity |
+ AI_LOCALMUX_CLK_Pulse_Width,
+ AI_Personal_Register);
+ ni_stc_writew(dev,
+ AI_SCAN_IN_PROG_Output_Select(3) |
+ AI_EXTMUX_CLK_Output_Select(0) |
+ AI_LOCALMUX_CLK_Output_Select(2) |
+ AI_SC_TC_Output_Select(3) |
+ AI_CONVERT_Output_Select
+ (AI_CONVERT_Output_Enable_Low),
+ AI_Output_Control_Register);
} else {
- if (n > sizeof(devpriv->ai_fifo_buffer) /
- sizeof(devpriv->ai_fifo_buffer[0])) {
- comedi_error(dev, "bug! ai_fifo_buffer too small");
- async->events |= COMEDI_CB_ERROR;
- return;
- }
- for (i = 0; i < n; i++) {
- devpriv->ai_fifo_buffer[i] =
- ni_readw(ADC_FIFO_Data_Register);
- }
- cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
- n *
- sizeof(devpriv->ai_fifo_buffer[0]));
+ unsigned ai_output_control_bits;
+ ni_stc_writew(dev,
+ AI_SHIFTIN_Pulse_Width |
+ AI_SOC_Polarity |
+ AI_CONVERT_Pulse_Width |
+ AI_LOCALMUX_CLK_Pulse_Width,
+ AI_Personal_Register);
+ ai_output_control_bits =
+ AI_SCAN_IN_PROG_Output_Select(3) |
+ AI_EXTMUX_CLK_Output_Select(0) |
+ AI_LOCALMUX_CLK_Output_Select(2) |
+ AI_SC_TC_Output_Select(3);
+ if (board->reg_type == ni_reg_622x)
+ ai_output_control_bits |=
+ AI_CONVERT_Output_Select
+ (AI_CONVERT_Output_Enable_High);
+ else
+ ai_output_control_bits |=
+ AI_CONVERT_Output_Select
+ (AI_CONVERT_Output_Enable_Low);
+ ni_stc_writew(dev, ai_output_control_bits,
+ AI_Output_Control_Register);
}
+ /* the following registers should not be changed, because there
+ * are no backup registers in devpriv. If you want to change
+ * any of these, add a backup register and other appropriate code:
+ * AI_Mode_1_Register
+ * AI_Mode_3_Register
+ * AI_Personal_Register
+ * AI_Output_Control_Register
+ */
+ ni_stc_writew(dev,
+ AI_SC_TC_Error_Confirm |
+ AI_START_Interrupt_Ack |
+ AI_START2_Interrupt_Ack |
+ AI_START1_Interrupt_Ack |
+ AI_SC_TC_Interrupt_Ack |
+ AI_Error_Interrupt_Ack |
+ AI_STOP_Interrupt_Ack,
+ Interrupt_A_Ack_Register); /* clear interrupts */
+
+ ni_stc_writew(dev, AI_Configuration_End, Joint_Reset_Register);
+
+ return 0;
}
-static void ni_handle_fifo_half_full(struct comedi_device *dev)
+static int ni_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
{
- const struct ni_board_struct *board = comedi_board(dev);
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
- int n;
+ unsigned long flags;
+ int count;
- n = board->ai_fifo_depth / 2;
+ /* lock to avoid race with interrupt handler */
+ spin_lock_irqsave(&dev->spinlock, flags);
+#ifndef PCIDMA
+ ni_handle_fifo_dregs(dev);
+#else
+ ni_sync_ai_dma(dev);
+#endif
+ count = s->async->buf_write_count - s->async->buf_read_count;
+ spin_unlock_irqrestore(&dev->spinlock, flags);
- ni_ai_fifo_read(dev, s, n);
+ return count;
}
-#endif
-#ifdef PCIDMA
-static int ni_ai_drain_dma(struct comedi_device *dev)
+static void ni_prime_channelgain_list(struct comedi_device *dev)
{
- struct ni_private *devpriv = dev->private;
int i;
- static const int timeout = 10000;
- unsigned long flags;
- int retval = 0;
- spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ai_mite_chan) {
- for (i = 0; i < timeout; i++) {
- if ((devpriv->stc_readw(dev,
- AI_Status_1_Register) &
- AI_FIFO_Empty_St)
- && mite_bytes_in_transit(devpriv->ai_mite_chan) ==
- 0)
- break;
- udelay(5);
- }
- if (i == timeout) {
- printk("ni_mio_common: wait for dma drain timed out\n");
- printk
- ("mite_bytes_in_transit=%i, AI_Status1_Register=0x%x\n",
- mite_bytes_in_transit(devpriv->ai_mite_chan),
- devpriv->stc_readw(dev, AI_Status_1_Register));
- retval = -1;
+ ni_stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
+ for (i = 0; i < NI_TIMEOUT; ++i) {
+ if (!(ni_stc_readw(dev, AI_Status_1_Register) &
+ AI_FIFO_Empty_St)) {
+ ni_stc_writew(dev, 1, ADC_FIFO_Clear);
+ return;
}
+ udelay(1);
}
- spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
-
- ni_sync_ai_dma(dev);
-
- return retval;
+ printk("ni_mio_common: timeout loading channel/gain list\n");
}
-#endif
-/*
- Empties the AI fifo
-*/
-static void ni_handle_fifo_dregs(struct comedi_device *dev)
+
+static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
+ unsigned int n_chan,
+ unsigned int *list)
{
const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
- unsigned short data[2];
- u32 dl;
- unsigned short fifo_empty;
- int i;
-
- if (board->reg_type == ni_reg_611x) {
- while ((devpriv->stc_readw(dev,
- AI_Status_1_Register) &
- AI_FIFO_Empty_St) == 0) {
- dl = ni_readl(ADC_FIFO_Data_611x);
-
- /* This may get the hi/lo data in the wrong order */
- data[0] = (dl >> 16);
- data[1] = (dl & 0xffff);
- cfc_write_array_to_buffer(s, data, sizeof(data));
- }
- } else if (board->reg_type == ni_reg_6143) {
- i = 0;
- while (ni_readl(AIFIFO_Status_6143) & 0x04) {
- dl = ni_readl(AIFIFO_Data_6143);
+ unsigned int chan, range, aref;
+ unsigned int i;
+ unsigned offset;
+ unsigned int dither;
+ unsigned range_code;
- /* This may get the hi/lo data in the wrong order */
- data[0] = (dl >> 16);
- data[1] = (dl & 0xffff);
- cfc_write_array_to_buffer(s, data, sizeof(data));
- i += 2;
- }
- /* Check if stranded sample is present */
- if (ni_readl(AIFIFO_Status_6143) & 0x01) {
- ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
- dl = ni_readl(AIFIFO_Data_6143);
- data[0] = (dl >> 16) & 0xffff;
- cfc_write_to_buffer(s, data[0]);
- }
+ ni_stc_writew(dev, 1, Configuration_Memory_Clear);
+/* offset = 1 << (board->adbits - 1); */
+ if ((list[0] & CR_ALT_SOURCE)) {
+ unsigned bypass_bits;
+ chan = CR_CHAN(list[0]);
+ range = CR_RANGE(list[0]);
+ range_code = ni_gainlkup[board->gainlkup][range];
+ dither = ((list[0] & CR_ALT_FILTER) != 0);
+ bypass_bits = MSeries_AI_Bypass_Config_FIFO_Bit;
+ bypass_bits |= chan;
+ bypass_bits |=
+ (devpriv->ai_calib_source) &
+ (MSeries_AI_Bypass_Cal_Sel_Pos_Mask |
+ MSeries_AI_Bypass_Cal_Sel_Neg_Mask |
+ MSeries_AI_Bypass_Mode_Mux_Mask |
+ MSeries_AO_Bypass_AO_Cal_Sel_Mask);
+ bypass_bits |= MSeries_AI_Bypass_Gain_Bits(range_code);
+ if (dither)
+ bypass_bits |= MSeries_AI_Bypass_Dither_Bit;
+ /* don't use 2's complement encoding */
+ bypass_bits |= MSeries_AI_Bypass_Polarity_Bit;
+ ni_writel(dev, bypass_bits, M_Offset_AI_Config_FIFO_Bypass);
} else {
- fifo_empty =
- devpriv->stc_readw(dev,
- AI_Status_1_Register) & AI_FIFO_Empty_St;
- while (fifo_empty == 0) {
- for (i = 0;
- i <
- sizeof(devpriv->ai_fifo_buffer) /
- sizeof(devpriv->ai_fifo_buffer[0]); i++) {
- fifo_empty =
- devpriv->stc_readw(dev,
- AI_Status_1_Register) &
- AI_FIFO_Empty_St;
- if (fifo_empty)
- break;
- devpriv->ai_fifo_buffer[i] =
- ni_readw(ADC_FIFO_Data_Register);
- }
- cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
- i *
- sizeof(devpriv->
- ai_fifo_buffer[0]));
- }
+ ni_writel(dev, 0, M_Offset_AI_Config_FIFO_Bypass);
}
-}
-
-static void get_last_sample_611x(struct comedi_device *dev)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv __maybe_unused = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
- unsigned short data;
- u32 dl;
-
- if (board->reg_type != ni_reg_611x)
- return;
+ offset = 0;
+ for (i = 0; i < n_chan; i++) {
+ unsigned config_bits = 0;
+ chan = CR_CHAN(list[i]);
+ aref = CR_AREF(list[i]);
+ range = CR_RANGE(list[i]);
+ dither = ((list[i] & CR_ALT_FILTER) != 0);
- /* Check if there's a single sample stuck in the FIFO */
- if (ni_readb(XXX_Status) & 0x80) {
- dl = ni_readl(ADC_FIFO_Data_611x);
- data = (dl & 0xffff);
- cfc_write_to_buffer(s, data);
+ range_code = ni_gainlkup[board->gainlkup][range];
+ devpriv->ai_offset[i] = offset;
+ switch (aref) {
+ case AREF_DIFF:
+ config_bits |=
+ MSeries_AI_Config_Channel_Type_Differential_Bits;
+ break;
+ case AREF_COMMON:
+ config_bits |=
+ MSeries_AI_Config_Channel_Type_Common_Ref_Bits;
+ break;
+ case AREF_GROUND:
+ config_bits |=
+ MSeries_AI_Config_Channel_Type_Ground_Ref_Bits;
+ break;
+ case AREF_OTHER:
+ break;
+ }
+ config_bits |= MSeries_AI_Config_Channel_Bits(chan);
+ config_bits |=
+ MSeries_AI_Config_Bank_Bits(board->reg_type, chan);
+ config_bits |= MSeries_AI_Config_Gain_Bits(range_code);
+ if (i == n_chan - 1)
+ config_bits |= MSeries_AI_Config_Last_Channel_Bit;
+ if (dither)
+ config_bits |= MSeries_AI_Config_Dither_Bit;
+ /* don't use 2's complement encoding */
+ config_bits |= MSeries_AI_Config_Polarity_Bit;
+ ni_writew(dev, config_bits, M_Offset_AI_Config_FIFO_Data);
}
+ ni_prime_channelgain_list(dev);
}
-static void get_last_sample_6143(struct comedi_device *dev)
+/*
+ * Notes on the 6110 and 6111:
+ * These boards a slightly different than the rest of the series, since
+ * they have multiple A/D converters.
+ * From the driver side, the configuration memory is a
+ * little different.
+ * Configuration Memory Low:
+ * bits 15-9: same
+ * bit 8: unipolar/bipolar (should be 0 for bipolar)
+ * bits 0-3: gain. This is 4 bits instead of 3 for the other boards
+ * 1001 gain=0.1 (+/- 50)
+ * 1010 0.2
+ * 1011 0.1
+ * 0001 1
+ * 0010 2
+ * 0011 5
+ * 0100 10
+ * 0101 20
+ * 0110 50
+ * Configuration Memory High:
+ * bits 12-14: Channel Type
+ * 001 for differential
+ * 000 for calibration
+ * bit 11: coupling (this is not currently handled)
+ * 1 AC coupling
+ * 0 DC coupling
+ * bits 0-2: channel
+ * valid channels are 0-3
+ */
+static void ni_load_channelgain_list(struct comedi_device *dev,
+ unsigned int n_chan, unsigned int *list)
{
const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv __maybe_unused = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
- unsigned short data;
- u32 dl;
+ struct ni_private *devpriv = dev->private;
+ unsigned int chan, range, aref;
+ unsigned int i;
+ unsigned int hi, lo;
+ unsigned offset;
+ unsigned int dither;
- if (board->reg_type != ni_reg_6143)
+ if (devpriv->is_m_series) {
+ ni_m_series_load_channelgain_list(dev, n_chan, list);
return;
+ }
+ if (n_chan == 1 && (board->reg_type != ni_reg_611x)
+ && (board->reg_type != ni_reg_6143)) {
+ if (devpriv->changain_state
+ && devpriv->changain_spec == list[0]) {
+ /* ready to go. */
+ return;
+ }
+ devpriv->changain_state = 1;
+ devpriv->changain_spec = list[0];
+ } else {
+ devpriv->changain_state = 0;
+ }
- /* Check if there's a single sample stuck in the FIFO */
- if (ni_readl(AIFIFO_Status_6143) & 0x01) {
- ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
- dl = ni_readl(AIFIFO_Data_6143);
+ ni_stc_writew(dev, 1, Configuration_Memory_Clear);
- /* This may get the hi/lo data in the wrong order */
- data = (dl >> 16) & 0xffff;
- cfc_write_to_buffer(s, data);
+ /* Set up Calibration mode if required */
+ if (board->reg_type == ni_reg_6143) {
+ if ((list[0] & CR_ALT_SOURCE)
+ && !devpriv->ai_calib_source_enabled) {
+ /* Strobe Relay enable bit */
+ ni_writew(dev, devpriv->ai_calib_source |
+ Calibration_Channel_6143_RelayOn,
+ Calibration_Channel_6143);
+ ni_writew(dev, devpriv->ai_calib_source,
+ Calibration_Channel_6143);
+ devpriv->ai_calib_source_enabled = 1;
+ msleep_interruptible(100); /* Allow relays to change */
+ } else if (!(list[0] & CR_ALT_SOURCE)
+ && devpriv->ai_calib_source_enabled) {
+ /* Strobe Relay disable bit */
+ ni_writew(dev, devpriv->ai_calib_source |
+ Calibration_Channel_6143_RelayOff,
+ Calibration_Channel_6143);
+ ni_writew(dev, devpriv->ai_calib_source,
+ Calibration_Channel_6143);
+ devpriv->ai_calib_source_enabled = 0;
+ msleep_interruptible(100); /* Allow relays to change */
+ }
}
-}
-static void ni_ai_munge(struct comedi_device *dev, struct comedi_subdevice *s,
- void *data, unsigned int num_bytes,
- unsigned int chan_index)
-{
- struct ni_private *devpriv = dev->private;
- struct comedi_async *async = s->async;
- struct comedi_cmd *cmd = &async->cmd;
- unsigned int length = num_bytes / bytes_per_sample(s);
- unsigned short *array = data;
- unsigned int *larray = data;
- unsigned int i;
+ offset = 1 << (board->adbits - 1);
+ for (i = 0; i < n_chan; i++) {
+ if ((board->reg_type != ni_reg_6143)
+ && (list[i] & CR_ALT_SOURCE)) {
+ chan = devpriv->ai_calib_source;
+ } else {
+ chan = CR_CHAN(list[i]);
+ }
+ aref = CR_AREF(list[i]);
+ range = CR_RANGE(list[i]);
+ dither = ((list[i] & CR_ALT_FILTER) != 0);
- for (i = 0; i < length; i++) {
-#ifdef PCIDMA
- if (s->subdev_flags & SDF_LSAMPL)
- larray[i] = le32_to_cpu(larray[i]);
- else
- array[i] = le16_to_cpu(array[i]);
-#endif
- if (s->subdev_flags & SDF_LSAMPL)
- larray[i] += devpriv->ai_offset[chan_index];
+ /* fix the external/internal range differences */
+ range = ni_gainlkup[board->gainlkup][range];
+ if (board->reg_type == ni_reg_611x)
+ devpriv->ai_offset[i] = offset;
else
- array[i] += devpriv->ai_offset[chan_index];
- chan_index++;
- chan_index %= cmd->chanlist_len;
- }
-}
-
-#ifdef PCIDMA
+ devpriv->ai_offset[i] = (range & 0x100) ? 0 : offset;
-static int ni_ai_setup_MITE_dma(struct comedi_device *dev)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AI_SUBDEV];
- int retval;
- unsigned long flags;
-
- retval = ni_request_ai_mite_channel(dev);
- if (retval)
- return retval;
-/* printk("comedi_debug: using mite channel %i for ai.\n", devpriv->ai_mite_chan->channel); */
-
- /* write alloc the entire buffer */
- comedi_buf_write_alloc(s, s->async->prealloc_bufsz);
-
- spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ai_mite_chan == NULL) {
- spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
- return -EIO;
- }
-
- switch (board->reg_type) {
- case ni_reg_611x:
- case ni_reg_6143:
- mite_prep_dma(devpriv->ai_mite_chan, 32, 16);
- break;
- case ni_reg_628x:
- mite_prep_dma(devpriv->ai_mite_chan, 32, 32);
- break;
- default:
- mite_prep_dma(devpriv->ai_mite_chan, 16, 16);
- break;
- }
- /*start the MITE */
- mite_dma_arm(devpriv->ai_mite_chan);
- spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
-
- return 0;
-}
-
-static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s = &dev->subdevices[NI_AO_SUBDEV];
- int retval;
- unsigned long flags;
-
- retval = ni_request_ao_mite_channel(dev);
- if (retval)
- return retval;
-
- /* read alloc the entire buffer */
- comedi_buf_read_alloc(s, s->async->prealloc_bufsz);
-
- spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ao_mite_chan) {
- if (board->reg_type & (ni_reg_611x | ni_reg_6713)) {
- mite_prep_dma(devpriv->ao_mite_chan, 32, 32);
+ hi = 0;
+ if ((list[i] & CR_ALT_SOURCE)) {
+ if (board->reg_type == ni_reg_611x)
+ ni_writew(dev, CR_CHAN(list[i]) & 0x0003,
+ Calibration_Channel_Select_611x);
} else {
- /* doing 32 instead of 16 bit wide transfers from memory
- makes the mite do 32 bit pci transfers, doubling pci bandwidth. */
- mite_prep_dma(devpriv->ao_mite_chan, 16, 32);
+ if (board->reg_type == ni_reg_611x)
+ aref = AREF_DIFF;
+ else if (board->reg_type == ni_reg_6143)
+ aref = AREF_OTHER;
+ switch (aref) {
+ case AREF_DIFF:
+ hi |= AI_DIFFERENTIAL;
+ break;
+ case AREF_COMMON:
+ hi |= AI_COMMON;
+ break;
+ case AREF_GROUND:
+ hi |= AI_GROUND;
+ break;
+ case AREF_OTHER:
+ break;
+ }
}
- mite_dma_arm(devpriv->ao_mite_chan);
- } else
- retval = -EIO;
- spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
-
- return retval;
-}
-
-#endif /* PCIDMA */
-
-/*
- used for both cancel ioctl and board initialization
-
- this is pretty harsh for a cancel, but it works...
- */
-
-static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
-
- ni_release_ai_mite_channel(dev);
- /* ai configuration */
- devpriv->stc_writew(dev, AI_Configuration_Start | AI_Reset,
- Joint_Reset_Register);
+ hi |= AI_CONFIG_CHANNEL(chan);
- ni_set_bits(dev, Interrupt_A_Enable_Register,
- AI_SC_TC_Interrupt_Enable | AI_START1_Interrupt_Enable |
- AI_START2_Interrupt_Enable | AI_START_Interrupt_Enable |
- AI_STOP_Interrupt_Enable | AI_Error_Interrupt_Enable |
- AI_FIFO_Interrupt_Enable, 0);
+ ni_writew(dev, hi, Configuration_Memory_High);
- ni_clear_ai_fifo(dev);
+ if (board->reg_type != ni_reg_6143) {
+ lo = range;
+ if (i == n_chan - 1)
+ lo |= AI_LAST_CHANNEL;
+ if (dither)
+ lo |= AI_DITHER;
- if (board->reg_type != ni_reg_6143)
- ni_writeb(0, Misc_Command);
-
- devpriv->stc_writew(dev, AI_Disarm, AI_Command_1_Register); /* reset pulses */
- devpriv->stc_writew(dev,
- AI_Start_Stop | AI_Mode_1_Reserved
- /*| AI_Trigger_Once */ ,
- AI_Mode_1_Register);
- devpriv->stc_writew(dev, 0x0000, AI_Mode_2_Register);
- /* generate FIFO interrupts on non-empty */
- devpriv->stc_writew(dev, (0 << 6) | 0x0000, AI_Mode_3_Register);
- if (board->reg_type == ni_reg_611x) {
- devpriv->stc_writew(dev, AI_SHIFTIN_Pulse_Width |
- AI_SOC_Polarity |
- AI_LOCALMUX_CLK_Pulse_Width,
- AI_Personal_Register);
- devpriv->stc_writew(dev,
- AI_SCAN_IN_PROG_Output_Select(3) |
- AI_EXTMUX_CLK_Output_Select(0) |
- AI_LOCALMUX_CLK_Output_Select(2) |
- AI_SC_TC_Output_Select(3) |
- AI_CONVERT_Output_Select
- (AI_CONVERT_Output_Enable_High),
- AI_Output_Control_Register);
- } else if (board->reg_type == ni_reg_6143) {
- devpriv->stc_writew(dev, AI_SHIFTIN_Pulse_Width |
- AI_SOC_Polarity |
- AI_LOCALMUX_CLK_Pulse_Width,
- AI_Personal_Register);
- devpriv->stc_writew(dev,
- AI_SCAN_IN_PROG_Output_Select(3) |
- AI_EXTMUX_CLK_Output_Select(0) |
- AI_LOCALMUX_CLK_Output_Select(2) |
- AI_SC_TC_Output_Select(3) |
- AI_CONVERT_Output_Select
- (AI_CONVERT_Output_Enable_Low),
- AI_Output_Control_Register);
- } else {
- unsigned ai_output_control_bits;
- devpriv->stc_writew(dev, AI_SHIFTIN_Pulse_Width |
- AI_SOC_Polarity |
- AI_CONVERT_Pulse_Width |
- AI_LOCALMUX_CLK_Pulse_Width,
- AI_Personal_Register);
- ai_output_control_bits =
- AI_SCAN_IN_PROG_Output_Select(3) |
- AI_EXTMUX_CLK_Output_Select(0) |
- AI_LOCALMUX_CLK_Output_Select(2) |
- AI_SC_TC_Output_Select(3);
- if (board->reg_type == ni_reg_622x)
- ai_output_control_bits |=
- AI_CONVERT_Output_Select
- (AI_CONVERT_Output_Enable_High);
- else
- ai_output_control_bits |=
- AI_CONVERT_Output_Select
- (AI_CONVERT_Output_Enable_Low);
- devpriv->stc_writew(dev, ai_output_control_bits,
- AI_Output_Control_Register);
+ ni_writew(dev, lo, Configuration_Memory_Low);
+ }
}
- /* the following registers should not be changed, because there
- * are no backup registers in devpriv. If you want to change
- * any of these, add a backup register and other appropriate code:
- * AI_Mode_1_Register
- * AI_Mode_3_Register
- * AI_Personal_Register
- * AI_Output_Control_Register
- */
- devpriv->stc_writew(dev, AI_SC_TC_Error_Confirm | AI_START_Interrupt_Ack | AI_START2_Interrupt_Ack | AI_START1_Interrupt_Ack | AI_SC_TC_Interrupt_Ack | AI_Error_Interrupt_Ack | AI_STOP_Interrupt_Ack, Interrupt_A_Ack_Register); /* clear interrupts */
-
- devpriv->stc_writew(dev, AI_Configuration_End, Joint_Reset_Register);
-
- return 0;
-}
-
-static int ni_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
-{
- unsigned long flags;
- int count;
-
- /* lock to avoid race with interrupt handler */
- spin_lock_irqsave(&dev->spinlock, flags);
-#ifndef PCIDMA
- ni_handle_fifo_dregs(dev);
-#else
- ni_sync_ai_dma(dev);
-#endif
- count = s->async->buf_write_count - s->async->buf_read_count;
- spin_unlock_irqrestore(&dev->spinlock, flags);
- return count;
+ /* prime the channel/gain list */
+ if ((board->reg_type != ni_reg_611x)
+ && (board->reg_type != ni_reg_6143)) {
+ ni_prime_channelgain_list(dev);
+ }
}
static int ni_ai_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s, struct comedi_insn *insn,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
unsigned int *data)
{
const struct ni_board_struct *board = comedi_board(dev);
signbits = devpriv->ai_offset[0];
if (board->reg_type == ni_reg_611x) {
for (n = 0; n < num_adc_stages_611x; n++) {
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
udelay(1);
}
for (n = 0; n < insn->n; n++) {
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
/* The 611x has screwy 32-bit FIFOs. */
d = 0;
for (i = 0; i < NI_TIMEOUT; i++) {
- if (ni_readb(XXX_Status) & 0x80) {
- d = (ni_readl(ADC_FIFO_Data_611x) >> 16)
- & 0xffff;
+ if (ni_readb(dev, XXX_Status) & 0x80) {
+ d = ni_readl(dev, ADC_FIFO_Data_611x);
+ d >>= 16;
+ d &= 0xffff;
break;
}
- if (!(devpriv->stc_readw(dev,
- AI_Status_1_Register) &
+ if (!(ni_stc_readw(dev, AI_Status_1_Register) &
AI_FIFO_Empty_St)) {
- d = ni_readl(ADC_FIFO_Data_611x) &
- 0xffff;
+ d = ni_readl(dev, ADC_FIFO_Data_611x);
+ d &= 0xffff;
break;
}
}
}
} else if (board->reg_type == ni_reg_6143) {
for (n = 0; n < insn->n; n++) {
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
/* The 6143 has 32-bit FIFOs. You need to strobe a bit to move a single 16bit stranded sample into the FIFO */
dl = 0;
for (i = 0; i < NI_TIMEOUT; i++) {
- if (ni_readl(AIFIFO_Status_6143) & 0x01) {
- ni_writel(0x01, AIFIFO_Control_6143); /* Get stranded sample into FIFO */
- dl = ni_readl(AIFIFO_Data_6143);
+ if (ni_readl(dev, AIFIFO_Status_6143) & 0x01) {
+ /* Get stranded sample into FIFO */
+ ni_writel(dev, 0x01,
+ AIFIFO_Control_6143);
+ dl = ni_readl(dev, AIFIFO_Data_6143);
break;
}
}
}
} else {
for (n = 0; n < insn->n; n++) {
- devpriv->stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, AI_CONVERT_Pulse,
+ AI_Command_1_Register);
for (i = 0; i < NI_TIMEOUT; i++) {
- if (!(devpriv->stc_readw(dev,
- AI_Status_1_Register) &
+ if (!(ni_stc_readw(dev, AI_Status_1_Register) &
AI_FIFO_Empty_St))
break;
}
("ni_mio_common: timeout in ni_ai_insn_read\n");
return -ETIME;
}
- if (board->reg_type & ni_reg_m_series_mask) {
- data[n] =
- ni_readl(M_Offset_AI_FIFO_Data) & mask;
+ if (devpriv->is_m_series) {
+ dl = ni_readl(dev, M_Offset_AI_FIFO_Data);
+ dl &= mask;
+ data[n] = dl;
} else {
- d = ni_readw(ADC_FIFO_Data_Register);
+ d = ni_readw(dev, ADC_FIFO_Data_Register);
d += signbits; /* subtle: needs to be short addition */
data[n] = d;
}
return insn->n;
}
-static void ni_prime_channelgain_list(struct comedi_device *dev)
+static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec,
+ int round_mode)
{
struct ni_private *devpriv = dev->private;
- int i;
+ int divider;
- devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
- for (i = 0; i < NI_TIMEOUT; ++i) {
- if (!(devpriv->stc_readw(dev,
- AI_Status_1_Register) &
- AI_FIFO_Empty_St)) {
- devpriv->stc_writew(dev, 1, ADC_FIFO_Clear);
- return;
- }
- udelay(1);
+ switch (round_mode) {
+ case TRIG_ROUND_NEAREST:
+ default:
+ divider = (nanosec + devpriv->clock_ns / 2) / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_DOWN:
+ divider = (nanosec) / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_UP:
+ divider = (nanosec + devpriv->clock_ns - 1) / devpriv->clock_ns;
+ break;
}
- printk("ni_mio_common: timeout loading channel/gain list\n");
+ return divider - 1;
}
-static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
- unsigned int n_chan,
- unsigned int *list)
+static unsigned ni_timer_to_ns(const struct comedi_device *dev, int timer)
{
- const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- unsigned int chan, range, aref;
- unsigned int i;
- unsigned offset;
- unsigned int dither;
- unsigned range_code;
- devpriv->stc_writew(dev, 1, Configuration_Memory_Clear);
+ return devpriv->clock_ns * (timer + 1);
+}
-/* offset = 1 << (board->adbits - 1); */
- if ((list[0] & CR_ALT_SOURCE)) {
- unsigned bypass_bits;
- chan = CR_CHAN(list[0]);
- range = CR_RANGE(list[0]);
- range_code = ni_gainlkup[board->gainlkup][range];
- dither = ((list[0] & CR_ALT_FILTER) != 0);
- bypass_bits = MSeries_AI_Bypass_Config_FIFO_Bit;
- bypass_bits |= chan;
- bypass_bits |=
- (devpriv->ai_calib_source) &
- (MSeries_AI_Bypass_Cal_Sel_Pos_Mask |
- MSeries_AI_Bypass_Cal_Sel_Neg_Mask |
- MSeries_AI_Bypass_Mode_Mux_Mask |
- MSeries_AO_Bypass_AO_Cal_Sel_Mask);
- bypass_bits |= MSeries_AI_Bypass_Gain_Bits(range_code);
- if (dither)
- bypass_bits |= MSeries_AI_Bypass_Dither_Bit;
- /* don't use 2's complement encoding */
- bypass_bits |= MSeries_AI_Bypass_Polarity_Bit;
- ni_writel(bypass_bits, M_Offset_AI_Config_FIFO_Bypass);
- } else {
- ni_writel(0, M_Offset_AI_Config_FIFO_Bypass);
+static unsigned ni_min_ai_scan_period_ns(struct comedi_device *dev,
+ unsigned num_channels)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+
+ switch (board->reg_type) {
+ case ni_reg_611x:
+ case ni_reg_6143:
+ /* simultaneously-sampled inputs */
+ return board->ai_speed;
+ break;
+ default:
+ /* multiplexed inputs */
+ break;
}
- offset = 0;
- for (i = 0; i < n_chan; i++) {
- unsigned config_bits = 0;
- chan = CR_CHAN(list[i]);
- aref = CR_AREF(list[i]);
- range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
-
- range_code = ni_gainlkup[board->gainlkup][range];
- devpriv->ai_offset[i] = offset;
- switch (aref) {
- case AREF_DIFF:
- config_bits |=
- MSeries_AI_Config_Channel_Type_Differential_Bits;
- break;
- case AREF_COMMON:
- config_bits |=
- MSeries_AI_Config_Channel_Type_Common_Ref_Bits;
- break;
- case AREF_GROUND:
- config_bits |=
- MSeries_AI_Config_Channel_Type_Ground_Ref_Bits;
- break;
- case AREF_OTHER:
- break;
- }
- config_bits |= MSeries_AI_Config_Channel_Bits(chan);
- config_bits |=
- MSeries_AI_Config_Bank_Bits(board->reg_type, chan);
- config_bits |= MSeries_AI_Config_Gain_Bits(range_code);
- if (i == n_chan - 1)
- config_bits |= MSeries_AI_Config_Last_Channel_Bit;
- if (dither)
- config_bits |= MSeries_AI_Config_Dither_Bit;
- /* don't use 2's complement encoding */
- config_bits |= MSeries_AI_Config_Polarity_Bit;
- ni_writew(config_bits, M_Offset_AI_Config_FIFO_Data);
- }
- ni_prime_channelgain_list(dev);
-}
-
-/*
- * Notes on the 6110 and 6111:
- * These boards a slightly different than the rest of the series, since
- * they have multiple A/D converters.
- * From the driver side, the configuration memory is a
- * little different.
- * Configuration Memory Low:
- * bits 15-9: same
- * bit 8: unipolar/bipolar (should be 0 for bipolar)
- * bits 0-3: gain. This is 4 bits instead of 3 for the other boards
- * 1001 gain=0.1 (+/- 50)
- * 1010 0.2
- * 1011 0.1
- * 0001 1
- * 0010 2
- * 0011 5
- * 0100 10
- * 0101 20
- * 0110 50
- * Configuration Memory High:
- * bits 12-14: Channel Type
- * 001 for differential
- * 000 for calibration
- * bit 11: coupling (this is not currently handled)
- * 1 AC coupling
- * 0 DC coupling
- * bits 0-2: channel
- * valid channels are 0-3
- */
-static void ni_load_channelgain_list(struct comedi_device *dev,
- unsigned int n_chan, unsigned int *list)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- unsigned int chan, range, aref;
- unsigned int i;
- unsigned int hi, lo;
- unsigned offset;
- unsigned int dither;
-
- if (board->reg_type & ni_reg_m_series_mask) {
- ni_m_series_load_channelgain_list(dev, n_chan, list);
- return;
- }
- if (n_chan == 1 && (board->reg_type != ni_reg_611x)
- && (board->reg_type != ni_reg_6143)) {
- if (devpriv->changain_state
- && devpriv->changain_spec == list[0]) {
- /* ready to go. */
- return;
- }
- devpriv->changain_state = 1;
- devpriv->changain_spec = list[0];
- } else {
- devpriv->changain_state = 0;
- }
-
- devpriv->stc_writew(dev, 1, Configuration_Memory_Clear);
-
- /* Set up Calibration mode if required */
- if (board->reg_type == ni_reg_6143) {
- if ((list[0] & CR_ALT_SOURCE)
- && !devpriv->ai_calib_source_enabled) {
- /* Strobe Relay enable bit */
- ni_writew(devpriv->ai_calib_source |
- Calibration_Channel_6143_RelayOn,
- Calibration_Channel_6143);
- ni_writew(devpriv->ai_calib_source,
- Calibration_Channel_6143);
- devpriv->ai_calib_source_enabled = 1;
- msleep_interruptible(100); /* Allow relays to change */
- } else if (!(list[0] & CR_ALT_SOURCE)
- && devpriv->ai_calib_source_enabled) {
- /* Strobe Relay disable bit */
- ni_writew(devpriv->ai_calib_source |
- Calibration_Channel_6143_RelayOff,
- Calibration_Channel_6143);
- ni_writew(devpriv->ai_calib_source,
- Calibration_Channel_6143);
- devpriv->ai_calib_source_enabled = 0;
- msleep_interruptible(100); /* Allow relays to change */
- }
- }
-
- offset = 1 << (board->adbits - 1);
- for (i = 0; i < n_chan; i++) {
- if ((board->reg_type != ni_reg_6143)
- && (list[i] & CR_ALT_SOURCE)) {
- chan = devpriv->ai_calib_source;
- } else {
- chan = CR_CHAN(list[i]);
- }
- aref = CR_AREF(list[i]);
- range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
-
- /* fix the external/internal range differences */
- range = ni_gainlkup[board->gainlkup][range];
- if (board->reg_type == ni_reg_611x)
- devpriv->ai_offset[i] = offset;
- else
- devpriv->ai_offset[i] = (range & 0x100) ? 0 : offset;
-
- hi = 0;
- if ((list[i] & CR_ALT_SOURCE)) {
- if (board->reg_type == ni_reg_611x)
- ni_writew(CR_CHAN(list[i]) & 0x0003,
- Calibration_Channel_Select_611x);
- } else {
- if (board->reg_type == ni_reg_611x)
- aref = AREF_DIFF;
- else if (board->reg_type == ni_reg_6143)
- aref = AREF_OTHER;
- switch (aref) {
- case AREF_DIFF:
- hi |= AI_DIFFERENTIAL;
- break;
- case AREF_COMMON:
- hi |= AI_COMMON;
- break;
- case AREF_GROUND:
- hi |= AI_GROUND;
- break;
- case AREF_OTHER:
- break;
- }
- }
- hi |= AI_CONFIG_CHANNEL(chan);
-
- ni_writew(hi, Configuration_Memory_High);
-
- if (board->reg_type != ni_reg_6143) {
- lo = range;
- if (i == n_chan - 1)
- lo |= AI_LAST_CHANNEL;
- if (dither)
- lo |= AI_DITHER;
-
- ni_writew(lo, Configuration_Memory_Low);
- }
- }
-
- /* prime the channel/gain list */
- if ((board->reg_type != ni_reg_611x)
- && (board->reg_type != ni_reg_6143)) {
- ni_prime_channelgain_list(dev);
- }
-}
-
-static int ni_ns_to_timer(const struct comedi_device *dev, unsigned nanosec,
- int round_mode)
-{
- struct ni_private *devpriv = dev->private;
- int divider;
-
- switch (round_mode) {
- case TRIG_ROUND_NEAREST:
- default:
- divider = (nanosec + devpriv->clock_ns / 2) / devpriv->clock_ns;
- break;
- case TRIG_ROUND_DOWN:
- divider = (nanosec) / devpriv->clock_ns;
- break;
- case TRIG_ROUND_UP:
- divider = (nanosec + devpriv->clock_ns - 1) / devpriv->clock_ns;
- break;
- }
- return divider - 1;
-}
-
-static unsigned ni_timer_to_ns(const struct comedi_device *dev, int timer)
-{
- struct ni_private *devpriv = dev->private;
-
- return devpriv->clock_ns * (timer + 1);
-}
-
-static unsigned ni_min_ai_scan_period_ns(struct comedi_device *dev,
- unsigned num_channels)
-{
- const struct ni_board_struct *board = comedi_board(dev);
-
- switch (board->reg_type) {
- case ni_reg_611x:
- case ni_reg_6143:
- /* simultaneously-sampled inputs */
- return board->ai_speed;
- break;
- default:
- /* multiplexed inputs */
- break;
- }
- return board->ai_speed * num_channels;
-}
+ return board->ai_speed * num_channels;
+}
static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
return 0;
}
+static int ni_ai_inttrig(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ unsigned int trig_num)
+{
+ struct ni_private *devpriv = dev->private;
+ struct comedi_cmd *cmd = &s->async->cmd;
+
+ if (trig_num != cmd->start_arg)
+ return -EINVAL;
+
+ ni_stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
+ AI_Command_2_Register);
+ s->async->inttrig = NULL;
+
+ return 1;
+}
+
static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
const struct ni_board_struct *board = comedi_board(dev);
ni_load_channelgain_list(dev, cmd->chanlist_len, cmd->chanlist);
/* start configuration */
- devpriv->stc_writew(dev, AI_Configuration_Start, Joint_Reset_Register);
+ ni_stc_writew(dev, AI_Configuration_Start, Joint_Reset_Register);
/* disable analog triggering for now, since it
* interferes with the use of pfi0 */
devpriv->an_trig_etc_reg &= ~Analog_Trigger_Enable;
- devpriv->stc_writew(dev, devpriv->an_trig_etc_reg,
- Analog_Trigger_Etc_Register);
+ ni_stc_writew(dev, devpriv->an_trig_etc_reg,
+ Analog_Trigger_Etc_Register);
switch (cmd->start_src) {
case TRIG_INT:
case TRIG_NOW:
- devpriv->stc_writew(dev, AI_START2_Select(0) |
- AI_START1_Sync | AI_START1_Edge |
- AI_START1_Select(0),
- AI_Trigger_Select_Register);
+ ni_stc_writew(dev,
+ AI_START2_Select(0) |
+ AI_START1_Sync | AI_START1_Edge |
+ AI_START1_Select(0),
+ AI_Trigger_Select_Register);
break;
case TRIG_EXT:
{
bits |= AI_START1_Polarity;
if (cmd->start_arg & CR_EDGE)
bits |= AI_START1_Edge;
- devpriv->stc_writew(dev, bits,
- AI_Trigger_Select_Register);
+ ni_stc_writew(dev, bits, AI_Trigger_Select_Register);
break;
}
}
mode2 &= ~AI_Pre_Trigger;
mode2 &= ~AI_SC_Initial_Load_Source;
mode2 &= ~AI_SC_Reload_Mode;
- devpriv->stc_writew(dev, mode2, AI_Mode_2_Register);
+ ni_stc_writew(dev, mode2, AI_Mode_2_Register);
if (cmd->chanlist_len == 1 || (board->reg_type == ni_reg_611x)
|| (board->reg_type == ni_reg_6143)) {
} else {
start_stop_select |= AI_STOP_Select(19); /* ai configuration memory */
}
- devpriv->stc_writew(dev, start_stop_select,
- AI_START_STOP_Select_Register);
+ ni_stc_writew(dev, start_stop_select, AI_START_STOP_Select_Register);
devpriv->ai_cmd2 = 0;
switch (cmd->stop_src) {
stop_count += num_adc_stages_611x;
}
/* stage number of scans */
- devpriv->stc_writel(dev, stop_count, AI_SC_Load_A_Registers);
+ ni_stc_writel(dev, stop_count, AI_SC_Load_A_Registers);
mode1 |= AI_Start_Stop | AI_Mode_1_Reserved | AI_Trigger_Once;
- devpriv->stc_writew(dev, mode1, AI_Mode_1_Register);
+ ni_stc_writew(dev, mode1, AI_Mode_1_Register);
/* load SC (Scan Count) */
- devpriv->stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
devpriv->ai_continuous = 0;
if (stop_count == 0) {
break;
case TRIG_NONE:
/* stage number of scans */
- devpriv->stc_writel(dev, 0, AI_SC_Load_A_Registers);
+ ni_stc_writel(dev, 0, AI_SC_Load_A_Registers);
mode1 |= AI_Start_Stop | AI_Mode_1_Reserved | AI_Continuous;
- devpriv->stc_writew(dev, mode1, AI_Mode_1_Register);
+ ni_stc_writew(dev, mode1, AI_Mode_1_Register);
/* load SC (Scan Count) */
- devpriv->stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
devpriv->ai_continuous = 1;
AI_STOP_Select=19 external pin (configuration mem)
*/
start_stop_select |= AI_START_Edge | AI_START_Sync;
- devpriv->stc_writew(dev, start_stop_select,
- AI_START_STOP_Select_Register);
+ ni_stc_writew(dev, start_stop_select,
+ AI_START_STOP_Select_Register);
mode2 |= AI_SI_Reload_Mode(0);
/* AI_SI_Initial_Load_Source=A */
mode2 &= ~AI_SI_Initial_Load_Source;
/* mode2 |= AI_SC_Reload_Mode; */
- devpriv->stc_writew(dev, mode2, AI_Mode_2_Register);
+ ni_stc_writew(dev, mode2, AI_Mode_2_Register);
/* load SI */
timer = ni_ns_to_timer(dev, cmd->scan_begin_arg,
TRIG_ROUND_NEAREST);
- devpriv->stc_writel(dev, timer, AI_SI_Load_A_Registers);
- devpriv->stc_writew(dev, AI_SI_Load, AI_Command_1_Register);
+ ni_stc_writel(dev, timer, AI_SI_Load_A_Registers);
+ ni_stc_writew(dev, AI_SI_Load, AI_Command_1_Register);
break;
case TRIG_EXT:
if (cmd->scan_begin_arg & CR_EDGE)
start_stop_select |= AI_START_Sync;
start_stop_select |=
AI_START_Select(1 + CR_CHAN(cmd->scan_begin_arg));
- devpriv->stc_writew(dev, start_stop_select,
+ ni_stc_writew(dev, start_stop_select,
AI_START_STOP_Select_Register);
break;
}
else
timer = ni_ns_to_timer(dev, cmd->convert_arg,
TRIG_ROUND_NEAREST);
- devpriv->stc_writew(dev, 1, AI_SI2_Load_A_Register); /* 0,0 does not work. */
- devpriv->stc_writew(dev, timer, AI_SI2_Load_B_Register);
+ /* 0,0 does not work */
+ ni_stc_writew(dev, 1, AI_SI2_Load_A_Register);
+ ni_stc_writew(dev, timer, AI_SI2_Load_B_Register);
/* AI_SI2_Reload_Mode = alternate */
/* AI_SI2_Initial_Load_Source = A */
mode2 &= ~AI_SI2_Initial_Load_Source;
mode2 |= AI_SI2_Reload_Mode;
- devpriv->stc_writew(dev, mode2, AI_Mode_2_Register);
+ ni_stc_writew(dev, mode2, AI_Mode_2_Register);
/* AI_SI2_Load */
- devpriv->stc_writew(dev, AI_SI2_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, AI_SI2_Load, AI_Command_1_Register);
mode2 |= AI_SI2_Reload_Mode; /* alternate */
mode2 |= AI_SI2_Initial_Load_Source; /* B */
- devpriv->stc_writew(dev, mode2, AI_Mode_2_Register);
+ ni_stc_writew(dev, mode2, AI_Mode_2_Register);
break;
case TRIG_EXT:
mode1 |= AI_CONVERT_Source_Select(1 + cmd->convert_arg);
if ((cmd->convert_arg & CR_INVERT) == 0)
mode1 |= AI_CONVERT_Source_Polarity;
- devpriv->stc_writew(dev, mode1, AI_Mode_1_Register);
+ ni_stc_writew(dev, mode1, AI_Mode_1_Register);
mode2 |= AI_Start_Stop_Gate_Enable | AI_SC_Gate_Enable;
- devpriv->stc_writew(dev, mode2, AI_Mode_2_Register);
+ ni_stc_writew(dev, mode2, AI_Mode_2_Register);
break;
}
case AIMODE_HALF_FULL:
/*generate FIFO interrupts and DMA requests on half-full */
#ifdef PCIDMA
- devpriv->stc_writew(dev, AI_FIFO_Mode_HF_to_E,
- AI_Mode_3_Register);
+ ni_stc_writew(dev, AI_FIFO_Mode_HF_to_E,
+ AI_Mode_3_Register);
#else
- devpriv->stc_writew(dev, AI_FIFO_Mode_HF,
- AI_Mode_3_Register);
+ ni_stc_writew(dev, AI_FIFO_Mode_HF,
+ AI_Mode_3_Register);
#endif
break;
case AIMODE_SAMPLE:
/*generate FIFO interrupts on non-empty */
- devpriv->stc_writew(dev, AI_FIFO_Mode_NE,
- AI_Mode_3_Register);
+ ni_stc_writew(dev, AI_FIFO_Mode_NE,
+ AI_Mode_3_Register);
break;
case AIMODE_SCAN:
#ifdef PCIDMA
- devpriv->stc_writew(dev, AI_FIFO_Mode_NE,
- AI_Mode_3_Register);
+ ni_stc_writew(dev, AI_FIFO_Mode_NE,
+ AI_Mode_3_Register);
#else
- devpriv->stc_writew(dev, AI_FIFO_Mode_HF,
- AI_Mode_3_Register);
+ ni_stc_writew(dev, AI_FIFO_Mode_HF,
+ AI_Mode_3_Register);
#endif
interrupt_a_enable |= AI_STOP_Interrupt_Enable;
break;
break;
}
- devpriv->stc_writew(dev, AI_Error_Interrupt_Ack | AI_STOP_Interrupt_Ack | AI_START_Interrupt_Ack | AI_START2_Interrupt_Ack | AI_START1_Interrupt_Ack | AI_SC_TC_Interrupt_Ack | AI_SC_TC_Error_Confirm, Interrupt_A_Ack_Register); /* clear interrupts */
+ /* clear interrupts */
+ ni_stc_writew(dev,
+ AI_Error_Interrupt_Ack |
+ AI_STOP_Interrupt_Ack |
+ AI_START_Interrupt_Ack |
+ AI_START2_Interrupt_Ack |
+ AI_START1_Interrupt_Ack |
+ AI_SC_TC_Interrupt_Ack |
+ AI_SC_TC_Error_Confirm,
+ Interrupt_A_Ack_Register);
ni_set_bits(dev, Interrupt_A_Enable_Register,
interrupt_a_enable, 1);
}
/* end configuration */
- devpriv->stc_writew(dev, AI_Configuration_End, Joint_Reset_Register);
+ ni_stc_writew(dev, AI_Configuration_End, Joint_Reset_Register);
switch (cmd->scan_begin_src) {
case TRIG_TIMER:
- devpriv->stc_writew(dev,
- AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm |
- AI_SC_Arm, AI_Command_1_Register);
+ ni_stc_writew(dev,
+ AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm | AI_SC_Arm,
+ AI_Command_1_Register);
break;
case TRIG_EXT:
/* XXX AI_SI_Arm? */
- devpriv->stc_writew(dev,
- AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm |
- AI_SC_Arm, AI_Command_1_Register);
+ ni_stc_writew(dev,
+ AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm | AI_SC_Arm,
+ AI_Command_1_Register);
break;
}
if (cmd->start_src == TRIG_NOW) {
/* AI_START1_Pulse */
- devpriv->stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
- AI_Command_2_Register);
+ ni_stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
+ AI_Command_2_Register);
s->async->inttrig = NULL;
} else if (cmd->start_src == TRIG_EXT) {
s->async->inttrig = NULL;
return 0;
}
-static int ni_ai_inttrig(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int trig_num)
-{
- struct ni_private *devpriv = dev->private;
- struct comedi_cmd *cmd = &s->async->cmd;
-
- if (trig_num != cmd->start_arg)
- return -EINVAL;
-
- devpriv->stc_writew(dev, AI_START1_Pulse | devpriv->ai_cmd2,
- AI_Command_2_Register);
- s->async->inttrig = NULL;
-
- return 1;
-}
-
static int ni_ai_config_analog_trig(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
- unsigned int *data);
-
-static int ni_ai_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ unsigned int *data)
{
const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
+ unsigned int a, b, modebits;
+ int err = 0;
- if (insn->n < 1)
- return -EINVAL;
-
- switch (data[0]) {
- case INSN_CONFIG_ANALOG_TRIG:
- return ni_ai_config_analog_trig(dev, s, insn, data);
- case INSN_CONFIG_ALT_SOURCE:
- if (board->reg_type & ni_reg_m_series_mask) {
- if (data[1] & ~(MSeries_AI_Bypass_Cal_Sel_Pos_Mask |
- MSeries_AI_Bypass_Cal_Sel_Neg_Mask |
- MSeries_AI_Bypass_Mode_Mux_Mask |
- MSeries_AO_Bypass_AO_Cal_Sel_Mask)) {
- return -EINVAL;
- }
- devpriv->ai_calib_source = data[1];
- } else if (board->reg_type == ni_reg_6143) {
- unsigned int calib_source;
-
- calib_source = data[1] & 0xf;
-
- if (calib_source > 0xF)
- return -EINVAL;
-
- devpriv->ai_calib_source = calib_source;
- ni_writew(calib_source, Calibration_Channel_6143);
- } else {
- unsigned int calib_source;
- unsigned int calib_source_adjust;
-
- calib_source = data[1] & 0xf;
- calib_source_adjust = (data[1] >> 4) & 0xff;
-
- if (calib_source >= 8)
- return -EINVAL;
- devpriv->ai_calib_source = calib_source;
- if (board->reg_type == ni_reg_611x) {
- ni_writeb(calib_source_adjust,
- Cal_Gain_Select_611x);
- }
- }
- return 2;
- default:
- break;
- }
-
- return -EINVAL;
-}
-
-static int ni_ai_config_analog_trig(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- unsigned int a, b, modebits;
- int err = 0;
-
- /* data[1] is flags
- * data[2] is analog line
- * data[3] is set level
- * data[4] is reset level */
- if (!board->has_analog_trig)
+ /* data[1] is flags
+ * data[2] is analog line
+ * data[3] is set level
+ * data[4] is reset level */
+ if (!board->has_analog_trig)
return -EINVAL;
if ((data[1] & 0xffff0000) != COMEDI_EV_SCAN_BEGIN) {
data[1] &= (COMEDI_EV_SCAN_BEGIN | 0xffff);
return 5;
}
+static int ni_ai_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
+
+ if (insn->n < 1)
+ return -EINVAL;
+
+ switch (data[0]) {
+ case INSN_CONFIG_ANALOG_TRIG:
+ return ni_ai_config_analog_trig(dev, s, insn, data);
+ case INSN_CONFIG_ALT_SOURCE:
+ if (devpriv->is_m_series) {
+ if (data[1] & ~(MSeries_AI_Bypass_Cal_Sel_Pos_Mask |
+ MSeries_AI_Bypass_Cal_Sel_Neg_Mask |
+ MSeries_AI_Bypass_Mode_Mux_Mask |
+ MSeries_AO_Bypass_AO_Cal_Sel_Mask)) {
+ return -EINVAL;
+ }
+ devpriv->ai_calib_source = data[1];
+ } else if (board->reg_type == ni_reg_6143) {
+ unsigned int calib_source;
+
+ calib_source = data[1] & 0xf;
+
+ if (calib_source > 0xF)
+ return -EINVAL;
+
+ devpriv->ai_calib_source = calib_source;
+ ni_writew(dev, calib_source, Calibration_Channel_6143);
+ } else {
+ unsigned int calib_source;
+ unsigned int calib_source_adjust;
+
+ calib_source = data[1] & 0xf;
+ calib_source_adjust = (data[1] >> 4) & 0xff;
+
+ if (calib_source >= 8)
+ return -EINVAL;
+ devpriv->ai_calib_source = calib_source;
+ if (board->reg_type == ni_reg_611x) {
+ ni_writeb(dev, calib_source_adjust,
+ Cal_Gain_Select_611x);
+ }
+ }
+ return 2;
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
/* munge data from unsigned to 2's complement for analog output bipolar modes */
static void ni_ao_munge(struct comedi_device *dev, struct comedi_subdevice *s,
void *data, unsigned int num_bytes,
if (timed) {
for (i = 0; i < board->n_aochan; ++i) {
devpriv->ao_conf[i] &= ~MSeries_AO_Update_Timed_Bit;
- ni_writeb(devpriv->ao_conf[i],
+ ni_writeb(dev, devpriv->ao_conf[i],
M_Offset_AO_Config_Bank(i));
- ni_writeb(0xf, M_Offset_AO_Waveform_Order(i));
+ ni_writeb(dev, 0xf, M_Offset_AO_Waveform_Order(i));
}
}
for (i = 0; i < n_chans; i++) {
switch (krange->max - krange->min) {
case 20000000:
conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits;
- ni_writeb(0, M_Offset_AO_Reference_Attenuation(chan));
+ ni_writeb(dev, 0,
+ M_Offset_AO_Reference_Attenuation(chan));
break;
case 10000000:
conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits;
- ni_writeb(0, M_Offset_AO_Reference_Attenuation(chan));
+ ni_writeb(dev, 0,
+ M_Offset_AO_Reference_Attenuation(chan));
break;
case 4000000:
conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits;
- ni_writeb(MSeries_Attenuate_x5_Bit,
+ ni_writeb(dev, MSeries_Attenuate_x5_Bit,
M_Offset_AO_Reference_Attenuation(chan));
break;
case 2000000:
conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits;
- ni_writeb(MSeries_Attenuate_x5_Bit,
+ ni_writeb(dev, MSeries_Attenuate_x5_Bit,
M_Offset_AO_Reference_Attenuation(chan));
break;
default:
}
if (timed)
conf |= MSeries_AO_Update_Timed_Bit;
- ni_writeb(conf, M_Offset_AO_Config_Bank(chan));
+ ni_writeb(dev, conf, M_Offset_AO_Config_Bank(chan));
devpriv->ao_conf[chan] = conf;
- ni_writeb(i, M_Offset_AO_Waveform_Order(chan));
+ ni_writeb(dev, i, M_Offset_AO_Waveform_Order(chan));
}
return invert;
}
conf |= (CR_AREF(chanspec[i]) ==
AREF_OTHER) ? AO_Ground_Ref : 0;
- ni_writew(conf, AO_Configuration);
+ ni_writew(dev, conf, AO_Configuration);
devpriv->ao_conf[chan] = conf;
}
return invert;
unsigned int chanspec[], unsigned int n_chans,
int timed)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
- if (board->reg_type & ni_reg_m_series_mask)
+ if (devpriv->is_m_series)
return ni_m_series_ao_config_chanlist(dev, s, chanspec, n_chans,
timed);
else
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
- const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int invert;
devpriv->ao[chan] = data[0];
- if (board->reg_type & ni_reg_m_series_mask) {
- ni_writew(data[0], M_Offset_DAC_Direct_Data(chan));
+ if (devpriv->is_m_series) {
+ ni_writew(dev, data[0], M_Offset_DAC_Direct_Data(chan));
} else
- ni_writew(data[0] ^ invert,
+ ni_writew(dev, data[0] ^ invert,
(chan) ? DAC1_Direct_Data : DAC0_Direct_Data);
return 1;
AO_FIFO_Interrupt_Enable | AO_Error_Interrupt_Enable, 0);
interrupt_b_bits = AO_Error_Interrupt_Enable;
#ifdef PCIDMA
- devpriv->stc_writew(dev, 1, DAC_FIFO_Clear);
+ ni_stc_writew(dev, 1, DAC_FIFO_Clear);
if (board->reg_type & ni_reg_6xxx_mask)
ni_ao_win_outl(dev, 0x6, AO_FIFO_Offset_Load_611x);
ret = ni_ao_setup_MITE_dma(dev);
interrupt_b_bits |= AO_FIFO_Interrupt_Enable;
#endif
- devpriv->stc_writew(dev, devpriv->ao_mode3 | AO_Not_An_UPDATE,
- AO_Mode_3_Register);
- devpriv->stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+ ni_stc_writew(dev, devpriv->ao_mode3 | AO_Not_An_UPDATE,
+ AO_Mode_3_Register);
+ ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
/* wait for DACs to be loaded */
for (i = 0; i < timeout; i++) {
udelay(1);
- if ((devpriv->stc_readw(dev,
- Joint_Status_2_Register) &
+ if ((ni_stc_readw(dev, Joint_Status_2_Register) &
AO_TMRDACWRs_In_Progress_St) == 0)
break;
}
"timed out waiting for AO_TMRDACWRs_In_Progress_St to clear");
return -EIO;
}
- /* stc manual says we are need to clear error interrupt after AO_TMRDACWRs_In_Progress_St clears */
- devpriv->stc_writew(dev, AO_Error_Interrupt_Ack,
- Interrupt_B_Ack_Register);
+ /*
+ * stc manual says we are need to clear error interrupt after
+ * AO_TMRDACWRs_In_Progress_St clears
+ */
+ ni_stc_writew(dev, AO_Error_Interrupt_Ack, Interrupt_B_Ack_Register);
ni_set_bits(dev, Interrupt_B_Enable_Register, interrupt_b_bits, 1);
- devpriv->stc_writew(dev,
- devpriv->ao_cmd1 | AO_UI_Arm | AO_UC_Arm | AO_BC_Arm
- | AO_DAC1_Update_Mode | AO_DAC0_Update_Mode,
- AO_Command_1_Register);
+ ni_stc_writew(dev, devpriv->ao_cmd1 |
+ AO_UI_Arm | AO_UC_Arm | AO_BC_Arm |
+ AO_DAC1_Update_Mode | AO_DAC0_Update_Mode,
+ AO_Command_1_Register);
- devpriv->stc_writew(dev, devpriv->ao_cmd2 | AO_START1_Pulse,
- AO_Command_2_Register);
+ ni_stc_writew(dev, devpriv->ao_cmd2 | AO_START1_Pulse,
+ AO_Command_2_Register);
return 0;
}
return -EIO;
}
- devpriv->stc_writew(dev, AO_Configuration_Start, Joint_Reset_Register);
+ ni_stc_writew(dev, AO_Configuration_Start, Joint_Reset_Register);
- devpriv->stc_writew(dev, AO_Disarm, AO_Command_1_Register);
+ ni_stc_writew(dev, AO_Disarm, AO_Command_1_Register);
if (board->reg_type & ni_reg_6xxx_mask) {
ao_win_out(CLEAR_WG, AO_Misc_611x);
devpriv->ao_mode1 &= ~AO_Continuous;
devpriv->ao_mode1 |= AO_Trigger_Once;
}
- devpriv->stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
+ ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
switch (cmd->start_src) {
case TRIG_INT:
case TRIG_NOW:
devpriv->ao_trigger_select &=
~(AO_START1_Polarity | AO_START1_Select(-1));
devpriv->ao_trigger_select |= AO_START1_Edge | AO_START1_Sync;
- devpriv->stc_writew(dev, devpriv->ao_trigger_select,
- AO_Trigger_Select_Register);
+ ni_stc_writew(dev, devpriv->ao_trigger_select,
+ AO_Trigger_Select_Register);
break;
case TRIG_EXT:
devpriv->ao_trigger_select =
devpriv->ao_trigger_select |= AO_START1_Polarity; /* 0=active high, 1=active low. see daq-stc 3-24 (p186) */
if (cmd->start_arg & CR_EDGE)
devpriv->ao_trigger_select |= AO_START1_Edge; /* 0=edge detection disabled, 1=enabled */
- devpriv->stc_writew(dev, devpriv->ao_trigger_select,
- AO_Trigger_Select_Register);
+ ni_stc_writew(dev, devpriv->ao_trigger_select,
+ AO_Trigger_Select_Register);
break;
default:
BUG();
break;
}
devpriv->ao_mode3 &= ~AO_Trigger_Length;
- devpriv->stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+ ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
- devpriv->stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
+ ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
devpriv->ao_mode2 &= ~AO_BC_Initial_Load_Source;
- devpriv->stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
+ ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
if (cmd->stop_src == TRIG_NONE)
- devpriv->stc_writel(dev, 0xffffff, AO_BC_Load_A_Register);
+ ni_stc_writel(dev, 0xffffff, AO_BC_Load_A_Register);
else
- devpriv->stc_writel(dev, 0, AO_BC_Load_A_Register);
- devpriv->stc_writew(dev, AO_BC_Load, AO_Command_1_Register);
+ ni_stc_writel(dev, 0, AO_BC_Load_A_Register);
+ ni_stc_writew(dev, AO_BC_Load, AO_Command_1_Register);
devpriv->ao_mode2 &= ~AO_UC_Initial_Load_Source;
- devpriv->stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
+ ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
switch (cmd->stop_src) {
case TRIG_COUNT:
- if (board->reg_type & ni_reg_m_series_mask) {
+ if (devpriv->is_m_series) {
/* this is how the NI example code does it for m-series boards, verified correct with 6259 */
- devpriv->stc_writel(dev, cmd->stop_arg - 1,
- AO_UC_Load_A_Register);
- devpriv->stc_writew(dev, AO_UC_Load,
- AO_Command_1_Register);
+ ni_stc_writel(dev, cmd->stop_arg - 1,
+ AO_UC_Load_A_Register);
+ ni_stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
} else {
- devpriv->stc_writel(dev, cmd->stop_arg,
- AO_UC_Load_A_Register);
- devpriv->stc_writew(dev, AO_UC_Load,
- AO_Command_1_Register);
- devpriv->stc_writel(dev, cmd->stop_arg - 1,
- AO_UC_Load_A_Register);
+ ni_stc_writel(dev, cmd->stop_arg,
+ AO_UC_Load_A_Register);
+ ni_stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
+ ni_stc_writel(dev, cmd->stop_arg - 1,
+ AO_UC_Load_A_Register);
}
break;
case TRIG_NONE:
- devpriv->stc_writel(dev, 0xffffff, AO_UC_Load_A_Register);
- devpriv->stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
- devpriv->stc_writel(dev, 0xffffff, AO_UC_Load_A_Register);
+ ni_stc_writel(dev, 0xffffff, AO_UC_Load_A_Register);
+ ni_stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
+ ni_stc_writel(dev, 0xffffff, AO_UC_Load_A_Register);
break;
default:
- devpriv->stc_writel(dev, 0, AO_UC_Load_A_Register);
- devpriv->stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
- devpriv->stc_writel(dev, cmd->stop_arg, AO_UC_Load_A_Register);
+ ni_stc_writel(dev, 0, AO_UC_Load_A_Register);
+ ni_stc_writew(dev, AO_UC_Load, AO_Command_1_Register);
+ ni_stc_writel(dev, cmd->stop_arg, AO_UC_Load_A_Register);
}
devpriv->ao_mode1 &=
trigvar =
ni_ns_to_timer(dev, cmd->scan_begin_arg,
TRIG_ROUND_NEAREST);
- devpriv->stc_writel(dev, 1, AO_UI_Load_A_Register);
- devpriv->stc_writew(dev, AO_UI_Load, AO_Command_1_Register);
- devpriv->stc_writel(dev, trigvar, AO_UI_Load_A_Register);
+ ni_stc_writel(dev, 1, AO_UI_Load_A_Register);
+ ni_stc_writew(dev, AO_UI_Load, AO_Command_1_Register);
+ ni_stc_writel(dev, trigvar, AO_UI_Load_A_Register);
break;
case TRIG_EXT:
devpriv->ao_mode1 |=
BUG();
break;
}
- devpriv->stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
- devpriv->stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
+ ni_stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
+ ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
devpriv->ao_mode2 &=
~(AO_UI_Reload_Mode(3) | AO_UI_Initial_Load_Source);
- devpriv->stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
+ ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
if (cmd->scan_end_arg > 1) {
devpriv->ao_mode1 |= AO_Multiple_Channels;
- devpriv->stc_writew(dev,
- AO_Number_Of_Channels(cmd->scan_end_arg -
- 1) |
- AO_UPDATE_Output_Select
- (AO_Update_Output_High_Z),
- AO_Output_Control_Register);
+ ni_stc_writew(dev,
+ AO_Number_Of_Channels(cmd->scan_end_arg - 1) |
+ AO_UPDATE_Output_Select(AO_Update_Output_High_Z),
+ AO_Output_Control_Register);
} else {
unsigned bits;
devpriv->ao_mode1 &= ~AO_Multiple_Channels;
bits = AO_UPDATE_Output_Select(AO_Update_Output_High_Z);
- if (board->reg_type &
- (ni_reg_m_series_mask | ni_reg_6xxx_mask)) {
+ if (devpriv->is_m_series ||
+ board->reg_type & ni_reg_6xxx_mask) {
bits |= AO_Number_Of_Channels(0);
} else {
bits |=
AO_Number_Of_Channels(CR_CHAN(cmd->chanlist[0]));
}
- devpriv->stc_writew(dev, bits, AO_Output_Control_Register);
+ ni_stc_writew(dev, bits, AO_Output_Control_Register);
}
- devpriv->stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
+ ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
- devpriv->stc_writew(dev, AO_DAC0_Update_Mode | AO_DAC1_Update_Mode,
- AO_Command_1_Register);
+ ni_stc_writew(dev, AO_DAC0_Update_Mode | AO_DAC1_Update_Mode,
+ AO_Command_1_Register);
devpriv->ao_mode3 |= AO_Stop_On_Overrun_Error;
- devpriv->stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+ ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
devpriv->ao_mode2 &= ~AO_FIFO_Mode_Mask;
#ifdef PCIDMA
devpriv->ao_mode2 |= AO_FIFO_Mode_HF;
#endif
devpriv->ao_mode2 &= ~AO_FIFO_Retransmit_Enable;
- devpriv->stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
+ ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
bits = AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
AO_TMRDACWR_Pulse_Width;
#if 0
/* F Hess: windows driver does not set AO_Number_Of_DAC_Packages bit for 6281,
verified with bus analyzer. */
- if (board->reg_type & ni_reg_m_series_mask)
+ if (devpriv->is_m_series)
bits |= AO_Number_Of_DAC_Packages;
#endif
- devpriv->stc_writew(dev, bits, AO_Personal_Register);
+ ni_stc_writew(dev, bits, AO_Personal_Register);
/* enable sending of ao dma requests */
- devpriv->stc_writew(dev, AO_AOFREQ_Enable, AO_Start_Select_Register);
+ ni_stc_writew(dev, AO_AOFREQ_Enable, AO_Start_Select_Register);
- devpriv->stc_writew(dev, AO_Configuration_End, Joint_Reset_Register);
+ ni_stc_writew(dev, AO_Configuration_End, Joint_Reset_Register);
if (cmd->stop_src == TRIG_COUNT) {
- devpriv->stc_writew(dev, AO_BC_TC_Interrupt_Ack,
- Interrupt_B_Ack_Register);
+ ni_stc_writew(dev, AO_BC_TC_Interrupt_Ack,
+ Interrupt_B_Ack_Register);
ni_set_bits(dev, Interrupt_B_Enable_Register,
AO_BC_TC_Interrupt_Enable, 1);
}
const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- /* devpriv->ao0p=0x0000; */
- /* ni_writew(devpriv->ao0p,AO_Configuration); */
-
- /* devpriv->ao1p=AO_Channel(1); */
- /* ni_writew(devpriv->ao1p,AO_Configuration); */
-
ni_release_ao_mite_channel(dev);
- devpriv->stc_writew(dev, AO_Configuration_Start, Joint_Reset_Register);
- devpriv->stc_writew(dev, AO_Disarm, AO_Command_1_Register);
+ ni_stc_writew(dev, AO_Configuration_Start, Joint_Reset_Register);
+ ni_stc_writew(dev, AO_Disarm, AO_Command_1_Register);
ni_set_bits(dev, Interrupt_B_Enable_Register, ~0, 0);
- devpriv->stc_writew(dev, AO_BC_Source_Select, AO_Personal_Register);
- devpriv->stc_writew(dev, 0x3f98, Interrupt_B_Ack_Register);
- devpriv->stc_writew(dev, AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
- AO_TMRDACWR_Pulse_Width, AO_Personal_Register);
- devpriv->stc_writew(dev, 0, AO_Output_Control_Register);
- devpriv->stc_writew(dev, 0, AO_Start_Select_Register);
+ ni_stc_writew(dev, AO_BC_Source_Select, AO_Personal_Register);
+ ni_stc_writew(dev, 0x3f98, Interrupt_B_Ack_Register);
+ ni_stc_writew(dev, AO_BC_Source_Select | AO_UPDATE_Pulse_Width |
+ AO_TMRDACWR_Pulse_Width, AO_Personal_Register);
+ ni_stc_writew(dev, 0, AO_Output_Control_Register);
+ ni_stc_writew(dev, 0, AO_Start_Select_Register);
devpriv->ao_cmd1 = 0;
- devpriv->stc_writew(dev, devpriv->ao_cmd1, AO_Command_1_Register);
+ ni_stc_writew(dev, devpriv->ao_cmd1, AO_Command_1_Register);
devpriv->ao_cmd2 = 0;
- devpriv->stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
+ ni_stc_writew(dev, devpriv->ao_cmd2, AO_Command_2_Register);
devpriv->ao_mode1 = 0;
- devpriv->stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
+ ni_stc_writew(dev, devpriv->ao_mode1, AO_Mode_1_Register);
devpriv->ao_mode2 = 0;
- devpriv->stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
- if (board->reg_type & ni_reg_m_series_mask)
+ ni_stc_writew(dev, devpriv->ao_mode2, AO_Mode_2_Register);
+ if (devpriv->is_m_series)
devpriv->ao_mode3 = AO_Last_Gate_Disable;
else
devpriv->ao_mode3 = 0;
- devpriv->stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
+ ni_stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register);
devpriv->ao_trigger_select = 0;
- devpriv->stc_writew(dev, devpriv->ao_trigger_select,
- AO_Trigger_Select_Register);
+ ni_stc_writew(dev, devpriv->ao_trigger_select,
+ AO_Trigger_Select_Register);
if (board->reg_type & ni_reg_6xxx_mask) {
unsigned immediate_bits = 0;
unsigned i;
ao_win_out(immediate_bits, AO_Immediate_671x);
ao_win_out(CLEAR_WG, AO_Misc_611x);
}
- devpriv->stc_writew(dev, AO_Configuration_End, Joint_Reset_Register);
+ ni_stc_writew(dev, AO_Configuration_End, Joint_Reset_Register);
return 0;
}
devpriv->dio_control &= ~DIO_Pins_Dir_Mask;
devpriv->dio_control |= DIO_Pins_Dir(s->io_bits);
- devpriv->stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
return insn->n;
}
if (comedi_dio_update_state(s, data)) {
devpriv->dio_output &= ~DIO_Parallel_Data_Mask;
devpriv->dio_output |= DIO_Parallel_Data_Out(s->state);
- devpriv->stc_writew(dev, devpriv->dio_output,
- DIO_Output_Register);
+ ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
}
- data[1] = devpriv->stc_readw(dev, DIO_Parallel_Input_Register);
+ data[1] = ni_stc_readw(dev, DIO_Parallel_Input_Register);
return insn->n;
}
struct comedi_insn *insn,
unsigned int *data)
{
- struct ni_private *devpriv __maybe_unused = dev->private;
int ret;
ret = comedi_dio_insn_config(dev, s, insn, data, 0);
if (ret)
return ret;
- ni_writel(s->io_bits, M_Offset_DIO_Direction);
+ ni_writel(dev, s->io_bits, M_Offset_DIO_Direction);
return insn->n;
}
struct comedi_insn *insn,
unsigned int *data)
{
- struct ni_private *devpriv __maybe_unused = dev->private;
-
if (comedi_dio_update_state(s, data))
- ni_writel(s->state, M_Offset_Static_Digital_Output);
+ ni_writel(dev, s->state, M_Offset_Static_Digital_Output);
- data[1] = ni_readl(M_Offset_Static_Digital_Input);
+ data[1] = ni_readl(dev, M_Offset_Static_Digital_Input);
return insn->n;
}
return 0;
}
-static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
-{
- struct ni_private *devpriv __maybe_unused = dev->private;
- const struct comedi_cmd *cmd = &s->async->cmd;
- unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;
- int retval;
-
- ni_writel(CDO_Reset_Bit, M_Offset_CDIO_Command);
- switch (cmd->scan_begin_src) {
- case TRIG_EXT:
- cdo_mode_bits |=
- CR_CHAN(cmd->scan_begin_arg) &
- CDO_Sample_Source_Select_Mask;
- break;
- default:
- BUG();
- break;
- }
- if (cmd->scan_begin_arg & CR_INVERT)
- cdo_mode_bits |= CDO_Polarity_Bit;
- ni_writel(cdo_mode_bits, M_Offset_CDO_Mode);
- if (s->io_bits) {
- ni_writel(s->state, M_Offset_CDO_FIFO_Data);
- ni_writel(CDO_SW_Update_Bit, M_Offset_CDIO_Command);
- ni_writel(s->io_bits, M_Offset_CDO_Mask_Enable);
- } else {
- comedi_error(dev,
- "attempted to run digital output command with no lines configured as outputs");
- return -EIO;
- }
- retval = ni_request_cdo_mite_channel(dev);
- if (retval < 0)
- return retval;
-
- s->async->inttrig = ni_cdo_inttrig;
-
- return 0;
-}
-
static int ni_cdo_inttrig(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int trig_num)
{
+ struct comedi_cmd *cmd = &s->async->cmd;
+ const unsigned timeout = 1000;
+ int retval = 0;
+ unsigned i;
#ifdef PCIDMA
struct ni_private *devpriv = dev->private;
unsigned long flags;
#endif
- struct comedi_cmd *cmd = &s->async->cmd;
- int retval = 0;
- unsigned i;
- const unsigned timeout = 1000;
if (trig_num != cmd->start_arg)
return -EINVAL;
#endif
/*
* XXX not sure what interrupt C group does
-* ni_writeb(Interrupt_Group_C_Enable_Bit,
+* ni_writeb(dev, Interrupt_Group_C_Enable_Bit,
* M_Offset_Interrupt_C_Enable); wait for dma to fill output fifo
*/
for (i = 0; i < timeout; ++i) {
- if (ni_readl(M_Offset_CDIO_Status) & CDO_FIFO_Full_Bit)
+ if (ni_readl(dev, M_Offset_CDIO_Status) & CDO_FIFO_Full_Bit)
break;
udelay(10);
}
if (i == timeout) {
comedi_error(dev, "dma failed to fill cdo fifo!");
- ni_cdio_cancel(dev, s);
+ s->cancel(dev, s);
return -EIO;
}
- ni_writel(CDO_Arm_Bit | CDO_Error_Interrupt_Enable_Set_Bit |
- CDO_Empty_FIFO_Interrupt_Enable_Set_Bit,
+ ni_writel(dev, CDO_Arm_Bit | CDO_Error_Interrupt_Enable_Set_Bit |
+ CDO_Empty_FIFO_Interrupt_Enable_Set_Bit,
M_Offset_CDIO_Command);
return retval;
}
-static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
+static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
- struct ni_private *devpriv __maybe_unused = dev->private;
+ const struct comedi_cmd *cmd = &s->async->cmd;
+ unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;
+ int retval;
+
+ ni_writel(dev, CDO_Reset_Bit, M_Offset_CDIO_Command);
+ switch (cmd->scan_begin_src) {
+ case TRIG_EXT:
+ cdo_mode_bits |=
+ CR_CHAN(cmd->scan_begin_arg) &
+ CDO_Sample_Source_Select_Mask;
+ break;
+ default:
+ BUG();
+ break;
+ }
+ if (cmd->scan_begin_arg & CR_INVERT)
+ cdo_mode_bits |= CDO_Polarity_Bit;
+ ni_writel(dev, cdo_mode_bits, M_Offset_CDO_Mode);
+ if (s->io_bits) {
+ ni_writel(dev, s->state, M_Offset_CDO_FIFO_Data);
+ ni_writel(dev, CDO_SW_Update_Bit, M_Offset_CDIO_Command);
+ ni_writel(dev, s->io_bits, M_Offset_CDO_Mask_Enable);
+ } else {
+ comedi_error(dev,
+ "attempted to run digital output command with no lines configured as outputs");
+ return -EIO;
+ }
+ retval = ni_request_cdo_mite_channel(dev);
+ if (retval < 0)
+ return retval;
+
+ s->async->inttrig = ni_cdo_inttrig;
+
+ return 0;
+}
- ni_writel(CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit |
- CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
- CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
+static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
+{
+ ni_writel(dev, CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit |
+ CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
+ CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
M_Offset_CDIO_Command);
/*
-* XXX not sure what interrupt C group does ni_writeb(0,
+* XXX not sure what interrupt C group does ni_writeb(dev, 0,
* M_Offset_Interrupt_C_Enable);
*/
- ni_writel(0, M_Offset_CDO_Mask_Enable);
+ ni_writel(dev, 0, M_Offset_CDO_Mask_Enable);
ni_release_cdo_mite_channel(dev);
return 0;
}
static void handle_cdio_interrupt(struct comedi_device *dev)
{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv __maybe_unused = dev->private;
+ struct ni_private *devpriv = dev->private;
unsigned cdio_status;
struct comedi_subdevice *s = &dev->subdevices[NI_DIO_SUBDEV];
#ifdef PCIDMA
unsigned long flags;
#endif
- if ((board->reg_type & ni_reg_m_series_mask) == 0)
+ if (!devpriv->is_m_series)
return;
#ifdef PCIDMA
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
#endif
- cdio_status = ni_readl(M_Offset_CDIO_Status);
+ cdio_status = ni_readl(dev, M_Offset_CDIO_Status);
if (cdio_status & (CDO_Overrun_Bit | CDO_Underflow_Bit)) {
/* printk("cdio error: statux=0x%x\n", cdio_status); */
- ni_writel(CDO_Error_Interrupt_Confirm_Bit, M_Offset_CDIO_Command); /* XXX just guessing this is needed and does something useful */
+ /* XXX just guessing this is needed and does something useful */
+ ni_writel(dev, CDO_Error_Interrupt_Confirm_Bit,
+ M_Offset_CDIO_Command);
s->async->events |= COMEDI_CB_OVERFLOW;
}
if (cdio_status & CDO_FIFO_Empty_Bit) {
/* printk("cdio fifo empty\n"); */
- ni_writel(CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit,
+ ni_writel(dev, CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit,
M_Offset_CDIO_Command);
/* s->async->events |= COMEDI_CB_EOA; */
}
cfc_handle_events(dev, s);
}
-static int ni_serial_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int ni_serial_hw_readwrite8(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ unsigned char data_out,
+ unsigned char *data_in)
{
struct ni_private *devpriv = dev->private;
- int err = insn->n;
- unsigned char byte_out, byte_in = 0;
+ unsigned int status1;
+ int err = 0, count = 20;
- if (insn->n != 2)
- return -EINVAL;
+ devpriv->dio_output &= ~DIO_Serial_Data_Mask;
+ devpriv->dio_output |= DIO_Serial_Data_Out(data_out);
+ ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
- switch (data[0]) {
- case INSN_CONFIG_SERIAL_CLOCK:
- devpriv->serial_hw_mode = 1;
- devpriv->dio_control |= DIO_HW_Serial_Enable;
-
- if (data[1] == SERIAL_DISABLED) {
- devpriv->serial_hw_mode = 0;
- devpriv->dio_control &= ~(DIO_HW_Serial_Enable |
- DIO_Software_Serial_Control);
- data[1] = SERIAL_DISABLED;
- devpriv->serial_interval_ns = data[1];
- } else if (data[1] <= SERIAL_600NS) {
- /* Warning: this clock speed is too fast to reliably
- control SCXI. */
- devpriv->dio_control &= ~DIO_HW_Serial_Timebase;
- devpriv->clock_and_fout |= Slow_Internal_Timebase;
- devpriv->clock_and_fout &= ~DIO_Serial_Out_Divide_By_2;
- data[1] = SERIAL_600NS;
- devpriv->serial_interval_ns = data[1];
- } else if (data[1] <= SERIAL_1_2US) {
- devpriv->dio_control &= ~DIO_HW_Serial_Timebase;
- devpriv->clock_and_fout |= Slow_Internal_Timebase |
- DIO_Serial_Out_Divide_By_2;
- data[1] = SERIAL_1_2US;
- devpriv->serial_interval_ns = data[1];
- } else if (data[1] <= SERIAL_10US) {
- devpriv->dio_control |= DIO_HW_Serial_Timebase;
- devpriv->clock_and_fout |= Slow_Internal_Timebase |
- DIO_Serial_Out_Divide_By_2;
- /* Note: DIO_Serial_Out_Divide_By_2 only affects
- 600ns/1.2us. If you turn divide_by_2 off with the
- slow clock, you will still get 10us, except then
- all your delays are wrong. */
- data[1] = SERIAL_10US;
- devpriv->serial_interval_ns = data[1];
- } else {
- devpriv->dio_control &= ~(DIO_HW_Serial_Enable |
- DIO_Software_Serial_Control);
- devpriv->serial_hw_mode = 0;
- data[1] = (data[1] / 1000) * 1000;
- devpriv->serial_interval_ns = data[1];
- }
-
- devpriv->stc_writew(dev, devpriv->dio_control,
- DIO_Control_Register);
- devpriv->stc_writew(dev, devpriv->clock_and_fout,
- Clock_and_FOUT_Register);
- return 1;
-
- break;
-
- case INSN_CONFIG_BIDIRECTIONAL_DATA:
-
- if (devpriv->serial_interval_ns == 0)
- return -EINVAL;
-
- byte_out = data[1] & 0xFF;
-
- if (devpriv->serial_hw_mode) {
- err = ni_serial_hw_readwrite8(dev, s, byte_out,
- &byte_in);
- } else if (devpriv->serial_interval_ns > 0) {
- err = ni_serial_sw_readwrite8(dev, s, byte_out,
- &byte_in);
- } else {
- printk("ni_serial_insn_config: serial disabled!\n");
- return -EINVAL;
- }
- if (err < 0)
- return err;
- data[1] = byte_in & 0xFF;
- return insn->n;
-
- break;
- default:
- return -EINVAL;
- }
-
-}
-
-static int ni_serial_hw_readwrite8(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned char data_out,
- unsigned char *data_in)
-{
- struct ni_private *devpriv = dev->private;
- unsigned int status1;
- int err = 0, count = 20;
-
- devpriv->dio_output &= ~DIO_Serial_Data_Mask;
- devpriv->dio_output |= DIO_Serial_Data_Out(data_out);
- devpriv->stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
-
- status1 = devpriv->stc_readw(dev, Joint_Status_1_Register);
- if (status1 & DIO_Serial_IO_In_Progress_St) {
- err = -EBUSY;
- goto Error;
- }
+ status1 = ni_stc_readw(dev, Joint_Status_1_Register);
+ if (status1 & DIO_Serial_IO_In_Progress_St) {
+ err = -EBUSY;
+ goto Error;
+ }
devpriv->dio_control |= DIO_HW_Serial_Start;
- devpriv->stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
devpriv->dio_control &= ~DIO_HW_Serial_Start;
/* Wait until STC says we're done, but don't loop infinitely. */
- while ((status1 =
- devpriv->stc_readw(dev,
- Joint_Status_1_Register)) &
+ while ((status1 = ni_stc_readw(dev, Joint_Status_1_Register)) &
DIO_Serial_IO_In_Progress_St) {
/* Delay one bit per loop */
udelay((devpriv->serial_interval_ns + 999) / 1000);
udelay((devpriv->serial_interval_ns + 999) / 1000);
if (data_in != NULL)
- *data_in = devpriv->stc_readw(dev, DIO_Serial_Input_Register);
+ *data_in = ni_stc_readw(dev, DIO_Serial_Input_Register);
Error:
- devpriv->stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
return err;
}
devpriv->dio_output &= ~DIO_SDOUT;
if (data_out & mask)
devpriv->dio_output |= DIO_SDOUT;
- devpriv->stc_writew(dev, devpriv->dio_output,
- DIO_Output_Register);
+ ni_stc_writew(dev, devpriv->dio_output, DIO_Output_Register);
/* Assert SDCLK (active low, inverted), wait for half of
the delay, deassert SDCLK, and wait for the other half. */
devpriv->dio_control |= DIO_Software_Serial_Control;
- devpriv->stc_writew(dev, devpriv->dio_control,
- DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
udelay((devpriv->serial_interval_ns + 999) / 2000);
devpriv->dio_control &= ~DIO_Software_Serial_Control;
- devpriv->stc_writew(dev, devpriv->dio_control,
- DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
udelay((devpriv->serial_interval_ns + 999) / 2000);
/* Input current bit */
- if (devpriv->stc_readw(dev,
- DIO_Parallel_Input_Register) & DIO_SDIN) {
- /* printk("DIO_P_I_R: 0x%x\n", devpriv->stc_readw(dev, DIO_Parallel_Input_Register)); */
+ if (ni_stc_readw(dev, DIO_Parallel_Input_Register) & DIO_SDIN) {
+ /* printk("DIO_P_I_R: 0x%x\n", ni_stc_readw(dev, DIO_Parallel_Input_Register)); */
input |= mask;
}
}
return 0;
}
-static void mio_common_detach(struct comedi_device *dev)
+static int ni_serial_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct ni_private *devpriv = dev->private;
+ int err = insn->n;
+ unsigned char byte_out, byte_in = 0;
- if (devpriv) {
- if (devpriv->counter_dev)
- ni_gpct_device_destroy(devpriv->counter_dev);
+ if (insn->n != 2)
+ return -EINVAL;
+
+ switch (data[0]) {
+ case INSN_CONFIG_SERIAL_CLOCK:
+ devpriv->serial_hw_mode = 1;
+ devpriv->dio_control |= DIO_HW_Serial_Enable;
+
+ if (data[1] == SERIAL_DISABLED) {
+ devpriv->serial_hw_mode = 0;
+ devpriv->dio_control &= ~(DIO_HW_Serial_Enable |
+ DIO_Software_Serial_Control);
+ data[1] = SERIAL_DISABLED;
+ devpriv->serial_interval_ns = data[1];
+ } else if (data[1] <= SERIAL_600NS) {
+ /* Warning: this clock speed is too fast to reliably
+ control SCXI. */
+ devpriv->dio_control &= ~DIO_HW_Serial_Timebase;
+ devpriv->clock_and_fout |= Slow_Internal_Timebase;
+ devpriv->clock_and_fout &= ~DIO_Serial_Out_Divide_By_2;
+ data[1] = SERIAL_600NS;
+ devpriv->serial_interval_ns = data[1];
+ } else if (data[1] <= SERIAL_1_2US) {
+ devpriv->dio_control &= ~DIO_HW_Serial_Timebase;
+ devpriv->clock_and_fout |= Slow_Internal_Timebase |
+ DIO_Serial_Out_Divide_By_2;
+ data[1] = SERIAL_1_2US;
+ devpriv->serial_interval_ns = data[1];
+ } else if (data[1] <= SERIAL_10US) {
+ devpriv->dio_control |= DIO_HW_Serial_Timebase;
+ devpriv->clock_and_fout |= Slow_Internal_Timebase |
+ DIO_Serial_Out_Divide_By_2;
+ /* Note: DIO_Serial_Out_Divide_By_2 only affects
+ 600ns/1.2us. If you turn divide_by_2 off with the
+ slow clock, you will still get 10us, except then
+ all your delays are wrong. */
+ data[1] = SERIAL_10US;
+ devpriv->serial_interval_ns = data[1];
+ } else {
+ devpriv->dio_control &= ~(DIO_HW_Serial_Enable |
+ DIO_Software_Serial_Control);
+ devpriv->serial_hw_mode = 0;
+ data[1] = (data[1] / 1000) * 1000;
+ devpriv->serial_interval_ns = data[1];
+ }
+
+ ni_stc_writew(dev, devpriv->dio_control, DIO_Control_Register);
+ ni_stc_writew(dev, devpriv->clock_and_fout,
+ Clock_and_FOUT_Register);
+ return 1;
+
+ break;
+
+ case INSN_CONFIG_BIDIRECTIONAL_DATA:
+
+ if (devpriv->serial_interval_ns == 0)
+ return -EINVAL;
+
+ byte_out = data[1] & 0xFF;
+
+ if (devpriv->serial_hw_mode) {
+ err = ni_serial_hw_readwrite8(dev, s, byte_out,
+ &byte_in);
+ } else if (devpriv->serial_interval_ns > 0) {
+ err = ni_serial_sw_readwrite8(dev, s, byte_out,
+ &byte_in);
+ } else {
+ printk("ni_serial_insn_config: serial disabled!\n");
+ return -EINVAL;
+ }
+ if (err < 0)
+ return err;
+ data[1] = byte_in & 0xFF;
+ return insn->n;
+
+ break;
+ default:
+ return -EINVAL;
}
+
}
static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s)
enum ni_gpct_register reg)
{
struct comedi_device *dev = counter->counter_dev->dev;
- struct ni_private *devpriv = dev->private;
unsigned stc_register;
/* bits in the join reset register which are relevant to counters */
static const unsigned gpct_joint_reset_mask = G0_Reset | G1_Reset;
switch (reg) {
/* m-series-only registers */
case NITIO_G0_CNT_MODE:
- ni_writew(bits, M_Offset_G0_Counting_Mode);
+ ni_writew(dev, bits, M_Offset_G0_Counting_Mode);
break;
case NITIO_G1_CNT_MODE:
- ni_writew(bits, M_Offset_G1_Counting_Mode);
+ ni_writew(dev, bits, M_Offset_G1_Counting_Mode);
break;
case NITIO_G0_GATE2:
- ni_writew(bits, M_Offset_G0_Second_Gate);
+ ni_writew(dev, bits, M_Offset_G0_Second_Gate);
break;
case NITIO_G1_GATE2:
- ni_writew(bits, M_Offset_G1_Second_Gate);
+ ni_writew(dev, bits, M_Offset_G1_Second_Gate);
break;
case NITIO_G0_DMA_CFG:
- ni_writew(bits, M_Offset_G0_DMA_Config);
+ ni_writew(dev, bits, M_Offset_G0_DMA_Config);
break;
case NITIO_G1_DMA_CFG:
- ni_writew(bits, M_Offset_G1_DMA_Config);
+ ni_writew(dev, bits, M_Offset_G1_DMA_Config);
break;
case NITIO_G0_ABZ:
- ni_writew(bits, M_Offset_G0_MSeries_ABZ);
+ ni_writew(dev, bits, M_Offset_G0_MSeries_ABZ);
break;
case NITIO_G1_ABZ:
- ni_writew(bits, M_Offset_G1_MSeries_ABZ);
+ ni_writew(dev, bits, M_Offset_G1_MSeries_ABZ);
break;
/* 32 bit registers */
case NITIO_G0_LOADB:
case NITIO_G1_LOADB:
stc_register = ni_gpct_to_stc_register(reg);
- devpriv->stc_writel(dev, bits, stc_register);
+ ni_stc_writel(dev, bits, stc_register);
break;
/* 16 bit registers */
/* fall-through */
default:
stc_register = ni_gpct_to_stc_register(reg);
- devpriv->stc_writew(dev, bits, stc_register);
+ ni_stc_writew(dev, bits, stc_register);
}
}
enum ni_gpct_register reg)
{
struct comedi_device *dev = counter->counter_dev->dev;
- struct ni_private *devpriv = dev->private;
unsigned stc_register;
switch (reg) {
/* m-series only registers */
case NITIO_G0_DMA_STATUS:
- return ni_readw(M_Offset_G0_DMA_Status);
+ return ni_readw(dev, M_Offset_G0_DMA_Status);
case NITIO_G1_DMA_STATUS:
- return ni_readw(M_Offset_G1_DMA_Status);
+ return ni_readw(dev, M_Offset_G1_DMA_Status);
/* 32 bit registers */
case NITIO_G0_HW_SAVE:
case NITIO_G0_SW_SAVE:
case NITIO_G1_SW_SAVE:
stc_register = ni_gpct_to_stc_register(reg);
- return devpriv->stc_readl(dev, stc_register);
+ return ni_stc_readl(dev, stc_register);
/* 16 bit registers */
default:
stc_register = ni_gpct_to_stc_register(reg);
- return devpriv->stc_readw(dev, stc_register);
+ return ni_stc_readw(dev, stc_register);
break;
}
return 0;
static int ni_freq_out_insn_read(struct comedi_device *dev,
struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct ni_private *devpriv = dev->private;
+ unsigned int val = devpriv->clock_and_fout & FOUT_Divider_mask;
+ int i;
- data[0] = devpriv->clock_and_fout & FOUT_Divider_mask;
- return 1;
+ for (i = 0; i < insn->n; i++)
+ data[i] = val;
+
+ return insn->n;
}
static int ni_freq_out_insn_write(struct comedi_device *dev,
struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct ni_private *devpriv = dev->private;
- devpriv->clock_and_fout &= ~FOUT_Enable;
- devpriv->stc_writew(dev, devpriv->clock_and_fout,
- Clock_and_FOUT_Register);
- devpriv->clock_and_fout &= ~FOUT_Divider_mask;
- devpriv->clock_and_fout |= FOUT_Divider(data[0]);
- devpriv->clock_and_fout |= FOUT_Enable;
- devpriv->stc_writew(dev, devpriv->clock_and_fout,
- Clock_and_FOUT_Register);
+ if (insn->n) {
+ devpriv->clock_and_fout &= ~FOUT_Enable;
+ ni_stc_writew(dev, devpriv->clock_and_fout,
+ Clock_and_FOUT_Register);
+ devpriv->clock_and_fout &= ~FOUT_Divider_mask;
+
+ /* use the last data value to set the fout divider */
+ devpriv->clock_and_fout |= FOUT_Divider(data[insn->n - 1]);
+
+ devpriv->clock_and_fout |= FOUT_Enable;
+ ni_stc_writew(dev, devpriv->clock_and_fout,
+ Clock_and_FOUT_Register);
+ }
return insn->n;
}
-static int ni_set_freq_out_clock(struct comedi_device *dev,
- unsigned int clock_source)
+static int ni_freq_out_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct ni_private *devpriv = dev->private;
- switch (clock_source) {
- case NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC:
- devpriv->clock_and_fout &= ~FOUT_Timebase_Select;
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC:
+ devpriv->clock_and_fout &= ~FOUT_Timebase_Select;
+ break;
+ case NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC:
+ devpriv->clock_and_fout |= FOUT_Timebase_Select;
+ break;
+ default:
+ return -EINVAL;
+ }
+ ni_stc_writew(dev, devpriv->clock_and_fout,
+ Clock_and_FOUT_Register);
break;
- case NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC:
- devpriv->clock_and_fout |= FOUT_Timebase_Select;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ if (devpriv->clock_and_fout & FOUT_Timebase_Select) {
+ data[1] = NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC;
+ data[2] = TIMEBASE_2_NS;
+ } else {
+ data[1] = NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC;
+ data[2] = TIMEBASE_1_NS * 2;
+ }
break;
default:
return -EINVAL;
}
- devpriv->stc_writew(dev, devpriv->clock_and_fout,
- Clock_and_FOUT_Register);
- return 3;
+ return insn->n;
}
-static void ni_get_freq_out_clock(struct comedi_device *dev,
- unsigned int *clock_source,
- unsigned int *clock_period_ns)
+static int ni_8255_callback(int dir, int port, int data, unsigned long arg)
{
- struct ni_private *devpriv = dev->private;
+ struct comedi_device *dev = (struct comedi_device *)arg;
- if (devpriv->clock_and_fout & FOUT_Timebase_Select) {
- *clock_source = NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC;
- *clock_period_ns = TIMEBASE_2_NS;
+ if (dir) {
+ ni_writeb(dev, data, Port_A + 2 * port);
+ return 0;
} else {
- *clock_source = NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC;
- *clock_period_ns = TIMEBASE_1_NS * 2;
+ return ni_readb(dev, Port_A + 2 * port);
}
}
-static int ni_freq_out_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int ni_get_pwm_config(struct comedi_device *dev, unsigned int *data)
+{
+ struct ni_private *devpriv = dev->private;
+
+ data[1] = devpriv->pwm_up_count * devpriv->clock_ns;
+ data[2] = devpriv->pwm_down_count * devpriv->clock_ns;
+ return 3;
+}
+
+static int ni_m_series_pwm_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
+ struct ni_private *devpriv = dev->private;
+ unsigned up_count, down_count;
+
switch (data[0]) {
- case INSN_CONFIG_SET_CLOCK_SRC:
- return ni_set_freq_out_clock(dev, data[1]);
+ case INSN_CONFIG_PWM_OUTPUT:
+ switch (data[1]) {
+ case TRIG_ROUND_NEAREST:
+ up_count =
+ (data[2] +
+ devpriv->clock_ns / 2) / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_DOWN:
+ up_count = data[2] / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_UP:
+ up_count =
+ (data[2] + devpriv->clock_ns -
+ 1) / devpriv->clock_ns;
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
+ switch (data[3]) {
+ case TRIG_ROUND_NEAREST:
+ down_count =
+ (data[4] +
+ devpriv->clock_ns / 2) / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_DOWN:
+ down_count = data[4] / devpriv->clock_ns;
+ break;
+ case TRIG_ROUND_UP:
+ down_count =
+ (data[4] + devpriv->clock_ns -
+ 1) / devpriv->clock_ns;
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
+ if (up_count * devpriv->clock_ns != data[2] ||
+ down_count * devpriv->clock_ns != data[4]) {
+ data[2] = up_count * devpriv->clock_ns;
+ data[4] = down_count * devpriv->clock_ns;
+ return -EAGAIN;
+ }
+ ni_writel(dev, MSeries_Cal_PWM_High_Time_Bits(up_count) |
+ MSeries_Cal_PWM_Low_Time_Bits(down_count),
+ M_Offset_Cal_PWM);
+ devpriv->pwm_up_count = up_count;
+ devpriv->pwm_down_count = down_count;
+ return 5;
+ break;
+ case INSN_CONFIG_GET_PWM_OUTPUT:
+ return ni_get_pwm_config(dev, data);
break;
- case INSN_CONFIG_GET_CLOCK_SRC:
- ni_get_freq_out_clock(dev, &data[1], &data[2]);
- return 3;
default:
+ return -EINVAL;
break;
}
- return -EINVAL;
+ return 0;
}
-static int ni_alloc_private(struct comedi_device *dev)
+static int ni_6143_pwm_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
- struct ni_private *devpriv;
-
- devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
- if (!devpriv)
- return -ENOMEM;
-
- spin_lock_init(&devpriv->window_lock);
- spin_lock_init(&devpriv->soft_reg_copy_lock);
- spin_lock_init(&devpriv->mite_channel_lock);
-
- return 0;
-};
-
-static int ni_E_init(struct comedi_device *dev)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- struct comedi_subdevice *s;
- unsigned j;
- enum ni_gpct_variant counter_variant;
- int ret;
-
- if (board->n_aochan > MAX_N_AO_CHAN) {
- printk("bug! n_aochan > MAX_N_AO_CHAN\n");
- return -EINVAL;
- }
-
- ret = comedi_alloc_subdevices(dev, NI_NUM_SUBDEVICES);
- if (ret)
- return ret;
-
- /* analog input subdevice */
-
- s = &dev->subdevices[NI_AI_SUBDEV];
- dev->read_subdev = s;
- if (board->n_adchan) {
- s->type = COMEDI_SUBD_AI;
- s->subdev_flags =
- SDF_READABLE | SDF_DIFF | SDF_DITHER | SDF_CMD_READ;
- if (board->reg_type != ni_reg_611x)
- s->subdev_flags |= SDF_GROUND | SDF_COMMON | SDF_OTHER;
- if (board->adbits > 16)
- s->subdev_flags |= SDF_LSAMPL;
- if (board->reg_type & ni_reg_m_series_mask)
- s->subdev_flags |= SDF_SOFT_CALIBRATED;
- s->n_chan = board->n_adchan;
- s->len_chanlist = 512;
- s->maxdata = (1 << board->adbits) - 1;
- s->range_table = ni_range_lkup[board->gainlkup];
- s->insn_read = &ni_ai_insn_read;
- s->insn_config = &ni_ai_insn_config;
- s->do_cmdtest = &ni_ai_cmdtest;
- s->do_cmd = &ni_ai_cmd;
- s->cancel = &ni_ai_reset;
- s->poll = &ni_ai_poll;
- s->munge = &ni_ai_munge;
-#ifdef PCIDMA
- s->async_dma_dir = DMA_FROM_DEVICE;
-#endif
- } else {
- s->type = COMEDI_SUBD_UNUSED;
- }
-
- /* analog output subdevice */
-
- s = &dev->subdevices[NI_AO_SUBDEV];
- if (board->n_aochan) {
- s->type = COMEDI_SUBD_AO;
- s->subdev_flags = SDF_WRITABLE | SDF_DEGLITCH | SDF_GROUND;
- if (board->reg_type & ni_reg_m_series_mask)
- s->subdev_flags |= SDF_SOFT_CALIBRATED;
- s->n_chan = board->n_aochan;
- s->maxdata = (1 << board->aobits) - 1;
- s->range_table = board->ao_range_table;
- s->insn_read = &ni_ao_insn_read;
- if (board->reg_type & ni_reg_6xxx_mask)
- s->insn_write = &ni_ao_insn_write_671x;
- else
- s->insn_write = &ni_ao_insn_write;
- s->insn_config = &ni_ao_insn_config;
-#ifdef PCIDMA
- if (board->n_aochan) {
- s->async_dma_dir = DMA_TO_DEVICE;
-#else
- if (board->ao_fifo_depth) {
-#endif
- dev->write_subdev = s;
- s->subdev_flags |= SDF_CMD_WRITE;
- s->do_cmd = &ni_ao_cmd;
- s->do_cmdtest = &ni_ao_cmdtest;
- s->len_chanlist = board->n_aochan;
- if ((board->reg_type & ni_reg_m_series_mask) == 0)
- s->munge = ni_ao_munge;
- }
- s->cancel = &ni_ao_reset;
- } else {
- s->type = COMEDI_SUBD_UNUSED;
- }
- if ((board->reg_type & ni_reg_67xx_mask))
- init_ao_67xx(dev, s);
-
- /* digital i/o subdevice */
-
- s = &dev->subdevices[NI_DIO_SUBDEV];
- s->type = COMEDI_SUBD_DIO;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->maxdata = 1;
- s->io_bits = 0; /* all bits input */
- s->range_table = &range_digital;
- s->n_chan = board->num_p0_dio_channels;
- if (board->reg_type & ni_reg_m_series_mask) {
- s->subdev_flags |=
- SDF_LSAMPL | SDF_CMD_WRITE /* | SDF_CMD_READ */;
- s->insn_bits = &ni_m_series_dio_insn_bits;
- s->insn_config = &ni_m_series_dio_insn_config;
- s->do_cmd = &ni_cdio_cmd;
- s->do_cmdtest = &ni_cdio_cmdtest;
- s->cancel = &ni_cdio_cancel;
- s->async_dma_dir = DMA_BIDIRECTIONAL;
- s->len_chanlist = s->n_chan;
-
- ni_writel(CDO_Reset_Bit | CDI_Reset_Bit, M_Offset_CDIO_Command);
- ni_writel(s->io_bits, M_Offset_DIO_Direction);
- } else {
- s->insn_bits = &ni_dio_insn_bits;
- s->insn_config = &ni_dio_insn_config;
- devpriv->dio_control = DIO_Pins_Dir(s->io_bits);
- ni_writew(devpriv->dio_control, DIO_Control_Register);
- }
-
- /* 8255 device */
- s = &dev->subdevices[NI_8255_DIO_SUBDEV];
- if (board->has_8255) {
- ret = subdev_8255_init(dev, s, ni_8255_callback,
- (unsigned long)dev);
- if (ret)
- return ret;
- } else {
- s->type = COMEDI_SUBD_UNUSED;
- }
-
- /* formerly general purpose counter/timer device, but no longer used */
- s = &dev->subdevices[NI_UNUSED_SUBDEV];
- s->type = COMEDI_SUBD_UNUSED;
-
- /* calibration subdevice -- ai and ao */
- s = &dev->subdevices[NI_CALIBRATION_SUBDEV];
- s->type = COMEDI_SUBD_CALIB;
- if (board->reg_type & ni_reg_m_series_mask) {
- /* internal PWM analog output used for AI nonlinearity calibration */
- s->subdev_flags = SDF_INTERNAL;
- s->insn_config = &ni_m_series_pwm_config;
- s->n_chan = 1;
- s->maxdata = 0;
- ni_writel(0x0, M_Offset_Cal_PWM);
- } else if (board->reg_type == ni_reg_6143) {
- /* internal PWM analog output used for AI nonlinearity calibration */
- s->subdev_flags = SDF_INTERNAL;
- s->insn_config = &ni_6143_pwm_config;
- s->n_chan = 1;
- s->maxdata = 0;
- } else {
- s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
- s->insn_read = &ni_calib_insn_read;
- s->insn_write = &ni_calib_insn_write;
- caldac_setup(dev, s);
- }
-
- /* EEPROM */
- s = &dev->subdevices[NI_EEPROM_SUBDEV];
- s->type = COMEDI_SUBD_MEMORY;
- s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
- s->maxdata = 0xff;
- if (board->reg_type & ni_reg_m_series_mask) {
- s->n_chan = M_SERIES_EEPROM_SIZE;
- s->insn_read = &ni_m_series_eeprom_insn_read;
- } else {
- s->n_chan = 512;
- s->insn_read = &ni_eeprom_insn_read;
- }
-
- /* PFI */
- s = &dev->subdevices[NI_PFI_DIO_SUBDEV];
- s->type = COMEDI_SUBD_DIO;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
- if (board->reg_type & ni_reg_m_series_mask) {
- unsigned i;
- s->n_chan = 16;
- ni_writew(s->state, M_Offset_PFI_DO);
- for (i = 0; i < NUM_PFI_OUTPUT_SELECT_REGS; ++i) {
- ni_writew(devpriv->pfi_output_select_reg[i],
- M_Offset_PFI_Output_Select(i + 1));
- }
- } else {
- s->n_chan = 10;
- }
- s->maxdata = 1;
- if (board->reg_type & ni_reg_m_series_mask)
- s->insn_bits = &ni_pfi_insn_bits;
- s->insn_config = &ni_pfi_insn_config;
- ni_set_bits(dev, IO_Bidirection_Pin_Register, ~0, 0);
-
- /* cs5529 calibration adc */
- s = &dev->subdevices[NI_CS5529_CALIBRATION_SUBDEV];
- if (board->reg_type & ni_reg_67xx_mask) {
- s->type = COMEDI_SUBD_AI;
- s->subdev_flags = SDF_READABLE | SDF_DIFF | SDF_INTERNAL;
- /* one channel for each analog output channel */
- s->n_chan = board->n_aochan;
- s->maxdata = (1 << 16) - 1;
- s->range_table = &range_unknown; /* XXX */
- s->insn_read = cs5529_ai_insn_read;
- s->insn_config = NULL;
- init_cs5529(dev);
- } else {
- s->type = COMEDI_SUBD_UNUSED;
- }
-
- /* Serial */
- s = &dev->subdevices[NI_SERIAL_SUBDEV];
- s->type = COMEDI_SUBD_SERIAL;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
- s->n_chan = 1;
- s->maxdata = 0xff;
- s->insn_config = ni_serial_insn_config;
- devpriv->serial_interval_ns = 0;
- devpriv->serial_hw_mode = 0;
-
- /* RTSI */
- s = &dev->subdevices[NI_RTSI_SUBDEV];
- s->type = COMEDI_SUBD_DIO;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
- s->n_chan = 8;
- s->maxdata = 1;
- s->insn_bits = ni_rtsi_insn_bits;
- s->insn_config = ni_rtsi_insn_config;
- ni_rtsi_init(dev);
-
- if (board->reg_type & ni_reg_m_series_mask)
- counter_variant = ni_gpct_variant_m_series;
- else
- counter_variant = ni_gpct_variant_e_series;
- devpriv->counter_dev = ni_gpct_device_construct(dev,
- &ni_gpct_write_register,
- &ni_gpct_read_register,
- counter_variant,
- NUM_GPCT);
- if (!devpriv->counter_dev)
- return -ENOMEM;
-
- /* General purpose counters */
- for (j = 0; j < NUM_GPCT; ++j) {
- s = &dev->subdevices[NI_GPCT_SUBDEV(j)];
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL;
- s->n_chan = 3;
- if (board->reg_type & ni_reg_m_series_mask)
- s->maxdata = 0xffffffff;
- else
- s->maxdata = 0xffffff;
- s->insn_read = ni_tio_insn_read;
- s->insn_write = ni_tio_insn_read;
- s->insn_config = ni_tio_insn_config;
-#ifdef PCIDMA
- s->subdev_flags |= SDF_CMD_READ /* | SDF_CMD_WRITE */;
- s->do_cmd = &ni_gpct_cmd;
- s->len_chanlist = 1;
- s->do_cmdtest = ni_tio_cmdtest;
- s->cancel = &ni_gpct_cancel;
- s->async_dma_dir = DMA_BIDIRECTIONAL;
-#endif
- s->private = &devpriv->counter_dev->counters[j];
-
- devpriv->counter_dev->counters[j].chip_index = 0;
- devpriv->counter_dev->counters[j].counter_index = j;
- ni_tio_init_counter(&devpriv->counter_dev->counters[j]);
- }
-
- /* Frequency output */
- s = &dev->subdevices[NI_FREQ_OUT_SUBDEV];
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
- s->n_chan = 1;
- s->maxdata = 0xf;
- s->insn_read = &ni_freq_out_insn_read;
- s->insn_write = &ni_freq_out_insn_write;
- s->insn_config = &ni_freq_out_insn_config;
-
- /* ai configuration */
- s = &dev->subdevices[NI_AI_SUBDEV];
- ni_ai_reset(dev, s);
- if ((board->reg_type & ni_reg_6xxx_mask) == 0) {
- /* BEAM is this needed for PCI-6143 ?? */
- devpriv->clock_and_fout =
- Slow_Internal_Time_Divide_By_2 |
- Slow_Internal_Timebase |
- Clock_To_Board_Divide_By_2 |
- Clock_To_Board |
- AI_Output_Divide_By_2 | AO_Output_Divide_By_2;
- } else {
- devpriv->clock_and_fout =
- Slow_Internal_Time_Divide_By_2 |
- Slow_Internal_Timebase |
- Clock_To_Board_Divide_By_2 | Clock_To_Board;
- }
- devpriv->stc_writew(dev, devpriv->clock_and_fout,
- Clock_and_FOUT_Register);
-
- /* analog output configuration */
- s = &dev->subdevices[NI_AO_SUBDEV];
- ni_ao_reset(dev, s);
-
- if (dev->irq) {
- devpriv->stc_writew(dev,
- (IRQ_POLARITY ? Interrupt_Output_Polarity :
- 0) | (Interrupt_Output_On_3_Pins & 0) |
- Interrupt_A_Enable | Interrupt_B_Enable |
- Interrupt_A_Output_Select(interrupt_pin
- (dev->irq)) |
- Interrupt_B_Output_Select(interrupt_pin
- (dev->irq)),
- Interrupt_Control_Register);
- }
-
- /* DMA setup */
- ni_writeb(devpriv->ai_ao_select_reg, AI_AO_Select);
- ni_writeb(devpriv->g0_g1_select_reg, G0_G1_Select);
-
- if (board->reg_type & ni_reg_6xxx_mask) {
- ni_writeb(0, Magic_611x);
- } else if (board->reg_type & ni_reg_m_series_mask) {
- int channel;
- for (channel = 0; channel < board->n_aochan; ++channel) {
- ni_writeb(0xf, M_Offset_AO_Waveform_Order(channel));
- ni_writeb(0x0,
- M_Offset_AO_Reference_Attenuation(channel));
- }
- ni_writeb(0x0, M_Offset_AO_Calibration);
- }
-
- return 0;
-}
-
-static int ni_8255_callback(int dir, int port, int data, unsigned long arg)
-{
- struct comedi_device *dev = (struct comedi_device *)arg;
- struct ni_private *devpriv __maybe_unused = dev->private;
-
- if (dir) {
- ni_writeb(data, Port_A + 2 * port);
- return 0;
- } else {
- return ni_readb(Port_A + 2 * port);
- }
-}
-
-/*
- presents the EEPROM as a subdevice
-*/
-
-static int ni_eeprom_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- data[0] = ni_read_eeprom(dev, CR_CHAN(insn->chanspec));
-
- return 1;
-}
-
-/*
- reads bytes out of eeprom
-*/
-
-static int ni_read_eeprom(struct comedi_device *dev, int addr)
-{
- struct ni_private *devpriv __maybe_unused = dev->private;
- int bit;
- int bitstring;
-
- bitstring = 0x0300 | ((addr & 0x100) << 3) | (addr & 0xff);
- ni_writeb(0x04, Serial_Command);
- for (bit = 0x8000; bit; bit >>= 1) {
- ni_writeb(0x04 | ((bit & bitstring) ? 0x02 : 0),
- Serial_Command);
- ni_writeb(0x05 | ((bit & bitstring) ? 0x02 : 0),
- Serial_Command);
- }
- bitstring = 0;
- for (bit = 0x80; bit; bit >>= 1) {
- ni_writeb(0x04, Serial_Command);
- ni_writeb(0x05, Serial_Command);
- bitstring |= ((ni_readb(XXX_Status) & PROMOUT) ? bit : 0);
- }
- ni_writeb(0x00, Serial_Command);
-
- return bitstring;
-}
-
-static int ni_m_series_eeprom_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct ni_private *devpriv = dev->private;
-
- data[0] = devpriv->eeprom_buffer[CR_CHAN(insn->chanspec)];
-
- return 1;
-}
-
-static int ni_get_pwm_config(struct comedi_device *dev, unsigned int *data)
-{
- struct ni_private *devpriv = dev->private;
-
- data[1] = devpriv->pwm_up_count * devpriv->clock_ns;
- data[2] = devpriv->pwm_down_count * devpriv->clock_ns;
- return 3;
-}
-
-static int ni_m_series_pwm_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- struct ni_private *devpriv = dev->private;
- unsigned up_count, down_count;
+ struct ni_private *devpriv = dev->private;
+ unsigned up_count, down_count;
switch (data[0]) {
case INSN_CONFIG_PWM_OUTPUT:
data[4] = down_count * devpriv->clock_ns;
return -EAGAIN;
}
- ni_writel(MSeries_Cal_PWM_High_Time_Bits(up_count) |
- MSeries_Cal_PWM_Low_Time_Bits(down_count),
- M_Offset_Cal_PWM);
+ ni_writel(dev, up_count, Calibration_HighTime_6143);
devpriv->pwm_up_count = up_count;
+ ni_writel(dev, down_count, Calibration_LowTime_6143);
devpriv->pwm_down_count = down_count;
return 5;
break;
case INSN_CONFIG_GET_PWM_OUTPUT:
return ni_get_pwm_config(dev, data);
- break;
default:
return -EINVAL;
break;
return 0;
}
-static int ni_6143_pwm_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int pack_mb88341(int addr, int val, int *bitstring)
{
- struct ni_private *devpriv = dev->private;
- unsigned up_count, down_count;
+ /*
+ Fujitsu MB 88341
+ Note that address bits are reversed. Thanks to
+ Ingo Keen for noticing this.
- switch (data[0]) {
- case INSN_CONFIG_PWM_OUTPUT:
- switch (data[1]) {
- case TRIG_ROUND_NEAREST:
- up_count =
- (data[2] +
- devpriv->clock_ns / 2) / devpriv->clock_ns;
- break;
- case TRIG_ROUND_DOWN:
- up_count = data[2] / devpriv->clock_ns;
- break;
- case TRIG_ROUND_UP:
- up_count =
- (data[2] + devpriv->clock_ns -
- 1) / devpriv->clock_ns;
- break;
- default:
- return -EINVAL;
- break;
- }
- switch (data[3]) {
- case TRIG_ROUND_NEAREST:
- down_count =
- (data[4] +
- devpriv->clock_ns / 2) / devpriv->clock_ns;
- break;
- case TRIG_ROUND_DOWN:
- down_count = data[4] / devpriv->clock_ns;
- break;
- case TRIG_ROUND_UP:
- down_count =
- (data[4] + devpriv->clock_ns -
- 1) / devpriv->clock_ns;
- break;
- default:
- return -EINVAL;
- break;
- }
- if (up_count * devpriv->clock_ns != data[2] ||
- down_count * devpriv->clock_ns != data[4]) {
- data[2] = up_count * devpriv->clock_ns;
- data[4] = down_count * devpriv->clock_ns;
- return -EAGAIN;
- }
- ni_writel(up_count, Calibration_HighTime_6143);
- devpriv->pwm_up_count = up_count;
- ni_writel(down_count, Calibration_LowTime_6143);
- devpriv->pwm_down_count = down_count;
- return 5;
- break;
- case INSN_CONFIG_GET_PWM_OUTPUT:
- return ni_get_pwm_config(dev, data);
- default:
- return -EINVAL;
- break;
- }
- return 0;
+ Note also that the 88341 expects address values from
+ 1-12, whereas we use channel numbers 0-11. The NI
+ docs use 1-12, also, so be careful here.
+ */
+ addr++;
+ *bitstring = ((addr & 0x1) << 11) |
+ ((addr & 0x2) << 9) |
+ ((addr & 0x4) << 7) | ((addr & 0x8) << 5) | (val & 0xff);
+ return 12;
}
-static void ni_write_caldac(struct comedi_device *dev, int addr, int val);
-/*
- calibration subdevice
-*/
-static int ni_calib_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int pack_dac8800(int addr, int val, int *bitstring)
{
- ni_write_caldac(dev, CR_CHAN(insn->chanspec), data[0]);
-
- return 1;
+ *bitstring = ((addr & 0x7) << 8) | (val & 0xff);
+ return 11;
}
-static int ni_calib_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int pack_dac8043(int addr, int val, int *bitstring)
{
- struct ni_private *devpriv = dev->private;
+ *bitstring = val & 0xfff;
+ return 12;
+}
- data[0] = devpriv->caldacs[CR_CHAN(insn->chanspec)];
+static int pack_ad8522(int addr, int val, int *bitstring)
+{
+ *bitstring = (val & 0xfff) | (addr ? 0xc000 : 0xa000);
+ return 16;
+}
- return 1;
+static int pack_ad8804(int addr, int val, int *bitstring)
+{
+ *bitstring = ((addr & 0xf) << 8) | (val & 0xff);
+ return 12;
}
-static int pack_mb88341(int addr, int val, int *bitstring);
-static int pack_dac8800(int addr, int val, int *bitstring);
-static int pack_dac8043(int addr, int val, int *bitstring);
-static int pack_ad8522(int addr, int val, int *bitstring);
-static int pack_ad8804(int addr, int val, int *bitstring);
-static int pack_ad8842(int addr, int val, int *bitstring);
+static int pack_ad8842(int addr, int val, int *bitstring)
+{
+ *bitstring = ((addr + 1) << 8) | (val & 0xff);
+ return 12;
+}
struct caldac_struct {
int n_chans;
[ad8804_debug] = {16, 8, pack_ad8804},
};
+static void ni_write_caldac(struct comedi_device *dev, int addr, int val)
+{
+ const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
+ unsigned int loadbit = 0, bits = 0, bit, bitstring = 0;
+ int i;
+ int type;
+
+ /* printk("ni_write_caldac: chan=%d val=%d\n",addr,val); */
+ if (devpriv->caldacs[addr] == val)
+ return;
+ devpriv->caldacs[addr] = val;
+
+ for (i = 0; i < 3; i++) {
+ type = board->caldac[i];
+ if (type == caldac_none)
+ break;
+ if (addr < caldacs[type].n_chans) {
+ bits = caldacs[type].packbits(addr, val, &bitstring);
+ loadbit = SerDacLd(i);
+ /* printk("caldac: using i=%d addr=%d %x\n",i,addr,bitstring); */
+ break;
+ }
+ addr -= caldacs[type].n_chans;
+ }
+
+ for (bit = 1 << (bits - 1); bit; bit >>= 1) {
+ ni_writeb(dev, ((bit & bitstring) ? 0x02 : 0), Serial_Command);
+ udelay(1);
+ ni_writeb(dev, 1 | ((bit & bitstring) ? 0x02 : 0),
+ Serial_Command);
+ udelay(1);
+ }
+ ni_writeb(dev, loadbit, Serial_Command);
+ udelay(1);
+ ni_writeb(dev, 0, Serial_Command);
+}
+
+static int ni_calib_insn_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ ni_write_caldac(dev, CR_CHAN(insn->chanspec), data[0]);
+
+ return 1;
+}
+
+static int ni_calib_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct ni_private *devpriv = dev->private;
+
+ data[0] = devpriv->caldacs[CR_CHAN(insn->chanspec)];
+
+ return 1;
+}
+
static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s)
{
const struct ni_board_struct *board = comedi_board(dev);
}
}
-static void ni_write_caldac(struct comedi_device *dev, int addr, int val)
+static int ni_read_eeprom(struct comedi_device *dev, int addr)
+{
+ int bit;
+ int bitstring;
+
+ bitstring = 0x0300 | ((addr & 0x100) << 3) | (addr & 0xff);
+ ni_writeb(dev, 0x04, Serial_Command);
+ for (bit = 0x8000; bit; bit >>= 1) {
+ ni_writeb(dev, 0x04 | ((bit & bitstring) ? 0x02 : 0),
+ Serial_Command);
+ ni_writeb(dev, 0x05 | ((bit & bitstring) ? 0x02 : 0),
+ Serial_Command);
+ }
+ bitstring = 0;
+ for (bit = 0x80; bit; bit >>= 1) {
+ ni_writeb(dev, 0x04, Serial_Command);
+ ni_writeb(dev, 0x05, Serial_Command);
+ bitstring |= ((ni_readb(dev, XXX_Status) & PROMOUT) ? bit : 0);
+ }
+ ni_writeb(dev, 0x00, Serial_Command);
+
+ return bitstring;
+}
+
+static int ni_eeprom_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ data[0] = ni_read_eeprom(dev, CR_CHAN(insn->chanspec));
+
+ return 1;
+}
+
+static int ni_m_series_eeprom_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
- const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
- unsigned int loadbit = 0, bits = 0, bit, bitstring = 0;
- int i;
- int type;
- /* printk("ni_write_caldac: chan=%d val=%d\n",addr,val); */
- if (devpriv->caldacs[addr] == val)
- return;
- devpriv->caldacs[addr] = val;
+ data[0] = devpriv->eeprom_buffer[CR_CHAN(insn->chanspec)];
- for (i = 0; i < 3; i++) {
- type = board->caldac[i];
- if (type == caldac_none)
- break;
- if (addr < caldacs[type].n_chans) {
- bits = caldacs[type].packbits(addr, val, &bitstring);
- loadbit = SerDacLd(i);
- /* printk("caldac: using i=%d addr=%d %x\n",i,addr,bitstring); */
- break;
- }
- addr -= caldacs[type].n_chans;
- }
+ return 1;
+}
- for (bit = 1 << (bits - 1); bit; bit >>= 1) {
- ni_writeb(((bit & bitstring) ? 0x02 : 0), Serial_Command);
- udelay(1);
- ni_writeb(1 | ((bit & bitstring) ? 0x02 : 0), Serial_Command);
- udelay(1);
+static unsigned ni_old_get_pfi_routing(struct comedi_device *dev,
+ unsigned chan)
+{
+ /* pre-m-series boards have fixed signals on pfi pins */
+ switch (chan) {
+ case 0:
+ return NI_PFI_OUTPUT_AI_START1;
+ break;
+ case 1:
+ return NI_PFI_OUTPUT_AI_START2;
+ break;
+ case 2:
+ return NI_PFI_OUTPUT_AI_CONVERT;
+ break;
+ case 3:
+ return NI_PFI_OUTPUT_G_SRC1;
+ break;
+ case 4:
+ return NI_PFI_OUTPUT_G_GATE1;
+ break;
+ case 5:
+ return NI_PFI_OUTPUT_AO_UPDATE_N;
+ break;
+ case 6:
+ return NI_PFI_OUTPUT_AO_START1;
+ break;
+ case 7:
+ return NI_PFI_OUTPUT_AI_START_PULSE;
+ break;
+ case 8:
+ return NI_PFI_OUTPUT_G_SRC0;
+ break;
+ case 9:
+ return NI_PFI_OUTPUT_G_GATE0;
+ break;
+ default:
+ printk("%s: bug, unhandled case in switch.\n", __func__);
+ break;
}
- ni_writeb(loadbit, Serial_Command);
- udelay(1);
- ni_writeb(0, Serial_Command);
+ return 0;
}
-static int pack_mb88341(int addr, int val, int *bitstring)
+static int ni_old_set_pfi_routing(struct comedi_device *dev,
+ unsigned chan, unsigned source)
{
- /*
- Fujitsu MB 88341
- Note that address bits are reversed. Thanks to
- Ingo Keen for noticing this.
-
- Note also that the 88341 expects address values from
- 1-12, whereas we use channel numbers 0-11. The NI
- docs use 1-12, also, so be careful here.
- */
- addr++;
- *bitstring = ((addr & 0x1) << 11) |
- ((addr & 0x2) << 9) |
- ((addr & 0x4) << 7) | ((addr & 0x8) << 5) | (val & 0xff);
- return 12;
+ /* pre-m-series boards have fixed signals on pfi pins */
+ if (source != ni_old_get_pfi_routing(dev, chan))
+ return -EINVAL;
+ return 2;
}
-static int pack_dac8800(int addr, int val, int *bitstring)
+static unsigned ni_m_series_get_pfi_routing(struct comedi_device *dev,
+ unsigned chan)
{
- *bitstring = ((addr & 0x7) << 8) | (val & 0xff);
- return 11;
+ struct ni_private *devpriv = dev->private;
+ const unsigned array_offset = chan / 3;
+
+ return MSeries_PFI_Output_Select_Source(chan,
+ devpriv->pfi_output_select_reg[array_offset]);
}
-static int pack_dac8043(int addr, int val, int *bitstring)
+static int ni_m_series_set_pfi_routing(struct comedi_device *dev,
+ unsigned chan, unsigned source)
{
- *bitstring = val & 0xfff;
- return 12;
+ struct ni_private *devpriv = dev->private;
+ unsigned pfi_reg_index;
+ unsigned array_offset;
+
+ if ((source & 0x1f) != source)
+ return -EINVAL;
+ pfi_reg_index = 1 + chan / 3;
+ array_offset = pfi_reg_index - 1;
+ devpriv->pfi_output_select_reg[array_offset] &=
+ ~MSeries_PFI_Output_Select_Mask(chan);
+ devpriv->pfi_output_select_reg[array_offset] |=
+ MSeries_PFI_Output_Select_Bits(chan, source);
+ ni_writew(dev, devpriv->pfi_output_select_reg[array_offset],
+ M_Offset_PFI_Output_Select(pfi_reg_index));
+ return 2;
}
-static int pack_ad8522(int addr, int val, int *bitstring)
+static unsigned ni_get_pfi_routing(struct comedi_device *dev, unsigned chan)
{
- *bitstring = (val & 0xfff) | (addr ? 0xc000 : 0xa000);
- return 16;
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->is_m_series)
+ return ni_m_series_get_pfi_routing(dev, chan);
+ else
+ return ni_old_get_pfi_routing(dev, chan);
}
-static int pack_ad8804(int addr, int val, int *bitstring)
+static int ni_set_pfi_routing(struct comedi_device *dev, unsigned chan,
+ unsigned source)
{
- *bitstring = ((addr & 0xf) << 8) | (val & 0xff);
- return 12;
+ struct ni_private *devpriv = dev->private;
+
+ if (devpriv->is_m_series)
+ return ni_m_series_set_pfi_routing(dev, chan, source);
+ else
+ return ni_old_set_pfi_routing(dev, chan, source);
}
-static int pack_ad8842(int addr, int val, int *bitstring)
+static int ni_config_filter(struct comedi_device *dev,
+ unsigned pfi_channel,
+ enum ni_pfi_filter_select filter)
{
- *bitstring = ((addr + 1) << 8) | (val & 0xff);
- return 12;
+ struct ni_private *devpriv = dev->private;
+ unsigned bits;
+
+ if (!devpriv->is_m_series)
+ return -ENOTSUPP;
+
+ bits = ni_readl(dev, M_Offset_PFI_Filter);
+ bits &= ~MSeries_PFI_Filter_Select_Mask(pfi_channel);
+ bits |= MSeries_PFI_Filter_Select_Bits(pfi_channel, filter);
+ ni_writel(dev, bits, M_Offset_PFI_Filter);
+ return 0;
}
-#if 0
-/*
- * Read the GPCTs current value.
- */
-static int GPCT_G_Watch(struct comedi_device *dev, int chan)
+static int ni_pfi_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
- unsigned int hi1, hi2, lo;
-
- devpriv->gpct_command[chan] &= ~G_Save_Trace;
- devpriv->stc_writew(dev, devpriv->gpct_command[chan],
- G_Command_Register(chan));
+ struct ni_private *devpriv = dev->private;
+ unsigned int chan;
- devpriv->gpct_command[chan] |= G_Save_Trace;
- devpriv->stc_writew(dev, devpriv->gpct_command[chan],
- G_Command_Register(chan));
+ if (insn->n < 1)
+ return -EINVAL;
- /* This procedure is used because the two registers cannot
- * be read atomically. */
- do {
- hi1 = devpriv->stc_readw(dev, G_Save_Register_High(chan));
- lo = devpriv->stc_readw(dev, G_Save_Register_Low(chan));
- hi2 = devpriv->stc_readw(dev, G_Save_Register_High(chan));
- } while (hi1 != hi2);
+ chan = CR_CHAN(insn->chanspec);
- return (hi1 << 16) | lo;
+ switch (data[0]) {
+ case COMEDI_OUTPUT:
+ ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 1);
+ break;
+ case COMEDI_INPUT:
+ ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 0);
+ break;
+ case INSN_CONFIG_DIO_QUERY:
+ data[1] =
+ (devpriv->io_bidirection_pin_reg & (1 << chan)) ?
+ COMEDI_OUTPUT : COMEDI_INPUT;
+ return 0;
+ break;
+ case INSN_CONFIG_SET_ROUTING:
+ return ni_set_pfi_routing(dev, chan, data[1]);
+ break;
+ case INSN_CONFIG_GET_ROUTING:
+ data[1] = ni_get_pfi_routing(dev, chan);
+ break;
+ case INSN_CONFIG_FILTER:
+ return ni_config_filter(dev, chan, data[1]);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
}
-static void GPCT_Reset(struct comedi_device *dev, int chan)
+static int ni_pfi_insn_bits(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
- int temp_ack_reg = 0;
+ struct ni_private *devpriv = dev->private;
- /* printk("GPCT_Reset..."); */
- devpriv->gpct_cur_operation[chan] = GPCT_RESET;
+ if (!devpriv->is_m_series)
+ return -ENOTSUPP;
- switch (chan) {
- case 0:
- devpriv->stc_writew(dev, G0_Reset, Joint_Reset_Register);
- ni_set_bits(dev, Interrupt_A_Enable_Register,
- G0_TC_Interrupt_Enable, 0);
- ni_set_bits(dev, Interrupt_A_Enable_Register,
- G0_Gate_Interrupt_Enable, 0);
- temp_ack_reg |= G0_Gate_Error_Confirm;
- temp_ack_reg |= G0_TC_Error_Confirm;
- temp_ack_reg |= G0_TC_Interrupt_Ack;
- temp_ack_reg |= G0_Gate_Interrupt_Ack;
- devpriv->stc_writew(dev, temp_ack_reg,
- Interrupt_A_Ack_Register);
+ if (comedi_dio_update_state(s, data))
+ ni_writew(dev, s->state, M_Offset_PFI_DO);
- /* problem...this interferes with the other ctr... */
- devpriv->an_trig_etc_reg |= GPFO_0_Output_Enable;
- devpriv->stc_writew(dev, devpriv->an_trig_etc_reg,
- Analog_Trigger_Etc_Register);
- break;
- case 1:
- devpriv->stc_writew(dev, G1_Reset, Joint_Reset_Register);
- ni_set_bits(dev, Interrupt_B_Enable_Register,
- G1_TC_Interrupt_Enable, 0);
- ni_set_bits(dev, Interrupt_B_Enable_Register,
- G0_Gate_Interrupt_Enable, 0);
- temp_ack_reg |= G1_Gate_Error_Confirm;
- temp_ack_reg |= G1_TC_Error_Confirm;
- temp_ack_reg |= G1_TC_Interrupt_Ack;
- temp_ack_reg |= G1_Gate_Interrupt_Ack;
- devpriv->stc_writew(dev, temp_ack_reg,
- Interrupt_B_Ack_Register);
+ data[1] = ni_readw(dev, M_Offset_PFI_DI);
- devpriv->an_trig_etc_reg |= GPFO_1_Output_Enable;
- devpriv->stc_writew(dev, devpriv->an_trig_etc_reg,
- Analog_Trigger_Etc_Register);
- break;
+ return insn->n;
+}
+
+static int cs5529_wait_for_idle(struct comedi_device *dev)
+{
+ unsigned short status;
+ const int timeout = HZ;
+ int i;
+
+ for (i = 0; i < timeout; i++) {
+ status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx);
+ if ((status & CSS_ADC_BUSY) == 0)
+ break;
+ set_current_state(TASK_INTERRUPTIBLE);
+ if (schedule_timeout(1))
+ return -EIO;
+ }
+/* printk("looped %i times waiting for idle\n", i); */
+ if (i == timeout) {
+ printk("%s: %s: timeout\n", __FILE__, __func__);
+ return -ETIME;
}
+ return 0;
+}
- devpriv->gpct_mode[chan] = 0;
- devpriv->gpct_input_select[chan] = 0;
- devpriv->gpct_command[chan] = 0;
+static void cs5529_command(struct comedi_device *dev, unsigned short value)
+{
+ static const int timeout = 100;
+ int i;
- devpriv->gpct_command[chan] |= G_Synchronized_Gate;
+ ni_ao_win_outw(dev, value, CAL_ADC_Command_67xx);
+ /* give time for command to start being serially clocked into cs5529.
+ * this insures that the CSS_ADC_BUSY bit will get properly
+ * set before we exit this function.
+ */
+ for (i = 0; i < timeout; i++) {
+ if ((ni_ao_win_inw(dev, CAL_ADC_Status_67xx) & CSS_ADC_BUSY))
+ break;
+ udelay(1);
+ }
+/* printk("looped %i times writing command to cs5529\n", i); */
+ if (i == timeout)
+ comedi_error(dev, "possible problem - never saw adc go busy?");
+}
- devpriv->stc_writew(dev, devpriv->gpct_mode[chan],
- G_Mode_Register(chan));
- devpriv->stc_writew(dev, devpriv->gpct_input_select[chan],
- G_Input_Select_Register(chan));
- devpriv->stc_writew(dev, 0, G_Autoincrement_Register(chan));
+static int cs5529_do_conversion(struct comedi_device *dev,
+ unsigned short *data)
+{
+ int retval;
+ unsigned short status;
- /* printk("exit GPCT_Reset\n"); */
+ cs5529_command(dev, CSCMD_COMMAND | CSCMD_SINGLE_CONVERSION);
+ retval = cs5529_wait_for_idle(dev);
+ if (retval) {
+ comedi_error(dev,
+ "timeout or signal in cs5529_do_conversion()");
+ return -ETIME;
+ }
+ status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx);
+ if (status & CSS_OSC_DETECT) {
+ printk
+ ("ni_mio_common: cs5529 conversion error, status CSS_OSC_DETECT\n");
+ return -EIO;
+ }
+ if (status & CSS_OVERRANGE) {
+ printk
+ ("ni_mio_common: cs5529 conversion error, overrange (ignoring)\n");
+ }
+ if (data) {
+ *data = ni_ao_win_inw(dev, CAL_ADC_Data_67xx);
+ /* cs5529 returns 16 bit signed data in bipolar mode */
+ *data ^= (1 << 15);
+ }
+ return 0;
}
-#endif
+static int cs5529_ai_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ int n, retval;
+ unsigned short sample;
+ unsigned int channel_select;
+ const unsigned int INTERNAL_REF = 0x1000;
-#ifdef PCIDMA
-static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
-{
- struct ni_gpct *counter = s->private;
- int retval;
+ /* Set calibration adc source. Docs lie, reference select bits 8 to 11
+ * do nothing. bit 12 seems to chooses internal reference voltage, bit
+ * 13 causes the adc input to go overrange (maybe reads external reference?) */
+ if (insn->chanspec & CR_ALT_SOURCE)
+ channel_select = INTERNAL_REF;
+ else
+ channel_select = CR_CHAN(insn->chanspec);
+ ni_ao_win_outw(dev, channel_select, AO_Calibration_Channel_Select_67xx);
- retval = ni_request_gpct_mite_channel(dev, counter->counter_index,
- COMEDI_INPUT);
- if (retval) {
- comedi_error(dev,
- "no dma channel available for use by counter");
- return retval;
+ for (n = 0; n < insn->n; n++) {
+ retval = cs5529_do_conversion(dev, &sample);
+ if (retval < 0)
+ return retval;
+ data[n] = sample;
}
- ni_tio_acknowledge_and_confirm(counter, NULL, NULL, NULL, NULL);
- ni_e_series_enable_second_irq(dev, counter->counter_index, 1);
+ return insn->n;
+}
- return ni_tio_cmd(dev, s);
+static void cs5529_config_write(struct comedi_device *dev, unsigned int value,
+ unsigned int reg_select_bits)
+{
+ ni_ao_win_outw(dev, ((value >> 16) & 0xff),
+ CAL_ADC_Config_Data_High_Word_67xx);
+ ni_ao_win_outw(dev, (value & 0xffff),
+ CAL_ADC_Config_Data_Low_Word_67xx);
+ reg_select_bits &= CSCMD_REGISTER_SELECT_MASK;
+ cs5529_command(dev, CSCMD_COMMAND | reg_select_bits);
+ if (cs5529_wait_for_idle(dev))
+ comedi_error(dev, "time or signal in cs5529_config_write()");
}
-#endif
-#ifdef PCIDMA
-static int ni_gpct_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
+static int init_cs5529(struct comedi_device *dev)
{
- struct ni_gpct *counter = s->private;
- int retval;
+ unsigned int config_bits =
+ CSCFG_PORT_MODE | CSCFG_WORD_RATE_2180_CYCLES;
- retval = ni_tio_cancel(counter);
- ni_e_series_enable_second_irq(dev, counter->counter_index, 0);
- ni_release_gpct_mite_channel(dev, counter->counter_index);
- return retval;
-}
+#if 1
+ /* do self-calibration */
+ cs5529_config_write(dev, config_bits | CSCFG_SELF_CAL_OFFSET_GAIN,
+ CSCMD_CONFIG_REGISTER);
+ /* need to force a conversion for calibration to run */
+ cs5529_do_conversion(dev, NULL);
+#else
+ /* force gain calibration to 1 */
+ cs5529_config_write(dev, 0x400000, CSCMD_GAIN_REGISTER);
+ cs5529_config_write(dev, config_bits | CSCFG_SELF_CAL_OFFSET,
+ CSCMD_CONFIG_REGISTER);
+ if (cs5529_wait_for_idle(dev))
+ comedi_error(dev, "timeout or signal in init_cs5529()\n");
#endif
+ return 0;
+}
/*
- *
- * Programmable Function Inputs
- *
+ * Find best multiplier/divider to try and get the PLL running at 80 MHz
+ * given an arbitrary frequency input clock.
*/
-
-static int ni_m_series_set_pfi_routing(struct comedi_device *dev, unsigned chan,
- unsigned source)
+static int ni_mseries_get_pll_parameters(unsigned reference_period_ns,
+ unsigned *freq_divider,
+ unsigned *freq_multiplier,
+ unsigned *actual_period_ns)
{
- struct ni_private *devpriv = dev->private;
- unsigned pfi_reg_index;
- unsigned array_offset;
+ unsigned div;
+ unsigned best_div = 1;
+ static const unsigned max_div = 0x10;
+ unsigned mult;
+ unsigned best_mult = 1;
+ static const unsigned max_mult = 0x100;
+ static const unsigned pico_per_nano = 1000;
- if ((source & 0x1f) != source)
- return -EINVAL;
- pfi_reg_index = 1 + chan / 3;
- array_offset = pfi_reg_index - 1;
- devpriv->pfi_output_select_reg[array_offset] &=
- ~MSeries_PFI_Output_Select_Mask(chan);
- devpriv->pfi_output_select_reg[array_offset] |=
- MSeries_PFI_Output_Select_Bits(chan, source);
- ni_writew(devpriv->pfi_output_select_reg[array_offset],
- M_Offset_PFI_Output_Select(pfi_reg_index));
- return 2;
+ const unsigned reference_picosec = reference_period_ns * pico_per_nano;
+ /* m-series wants the phased-locked loop to output 80MHz, which is divided by 4 to
+ * 20 MHz for most timing clocks */
+ static const unsigned target_picosec = 12500;
+ static const unsigned fudge_factor_80_to_20Mhz = 4;
+ int best_period_picosec = 0;
+ for (div = 1; div <= max_div; ++div) {
+ for (mult = 1; mult <= max_mult; ++mult) {
+ unsigned new_period_ps =
+ (reference_picosec * div) / mult;
+ if (abs(new_period_ps - target_picosec) <
+ abs(best_period_picosec - target_picosec)) {
+ best_period_picosec = new_period_ps;
+ best_div = div;
+ best_mult = mult;
+ }
+ }
+ }
+ if (best_period_picosec == 0) {
+ printk("%s: bug, failed to find pll parameters\n", __func__);
+ return -EIO;
+ }
+ *freq_divider = best_div;
+ *freq_multiplier = best_mult;
+ *actual_period_ns =
+ (best_period_picosec * fudge_factor_80_to_20Mhz +
+ (pico_per_nano / 2)) / pico_per_nano;
+ return 0;
}
-static int ni_old_set_pfi_routing(struct comedi_device *dev, unsigned chan,
- unsigned source)
+static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
+ unsigned source, unsigned period_ns)
{
- /* pre-m-series boards have fixed signals on pfi pins */
- if (source != ni_old_get_pfi_routing(dev, chan))
+ struct ni_private *devpriv = dev->private;
+ static const unsigned min_period_ns = 50;
+ static const unsigned max_period_ns = 1000;
+ static const unsigned timeout = 1000;
+ unsigned pll_control_bits;
+ unsigned freq_divider;
+ unsigned freq_multiplier;
+ unsigned i;
+ int retval;
+
+ if (source == NI_MIO_PLL_PXI10_CLOCK)
+ period_ns = 100;
+ /* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */
+ if (period_ns < min_period_ns || period_ns > max_period_ns) {
+ printk
+ ("%s: you must specify an input clock frequency between %i and %i nanosec "
+ "for the phased-lock loop.\n", __func__,
+ min_period_ns, max_period_ns);
return -EINVAL;
- return 2;
+ }
+ devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
+ ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
+ RTSI_Trig_Direction_Register);
+ pll_control_bits =
+ MSeries_PLL_Enable_Bit | MSeries_PLL_VCO_Mode_75_150MHz_Bits;
+ devpriv->clock_and_fout2 |=
+ MSeries_Timebase1_Select_Bit | MSeries_Timebase3_Select_Bit;
+ devpriv->clock_and_fout2 &= ~MSeries_PLL_In_Source_Select_Mask;
+ switch (source) {
+ case NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK:
+ devpriv->clock_and_fout2 |=
+ MSeries_PLL_In_Source_Select_Star_Trigger_Bits;
+ retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,
+ &freq_multiplier,
+ &devpriv->clock_ns);
+ if (retval < 0)
+ return retval;
+ break;
+ case NI_MIO_PLL_PXI10_CLOCK:
+ /* pxi clock is 10MHz */
+ devpriv->clock_and_fout2 |=
+ MSeries_PLL_In_Source_Select_PXI_Clock10;
+ retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,
+ &freq_multiplier,
+ &devpriv->clock_ns);
+ if (retval < 0)
+ return retval;
+ break;
+ default:
+ {
+ unsigned rtsi_channel;
+ static const unsigned max_rtsi_channel = 7;
+ for (rtsi_channel = 0; rtsi_channel <= max_rtsi_channel;
+ ++rtsi_channel) {
+ if (source ==
+ NI_MIO_PLL_RTSI_CLOCK(rtsi_channel)) {
+ devpriv->clock_and_fout2 |=
+ MSeries_PLL_In_Source_Select_RTSI_Bits
+ (rtsi_channel);
+ break;
+ }
+ }
+ if (rtsi_channel > max_rtsi_channel)
+ return -EINVAL;
+ retval = ni_mseries_get_pll_parameters(period_ns,
+ &freq_divider,
+ &freq_multiplier,
+ &devpriv->
+ clock_ns);
+ if (retval < 0)
+ return retval;
+ }
+ break;
+ }
+ ni_writew(dev, devpriv->clock_and_fout2, M_Offset_Clock_and_Fout2);
+ pll_control_bits |=
+ MSeries_PLL_Divisor_Bits(freq_divider) |
+ MSeries_PLL_Multiplier_Bits(freq_multiplier);
+
+ /* printk("using divider=%i, multiplier=%i for PLL. pll_control_bits = 0x%x\n",
+ * freq_divider, freq_multiplier, pll_control_bits); */
+ /* printk("clock_ns=%d\n", devpriv->clock_ns); */
+ ni_writew(dev, pll_control_bits, M_Offset_PLL_Control);
+ devpriv->clock_source = source;
+ /* it seems to typically take a few hundred microseconds for PLL to lock */
+ for (i = 0; i < timeout; ++i) {
+ if (ni_readw(dev, M_Offset_PLL_Status) & MSeries_PLL_Locked_Bit)
+ break;
+ udelay(1);
+ }
+ if (i == timeout) {
+ printk
+ ("%s: timed out waiting for PLL to lock to reference clock source %i with period %i ns.\n",
+ __func__, source, period_ns);
+ return -ETIMEDOUT;
+ }
+ return 3;
}
-static int ni_set_pfi_routing(struct comedi_device *dev, unsigned chan,
- unsigned source)
+static int ni_set_master_clock(struct comedi_device *dev,
+ unsigned source, unsigned period_ns)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv = dev->private;
- if (board->reg_type & ni_reg_m_series_mask)
- return ni_m_series_set_pfi_routing(dev, chan, source);
- else
- return ni_old_set_pfi_routing(dev, chan, source);
+ if (source == NI_MIO_INTERNAL_CLOCK) {
+ devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
+ ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
+ RTSI_Trig_Direction_Register);
+ devpriv->clock_ns = TIMEBASE_1_NS;
+ if (devpriv->is_m_series) {
+ devpriv->clock_and_fout2 &=
+ ~(MSeries_Timebase1_Select_Bit |
+ MSeries_Timebase3_Select_Bit);
+ ni_writew(dev, devpriv->clock_and_fout2,
+ M_Offset_Clock_and_Fout2);
+ ni_writew(dev, 0, M_Offset_PLL_Control);
+ }
+ devpriv->clock_source = source;
+ } else {
+ if (devpriv->is_m_series) {
+ return ni_mseries_set_pll_master_clock(dev, source,
+ period_ns);
+ } else {
+ if (source == NI_MIO_RTSI_CLOCK) {
+ devpriv->rtsi_trig_direction_reg |=
+ Use_RTSI_Clock_Bit;
+ ni_stc_writew(dev,
+ devpriv->rtsi_trig_direction_reg,
+ RTSI_Trig_Direction_Register);
+ if (period_ns == 0) {
+ printk
+ ("%s: we don't handle an unspecified clock period correctly yet, returning error.\n",
+ __func__);
+ return -EINVAL;
+ } else {
+ devpriv->clock_ns = period_ns;
+ }
+ devpriv->clock_source = source;
+ } else
+ return -EINVAL;
+ }
+ }
+ return 3;
}
-static unsigned ni_m_series_get_pfi_routing(struct comedi_device *dev,
- unsigned chan)
+static unsigned num_configurable_rtsi_channels(struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
- const unsigned array_offset = chan / 3;
- return MSeries_PFI_Output_Select_Source(chan,
- devpriv->
- pfi_output_select_reg
- [array_offset]);
+ if (devpriv->is_m_series)
+ return 8;
+ else
+ return 7;
}
-static unsigned ni_old_get_pfi_routing(struct comedi_device *dev, unsigned chan)
+static int ni_valid_rtsi_output_source(struct comedi_device *dev,
+ unsigned chan, unsigned source)
{
- /* pre-m-series boards have fixed signals on pfi pins */
- switch (chan) {
- case 0:
- return NI_PFI_OUTPUT_AI_START1;
- break;
- case 1:
- return NI_PFI_OUTPUT_AI_START2;
- break;
- case 2:
- return NI_PFI_OUTPUT_AI_CONVERT;
- break;
- case 3:
- return NI_PFI_OUTPUT_G_SRC1;
- break;
- case 4:
- return NI_PFI_OUTPUT_G_GATE1;
- break;
- case 5:
- return NI_PFI_OUTPUT_AO_UPDATE_N;
- break;
- case 6:
- return NI_PFI_OUTPUT_AO_START1;
- break;
- case 7:
- return NI_PFI_OUTPUT_AI_START_PULSE;
- break;
- case 8:
- return NI_PFI_OUTPUT_G_SRC0;
+ struct ni_private *devpriv = dev->private;
+
+ if (chan >= num_configurable_rtsi_channels(dev)) {
+ if (chan == old_RTSI_clock_channel) {
+ if (source == NI_RTSI_OUTPUT_RTSI_OSC)
+ return 1;
+ else {
+ printk
+ ("%s: invalid source for channel=%i, channel %i is always the RTSI clock for pre-m-series boards.\n",
+ __func__, chan, old_RTSI_clock_channel);
+ return 0;
+ }
+ }
+ return 0;
+ }
+ switch (source) {
+ case NI_RTSI_OUTPUT_ADR_START1:
+ case NI_RTSI_OUTPUT_ADR_START2:
+ case NI_RTSI_OUTPUT_SCLKG:
+ case NI_RTSI_OUTPUT_DACUPDN:
+ case NI_RTSI_OUTPUT_DA_START1:
+ case NI_RTSI_OUTPUT_G_SRC0:
+ case NI_RTSI_OUTPUT_G_GATE0:
+ case NI_RTSI_OUTPUT_RGOUT0:
+ case NI_RTSI_OUTPUT_RTSI_BRD_0:
+ return 1;
break;
- case 9:
- return NI_PFI_OUTPUT_G_GATE0;
+ case NI_RTSI_OUTPUT_RTSI_OSC:
+ if (devpriv->is_m_series)
+ return 1;
+ else
+ return 0;
break;
default:
- printk("%s: bug, unhandled case in switch.\n", __func__);
+ return 0;
break;
}
- return 0;
-}
-
-static unsigned ni_get_pfi_routing(struct comedi_device *dev, unsigned chan)
-{
- const struct ni_board_struct *board = comedi_board(dev);
-
- if (board->reg_type & ni_reg_m_series_mask)
- return ni_m_series_get_pfi_routing(dev, chan);
- else
- return ni_old_get_pfi_routing(dev, chan);
}
-static int ni_config_filter(struct comedi_device *dev, unsigned pfi_channel,
- enum ni_pfi_filter_select filter)
+static int ni_set_rtsi_routing(struct comedi_device *dev,
+ unsigned chan, unsigned source)
{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv __maybe_unused = dev->private;
- unsigned bits;
+ struct ni_private *devpriv = dev->private;
- if ((board->reg_type & ni_reg_m_series_mask) == 0)
- return -ENOTSUPP;
- bits = ni_readl(M_Offset_PFI_Filter);
- bits &= ~MSeries_PFI_Filter_Select_Mask(pfi_channel);
- bits |= MSeries_PFI_Filter_Select_Bits(pfi_channel, filter);
- ni_writel(bits, M_Offset_PFI_Filter);
- return 0;
+ if (ni_valid_rtsi_output_source(dev, chan, source) == 0)
+ return -EINVAL;
+ if (chan < 4) {
+ devpriv->rtsi_trig_a_output_reg &= ~RTSI_Trig_Output_Mask(chan);
+ devpriv->rtsi_trig_a_output_reg |=
+ RTSI_Trig_Output_Bits(chan, source);
+ ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
+ RTSI_Trig_A_Output_Register);
+ } else if (chan < 8) {
+ devpriv->rtsi_trig_b_output_reg &= ~RTSI_Trig_Output_Mask(chan);
+ devpriv->rtsi_trig_b_output_reg |=
+ RTSI_Trig_Output_Bits(chan, source);
+ ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
+ RTSI_Trig_B_Output_Register);
+ }
+ return 2;
}
-static int ni_pfi_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
+static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan)
{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv __maybe_unused = dev->private;
-
- if (!(board->reg_type & ni_reg_m_series_mask))
- return -ENOTSUPP;
-
- if (comedi_dio_update_state(s, data))
- ni_writew(s->state, M_Offset_PFI_DO);
-
- data[1] = ni_readw(M_Offset_PFI_DI);
+ struct ni_private *devpriv = dev->private;
- return insn->n;
+ if (chan < 4) {
+ return RTSI_Trig_Output_Source(chan,
+ devpriv->rtsi_trig_a_output_reg);
+ } else if (chan < num_configurable_rtsi_channels(dev)) {
+ return RTSI_Trig_Output_Source(chan,
+ devpriv->rtsi_trig_b_output_reg);
+ } else {
+ if (chan == old_RTSI_clock_channel)
+ return NI_RTSI_OUTPUT_RTSI_OSC;
+ printk("%s: bug! should never get here?\n", __func__);
+ return 0;
+ }
}
-static int ni_pfi_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int ni_rtsi_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct ni_private *devpriv = dev->private;
- unsigned int chan;
-
- if (insn->n < 1)
- return -EINVAL;
-
- chan = CR_CHAN(insn->chanspec);
+ unsigned int chan = CR_CHAN(insn->chanspec);
switch (data[0]) {
- case COMEDI_OUTPUT:
- ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 1);
+ case INSN_CONFIG_DIO_OUTPUT:
+ if (chan < num_configurable_rtsi_channels(dev)) {
+ devpriv->rtsi_trig_direction_reg |=
+ RTSI_Output_Bit(chan, devpriv->is_m_series);
+ } else if (chan == old_RTSI_clock_channel) {
+ devpriv->rtsi_trig_direction_reg |=
+ Drive_RTSI_Clock_Bit;
+ }
+ ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
+ RTSI_Trig_Direction_Register);
break;
- case COMEDI_INPUT:
- ni_set_bits(dev, IO_Bidirection_Pin_Register, 1 << chan, 0);
+ case INSN_CONFIG_DIO_INPUT:
+ if (chan < num_configurable_rtsi_channels(dev)) {
+ devpriv->rtsi_trig_direction_reg &=
+ ~RTSI_Output_Bit(chan, devpriv->is_m_series);
+ } else if (chan == old_RTSI_clock_channel) {
+ devpriv->rtsi_trig_direction_reg &=
+ ~Drive_RTSI_Clock_Bit;
+ }
+ ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg,
+ RTSI_Trig_Direction_Register);
break;
case INSN_CONFIG_DIO_QUERY:
- data[1] =
- (devpriv->io_bidirection_pin_reg & (1 << chan)) ?
- COMEDI_OUTPUT : COMEDI_INPUT;
- return 0;
+ if (chan < num_configurable_rtsi_channels(dev)) {
+ data[1] =
+ (devpriv->rtsi_trig_direction_reg &
+ RTSI_Output_Bit(chan, devpriv->is_m_series))
+ ? INSN_CONFIG_DIO_OUTPUT
+ : INSN_CONFIG_DIO_INPUT;
+ } else if (chan == old_RTSI_clock_channel) {
+ data[1] =
+ (devpriv->rtsi_trig_direction_reg &
+ Drive_RTSI_Clock_Bit)
+ ? INSN_CONFIG_DIO_OUTPUT : INSN_CONFIG_DIO_INPUT;
+ }
+ return 2;
+ break;
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ return ni_set_master_clock(dev, data[1], data[2]);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ data[1] = devpriv->clock_source;
+ data[2] = devpriv->clock_ns;
+ return 3;
break;
case INSN_CONFIG_SET_ROUTING:
- return ni_set_pfi_routing(dev, chan, data[1]);
+ return ni_set_rtsi_routing(dev, chan, data[1]);
break;
case INSN_CONFIG_GET_ROUTING:
- data[1] = ni_get_pfi_routing(dev, chan);
- break;
- case INSN_CONFIG_FILTER:
- return ni_config_filter(dev, chan, data[1]);
+ data[1] = ni_get_rtsi_routing(dev, chan);
+ return 2;
break;
default:
return -EINVAL;
+ break;
}
- return 0;
+ return 1;
+}
+
+static int ni_rtsi_insn_bits(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ data[1] = 0;
+
+ return insn->n;
}
-/*
- *
- * NI RTSI Bus Functions
- *
- */
static void ni_rtsi_init(struct comedi_device *dev)
{
- const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
/* Initialises the RTSI bus signal switch to a default state */
RTSI_Trig_Output_Bits(2,
NI_RTSI_OUTPUT_SCLKG) |
RTSI_Trig_Output_Bits(3, NI_RTSI_OUTPUT_DACUPDN);
- devpriv->stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
- RTSI_Trig_A_Output_Register);
+ ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
+ RTSI_Trig_A_Output_Register);
devpriv->rtsi_trig_b_output_reg =
RTSI_Trig_Output_Bits(4,
NI_RTSI_OUTPUT_DA_START1) |
RTSI_Trig_Output_Bits(5,
NI_RTSI_OUTPUT_G_SRC0) |
RTSI_Trig_Output_Bits(6, NI_RTSI_OUTPUT_G_GATE0);
- if (board->reg_type & ni_reg_m_series_mask)
+ if (devpriv->is_m_series)
devpriv->rtsi_trig_b_output_reg |=
RTSI_Trig_Output_Bits(7, NI_RTSI_OUTPUT_RTSI_OSC);
- devpriv->stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
- RTSI_Trig_B_Output_Register);
-
-/*
-* Sets the source and direction of the 4 on board lines
-* devpriv->stc_writew(dev, 0x0000, RTSI_Board_Register);
-*/
-}
-
-static int ni_rtsi_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- data[1] = 0;
-
- return insn->n;
-}
-
-/* Find best multiplier/divider to try and get the PLL running at 80 MHz
- * given an arbitrary frequency input clock */
-static int ni_mseries_get_pll_parameters(unsigned reference_period_ns,
- unsigned *freq_divider,
- unsigned *freq_multiplier,
- unsigned *actual_period_ns)
-{
- unsigned div;
- unsigned best_div = 1;
- static const unsigned max_div = 0x10;
- unsigned mult;
- unsigned best_mult = 1;
- static const unsigned max_mult = 0x100;
- static const unsigned pico_per_nano = 1000;
+ ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
+ RTSI_Trig_B_Output_Register);
- const unsigned reference_picosec = reference_period_ns * pico_per_nano;
- /* m-series wants the phased-locked loop to output 80MHz, which is divided by 4 to
- * 20 MHz for most timing clocks */
- static const unsigned target_picosec = 12500;
- static const unsigned fudge_factor_80_to_20Mhz = 4;
- int best_period_picosec = 0;
- for (div = 1; div <= max_div; ++div) {
- for (mult = 1; mult <= max_mult; ++mult) {
- unsigned new_period_ps =
- (reference_picosec * div) / mult;
- if (abs(new_period_ps - target_picosec) <
- abs(best_period_picosec - target_picosec)) {
- best_period_picosec = new_period_ps;
- best_div = div;
- best_mult = mult;
- }
- }
- }
- if (best_period_picosec == 0) {
- printk("%s: bug, failed to find pll parameters\n", __func__);
- return -EIO;
- }
- *freq_divider = best_div;
- *freq_multiplier = best_mult;
- *actual_period_ns =
- (best_period_picosec * fudge_factor_80_to_20Mhz +
- (pico_per_nano / 2)) / pico_per_nano;
- return 0;
+/*
+* Sets the source and direction of the 4 on board lines
+* ni_stc_writew(dev, 0x0000, RTSI_Board_Register);
+*/
}
-static inline unsigned num_configurable_rtsi_channels(struct comedi_device *dev)
+#ifdef PCIDMA
+static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_gpct *counter = s->private;
+ int retval;
- if (board->reg_type & ni_reg_m_series_mask)
- return 8;
- else
- return 7;
+ retval = ni_request_gpct_mite_channel(dev, counter->counter_index,
+ COMEDI_INPUT);
+ if (retval) {
+ comedi_error(dev,
+ "no dma channel available for use by counter");
+ return retval;
+ }
+ ni_tio_acknowledge_and_confirm(counter, NULL, NULL, NULL, NULL);
+ ni_e_series_enable_second_irq(dev, counter->counter_index, 1);
+
+ return ni_tio_cmd(dev, s);
}
-static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
- unsigned source, unsigned period_ns)
+static int ni_gpct_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
- struct ni_private *devpriv = dev->private;
- static const unsigned min_period_ns = 50;
- static const unsigned max_period_ns = 1000;
- static const unsigned timeout = 1000;
- unsigned pll_control_bits;
- unsigned freq_divider;
- unsigned freq_multiplier;
- unsigned i;
+ struct ni_gpct *counter = s->private;
int retval;
- if (source == NI_MIO_PLL_PXI10_CLOCK)
- period_ns = 100;
- /* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */
- if (period_ns < min_period_ns || period_ns > max_period_ns) {
- printk
- ("%s: you must specify an input clock frequency between %i and %i nanosec "
- "for the phased-lock loop.\n", __func__,
- min_period_ns, max_period_ns);
- return -EINVAL;
- }
- devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
- devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
- RTSI_Trig_Direction_Register);
- pll_control_bits =
- MSeries_PLL_Enable_Bit | MSeries_PLL_VCO_Mode_75_150MHz_Bits;
- devpriv->clock_and_fout2 |=
- MSeries_Timebase1_Select_Bit | MSeries_Timebase3_Select_Bit;
- devpriv->clock_and_fout2 &= ~MSeries_PLL_In_Source_Select_Mask;
- switch (source) {
- case NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK:
- devpriv->clock_and_fout2 |=
- MSeries_PLL_In_Source_Select_Star_Trigger_Bits;
- retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,
- &freq_multiplier,
- &devpriv->clock_ns);
- if (retval < 0)
- return retval;
- break;
- case NI_MIO_PLL_PXI10_CLOCK:
- /* pxi clock is 10MHz */
- devpriv->clock_and_fout2 |=
- MSeries_PLL_In_Source_Select_PXI_Clock10;
- retval = ni_mseries_get_pll_parameters(period_ns, &freq_divider,
- &freq_multiplier,
- &devpriv->clock_ns);
- if (retval < 0)
- return retval;
+ retval = ni_tio_cancel(counter);
+ ni_e_series_enable_second_irq(dev, counter->counter_index, 0);
+ ni_release_gpct_mite_channel(dev, counter->counter_index);
+ return retval;
+}
+#endif
+
+#if 0
+/*
+ * Read the GPCTs current value.
+ */
+static int GPCT_G_Watch(struct comedi_device *dev, int chan)
+{
+ unsigned int hi1, hi2, lo;
+
+ devpriv->gpct_command[chan] &= ~G_Save_Trace;
+ ni_stc_writew(dev, devpriv->gpct_command[chan],
+ G_Command_Register(chan));
+
+ devpriv->gpct_command[chan] |= G_Save_Trace;
+ ni_stc_writew(dev, devpriv->gpct_command[chan],
+ G_Command_Register(chan));
+
+ /* This procedure is used because the two registers cannot
+ * be read atomically. */
+ do {
+ hi1 = ni_stc_readw(dev, G_Save_Register_High(chan));
+ lo = ni_stc_readw(dev, G_Save_Register_Low(chan));
+ hi2 = ni_stc_readw(dev, G_Save_Register_High(chan));
+ } while (hi1 != hi2);
+
+ return (hi1 << 16) | lo;
+}
+
+static void GPCT_Reset(struct comedi_device *dev, int chan)
+{
+ int temp_ack_reg = 0;
+
+ /* printk("GPCT_Reset..."); */
+ devpriv->gpct_cur_operation[chan] = GPCT_RESET;
+
+ switch (chan) {
+ case 0:
+ ni_stc_writew(dev, G0_Reset, Joint_Reset_Register);
+ ni_set_bits(dev, Interrupt_A_Enable_Register,
+ G0_TC_Interrupt_Enable, 0);
+ ni_set_bits(dev, Interrupt_A_Enable_Register,
+ G0_Gate_Interrupt_Enable, 0);
+ temp_ack_reg |= G0_Gate_Error_Confirm;
+ temp_ack_reg |= G0_TC_Error_Confirm;
+ temp_ack_reg |= G0_TC_Interrupt_Ack;
+ temp_ack_reg |= G0_Gate_Interrupt_Ack;
+ ni_stc_writew(dev, temp_ack_reg, Interrupt_A_Ack_Register);
+
+ /* problem...this interferes with the other ctr... */
+ devpriv->an_trig_etc_reg |= GPFO_0_Output_Enable;
+ ni_stc_writew(dev, devpriv->an_trig_etc_reg,
+ Analog_Trigger_Etc_Register);
break;
- default:
- {
- unsigned rtsi_channel;
- static const unsigned max_rtsi_channel = 7;
- for (rtsi_channel = 0; rtsi_channel <= max_rtsi_channel;
- ++rtsi_channel) {
- if (source ==
- NI_MIO_PLL_RTSI_CLOCK(rtsi_channel)) {
- devpriv->clock_and_fout2 |=
- MSeries_PLL_In_Source_Select_RTSI_Bits
- (rtsi_channel);
- break;
- }
- }
- if (rtsi_channel > max_rtsi_channel)
- return -EINVAL;
- retval = ni_mseries_get_pll_parameters(period_ns,
- &freq_divider,
- &freq_multiplier,
- &devpriv->
- clock_ns);
- if (retval < 0)
- return retval;
- }
+ case 1:
+ ni_stc_writew(dev, G1_Reset, Joint_Reset_Register);
+ ni_set_bits(dev, Interrupt_B_Enable_Register,
+ G1_TC_Interrupt_Enable, 0);
+ ni_set_bits(dev, Interrupt_B_Enable_Register,
+ G0_Gate_Interrupt_Enable, 0);
+ temp_ack_reg |= G1_Gate_Error_Confirm;
+ temp_ack_reg |= G1_TC_Error_Confirm;
+ temp_ack_reg |= G1_TC_Interrupt_Ack;
+ temp_ack_reg |= G1_Gate_Interrupt_Ack;
+ ni_stc_writew(dev, temp_ack_reg, Interrupt_B_Ack_Register);
+
+ devpriv->an_trig_etc_reg |= GPFO_1_Output_Enable;
+ ni_stc_writew(dev, devpriv->an_trig_etc_reg,
+ Analog_Trigger_Etc_Register);
break;
}
- ni_writew(devpriv->clock_and_fout2, M_Offset_Clock_and_Fout2);
- pll_control_bits |=
- MSeries_PLL_Divisor_Bits(freq_divider) |
- MSeries_PLL_Multiplier_Bits(freq_multiplier);
- /* printk("using divider=%i, multiplier=%i for PLL. pll_control_bits = 0x%x\n",
- * freq_divider, freq_multiplier, pll_control_bits); */
- /* printk("clock_ns=%d\n", devpriv->clock_ns); */
- ni_writew(pll_control_bits, M_Offset_PLL_Control);
- devpriv->clock_source = source;
- /* it seems to typically take a few hundred microseconds for PLL to lock */
- for (i = 0; i < timeout; ++i) {
- if (ni_readw(M_Offset_PLL_Status) & MSeries_PLL_Locked_Bit)
- break;
- udelay(1);
- }
- if (i == timeout) {
- printk
- ("%s: timed out waiting for PLL to lock to reference clock source %i with period %i ns.\n",
- __func__, source, period_ns);
- return -ETIMEDOUT;
- }
- return 3;
+ devpriv->gpct_mode[chan] = 0;
+ devpriv->gpct_input_select[chan] = 0;
+ devpriv->gpct_command[chan] = 0;
+
+ devpriv->gpct_command[chan] |= G_Synchronized_Gate;
+
+ ni_stc_writew(dev, devpriv->gpct_mode[chan], G_Mode_Register(chan));
+ ni_stc_writew(dev, devpriv->gpct_input_select[chan],
+ G_Input_Select_Register(chan));
+ ni_stc_writew(dev, 0, G_Autoincrement_Register(chan));
+
+ /* printk("exit GPCT_Reset\n"); */
}
+#endif
-static int ni_set_master_clock(struct comedi_device *dev, unsigned source,
- unsigned period_ns)
+static irqreturn_t ni_E_interrupt(int irq, void *d)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct comedi_device *dev = d;
+ unsigned short a_status;
+ unsigned short b_status;
+ unsigned int ai_mite_status = 0;
+ unsigned int ao_mite_status = 0;
+ unsigned long flags;
+#ifdef PCIDMA
struct ni_private *devpriv = dev->private;
+ struct mite_struct *mite = devpriv->mite;
+#endif
- if (source == NI_MIO_INTERNAL_CLOCK) {
- devpriv->rtsi_trig_direction_reg &= ~Use_RTSI_Clock_Bit;
- devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
- RTSI_Trig_Direction_Register);
- devpriv->clock_ns = TIMEBASE_1_NS;
- if (board->reg_type & ni_reg_m_series_mask) {
- devpriv->clock_and_fout2 &=
- ~(MSeries_Timebase1_Select_Bit |
- MSeries_Timebase3_Select_Bit);
- ni_writew(devpriv->clock_and_fout2,
- M_Offset_Clock_and_Fout2);
- ni_writew(0, M_Offset_PLL_Control);
+ if (!dev->attached)
+ return IRQ_NONE;
+ smp_mb(); /* make sure dev->attached is checked before handler does anything else. */
+
+ /* lock to avoid race with comedi_poll */
+ spin_lock_irqsave(&dev->spinlock, flags);
+ a_status = ni_stc_readw(dev, AI_Status_1_Register);
+ b_status = ni_stc_readw(dev, AO_Status_1_Register);
+#ifdef PCIDMA
+ if (mite) {
+ struct ni_private *devpriv = dev->private;
+ unsigned long flags_too;
+
+ spin_lock_irqsave(&devpriv->mite_channel_lock, flags_too);
+ if (devpriv->ai_mite_chan) {
+ ai_mite_status = mite_get_status(devpriv->ai_mite_chan);
+ if (ai_mite_status & CHSR_LINKC)
+ writel(CHOR_CLRLC,
+ devpriv->mite->mite_io_addr +
+ MITE_CHOR(devpriv->
+ ai_mite_chan->channel));
}
- devpriv->clock_source = source;
- } else {
- if (board->reg_type & ni_reg_m_series_mask) {
- return ni_mseries_set_pll_master_clock(dev, source,
- period_ns);
- } else {
- if (source == NI_MIO_RTSI_CLOCK) {
- devpriv->rtsi_trig_direction_reg |=
- Use_RTSI_Clock_Bit;
- devpriv->stc_writew(dev,
- devpriv->
- rtsi_trig_direction_reg,
- RTSI_Trig_Direction_Register);
- if (period_ns == 0) {
- printk
- ("%s: we don't handle an unspecified clock period correctly yet, returning error.\n",
- __func__);
- return -EINVAL;
- } else {
- devpriv->clock_ns = period_ns;
- }
- devpriv->clock_source = source;
- } else
- return -EINVAL;
+ if (devpriv->ao_mite_chan) {
+ ao_mite_status = mite_get_status(devpriv->ao_mite_chan);
+ if (ao_mite_status & CHSR_LINKC)
+ writel(CHOR_CLRLC,
+ mite->mite_io_addr +
+ MITE_CHOR(devpriv->
+ ao_mite_chan->channel));
}
+ spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags_too);
}
- return 3;
+#endif
+ ack_a_interrupt(dev, a_status);
+ ack_b_interrupt(dev, b_status);
+ if ((a_status & Interrupt_A_St) || (ai_mite_status & CHSR_INT))
+ handle_a_interrupt(dev, a_status, ai_mite_status);
+ if ((b_status & Interrupt_B_St) || (ao_mite_status & CHSR_INT))
+ handle_b_interrupt(dev, b_status, ao_mite_status);
+ handle_gpct_interrupt(dev, 0);
+ handle_gpct_interrupt(dev, 1);
+ handle_cdio_interrupt(dev);
+
+ spin_unlock_irqrestore(&dev->spinlock, flags);
+ return IRQ_HANDLED;
}
-static int ni_valid_rtsi_output_source(struct comedi_device *dev, unsigned chan,
- unsigned source)
+static int ni_alloc_private(struct comedi_device *dev)
{
- const struct ni_board_struct *board = comedi_board(dev);
+ struct ni_private *devpriv;
- if (chan >= num_configurable_rtsi_channels(dev)) {
- if (chan == old_RTSI_clock_channel) {
- if (source == NI_RTSI_OUTPUT_RTSI_OSC)
- return 1;
- else {
- printk
- ("%s: invalid source for channel=%i, channel %i is always the RTSI clock for pre-m-series boards.\n",
- __func__, chan, old_RTSI_clock_channel);
- return 0;
- }
- }
- return 0;
- }
- switch (source) {
- case NI_RTSI_OUTPUT_ADR_START1:
- case NI_RTSI_OUTPUT_ADR_START2:
- case NI_RTSI_OUTPUT_SCLKG:
- case NI_RTSI_OUTPUT_DACUPDN:
- case NI_RTSI_OUTPUT_DA_START1:
- case NI_RTSI_OUTPUT_G_SRC0:
- case NI_RTSI_OUTPUT_G_GATE0:
- case NI_RTSI_OUTPUT_RGOUT0:
- case NI_RTSI_OUTPUT_RTSI_BRD_0:
- return 1;
- break;
- case NI_RTSI_OUTPUT_RTSI_OSC:
- if (board->reg_type & ni_reg_m_series_mask)
- return 1;
- else
- return 0;
- break;
- default:
- return 0;
- break;
- }
+ devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
+ if (!devpriv)
+ return -ENOMEM;
+
+ spin_lock_init(&devpriv->window_lock);
+ spin_lock_init(&devpriv->soft_reg_copy_lock);
+ spin_lock_init(&devpriv->mite_channel_lock);
+
+ return 0;
}
-static int ni_set_rtsi_routing(struct comedi_device *dev, unsigned chan,
- unsigned source)
+static int ni_E_init(struct comedi_device *dev)
{
+ const struct ni_board_struct *board = comedi_board(dev);
struct ni_private *devpriv = dev->private;
+ struct comedi_subdevice *s;
+ unsigned j;
+ enum ni_gpct_variant counter_variant;
+ int ret;
- if (ni_valid_rtsi_output_source(dev, chan, source) == 0)
+ if (board->n_aochan > MAX_N_AO_CHAN) {
+ printk("bug! n_aochan > MAX_N_AO_CHAN\n");
return -EINVAL;
- if (chan < 4) {
- devpriv->rtsi_trig_a_output_reg &= ~RTSI_Trig_Output_Mask(chan);
- devpriv->rtsi_trig_a_output_reg |=
- RTSI_Trig_Output_Bits(chan, source);
- devpriv->stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
- RTSI_Trig_A_Output_Register);
- } else if (chan < 8) {
- devpriv->rtsi_trig_b_output_reg &= ~RTSI_Trig_Output_Mask(chan);
- devpriv->rtsi_trig_b_output_reg |=
- RTSI_Trig_Output_Bits(chan, source);
- devpriv->stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
- RTSI_Trig_B_Output_Register);
}
- return 2;
-}
-static unsigned ni_get_rtsi_routing(struct comedi_device *dev, unsigned chan)
-{
- struct ni_private *devpriv = dev->private;
+ ret = comedi_alloc_subdevices(dev, NI_NUM_SUBDEVICES);
+ if (ret)
+ return ret;
- if (chan < 4) {
- return RTSI_Trig_Output_Source(chan,
- devpriv->rtsi_trig_a_output_reg);
- } else if (chan < num_configurable_rtsi_channels(dev)) {
- return RTSI_Trig_Output_Source(chan,
- devpriv->rtsi_trig_b_output_reg);
+ /* analog input subdevice */
+
+ s = &dev->subdevices[NI_AI_SUBDEV];
+ dev->read_subdev = s;
+ if (board->n_adchan) {
+ s->type = COMEDI_SUBD_AI;
+ s->subdev_flags =
+ SDF_READABLE | SDF_DIFF | SDF_DITHER | SDF_CMD_READ;
+ if (board->reg_type != ni_reg_611x)
+ s->subdev_flags |= SDF_GROUND | SDF_COMMON | SDF_OTHER;
+ if (board->adbits > 16)
+ s->subdev_flags |= SDF_LSAMPL;
+ if (devpriv->is_m_series)
+ s->subdev_flags |= SDF_SOFT_CALIBRATED;
+ s->n_chan = board->n_adchan;
+ s->len_chanlist = 512;
+ s->maxdata = (1 << board->adbits) - 1;
+ s->range_table = ni_range_lkup[board->gainlkup];
+ s->insn_read = &ni_ai_insn_read;
+ s->insn_config = &ni_ai_insn_config;
+ s->do_cmdtest = &ni_ai_cmdtest;
+ s->do_cmd = &ni_ai_cmd;
+ s->cancel = &ni_ai_reset;
+ s->poll = &ni_ai_poll;
+ s->munge = &ni_ai_munge;
+#ifdef PCIDMA
+ s->async_dma_dir = DMA_FROM_DEVICE;
+#endif
} else {
- if (chan == old_RTSI_clock_channel)
- return NI_RTSI_OUTPUT_RTSI_OSC;
- printk("%s: bug! should never get here?\n", __func__);
- return 0;
+ s->type = COMEDI_SUBD_UNUSED;
}
-}
-static int ni_rtsi_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct ni_board_struct *board = comedi_board(dev);
- struct ni_private *devpriv = dev->private;
- unsigned int chan = CR_CHAN(insn->chanspec);
+ /* analog output subdevice */
- switch (data[0]) {
- case INSN_CONFIG_DIO_OUTPUT:
- if (chan < num_configurable_rtsi_channels(dev)) {
- devpriv->rtsi_trig_direction_reg |=
- RTSI_Output_Bit(chan,
- (board->reg_type & ni_reg_m_series_mask) != 0);
- } else if (chan == old_RTSI_clock_channel) {
- devpriv->rtsi_trig_direction_reg |=
- Drive_RTSI_Clock_Bit;
- }
- devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
- RTSI_Trig_Direction_Register);
- break;
- case INSN_CONFIG_DIO_INPUT:
- if (chan < num_configurable_rtsi_channels(dev)) {
- devpriv->rtsi_trig_direction_reg &=
- ~RTSI_Output_Bit(chan,
- (board->reg_type & ni_reg_m_series_mask) != 0);
- } else if (chan == old_RTSI_clock_channel) {
- devpriv->rtsi_trig_direction_reg &=
- ~Drive_RTSI_Clock_Bit;
- }
- devpriv->stc_writew(dev, devpriv->rtsi_trig_direction_reg,
- RTSI_Trig_Direction_Register);
- break;
- case INSN_CONFIG_DIO_QUERY:
- if (chan < num_configurable_rtsi_channels(dev)) {
- data[1] =
- (devpriv->rtsi_trig_direction_reg &
- RTSI_Output_Bit(chan,
- (board->reg_type & ni_reg_m_series_mask) != 0))
- ? INSN_CONFIG_DIO_OUTPUT
- : INSN_CONFIG_DIO_INPUT;
- } else if (chan == old_RTSI_clock_channel) {
- data[1] =
- (devpriv->rtsi_trig_direction_reg &
- Drive_RTSI_Clock_Bit)
- ? INSN_CONFIG_DIO_OUTPUT : INSN_CONFIG_DIO_INPUT;
+ s = &dev->subdevices[NI_AO_SUBDEV];
+ if (board->n_aochan) {
+ s->type = COMEDI_SUBD_AO;
+ s->subdev_flags = SDF_WRITABLE | SDF_DEGLITCH | SDF_GROUND;
+ if (devpriv->is_m_series)
+ s->subdev_flags |= SDF_SOFT_CALIBRATED;
+ s->n_chan = board->n_aochan;
+ s->maxdata = (1 << board->aobits) - 1;
+ s->range_table = board->ao_range_table;
+ s->insn_read = &ni_ao_insn_read;
+ if (board->reg_type & ni_reg_6xxx_mask)
+ s->insn_write = &ni_ao_insn_write_671x;
+ else
+ s->insn_write = &ni_ao_insn_write;
+ s->insn_config = &ni_ao_insn_config;
+#ifdef PCIDMA
+ if (board->n_aochan) {
+ s->async_dma_dir = DMA_TO_DEVICE;
+#else
+ if (board->ao_fifo_depth) {
+#endif
+ dev->write_subdev = s;
+ s->subdev_flags |= SDF_CMD_WRITE;
+ s->do_cmd = &ni_ao_cmd;
+ s->do_cmdtest = &ni_ao_cmdtest;
+ s->len_chanlist = board->n_aochan;
+ if (!devpriv->is_m_series)
+ s->munge = ni_ao_munge;
}
- return 2;
- break;
- case INSN_CONFIG_SET_CLOCK_SRC:
- return ni_set_master_clock(dev, data[1], data[2]);
- break;
- case INSN_CONFIG_GET_CLOCK_SRC:
- data[1] = devpriv->clock_source;
- data[2] = devpriv->clock_ns;
- return 3;
- break;
- case INSN_CONFIG_SET_ROUTING:
- return ni_set_rtsi_routing(dev, chan, data[1]);
- break;
- case INSN_CONFIG_GET_ROUTING:
- data[1] = ni_get_rtsi_routing(dev, chan);
- return 2;
- break;
- default:
- return -EINVAL;
- break;
+ s->cancel = &ni_ao_reset;
+ } else {
+ s->type = COMEDI_SUBD_UNUSED;
+ }
+ if ((board->reg_type & ni_reg_67xx_mask))
+ init_ao_67xx(dev, s);
+
+ /* digital i/o subdevice */
+
+ s = &dev->subdevices[NI_DIO_SUBDEV];
+ s->type = COMEDI_SUBD_DIO;
+ s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
+ s->maxdata = 1;
+ s->io_bits = 0; /* all bits input */
+ s->range_table = &range_digital;
+ s->n_chan = board->num_p0_dio_channels;
+ if (devpriv->is_m_series) {
+ s->subdev_flags |=
+ SDF_LSAMPL | SDF_CMD_WRITE /* | SDF_CMD_READ */;
+ s->insn_bits = &ni_m_series_dio_insn_bits;
+ s->insn_config = &ni_m_series_dio_insn_config;
+ s->do_cmd = &ni_cdio_cmd;
+ s->do_cmdtest = &ni_cdio_cmdtest;
+ s->cancel = &ni_cdio_cancel;
+ s->async_dma_dir = DMA_BIDIRECTIONAL;
+ s->len_chanlist = s->n_chan;
+
+ ni_writel(dev, CDO_Reset_Bit | CDI_Reset_Bit,
+ M_Offset_CDIO_Command);
+ ni_writel(dev, s->io_bits, M_Offset_DIO_Direction);
+ } else {
+ s->insn_bits = &ni_dio_insn_bits;
+ s->insn_config = &ni_dio_insn_config;
+ devpriv->dio_control = DIO_Pins_Dir(s->io_bits);
+ ni_writew(dev, devpriv->dio_control, DIO_Control_Register);
+ }
+
+ /* 8255 device */
+ s = &dev->subdevices[NI_8255_DIO_SUBDEV];
+ if (board->has_8255) {
+ ret = subdev_8255_init(dev, s, ni_8255_callback,
+ (unsigned long)dev);
+ if (ret)
+ return ret;
+ } else {
+ s->type = COMEDI_SUBD_UNUSED;
+ }
+
+ /* formerly general purpose counter/timer device, but no longer used */
+ s = &dev->subdevices[NI_UNUSED_SUBDEV];
+ s->type = COMEDI_SUBD_UNUSED;
+
+ /* calibration subdevice -- ai and ao */
+ s = &dev->subdevices[NI_CALIBRATION_SUBDEV];
+ s->type = COMEDI_SUBD_CALIB;
+ if (devpriv->is_m_series) {
+ /* internal PWM analog output used for AI nonlinearity calibration */
+ s->subdev_flags = SDF_INTERNAL;
+ s->insn_config = &ni_m_series_pwm_config;
+ s->n_chan = 1;
+ s->maxdata = 0;
+ ni_writel(dev, 0x0, M_Offset_Cal_PWM);
+ } else if (board->reg_type == ni_reg_6143) {
+ /* internal PWM analog output used for AI nonlinearity calibration */
+ s->subdev_flags = SDF_INTERNAL;
+ s->insn_config = &ni_6143_pwm_config;
+ s->n_chan = 1;
+ s->maxdata = 0;
+ } else {
+ s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
+ s->insn_read = &ni_calib_insn_read;
+ s->insn_write = &ni_calib_insn_write;
+ caldac_setup(dev, s);
}
- return 1;
-}
-static int cs5529_wait_for_idle(struct comedi_device *dev)
-{
- unsigned short status;
- const int timeout = HZ;
- int i;
+ /* EEPROM */
+ s = &dev->subdevices[NI_EEPROM_SUBDEV];
+ s->type = COMEDI_SUBD_MEMORY;
+ s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
+ s->maxdata = 0xff;
+ if (devpriv->is_m_series) {
+ s->n_chan = M_SERIES_EEPROM_SIZE;
+ s->insn_read = &ni_m_series_eeprom_insn_read;
+ } else {
+ s->n_chan = 512;
+ s->insn_read = &ni_eeprom_insn_read;
+ }
- for (i = 0; i < timeout; i++) {
- status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx);
- if ((status & CSS_ADC_BUSY) == 0)
- break;
- set_current_state(TASK_INTERRUPTIBLE);
- if (schedule_timeout(1))
- return -EIO;
+ /* PFI */
+ s = &dev->subdevices[NI_PFI_DIO_SUBDEV];
+ s->type = COMEDI_SUBD_DIO;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
+ if (devpriv->is_m_series) {
+ unsigned i;
+ s->n_chan = 16;
+ ni_writew(dev, s->state, M_Offset_PFI_DO);
+ for (i = 0; i < NUM_PFI_OUTPUT_SELECT_REGS; ++i) {
+ ni_writew(dev, devpriv->pfi_output_select_reg[i],
+ M_Offset_PFI_Output_Select(i + 1));
+ }
+ } else {
+ s->n_chan = 10;
}
-/* printk("looped %i times waiting for idle\n", i); */
- if (i == timeout) {
- printk("%s: %s: timeout\n", __FILE__, __func__);
- return -ETIME;
+ s->maxdata = 1;
+ if (devpriv->is_m_series)
+ s->insn_bits = &ni_pfi_insn_bits;
+ s->insn_config = &ni_pfi_insn_config;
+ ni_set_bits(dev, IO_Bidirection_Pin_Register, ~0, 0);
+
+ /* cs5529 calibration adc */
+ s = &dev->subdevices[NI_CS5529_CALIBRATION_SUBDEV];
+ if (board->reg_type & ni_reg_67xx_mask) {
+ s->type = COMEDI_SUBD_AI;
+ s->subdev_flags = SDF_READABLE | SDF_DIFF | SDF_INTERNAL;
+ /* one channel for each analog output channel */
+ s->n_chan = board->n_aochan;
+ s->maxdata = (1 << 16) - 1;
+ s->range_table = &range_unknown; /* XXX */
+ s->insn_read = cs5529_ai_insn_read;
+ s->insn_config = NULL;
+ init_cs5529(dev);
+ } else {
+ s->type = COMEDI_SUBD_UNUSED;
}
- return 0;
-}
-static void cs5529_command(struct comedi_device *dev, unsigned short value)
-{
- static const int timeout = 100;
- int i;
+ /* Serial */
+ s = &dev->subdevices[NI_SERIAL_SUBDEV];
+ s->type = COMEDI_SUBD_SERIAL;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
+ s->n_chan = 1;
+ s->maxdata = 0xff;
+ s->insn_config = ni_serial_insn_config;
+ devpriv->serial_interval_ns = 0;
+ devpriv->serial_hw_mode = 0;
- ni_ao_win_outw(dev, value, CAL_ADC_Command_67xx);
- /* give time for command to start being serially clocked into cs5529.
- * this insures that the CSS_ADC_BUSY bit will get properly
- * set before we exit this function.
- */
- for (i = 0; i < timeout; i++) {
- if ((ni_ao_win_inw(dev, CAL_ADC_Status_67xx) & CSS_ADC_BUSY))
- break;
- udelay(1);
- }
-/* printk("looped %i times writing command to cs5529\n", i); */
- if (i == timeout)
- comedi_error(dev, "possible problem - never saw adc go busy?");
-}
+ /* RTSI */
+ s = &dev->subdevices[NI_RTSI_SUBDEV];
+ s->type = COMEDI_SUBD_DIO;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
+ s->n_chan = 8;
+ s->maxdata = 1;
+ s->insn_bits = ni_rtsi_insn_bits;
+ s->insn_config = ni_rtsi_insn_config;
+ ni_rtsi_init(dev);
-/* write to cs5529 register */
-static void cs5529_config_write(struct comedi_device *dev, unsigned int value,
- unsigned int reg_select_bits)
-{
- ni_ao_win_outw(dev, ((value >> 16) & 0xff),
- CAL_ADC_Config_Data_High_Word_67xx);
- ni_ao_win_outw(dev, (value & 0xffff),
- CAL_ADC_Config_Data_Low_Word_67xx);
- reg_select_bits &= CSCMD_REGISTER_SELECT_MASK;
- cs5529_command(dev, CSCMD_COMMAND | reg_select_bits);
- if (cs5529_wait_for_idle(dev))
- comedi_error(dev, "time or signal in cs5529_config_write()");
-}
+ if (devpriv->is_m_series)
+ counter_variant = ni_gpct_variant_m_series;
+ else
+ counter_variant = ni_gpct_variant_e_series;
+ devpriv->counter_dev = ni_gpct_device_construct(dev,
+ &ni_gpct_write_register,
+ &ni_gpct_read_register,
+ counter_variant,
+ NUM_GPCT);
+ if (!devpriv->counter_dev)
+ return -ENOMEM;
-static int cs5529_do_conversion(struct comedi_device *dev, unsigned short *data)
-{
- int retval;
- unsigned short status;
+ /* General purpose counters */
+ for (j = 0; j < NUM_GPCT; ++j) {
+ s = &dev->subdevices[NI_GPCT_SUBDEV(j)];
+ s->type = COMEDI_SUBD_COUNTER;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL;
+ s->n_chan = 3;
+ if (devpriv->is_m_series)
+ s->maxdata = 0xffffffff;
+ else
+ s->maxdata = 0xffffff;
+ s->insn_read = ni_tio_insn_read;
+ s->insn_write = ni_tio_insn_read;
+ s->insn_config = ni_tio_insn_config;
+#ifdef PCIDMA
+ s->subdev_flags |= SDF_CMD_READ /* | SDF_CMD_WRITE */;
+ s->do_cmd = &ni_gpct_cmd;
+ s->len_chanlist = 1;
+ s->do_cmdtest = ni_tio_cmdtest;
+ s->cancel = &ni_gpct_cancel;
+ s->async_dma_dir = DMA_BIDIRECTIONAL;
+#endif
+ s->private = &devpriv->counter_dev->counters[j];
- cs5529_command(dev, CSCMD_COMMAND | CSCMD_SINGLE_CONVERSION);
- retval = cs5529_wait_for_idle(dev);
- if (retval) {
- comedi_error(dev,
- "timeout or signal in cs5529_do_conversion()");
- return -ETIME;
- }
- status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx);
- if (status & CSS_OSC_DETECT) {
- printk
- ("ni_mio_common: cs5529 conversion error, status CSS_OSC_DETECT\n");
- return -EIO;
- }
- if (status & CSS_OVERRANGE) {
- printk
- ("ni_mio_common: cs5529 conversion error, overrange (ignoring)\n");
+ devpriv->counter_dev->counters[j].chip_index = 0;
+ devpriv->counter_dev->counters[j].counter_index = j;
+ ni_tio_init_counter(&devpriv->counter_dev->counters[j]);
}
- if (data) {
- *data = ni_ao_win_inw(dev, CAL_ADC_Data_67xx);
- /* cs5529 returns 16 bit signed data in bipolar mode */
- *data ^= (1 << 15);
+
+ /* Frequency output */
+ s = &dev->subdevices[NI_FREQ_OUT_SUBDEV];
+ s->type = COMEDI_SUBD_COUNTER;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
+ s->n_chan = 1;
+ s->maxdata = 0xf;
+ s->insn_read = &ni_freq_out_insn_read;
+ s->insn_write = &ni_freq_out_insn_write;
+ s->insn_config = &ni_freq_out_insn_config;
+
+ /* ai configuration */
+ s = &dev->subdevices[NI_AI_SUBDEV];
+ ni_ai_reset(dev, s);
+ if ((board->reg_type & ni_reg_6xxx_mask) == 0) {
+ /* BEAM is this needed for PCI-6143 ?? */
+ devpriv->clock_and_fout =
+ Slow_Internal_Time_Divide_By_2 |
+ Slow_Internal_Timebase |
+ Clock_To_Board_Divide_By_2 |
+ Clock_To_Board |
+ AI_Output_Divide_By_2 | AO_Output_Divide_By_2;
+ } else {
+ devpriv->clock_and_fout =
+ Slow_Internal_Time_Divide_By_2 |
+ Slow_Internal_Timebase |
+ Clock_To_Board_Divide_By_2 | Clock_To_Board;
}
- return 0;
-}
+ ni_stc_writew(dev, devpriv->clock_and_fout, Clock_and_FOUT_Register);
-static int cs5529_ai_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- int n, retval;
- unsigned short sample;
- unsigned int channel_select;
- const unsigned int INTERNAL_REF = 0x1000;
+ /* analog output configuration */
+ s = &dev->subdevices[NI_AO_SUBDEV];
+ ni_ao_reset(dev, s);
- /* Set calibration adc source. Docs lie, reference select bits 8 to 11
- * do nothing. bit 12 seems to chooses internal reference voltage, bit
- * 13 causes the adc input to go overrange (maybe reads external reference?) */
- if (insn->chanspec & CR_ALT_SOURCE)
- channel_select = INTERNAL_REF;
- else
- channel_select = CR_CHAN(insn->chanspec);
- ni_ao_win_outw(dev, channel_select, AO_Calibration_Channel_Select_67xx);
+ if (dev->irq) {
+ ni_stc_writew(dev,
+ (IRQ_POLARITY ? Interrupt_Output_Polarity : 0) |
+ (Interrupt_Output_On_3_Pins & 0) |
+ Interrupt_A_Enable | Interrupt_B_Enable |
+ Interrupt_A_Output_Select(interrupt_pin(dev->irq)) |
+ Interrupt_B_Output_Select(interrupt_pin(dev->irq)),
+ Interrupt_Control_Register);
+ }
- for (n = 0; n < insn->n; n++) {
- retval = cs5529_do_conversion(dev, &sample);
- if (retval < 0)
- return retval;
- data[n] = sample;
+ /* DMA setup */
+ ni_writeb(dev, devpriv->ai_ao_select_reg, AI_AO_Select);
+ ni_writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
+
+ if (board->reg_type & ni_reg_6xxx_mask) {
+ ni_writeb(dev, 0, Magic_611x);
+ } else if (devpriv->is_m_series) {
+ int channel;
+ for (channel = 0; channel < board->n_aochan; ++channel) {
+ ni_writeb(dev, 0xf,
+ M_Offset_AO_Waveform_Order(channel));
+ ni_writeb(dev, 0x0,
+ M_Offset_AO_Reference_Attenuation(channel));
+ }
+ ni_writeb(dev, 0x0, M_Offset_AO_Calibration);
}
- return insn->n;
+
+ return 0;
}
-static int init_cs5529(struct comedi_device *dev)
+static void mio_common_detach(struct comedi_device *dev)
{
- unsigned int config_bits =
- CSCFG_PORT_MODE | CSCFG_WORD_RATE_2180_CYCLES;
+ struct ni_private *devpriv = dev->private;
-#if 1
- /* do self-calibration */
- cs5529_config_write(dev, config_bits | CSCFG_SELF_CAL_OFFSET_GAIN,
- CSCMD_CONFIG_REGISTER);
- /* need to force a conversion for calibration to run */
- cs5529_do_conversion(dev, NULL);
-#else
- /* force gain calibration to 1 */
- cs5529_config_write(dev, 0x400000, CSCMD_GAIN_REGISTER);
- cs5529_config_write(dev, config_bits | CSCFG_SELF_CAL_OFFSET,
- CSCMD_CONFIG_REGISTER);
- if (cs5529_wait_for_idle(dev))
- comedi_error(dev, "timeout or signal in init_cs5529()\n");
-#endif
- return 0;
+ if (devpriv) {
+ if (devpriv->counter_dev)
+ ni_gpct_device_destroy(devpriv->counter_dev);
+ }
}
#define NI_SIZE 0x20
-#define MAX_N_CALDACS 32
-
static const struct ni_board_struct ni_boards[] = {
{
.device_id = 0x010d,
#define IRQ_POLARITY 1
-struct ni_private {
-
- struct pcmcia_device *link;
-
-NI_PRIVATE_COMMON};
-
-/* How we access registers */
-
-#define ni_writel(a, b) (outl((a), (b)+dev->iobase))
-#define ni_readl(a) (inl((a)+dev->iobase))
-#define ni_writew(a, b) (outw((a), (b)+dev->iobase))
-#define ni_readw(a) (inw((a)+dev->iobase))
-#define ni_writeb(a, b) (outb((a), (b)+dev->iobase))
-#define ni_readb(a) (inb((a)+dev->iobase))
-
-/* How we access windowed registers */
-
-/* We automatically take advantage of STC registers that can be
- * read/written directly in the I/O space of the board. The
- * DAQCard devices map the low 8 STC registers to iobase+addr*2. */
-
-static void mio_cs_win_out(struct comedi_device *dev, uint16_t data, int addr)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- if (addr < 8) {
- ni_writew(data, addr * 2);
- } else {
- ni_writew(addr, Window_Address);
- ni_writew(data, Window_Data);
- }
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-}
-
-static uint16_t mio_cs_win_in(struct comedi_device *dev, int addr)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
- uint16_t ret;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- if (addr < 8) {
- ret = ni_readw(addr * 2);
- } else {
- ni_writew(addr, Window_Address);
- ret = ni_readw(Window_Data);
- }
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-
- return ret;
-}
-
#include "ni_mio_common.c"
static const void *ni_getboardtype(struct comedi_device *dev,
return ret;
devpriv = dev->private;
- devpriv->stc_writew = mio_cs_win_out;
- devpriv->stc_readw = mio_cs_win_in;
- devpriv->stc_writel = win_out2;
- devpriv->stc_readl = win_in2;
return ni_E_init(dev);
}
#define PCIMIO 1
#undef ATMIO
-#define MAX_N_CALDACS (16+16+2)
-
#define DRV_NAME "ni_pcimio"
/* These are not all the possible ao ranges for 628x boards.
},
};
-struct ni_private {
-NI_PRIVATE_COMMON};
-
-/* How we access registers */
-
-#define ni_writel(a, b) (writel((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readl(a) (readl(devpriv->mite->daq_io_addr + (a)))
-#define ni_writew(a, b) (writew((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readw(a) (readw(devpriv->mite->daq_io_addr + (a)))
-#define ni_writeb(a, b) (writeb((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readb(a) (readb(devpriv->mite->daq_io_addr + (a)))
-
-/* How we access STC registers */
-
-/* We automatically take advantage of STC registers that can be
- * read/written directly in the I/O space of the board. Most
- * PCIMIO devices map the low 8 STC registers to iobase+addr*2.
- * The 611x devices map the write registers to iobase+addr*2, and
- * the read registers to iobase+(addr-1)*2. */
-/* However, the 611x boards still aren't working, so I'm disabling
- * non-windowed STC access temporarily */
-
-static void e_series_win_out(struct comedi_device *dev, uint16_t data, int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- ni_writew(reg, Window_Address);
- ni_writew(data, Window_Data);
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-}
-
-static uint16_t e_series_win_in(struct comedi_device *dev, int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned long flags;
- uint16_t ret;
-
- spin_lock_irqsave(&devpriv->window_lock, flags);
- ni_writew(reg, Window_Address);
- ret = ni_readw(Window_Data);
- spin_unlock_irqrestore(&devpriv->window_lock, flags);
-
- return ret;
-}
-
-static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
- int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned offset;
-
- switch (reg) {
- case ADC_FIFO_Clear:
- offset = M_Offset_AI_FIFO_Clear;
- break;
- case AI_Command_1_Register:
- offset = M_Offset_AI_Command_1;
- break;
- case AI_Command_2_Register:
- offset = M_Offset_AI_Command_2;
- break;
- case AI_Mode_1_Register:
- offset = M_Offset_AI_Mode_1;
- break;
- case AI_Mode_2_Register:
- offset = M_Offset_AI_Mode_2;
- break;
- case AI_Mode_3_Register:
- offset = M_Offset_AI_Mode_3;
- break;
- case AI_Output_Control_Register:
- offset = M_Offset_AI_Output_Control;
- break;
- case AI_Personal_Register:
- offset = M_Offset_AI_Personal;
- break;
- case AI_SI2_Load_A_Register:
- /* this is actually a 32 bit register on m series boards */
- ni_writel(data, M_Offset_AI_SI2_Load_A);
- return;
- break;
- case AI_SI2_Load_B_Register:
- /* this is actually a 32 bit register on m series boards */
- ni_writel(data, M_Offset_AI_SI2_Load_B);
- return;
- break;
- case AI_START_STOP_Select_Register:
- offset = M_Offset_AI_START_STOP_Select;
- break;
- case AI_Trigger_Select_Register:
- offset = M_Offset_AI_Trigger_Select;
- break;
- case Analog_Trigger_Etc_Register:
- offset = M_Offset_Analog_Trigger_Etc;
- break;
- case AO_Command_1_Register:
- offset = M_Offset_AO_Command_1;
- break;
- case AO_Command_2_Register:
- offset = M_Offset_AO_Command_2;
- break;
- case AO_Mode_1_Register:
- offset = M_Offset_AO_Mode_1;
- break;
- case AO_Mode_2_Register:
- offset = M_Offset_AO_Mode_2;
- break;
- case AO_Mode_3_Register:
- offset = M_Offset_AO_Mode_3;
- break;
- case AO_Output_Control_Register:
- offset = M_Offset_AO_Output_Control;
- break;
- case AO_Personal_Register:
- offset = M_Offset_AO_Personal;
- break;
- case AO_Start_Select_Register:
- offset = M_Offset_AO_Start_Select;
- break;
- case AO_Trigger_Select_Register:
- offset = M_Offset_AO_Trigger_Select;
- break;
- case Clock_and_FOUT_Register:
- offset = M_Offset_Clock_and_FOUT;
- break;
- case Configuration_Memory_Clear:
- offset = M_Offset_Configuration_Memory_Clear;
- break;
- case DAC_FIFO_Clear:
- offset = M_Offset_AO_FIFO_Clear;
- break;
- case DIO_Control_Register:
- dev_dbg(dev->class_dev,
- "%s: FIXME: register 0x%x does not map cleanly on to m-series boards.\n",
- __func__, reg);
- return;
- break;
- case G_Autoincrement_Register(0):
- offset = M_Offset_G0_Autoincrement;
- break;
- case G_Autoincrement_Register(1):
- offset = M_Offset_G1_Autoincrement;
- break;
- case G_Command_Register(0):
- offset = M_Offset_G0_Command;
- break;
- case G_Command_Register(1):
- offset = M_Offset_G1_Command;
- break;
- case G_Input_Select_Register(0):
- offset = M_Offset_G0_Input_Select;
- break;
- case G_Input_Select_Register(1):
- offset = M_Offset_G1_Input_Select;
- break;
- case G_Mode_Register(0):
- offset = M_Offset_G0_Mode;
- break;
- case G_Mode_Register(1):
- offset = M_Offset_G1_Mode;
- break;
- case Interrupt_A_Ack_Register:
- offset = M_Offset_Interrupt_A_Ack;
- break;
- case Interrupt_A_Enable_Register:
- offset = M_Offset_Interrupt_A_Enable;
- break;
- case Interrupt_B_Ack_Register:
- offset = M_Offset_Interrupt_B_Ack;
- break;
- case Interrupt_B_Enable_Register:
- offset = M_Offset_Interrupt_B_Enable;
- break;
- case Interrupt_Control_Register:
- offset = M_Offset_Interrupt_Control;
- break;
- case IO_Bidirection_Pin_Register:
- offset = M_Offset_IO_Bidirection_Pin;
- break;
- case Joint_Reset_Register:
- offset = M_Offset_Joint_Reset;
- break;
- case RTSI_Trig_A_Output_Register:
- offset = M_Offset_RTSI_Trig_A_Output;
- break;
- case RTSI_Trig_B_Output_Register:
- offset = M_Offset_RTSI_Trig_B_Output;
- break;
- case RTSI_Trig_Direction_Register:
- offset = M_Offset_RTSI_Trig_Direction;
- break;
- /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit)
- and M_Offset_SCXI_Serial_Data_Out (8 bit) */
- default:
- dev_warn(dev->class_dev,
- "%s: bug! unhandled register=0x%x in switch.\n",
- __func__, reg);
- BUG();
- return;
- break;
- }
- ni_writew(data, offset);
-}
-
-static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned offset;
-
- switch (reg) {
- case AI_Status_1_Register:
- offset = M_Offset_AI_Status_1;
- break;
- case AO_Status_1_Register:
- offset = M_Offset_AO_Status_1;
- break;
- case AO_Status_2_Register:
- offset = M_Offset_AO_Status_2;
- break;
- case DIO_Serial_Input_Register:
- return ni_readb(M_Offset_SCXI_Serial_Data_In);
- break;
- case Joint_Status_1_Register:
- offset = M_Offset_Joint_Status_1;
- break;
- case Joint_Status_2_Register:
- offset = M_Offset_Joint_Status_2;
- break;
- case G_Status_Register:
- offset = M_Offset_G01_Status;
- break;
- default:
- dev_warn(dev->class_dev,
- "%s: bug! unhandled register=0x%x in switch.\n",
- __func__, reg);
- BUG();
- return 0;
- break;
- }
- return ni_readw(offset);
-}
-
-static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
- int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned offset;
-
- switch (reg) {
- case AI_SC_Load_A_Registers:
- offset = M_Offset_AI_SC_Load_A;
- break;
- case AI_SI_Load_A_Registers:
- offset = M_Offset_AI_SI_Load_A;
- break;
- case AO_BC_Load_A_Register:
- offset = M_Offset_AO_BC_Load_A;
- break;
- case AO_UC_Load_A_Register:
- offset = M_Offset_AO_UC_Load_A;
- break;
- case AO_UI_Load_A_Register:
- offset = M_Offset_AO_UI_Load_A;
- break;
- case G_Load_A_Register(0):
- offset = M_Offset_G0_Load_A;
- break;
- case G_Load_A_Register(1):
- offset = M_Offset_G1_Load_A;
- break;
- case G_Load_B_Register(0):
- offset = M_Offset_G0_Load_B;
- break;
- case G_Load_B_Register(1):
- offset = M_Offset_G1_Load_B;
- break;
- default:
- dev_warn(dev->class_dev,
- "%s: bug! unhandled register=0x%x in switch.\n",
- __func__, reg);
- BUG();
- return;
- break;
- }
- ni_writel(data, offset);
-}
-
-static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
-{
- struct ni_private *devpriv = dev->private;
- unsigned offset;
-
- switch (reg) {
- case G_HW_Save_Register(0):
- offset = M_Offset_G0_HW_Save;
- break;
- case G_HW_Save_Register(1):
- offset = M_Offset_G1_HW_Save;
- break;
- case G_Save_Register(0):
- offset = M_Offset_G0_Save;
- break;
- case G_Save_Register(1):
- offset = M_Offset_G1_Save;
- break;
- default:
- dev_warn(dev->class_dev,
- "%s: bug! unhandled register=0x%x in switch.\n",
- __func__, reg);
- BUG();
- return 0;
- break;
- }
- return ni_readl(offset);
-}
-
#define interrupt_pin(a) 0
#define IRQ_POLARITY 1
BUG_ON(serial_number_eeprom_length > sizeof(devpriv->serial_number));
for (i = 0; i < serial_number_eeprom_length; ++i) {
char *byte_ptr = (char *)&devpriv->serial_number + i;
- *byte_ptr = ni_readb(serial_number_eeprom_offset + i);
+ *byte_ptr = ni_readb(dev, serial_number_eeprom_offset + i);
}
devpriv->serial_number = be32_to_cpu(devpriv->serial_number);
for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i)
- devpriv->eeprom_buffer[i] = ni_readb(Start_Cal_EEPROM + i);
+ devpriv->eeprom_buffer[i] = ni_readb(dev, Start_Cal_EEPROM + i);
writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR);
struct ni_private *devpriv = dev->private;
/* Disable interrupts */
- devpriv->stc_writew(dev, 0, Interrupt_Control_Register);
+ ni_stc_writew(dev, 0, Interrupt_Control_Register);
/* Initialise 6143 AI specific bits */
- ni_writeb(0x00, Magic_6143); /* Set G0,G1 DMA mode to E series version */
- ni_writeb(0x80, PipelineDelay_6143); /* Set EOCMode, ADCMode and pipelinedelay */
- ni_writeb(0x00, EOC_Set_6143); /* Set EOC Delay */
+
+ /* Set G0,G1 DMA mode to E series version */
+ ni_writeb(dev, 0x00, Magic_6143);
+ /* Set EOCMode, ADCMode and pipelinedelay */
+ ni_writeb(dev, 0x80, PipelineDelay_6143);
+ /* Set EOC Delay */
+ ni_writeb(dev, 0x00, EOC_Set_6143);
/* Set the FIFO half full level */
- ni_writel(board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
+ ni_writel(dev, board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
/* Strobe Relay disable bit */
devpriv->ai_calib_source_enabled = 0;
- ni_writew(devpriv->ai_calib_source | Calibration_Channel_6143_RelayOff,
+ ni_writew(dev, devpriv->ai_calib_source |
+ Calibration_Channel_6143_RelayOff,
Calibration_Channel_6143);
- ni_writew(devpriv->ai_calib_source, Calibration_Channel_6143);
+ ni_writew(dev, devpriv->ai_calib_source, Calibration_Channel_6143);
}
static void pcimio_detach(struct comedi_device *dev)
if (!devpriv->mite)
return -ENOMEM;
- if (board->reg_type & ni_reg_m_series_mask) {
- devpriv->stc_writew = &m_series_stc_writew;
- devpriv->stc_readw = &m_series_stc_readw;
- devpriv->stc_writel = &m_series_stc_writel;
- devpriv->stc_readl = &m_series_stc_readl;
- } else {
- devpriv->stc_writew = &e_series_win_out;
- devpriv->stc_readw = &e_series_win_in;
- devpriv->stc_writel = &win_out2;
- devpriv->stc_readl = &win_in2;
- }
+ if (board->reg_type & ni_reg_m_series_mask)
+ devpriv->is_m_series = 1;
ret = mite_setup(devpriv->mite);
if (ret < 0) {
if (devpriv->gpct_mite_ring[1] == NULL)
return -ENOMEM;
- if (board->reg_type & ni_reg_m_series_mask)
+ if (devpriv->is_m_series)
m_series_init_eeprom_buffer(dev);
if (board->reg_type == ni_reg_6143)
init_6143(dev);
enum caldac_enum caldac[3];
};
-#define MAX_N_AO_CHAN 8
-#define NUM_GPCT 2
-
-#define NI_PRIVATE_COMMON \
- uint16_t (*stc_readw)(struct comedi_device *dev, int register); \
- uint32_t (*stc_readl)(struct comedi_device *dev, int register); \
- void (*stc_writew)(struct comedi_device *dev, uint16_t value, int register); \
- void (*stc_writel)(struct comedi_device *dev, uint32_t value, int register); \
- \
- unsigned short dio_output; \
- unsigned short dio_control; \
- int ao0p, ao1p; \
- int lastchan; \
- int last_do; \
- int rt_irq; \
- int irqmask; \
- int aimode; \
- int ai_continuous; \
- int blocksize; \
- int n_left; \
- unsigned int ai_calib_source; \
- unsigned int ai_calib_source_enabled; \
- spinlock_t window_lock; \
- spinlock_t soft_reg_copy_lock; \
- spinlock_t mite_channel_lock; \
- \
- int changain_state; \
- unsigned int changain_spec; \
- \
- unsigned int caldac_maxdata_list[MAX_N_CALDACS]; \
- unsigned short ao[MAX_N_AO_CHAN]; \
- unsigned short caldacs[MAX_N_CALDACS]; \
- \
- unsigned short ai_cmd2; \
- \
- unsigned short ao_conf[MAX_N_AO_CHAN]; \
- unsigned short ao_mode1; \
- unsigned short ao_mode2; \
- unsigned short ao_mode3; \
- unsigned short ao_cmd1; \
- unsigned short ao_cmd2; \
- unsigned short ao_cmd3; \
- unsigned short ao_trigger_select; \
- \
- struct ni_gpct_device *counter_dev; \
- unsigned short an_trig_etc_reg; \
- \
- unsigned ai_offset[512]; \
- \
- unsigned long serial_interval_ns; \
- unsigned char serial_hw_mode; \
- unsigned short clock_and_fout; \
- unsigned short clock_and_fout2; \
- \
- unsigned short int_a_enable_reg; \
- unsigned short int_b_enable_reg; \
- unsigned short io_bidirection_pin_reg; \
- unsigned short rtsi_trig_direction_reg; \
- unsigned short rtsi_trig_a_output_reg; \
- unsigned short rtsi_trig_b_output_reg; \
- unsigned short pfi_output_select_reg[NUM_PFI_OUTPUT_SELECT_REGS]; \
- unsigned short ai_ao_select_reg; \
- unsigned short g0_g1_select_reg; \
- unsigned short cdio_dma_select_reg; \
- \
- unsigned clock_ns; \
- unsigned clock_source; \
- \
- unsigned short atrig_mode; \
- unsigned short atrig_high; \
- unsigned short atrig_low; \
- \
- unsigned short pwm_up_count; \
- unsigned short pwm_down_count; \
- \
- unsigned short ai_fifo_buffer[0x2000]; \
- uint8_t eeprom_buffer[M_SERIES_EEPROM_SIZE]; \
- uint32_t serial_number; \
- \
- struct mite_struct *mite; \
- struct mite_channel *ai_mite_chan; \
- struct mite_channel *ao_mite_chan;\
- struct mite_channel *cdo_mite_chan;\
- struct mite_dma_descriptor_ring *ai_mite_ring; \
- struct mite_dma_descriptor_ring *ao_mite_ring; \
- struct mite_dma_descriptor_ring *cdo_mite_ring; \
+#define MAX_N_CALDACS 34
+#define MAX_N_AO_CHAN 8
+#define NUM_GPCT 2
+
+struct ni_private {
+ unsigned short dio_output;
+ unsigned short dio_control;
+ int aimode;
+ int ai_continuous;
+ unsigned int ai_calib_source;
+ unsigned int ai_calib_source_enabled;
+ spinlock_t window_lock;
+ spinlock_t soft_reg_copy_lock;
+ spinlock_t mite_channel_lock;
+
+ int changain_state;
+ unsigned int changain_spec;
+
+ unsigned int caldac_maxdata_list[MAX_N_CALDACS];
+ unsigned short ao[MAX_N_AO_CHAN];
+ unsigned short caldacs[MAX_N_CALDACS];
+
+ unsigned short ai_cmd2;
+
+ unsigned short ao_conf[MAX_N_AO_CHAN];
+ unsigned short ao_mode1;
+ unsigned short ao_mode2;
+ unsigned short ao_mode3;
+ unsigned short ao_cmd1;
+ unsigned short ao_cmd2;
+ unsigned short ao_trigger_select;
+
+ struct ni_gpct_device *counter_dev;
+ unsigned short an_trig_etc_reg;
+
+ unsigned ai_offset[512];
+
+ unsigned long serial_interval_ns;
+ unsigned char serial_hw_mode;
+ unsigned short clock_and_fout;
+ unsigned short clock_and_fout2;
+
+ unsigned short int_a_enable_reg;
+ unsigned short int_b_enable_reg;
+ unsigned short io_bidirection_pin_reg;
+ unsigned short rtsi_trig_direction_reg;
+ unsigned short rtsi_trig_a_output_reg;
+ unsigned short rtsi_trig_b_output_reg;
+ unsigned short pfi_output_select_reg[NUM_PFI_OUTPUT_SELECT_REGS];
+ unsigned short ai_ao_select_reg;
+ unsigned short g0_g1_select_reg;
+ unsigned short cdio_dma_select_reg;
+
+ unsigned clock_ns;
+ unsigned clock_source;
+
+ unsigned short atrig_mode;
+ unsigned short atrig_high;
+ unsigned short atrig_low;
+
+ unsigned short pwm_up_count;
+ unsigned short pwm_down_count;
+
+ unsigned short ai_fifo_buffer[0x2000];
+ uint8_t eeprom_buffer[M_SERIES_EEPROM_SIZE];
+ uint32_t serial_number;
+
+ struct mite_struct *mite;
+ struct mite_channel *ai_mite_chan;
+ struct mite_channel *ao_mite_chan;
+ struct mite_channel *cdo_mite_chan;
+ struct mite_dma_descriptor_ring *ai_mite_ring;
+ struct mite_dma_descriptor_ring *ao_mite_ring;
+ struct mite_dma_descriptor_ring *cdo_mite_ring;
struct mite_dma_descriptor_ring *gpct_mite_ring[NUM_GPCT];
+ unsigned int is_m_series:1;
+};
+
#endif /* _COMEDI_NI_STC_H */
* (ADLink) ACL-7124 [acl7124]
* (ADLink) PET-48DIO [pet48dio]
* (WinSystems) PCM-IO48 [pcmio48]
+ * (Diamond Systems) ONYX-MM-DIO [onyx-mm-dio]
* Author: Michal Dobes <dobes@tesnet.cz>
* Status: untested
*
.name = "pcmio48",
.io_range = 0x08,
.numofports = 2, /* 48 DIO channels */
+ }, {
+ .name = "onyx-mm-dio",
+ .io_range = 0x10,
+ .numofports = 2, /* 48 DIO channels */
},
};
* (Advantech) PCL-734 [pcl734]
* (Diamond Systems) OPMM-1616-XT [opmm-1616-xt]
* (Diamond Systems) PEARL-MM-P [prearl-mm-p]
+ * (Diamond Systems) IR104-PBF [ir104-pbf]
* Author: José Luis Sánchez (jsanchezv@teleline.es)
* Status: untested
*
*
* BASE+0 Isolated outputs 0-7 (write)
* BASE+1 Isolated outputs 8-15 (write)
+ *
+ * The ir104-pbf board has this register mapping:
+ *
+ * BASE+0 Isolated outputs 0-7 (write) (read back)
+ * BASE+1 Isolated outputs 8-15 (write) (read back)
+ * BASE+2 Isolated outputs 16-19 (write) (read back)
+ * BASE+4 Isolated inputs 0-7 (read)
+ * BASE+5 Isolated inputs 8-15 (read)
+ * BASE+6 Isolated inputs 16-19 (read)
*/
struct pcl730_board {
unsigned int io_range;
unsigned is_pcl725:1;
unsigned is_acl7225b:1;
+ unsigned is_ir104:1;
unsigned has_readback:1;
unsigned has_ttl_io:1;
int n_subdevs;
.io_range = 0x02,
.n_subdevs = 1,
.n_iso_out_chan = 16,
+ }, {
+ .name = "ir104-pbf",
+ .io_range = 0x08,
+ .is_ir104 = 1,
+ .has_readback = 1,
+ .n_iso_out_chan = 20,
+ .n_iso_in_chan = 20,
},
};
s->maxdata = 1;
s->range_table = &range_digital;
s->insn_bits = pcl730_di_insn_bits;
- s->private = board->is_acl7225b ? (void *)2 :
+ s->private = board->is_ir104 ? (void*)4 :
+ board->is_acl7225b ? (void *)2 :
board->is_pcl725 ? (void *)1 : (void *)0;
}
msleep(WAIT_FOR_RESPONSE);
for (i = 0; i < MAX_RETRIES; i++) {
retval = i2c_master_recv(ts->client, &req[1], size);
- if (retval == size) {
+ if (retval == size)
break;
- } else {
- msleep(INCREMENTAL_DELAY);
- dev_dbg(ts->dev, "cp_tm1217: Retry count is %d\n", i);
- }
+
+ msleep(INCREMENTAL_DELAY);
+ dev_dbg(ts->dev, "cp_tm1217: Retry count is %d\n", i);
}
if (retval != size)
dev_err(ts->dev, "cp_tm1217: Read from device failed\n");
if (ts->thread_running == 1) {
mutex_unlock(&ts->thread_mutex);
return IRQ_HANDLED;
- } else {
- ts->thread_running = 1;
- mutex_unlock(&ts->thread_mutex);
}
+ ts->thread_running = 1;
+ mutex_unlock(&ts->thread_mutex);
+
/* Mask the interrupts */
retval = cp_tm1217_mask_interrupt(ts);
+++ /dev/null
-config CRYSTALHD
- tristate "Broadcom Crystal HD video decoder support"
- depends on PCI
- default n
- help
- Support for the Broadcom Crystal HD video decoder chipset
+++ /dev/null
-obj-$(CONFIG_CRYSTALHD) += crystalhd.o
-
-crystalhd-y := crystalhd_cmds.o \
- crystalhd_hw.o \
- crystalhd_lnx.o \
- crystalhd_misc.o
+++ /dev/null
-- Testing
-- Cleanup return codes
-- Cleanup typedefs
-- Allocate an Accelerator device class specific Major number,
- since we don't have any other open sourced accelerators, it is the only
- one in that category for now.
- A somewhat similar device is the DXR2/3
-
-Please send patches to:
-Greg Kroah-Hartman <greg@kroah.com>
-Naren Sankar <nsankar@broadcom.com>
-Jarod Wilson <jarod@wilsonet.com>
-Scott Davilla <davilla@4pi.com>
-Manu Abraham <abraham.manu@gmail.com>
-
+++ /dev/null
-/********************************************************************
- * Copyright(c) 2006-2009 Broadcom Corporation.
- *
- * Name: bc_dts_defs.h
- *
- * Description: Common definitions for all components. Only types
- * is allowed to be included from this file.
- *
- * AU
- *
- * HISTORY:
- *
- ********************************************************************
- * This header is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published
- * by the Free Software Foundation, either version 2.1 of the License.
- *
- * This header is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- * You should have received a copy of the GNU Lesser General Public License
- * along with this header. If not, see <http://www.gnu.org/licenses/>.
- *******************************************************************/
-
-#ifndef _BC_DTS_DEFS_H_
-#define _BC_DTS_DEFS_H_
-
-#include <linux/types.h>
-
-/* BIT Mask */
-#define BC_BIT(_x) (1 << (_x))
-
-enum BC_STATUS {
- BC_STS_SUCCESS = 0,
- BC_STS_INV_ARG = 1,
- BC_STS_BUSY = 2,
- BC_STS_NOT_IMPL = 3,
- BC_STS_PGM_QUIT = 4,
- BC_STS_NO_ACCESS = 5,
- BC_STS_INSUFF_RES = 6,
- BC_STS_IO_ERROR = 7,
- BC_STS_NO_DATA = 8,
- BC_STS_VER_MISMATCH = 9,
- BC_STS_TIMEOUT = 10,
- BC_STS_FW_CMD_ERR = 11,
- BC_STS_DEC_NOT_OPEN = 12,
- BC_STS_ERR_USAGE = 13,
- BC_STS_IO_USER_ABORT = 14,
- BC_STS_IO_XFR_ERROR = 15,
- BC_STS_DEC_NOT_STARTED = 16,
- BC_STS_FWHEX_NOT_FOUND = 17,
- BC_STS_FMT_CHANGE = 18,
- BC_STS_HIF_ACCESS = 19,
- BC_STS_CMD_CANCELLED = 20,
- BC_STS_FW_AUTH_FAILED = 21,
- BC_STS_BOOTLOADER_FAILED = 22,
- BC_STS_CERT_VERIFY_ERROR = 23,
- BC_STS_DEC_EXIST_OPEN = 24,
- BC_STS_PENDING = 25,
- BC_STS_CLK_NOCHG = 26,
-
- /* Must be the last one.*/
- BC_STS_ERROR = -1
-};
-
-/*------------------------------------------------------*
- * Registry Key Definitions *
- *------------------------------------------------------*/
-#define BC_REG_KEY_MAIN_PATH "Software\\Broadcom\\MediaPC\\70010"
-#define BC_REG_KEY_FWPATH "FirmwareFilePath"
-#define BC_REG_KEY_SEC_OPT "DbgOptions"
-
-/*
- * Options:
- *
- * b[5] = Enable RSA KEY in EEPROM Support
- * b[6] = Enable Old PIB scheme. (0 = Use PIB with video scheme)
- *
- * b[12] = Enable send message to NotifyIcon
- *
- */
-
-enum BC_SW_OPTIONS {
- BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3),
- BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29),
-};
-
-struct BC_REG_CONFIG {
- uint32_t DbgOptions;
-};
-
-#if defined(__KERNEL__) || defined(__LINUX_USER__)
-#else
-/* Align data structures */
-#define ALIGN(x) __declspec(align(x))
-#endif
-
-/* mode
- * b[0]..b[7] = _DtsDeviceOpenMode
- * b[8] = Load new FW
- * b[9] = Load file play back FW
- * b[10] = Disk format (0 for HD DVD and 1 for BLU ray)
- * b[11]-b[15] = default output resolution
- * b[16] = Skip TX CPB Buffer Check
- * b[17] = Adaptive Output Encrypt/Scramble Scheme
- * b[18]-b[31] = reserved for future use
- */
-
-/* To allow multiple apps to open the device. */
-enum DtsDeviceOpenMode {
- DTS_PLAYBACK_MODE = 0,
- DTS_DIAG_MODE,
- DTS_MONITOR_MODE,
- DTS_HWINIT_MODE
-};
-
-/* To enable the filter to selectively enable/disable fixes or erratas */
-enum DtsDeviceFixMode {
- DTS_LOAD_NEW_FW = BC_BIT(8),
- DTS_LOAD_FILE_PLAY_FW = BC_BIT(9),
- DTS_DISK_FMT_BD = BC_BIT(10),
- /* b[11]-b[15] : Default output resolution */
- DTS_SKIP_TX_CHK_CPB = BC_BIT(16),
- DTS_ADAPTIVE_OUTPUT_PER = BC_BIT(17),
- DTS_INTELLIMAP = BC_BIT(18),
- /* b[19]-b[21] : select clock frequency */
- DTS_PLAYBACK_DROP_RPT_MODE = BC_BIT(22)
-};
-
-#define DTS_DFLT_RESOLUTION(x) (x<<11)
-
-#define DTS_DFLT_CLOCK(x) (x<<19)
-
-/* F/W File Version corresponding to S/W Releases */
-enum FW_FILE_VER {
- /* S/W release: 02.04.02 F/W release 2.12.2.0 */
- BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0))
-};
-
-/*------------------------------------------------------*
- * Stream Types for DtsOpenDecoder() *
- *------------------------------------------------------*/
-enum DtsOpenDecStreamTypes {
- BC_STREAM_TYPE_ES = 0,
- BC_STREAM_TYPE_PES = 1,
- BC_STREAM_TYPE_TS = 2,
- BC_STREAM_TYPE_ES_TSTAMP = 6,
-};
-
-/*------------------------------------------------------*
- * Video Algorithms for DtsSetVideoParams() *
- *------------------------------------------------------*/
-enum DtsSetVideoParamsAlgo {
- BC_VID_ALGO_H264 = 0,
- BC_VID_ALGO_MPEG2 = 1,
- BC_VID_ALGO_VC1 = 4,
- BC_VID_ALGO_VC1MP = 7,
-};
-
-/*------------------------------------------------------*
- * MPEG Extension to the PPB *
- *------------------------------------------------------*/
-#define BC_MPEG_VALID_PANSCAN (1)
-
-struct BC_PIB_EXT_MPEG {
- uint32_t valid;
- /* Always valid, defaults to picture size if no
- * sequence display extension in the stream. */
- uint32_t display_horizontal_size;
- uint32_t display_vertical_size;
-
- /* MPEG_VALID_PANSCAN
- * Offsets are a copy values from the MPEG stream. */
- uint32_t offset_count;
- int32_t horizontal_offset[3];
- int32_t vertical_offset[3];
-};
-
-/*------------------------------------------------------*
- * H.264 Extension to the PPB *
- *------------------------------------------------------*/
-/* Bit definitions for 'other.h264.valid' field */
-#define H264_VALID_PANSCAN (1)
-#define H264_VALID_SPS_CROP (2)
-#define H264_VALID_VUI (4)
-
-struct BC_PIB_EXT_H264 {
- /* 'valid' specifies which fields (or sets of
- * fields) below are valid. If the corresponding
- * bit in 'valid' is NOT set then that field(s)
- * is (are) not initialized. */
- uint32_t valid;
-
- /* H264_VALID_PANSCAN */
- uint32_t pan_scan_count;
- int32_t pan_scan_left[3];
- int32_t pan_scan_right[3];
- int32_t pan_scan_top[3];
- int32_t pan_scan_bottom[3];
-
- /* H264_VALID_SPS_CROP */
- int32_t sps_crop_left;
- int32_t sps_crop_right;
- int32_t sps_crop_top;
- int32_t sps_crop_bottom;
-
- /* H264_VALID_VUI */
- uint32_t chroma_top;
- uint32_t chroma_bottom;
-};
-
-/*------------------------------------------------------*
- * VC1 Extension to the PPB *
- *------------------------------------------------------*/
-#define VC1_VALID_PANSCAN (1)
-
-struct BC_PIB_EXT_VC1 {
- uint32_t valid;
-
- /* Always valid, defaults to picture size if no
- * sequence display extension in the stream. */
- uint32_t display_horizontal_size;
- uint32_t display_vertical_size;
-
- /* VC1 pan scan windows */
- uint32_t num_panscan_windows;
- int32_t ps_horiz_offset[4];
- int32_t ps_vert_offset[4];
- int32_t ps_width[4];
- int32_t ps_height[4];
-};
-
-/*------------------------------------------------------*
- * Picture Information Block *
- *------------------------------------------------------*/
-#if defined(__LINUX_USER__)
-/* Values for 'pulldown' field. '0' means no pulldown information
- * was present for this picture. */
-enum {
- vdecNoPulldownInfo = 0,
- vdecTop = 1,
- vdecBottom = 2,
- vdecTopBottom = 3,
- vdecBottomTop = 4,
- vdecTopBottomTop = 5,
- vdecBottomTopBottom = 6,
- vdecFrame_X2 = 7,
- vdecFrame_X3 = 8,
- vdecFrame_X1 = 9,
- vdecFrame_X4 = 10,
-};
-
-/* Values for the 'frame_rate' field. */
-enum {
- vdecFrameRateUnknown = 0,
- vdecFrameRate23_97,
- vdecFrameRate24,
- vdecFrameRate25,
- vdecFrameRate29_97,
- vdecFrameRate30,
- vdecFrameRate50,
- vdecFrameRate59_94,
- vdecFrameRate60,
-};
-
-/* Values for the 'aspect_ratio' field. */
-enum {
- vdecAspectRatioUnknown = 0,
- vdecAspectRatioSquare,
- vdecAspectRatio12_11,
- vdecAspectRatio10_11,
- vdecAspectRatio16_11,
- vdecAspectRatio40_33,
- vdecAspectRatio24_11,
- vdecAspectRatio20_11,
- vdecAspectRatio32_11,
- vdecAspectRatio80_33,
- vdecAspectRatio18_11,
- vdecAspectRatio15_11,
- vdecAspectRatio64_33,
- vdecAspectRatio160_99,
- vdecAspectRatio4_3,
- vdecAspectRatio16_9,
- vdecAspectRatio221_1,
- vdecAspectRatioOther = 255,
-};
-
-/* Values for the 'colour_primaries' field. */
-enum {
- vdecColourPrimariesUnknown = 0,
- vdecColourPrimariesBT709,
- vdecColourPrimariesUnspecified,
- vdecColourPrimariesReserved,
- vdecColourPrimariesBT470_2M = 4,
- vdecColourPrimariesBT470_2BG,
- vdecColourPrimariesSMPTE170M,
- vdecColourPrimariesSMPTE240M,
- vdecColourPrimariesGenericFilm,
-};
-/**
- * @vdecRESOLUTION_CUSTOM: custom
- * @vdecRESOLUTION_480i: 480i
- * @vdecRESOLUTION_1080i: 1080i (1920x1080, 60i)
- * @vdecRESOLUTION_NTSC: NTSC (720x483, 60i)
- * @vdecRESOLUTION_480p: 480p (720x480, 60p)
- * @vdecRESOLUTION_720p: 720p (1280x720, 60p)
- * @vdecRESOLUTION_PAL1: PAL_1 (720x576, 50i)
- * @vdecRESOLUTION_1080i25: 1080i25 (1920x1080, 50i)
- * @vdecRESOLUTION_720p50: 720p50 (1280x720, 50p)
- * @vdecRESOLUTION_576p: 576p (720x576, 50p)
- * @vdecRESOLUTION_1080i29_97: 1080i (1920x1080, 59.94i)
- * @vdecRESOLUTION_720p59_94: 720p (1280x720, 59.94p)
- * @vdecRESOLUTION_SD_DVD: SD DVD (720x483, 60i)
- * @vdecRESOLUTION_480p656: 480p (720x480, 60p),
- * output bus width 8 bit, clock 74.25MHz
- * @vdecRESOLUTION_1080p23_976: 1080p23_976 (1920x1080, 23.976p)
- * @vdecRESOLUTION_720p23_976: 720p23_976 (1280x720p, 23.976p)
- * @vdecRESOLUTION_240p29_97: 240p (1440x240, 29.97p )
- * @vdecRESOLUTION_240p30: 240p (1440x240, 30p)
- * @vdecRESOLUTION_288p25: 288p (1440x288p, 25p)
- * @vdecRESOLUTION_1080p29_97: 1080p29_97 (1920x1080, 29.97p)
- * @vdecRESOLUTION_1080p30: 1080p30 (1920x1080, 30p)
- * @vdecRESOLUTION_1080p24: 1080p24 (1920x1080, 24p)
- * @vdecRESOLUTION_1080p25: 1080p25 (1920x1080, 25p)
- * @vdecRESOLUTION_720p24: 720p24 (1280x720, 25p)
- * @vdecRESOLUTION_720p29_97: 720p29.97 (1280x720, 29.97p)
- * @vdecRESOLUTION_480p23_976: 480p23.976 (720*480, 23.976)
- * @vdecRESOLUTION_480p29_97: 480p29.976 (720*480, 29.97p)
- * @vdecRESOLUTION_576p25: 576p25 (720*576, 25p)
- * @vdecRESOLUTION_480p0: 480p (720x480, 0p)
- * @vdecRESOLUTION_480i0: 480i (720x480, 0i)
- * @vdecRESOLUTION_576p0: 576p (720x576, 0p)
- * @vdecRESOLUTION_720p0: 720p (1280x720, 0p)
- * @vdecRESOLUTION_1080p0: 1080p (1920x1080, 0p)
- * @vdecRESOLUTION_1080i0: 1080i (1920x1080, 0i)
- */
-enum {
- vdecRESOLUTION_CUSTOM = 0x00000000,
- vdecRESOLUTION_480i = 0x00000001,
- vdecRESOLUTION_1080i = 0x00000002,
- vdecRESOLUTION_NTSC = 0x00000003,
- vdecRESOLUTION_480p = 0x00000004,
- vdecRESOLUTION_720p = 0x00000005,
- vdecRESOLUTION_PAL1 = 0x00000006,
- vdecRESOLUTION_1080i25 = 0x00000007,
- vdecRESOLUTION_720p50 = 0x00000008,
- vdecRESOLUTION_576p = 0x00000009,
- vdecRESOLUTION_1080i29_97 = 0x0000000A,
- vdecRESOLUTION_720p59_94 = 0x0000000B,
- vdecRESOLUTION_SD_DVD = 0x0000000C,
- vdecRESOLUTION_480p656 = 0x0000000D,
- vdecRESOLUTION_1080p23_976 = 0x0000000E,
- vdecRESOLUTION_720p23_976 = 0x0000000F,
- vdecRESOLUTION_240p29_97 = 0x00000010,
- vdecRESOLUTION_240p30 = 0x00000011,
- vdecRESOLUTION_288p25 = 0x00000012,
- vdecRESOLUTION_1080p29_97 = 0x00000013,
- vdecRESOLUTION_1080p30 = 0x00000014,
- vdecRESOLUTION_1080p24 = 0x00000015,
- vdecRESOLUTION_1080p25 = 0x00000016,
- vdecRESOLUTION_720p24 = 0x00000017,
- vdecRESOLUTION_720p29_97 = 0x00000018,
- vdecRESOLUTION_480p23_976 = 0x00000019,
- vdecRESOLUTION_480p29_97 = 0x0000001A,
- vdecRESOLUTION_576p25 = 0x0000001B,
- /* For Zero Frame Rate */
- vdecRESOLUTION_480p0 = 0x0000001C,
- vdecRESOLUTION_480i0 = 0x0000001D,
- vdecRESOLUTION_576p0 = 0x0000001E,
- vdecRESOLUTION_720p0 = 0x0000001F,
- vdecRESOLUTION_1080p0 = 0x00000020,
- vdecRESOLUTION_1080i0 = 0x00000021,
-};
-
-/* Bit definitions for 'flags' field */
-#define VDEC_FLAG_EOS (0x0004)
-
-#define VDEC_FLAG_FRAME (0x0000)
-#define VDEC_FLAG_FIELDPAIR (0x0008)
-#define VDEC_FLAG_TOPFIELD (0x0010)
-#define VDEC_FLAG_BOTTOMFIELD (0x0018)
-
-#define VDEC_FLAG_PROGRESSIVE_SRC (0x0000)
-#define VDEC_FLAG_INTERLACED_SRC (0x0020)
-#define VDEC_FLAG_UNKNOWN_SRC (0x0040)
-
-#define VDEC_FLAG_BOTTOM_FIRST (0x0080)
-#define VDEC_FLAG_LAST_PICTURE (0x0100)
-
-#define VDEC_FLAG_PICTURE_META_DATA_PRESENT (0x40000)
-
-#endif /* __LINUX_USER__ */
-
-enum _BC_OUTPUT_FORMAT {
- MODE420 = 0x0,
- MODE422_YUY2 = 0x1,
- MODE422_UYVY = 0x2,
-};
-/**
- * struct BC_PIC_INFO_BLOCK
- * @timeStam;: Timestamp
- * @picture_number: Ordinal display number
- * @width: pixels
- * @height: pixels
- * @chroma_format: 0x420, 0x422 or 0x444
- * @n_drop;: number of non-reference frames
- * remaining to be dropped
- */
-struct BC_PIC_INFO_BLOCK {
- /* Common fields. */
- uint64_t timeStamp;
- uint32_t picture_number;
- uint32_t width;
- uint32_t height;
- uint32_t chroma_format;
- uint32_t pulldown;
- uint32_t flags;
- uint32_t frame_rate;
- uint32_t aspect_ratio;
- uint32_t colour_primaries;
- uint32_t picture_meta_payload;
- uint32_t sess_num;
- uint32_t ycom;
- uint32_t custom_aspect_ratio_width_height;
- uint32_t n_drop; /* number of non-reference frames
- remaining to be dropped */
-
- /* Protocol-specific extensions. */
- union {
- struct BC_PIB_EXT_H264 h264;
- struct BC_PIB_EXT_MPEG mpeg;
- struct BC_PIB_EXT_VC1 vc1;
- } other;
-
-};
-
-/*------------------------------------------------------*
- * ProcOut Info *
- *------------------------------------------------------*/
-
-/**
- * enum POUT_OPTIONAL_IN_FLAGS - Optional flags for ProcOut Interface.
- * @BC_POUT_FLAGS_YV12: Copy Data in YV12 format
- * @BC_POUT_FLAGS_STRIDE: Stride size is valid.
- * @BC_POUT_FLAGS_SIZE: Take size information from Application
- * @BC_POUT_FLAGS_INTERLACED: copy only half the bytes
- * @BC_POUT_FLAGS_INTERLEAVED: interleaved frame
- * @: * @BC_POUT_FLAGS_FMT_CHANGE: Data is not VALID when this flag is set
- * @BC_POUT_FLAGS_PIB_VALID: PIB Information valid
- * @BC_POUT_FLAGS_ENCRYPTED: Data is encrypted.
- * @BC_POUT_FLAGS_FLD_BOT: Bottom Field data
- */
-enum POUT_OPTIONAL_IN_FLAGS_ {
- /* Flags from App to Device */
- BC_POUT_FLAGS_YV12 = 0x01,
- BC_POUT_FLAGS_STRIDE = 0x02,
- BC_POUT_FLAGS_SIZE = 0x04,
- BC_POUT_FLAGS_INTERLACED = 0x08,
- BC_POUT_FLAGS_INTERLEAVED = 0x10,
-
- /* Flags from Device to APP */
- BC_POUT_FLAGS_FMT_CHANGE = 0x10000,
- BC_POUT_FLAGS_PIB_VALID = 0x20000,
- BC_POUT_FLAGS_ENCRYPTED = 0x40000,
- BC_POUT_FLAGS_FLD_BOT = 0x80000,
-};
-
-typedef enum BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width,
- uint32_t height, uint32_t stride, void *pOut);
-
-/* Line 21 Closed Caption */
-/* User Data */
-#define MAX_UD_SIZE 1792 /* 1920 - 128 */
-
-/**
- * struct BC_DTS_PROC_OUT
- * @Ybuff: Caller Supplied buffer for Y data
- * @YbuffSz: Caller Supplied Y buffer size
- * @YBuffDoneSz: Transferred Y datasize
- * @*UVbuff: Caller Supplied buffer for UV data
- * @UVbuffSz: Caller Supplied UV buffer size
- * @UVBuffDoneSz: Transferred UV data size
- * @StrideSz: Caller supplied Stride Size
- * @PoutFlags: Call IN Flags
- * @discCnt: Picture discontinuity count
- * @PicInfo: Picture Information Block Data
- * @b422Mode: Picture output Mode
- * @bPibEnc: PIB encrypted
- */
-struct BC_DTS_PROC_OUT {
- uint8_t *Ybuff;
- uint32_t YbuffSz;
- uint32_t YBuffDoneSz;
-
- uint8_t *UVbuff;
- uint32_t UVbuffSz;
- uint32_t UVBuffDoneSz;
-
- uint32_t StrideSz;
- uint32_t PoutFlags;
-
- uint32_t discCnt;
-
- struct BC_PIC_INFO_BLOCK PicInfo;
-
- /* Line 21 Closed Caption */
- /* User Data */
- uint32_t UserDataSz;
- uint8_t UserData[MAX_UD_SIZE];
-
- void *hnd;
- dts_pout_callback AppCallBack;
- uint8_t DropFrames;
- uint8_t b422Mode;
- uint8_t bPibEnc;
- uint8_t bRevertScramble;
-
-};
-/**
- * struct BC_DTS_STATUS
- * @ReadyListCount: Number of frames in ready list (reported by driver)
- * @PowerStateChange: Number of active state power
- * transitions (reported by driver)
- * @FramesDropped: Number of frames dropped. (reported by DIL)
- * @FramesCaptured: Number of frames captured. (reported by DIL)
- * @FramesRepeated: Number of frames repeated. (reported by DIL)
- * @InputCount: Times compressed video has been sent to the HW.
- * i.e. Successful DtsProcInput() calls (reported by DIL)
- * @InputTotalSize: Amount of compressed video that has been sent to the HW.
- * (reported by DIL)
- * @InputBusyCount: Times compressed video has attempted to be sent to the HW
- * but the input FIFO was full. (reported by DIL)
- * @PIBMissCount: Amount of times a PIB is invalid. (reported by DIL)
- * @cpbEmptySize: supported only for H.264, specifically changed for
- * Adobe. Report size of CPB buffer available. (reported by DIL)
- * @NextTimeStamp: TimeStamp of the next picture that will be returned
- * by a call to ProcOutput. Added for Adobe. Reported
- * back from the driver
- */
-struct BC_DTS_STATUS {
- uint8_t ReadyListCount;
- uint8_t FreeListCount;
- uint8_t PowerStateChange;
- uint8_t reserved_[1];
- uint32_t FramesDropped;
- uint32_t FramesCaptured;
- uint32_t FramesRepeated;
- uint32_t InputCount;
- uint64_t InputTotalSize;
- uint32_t InputBusyCount;
- uint32_t PIBMissCount;
- uint32_t cpbEmptySize;
- uint64_t NextTimeStamp;
- uint8_t reserved__[16];
-};
-
-#define BC_SWAP32(_v) \
- ((((_v) & 0xFF000000)>>24)| \
- (((_v) & 0x00FF0000)>>8)| \
- (((_v) & 0x0000FF00)<<8)| \
- (((_v) & 0x000000FF)<<24))
-
-#define WM_AGENT_TRAYICON_DECODER_OPEN 10001
-#define WM_AGENT_TRAYICON_DECODER_CLOSE 10002
-#define WM_AGENT_TRAYICON_DECODER_START 10003
-#define WM_AGENT_TRAYICON_DECODER_STOP 10004
-#define WM_AGENT_TRAYICON_DECODER_RUN 10005
-#define WM_AGENT_TRAYICON_DECODER_PAUSE 10006
-
-
-#endif /* _BC_DTS_DEFS_H_ */
+++ /dev/null
-/********************************************************************
- * Copyright(c) 2006-2009 Broadcom Corporation.
- *
- * Name: bc_dts_glob_lnx.h
- *
- * Description: Wrapper to Windows dts_glob.h for Link-Linux usage.
- * The idea is to define additional Linux related defs
- * in this file to avoid changes to existing Windows
- * glob file.
- *
- * AU
- *
- * HISTORY:
- *
- ********************************************************************
- * This header is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published
- * by the Free Software Foundation, either version 2.1 of the License.
- *
- * This header is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- * You should have received a copy of the GNU Lesser General Public License
- * along with this header. If not, see <http://www.gnu.org/licenses/>.
- *******************************************************************/
-
-#ifndef _BC_DTS_GLOB_LNX_H_
-#define _BC_DTS_GLOB_LNX_H_
-
-#ifdef __LINUX_USER__
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <ctype.h>
-#include <string.h>
-#include <errno.h>
-#include <netdb.h>
-#include <sys/time.h>
-#include <time.h>
-#include <arpa/inet.h>
-#include <linux/param.h>
-#include <linux/ioctl.h>
-#include <sys/select.h>
-
-#define DRVIFLIB_INT_API
-
-#endif
-
-#include "crystalhd.h"
-
-#define CRYSTALHD_API_NAME "crystalhd"
-#define CRYSTALHD_API_DEV_NAME "/dev/crystalhd"
-
-/*
- * These are SW stack tunable parameters shared
- * between the driver and the application.
- */
-enum BC_DTS_GLOBALS {
- BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */
- PCI_CFG_SIZE = 256, /* PCI config size buffer */
- BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */
- BC_LINK_MAX_OPENS = 3, /* Maximum simultaneous opens*/
- BC_LINK_MAX_SGLS = 1024, /* Maximum SG elements 4M/4K */
- BC_TX_LIST_CNT = 2, /* Max Tx DMA Rings */
- BC_RX_LIST_CNT = 8, /* Max Rx DMA Rings*/
- BC_PROC_OUTPUT_TIMEOUT = 3000, /* Milliseconds */
- BC_INFIFO_THRESHOLD = 0x10000,
-};
-
-struct BC_CMD_REG_ACC {
- uint32_t Offset;
- uint32_t Value;
-};
-
-struct BC_CMD_DEV_MEM {
- uint32_t StartOff;
- uint32_t NumDwords;
- uint32_t Rsrd;
-};
-
-/* FW Passthrough command structure */
-enum bc_fw_cmd_flags {
- BC_FW_CMD_FLAGS_NONE = 0,
- BC_FW_CMD_PIB_QS = 0x01,
-};
-
-struct BC_FW_CMD {
- uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ];
- uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ];
- uint32_t flags;
- uint32_t add_data;
-};
-
-struct BC_HW_TYPE {
- uint16_t PciDevId;
- uint16_t PciVenId;
- uint8_t HwRev;
- uint8_t Align[3];
-};
-
-struct BC_PCI_CFG {
- uint32_t Size;
- uint32_t Offset;
- uint8_t pci_cfg_space[PCI_CFG_SIZE];
-};
-
-struct BC_VERSION_INFO {
- uint8_t DriverMajor;
- uint8_t DriverMinor;
- uint16_t DriverRevision;
-};
-
-struct BC_START_RX_CAP {
- uint32_t Rsrd;
- uint32_t StartDeliveryThsh;
- uint32_t PauseThsh;
- uint32_t ResumeThsh;
-};
-
-struct BC_FLUSH_RX_CAP {
- uint32_t Rsrd;
- uint32_t bDiscardOnly;
-};
-
-struct BC_DTS_STATS {
- uint8_t drvRLL;
- uint8_t drvFLL;
- uint8_t eosDetected;
- uint8_t pwr_state_change;
-
- /* Stats from App */
- uint32_t opFrameDropped;
- uint32_t opFrameCaptured;
- uint32_t ipSampleCnt;
- uint64_t ipTotalSize;
- uint32_t reptdFrames;
- uint32_t pauseCount;
- uint32_t pibMisses;
- uint32_t discCounter;
-
- /* Stats from Driver */
- uint32_t TxFifoBsyCnt;
- uint32_t intCount;
- uint32_t DrvIgnIntrCnt;
- uint32_t DrvTotalFrmDropped;
- uint32_t DrvTotalHWErrs;
- uint32_t DrvTotalPIBFlushCnt;
- uint32_t DrvTotalFrmCaptured;
- uint32_t DrvPIBMisses;
- uint32_t DrvPauseTime;
- uint32_t DrvRepeatedFrms;
- uint32_t res1[13];
-
-};
-
-struct BC_PROC_INPUT {
- uint8_t *pDmaBuff;
- uint32_t BuffSz;
- uint8_t Mapped;
- uint8_t Encrypted;
- uint8_t Rsrd[2];
- uint32_t DramOffset; /* For debug use only */
-};
-
-struct BC_DEC_YUV_BUFFS {
- uint32_t b422Mode;
- uint8_t *YuvBuff;
- uint32_t YuvBuffSz;
- uint32_t UVbuffOffset;
- uint32_t YBuffDoneSz;
- uint32_t UVBuffDoneSz;
- uint32_t RefCnt;
-};
-
-enum DECOUT_COMPLETION_FLAGS {
- COMP_FLAG_NO_INFO = 0x00,
- COMP_FLAG_FMT_CHANGE = 0x01,
- COMP_FLAG_PIB_VALID = 0x02,
- COMP_FLAG_DATA_VALID = 0x04,
- COMP_FLAG_DATA_ENC = 0x08,
- COMP_FLAG_DATA_BOT = 0x10,
-};
-
-struct BC_DEC_OUT_BUFF {
- struct BC_DEC_YUV_BUFFS OutPutBuffs;
- struct BC_PIC_INFO_BLOCK PibInfo;
- uint32_t Flags;
- uint32_t BadFrCnt;
-};
-
-struct BC_NOTIFY_MODE {
- uint32_t Mode;
- uint32_t Rsvr[3];
-};
-
-struct BC_CLOCK {
- uint32_t clk;
- uint32_t Rsvr[3];
-};
-
-struct BC_IOCTL_DATA {
- enum BC_STATUS RetSts;
- uint32_t IoctlDataSz;
- uint32_t Timeout;
- union {
- struct BC_CMD_REG_ACC regAcc;
- struct BC_CMD_DEV_MEM devMem;
- struct BC_FW_CMD fwCmd;
- struct BC_HW_TYPE hwType;
- struct BC_PCI_CFG pciCfg;
- struct BC_VERSION_INFO VerInfo;
- struct BC_PROC_INPUT ProcInput;
- struct BC_DEC_YUV_BUFFS RxBuffs;
- struct BC_DEC_OUT_BUFF DecOutData;
- struct BC_START_RX_CAP RxCap;
- struct BC_FLUSH_RX_CAP FlushRxCap;
- struct BC_DTS_STATS drvStat;
- struct BC_NOTIFY_MODE NotifyMode;
- struct BC_CLOCK clockValue;
- } u;
- struct _BC_IOCTL_DATA *next;
-};
-
-enum BC_DRV_CMD {
- DRV_CMD_VERSION = 0, /* Get SW version */
- DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */
- DRV_CMD_REG_RD, /* Read Device Register */
- DRV_CMD_REG_WR, /* Write Device Register */
- DRV_CMD_FPGA_RD, /* Read FPGA Register */
- DRV_CMD_FPGA_WR, /* Write FPGA Register */
- DRV_CMD_MEM_RD, /* Read Device Memory */
- DRV_CMD_MEM_WR, /* Write Device Memory */
- DRV_CMD_RD_PCI_CFG, /* Read PCI Config Space */
- DRV_CMD_WR_PCI_CFG, /* Write the PCI Configuration Space*/
- DRV_CMD_FW_DOWNLOAD, /* Download Firmware */
- DRV_ISSUE_FW_CMD, /* Issue FW Cmd (pass through mode) */
- DRV_CMD_PROC_INPUT, /* Process Input Sample */
- DRV_CMD_ADD_RXBUFFS, /* Add Rx side buffers to driver pool */
- DRV_CMD_FETCH_RXBUFF, /* Get Rx DMAed buffer */
- DRV_CMD_START_RX_CAP, /* Start Rx Buffer Capture */
- DRV_CMD_FLUSH_RX_CAP, /* Stop the capture for now...
- we will enhance this later*/
- DRV_CMD_GET_DRV_STAT, /* Get Driver Internal Statistics */
- DRV_CMD_RST_DRV_STAT, /* Reset Driver Internal Statistics */
- DRV_CMD_NOTIFY_MODE, /* Notify the Mode to driver
- in which the application is Operating*/
- DRV_CMD_CHANGE_CLOCK, /* Change the core clock to either save power
- or improve performance */
-
- /* MUST be the last one.. */
- DRV_CMD_END, /* End of the List.. */
-};
-
-#define BC_IOC_BASE 'b'
-#define BC_IOC_VOID _IOC_NONE
-#define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type)
-#define BC_IOCTL_MB struct BC_IOCTL_DATA
-
-#define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB)
-#define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB)
-#define BCM_IOC_REG_RD BC_IOC_IOWR(DRV_CMD_REG_RD, BC_IOCTL_MB)
-#define BCM_IOC_REG_WR BC_IOC_IOWR(DRV_CMD_REG_WR, BC_IOCTL_MB)
-#define BCM_IOC_MEM_RD BC_IOC_IOWR(DRV_CMD_MEM_RD, BC_IOCTL_MB)
-#define BCM_IOC_MEM_WR BC_IOC_IOWR(DRV_CMD_MEM_WR, BC_IOCTL_MB)
-#define BCM_IOC_FPGA_RD BC_IOC_IOWR(DRV_CMD_FPGA_RD, BC_IOCTL_MB)
-#define BCM_IOC_FPGA_WR BC_IOC_IOWR(DRV_CMD_FPGA_WR, BC_IOCTL_MB)
-#define BCM_IOC_RD_PCI_CFG BC_IOC_IOWR(DRV_CMD_RD_PCI_CFG, BC_IOCTL_MB)
-#define BCM_IOC_WR_PCI_CFG BC_IOC_IOWR(DRV_CMD_WR_PCI_CFG, BC_IOCTL_MB)
-#define BCM_IOC_PROC_INPUT BC_IOC_IOWR(DRV_CMD_PROC_INPUT, BC_IOCTL_MB)
-#define BCM_IOC_ADD_RXBUFFS BC_IOC_IOWR(DRV_CMD_ADD_RXBUFFS, BC_IOCTL_MB)
-#define BCM_IOC_FETCH_RXBUFF BC_IOC_IOWR(DRV_CMD_FETCH_RXBUFF, BC_IOCTL_MB)
-#define BCM_IOC_FW_CMD BC_IOC_IOWR(DRV_ISSUE_FW_CMD, BC_IOCTL_MB)
-#define BCM_IOC_START_RX_CAP BC_IOC_IOWR(DRV_CMD_START_RX_CAP, BC_IOCTL_MB)
-#define BCM_IOC_FLUSH_RX_CAP BC_IOC_IOWR(DRV_CMD_FLUSH_RX_CAP, BC_IOCTL_MB)
-#define BCM_IOC_GET_DRV_STAT BC_IOC_IOWR(DRV_CMD_GET_DRV_STAT, BC_IOCTL_MB)
-#define BCM_IOC_RST_DRV_STAT BC_IOC_IOWR(DRV_CMD_RST_DRV_STAT, BC_IOCTL_MB)
-#define BCM_IOC_NOTIFY_MODE BC_IOC_IOWR(DRV_CMD_NOTIFY_MODE, BC_IOCTL_MB)
-#define BCM_IOC_FW_DOWNLOAD BC_IOC_IOWR(DRV_CMD_FW_DOWNLOAD, BC_IOCTL_MB)
-#define BCM_IOC_CHG_CLK BC_IOC_IOWR(DRV_CMD_CHANGE_CLOCK, BC_IOCTL_MB)
-#define BCM_IOC_END BC_IOC_VOID
-
-/* Wrapper for main IOCTL data */
-struct crystalhd_ioctl_data {
- struct BC_IOCTL_DATA udata; /* IOCTL from App..*/
- uint32_t u_id; /* Driver specific user ID */
- uint32_t cmd; /* Cmd ID for driver's use. */
- void *add_cdata; /* Additional command specific data..*/
- uint32_t add_cdata_sz; /* Additional command specific data size */
- struct crystalhd_ioctl_data *next; /* List/Fifo management */
-};
-
-enum crystalhd_kmod_ver {
- crystalhd_kmod_major = 0,
- crystalhd_kmod_minor = 9,
- crystalhd_kmod_rev = 27,
-};
-
-#endif
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 1999-2009, Broadcom Corporation.
- *
- * Name: bcm_70012_regs.h
- *
- * Description: BCM70012 registers
- *
- ********************************************************************
- * This header is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published
- * by the Free Software Foundation, either version 2.1 of the License.
- *
- * This header is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- * You should have received a copy of the GNU Lesser General Public License
- * along with this header. If not, see <http://www.gnu.org/licenses/>.
- ***************************************************************************/
-
-#ifndef MACFILE_H__
-#define MACFILE_H__
-
-/**
- * m = memory, c = core, r = register, f = field, d = data.
- */
-#if !defined(GET_FIELD) && !defined(SET_FIELD)
-#define BRCM_ALIGN(c, r, f) c##_##r##_##f##_ALIGN
-#define BRCM_BITS(c, r, f) c##_##r##_##f##_BITS
-#define BRCM_MASK(c, r, f) c##_##r##_##f##_MASK
-#define BRCM_SHIFT(c, r, f) c##_##r##_##f##_SHIFT
-
-#define GET_FIELD(m, c, r, f) \
- ((((m) & BRCM_MASK(c, r, f)) >> BRCM_SHIFT(c, r, f)) << \
- BRCM_ALIGN(c, r, f))
-
-#define SET_FIELD(m, c, r, f, d) \
- ((m) = (((m) & ~BRCM_MASK(c, r, f)) | ((((d) >> BRCM_ALIGN(c, r, f)) << \
- BRCM_SHIFT(c, r, f)) & BRCM_MASK(c, r, f))) \
- )
-
-#define SET_TYPE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##d)
-#define SET_NAME_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, c##_##r##_##f##_##d)
-#define SET_VALUE_FIELD(m, c, r, f, d) SET_FIELD(m, c, r, f, d)
-
-#endif /* GET & SET */
-
-/****************************************************************************
- * Core Enums.
- ***************************************************************************/
-/****************************************************************************
- * Enums: AES_RGR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define AES_RGR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define AES_RGR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: CCE_RGR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define CCE_RGR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define CCE_RGR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: DBU_RGR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define DBU_RGR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define DBU_RGR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: DCI_RGR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define DCI_RGR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define DCI_RGR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: GISB_ARBITER_DEASSERT_ASSERT
- ***************************************************************************/
-#define GISB_ARBITER_DEASSERT_ASSERT_DEASSERT 0
-#define GISB_ARBITER_DEASSERT_ASSERT_ASSERT 1
-
-/****************************************************************************
- * Enums: GISB_ARBITER_UNMASK_MASK
- ***************************************************************************/
-#define GISB_ARBITER_UNMASK_MASK_UNMASK 0
-#define GISB_ARBITER_UNMASK_MASK_MASK 1
-
-/****************************************************************************
- * Enums: GISB_ARBITER_DISABLE_ENABLE
- ***************************************************************************/
-#define GISB_ARBITER_DISABLE_ENABLE_DISABLE 0
-#define GISB_ARBITER_DISABLE_ENABLE_ENABLE 1
-
-/****************************************************************************
- * Enums: I2C_GR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define I2C_GR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define I2C_GR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: MISC_GR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define MISC_GR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define MISC_GR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * Enums: OTP_GR_BRIDGE_RESET_CTRL
- ***************************************************************************/
-#define OTP_GR_BRIDGE_RESET_CTRL_DEASSERT 0
-#define OTP_GR_BRIDGE_RESET_CTRL_ASSERT 1
-
-/****************************************************************************
- * BCM70012_TGT_TOP_PCIE_CFG
- ***************************************************************************/
-#define PCIE_CFG_DEVICE_VENDOR_ID 0x00000000 /* DEVICE_VENDOR_ID Register */
-#define PCIE_CFG_STATUS_COMMAND 0x00000004 /* STATUS_COMMAND Register */
-#define PCIE_CFG_PCI_CLASSCODE_AND_REVISION_ID 0x00000008 /* PCI_CLASSCODE_AND_REVISION_ID Register */
-#define PCIE_CFG_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE_SIZE 0x0000000c /* BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE_SIZE Register */
-#define PCIE_CFG_BASE_ADDRESS_1 0x00000010 /* BASE_ADDRESS_1 Register */
-#define PCIE_CFG_BASE_ADDRESS_2 0x00000014 /* BASE_ADDRESS_2 Register */
-#define PCIE_CFG_BASE_ADDRESS_3 0x00000018 /* BASE_ADDRESS_3 Register */
-#define PCIE_CFG_BASE_ADDRESS_4 0x0000001c /* BASE_ADDRESS_4 Register */
-#define PCIE_CFG_CARDBUS_CIS_POINTER 0x00000028 /* CARDBUS_CIS_POINTER Register */
-#define PCIE_CFG_SUBSYSTEM_DEVICE_VENDOR_ID 0x0000002c /* SUBSYSTEM_DEVICE_VENDOR_ID Register */
-#define PCIE_CFG_EXPANSION_ROM_BASE_ADDRESS 0x00000030 /* EXPANSION_ROM_BASE_ADDRESS Register */
-#define PCIE_CFG_CAPABILITIES_POINTER 0x00000034 /* CAPABILITIES_POINTER Register */
-#define PCIE_CFG_INTERRUPT 0x0000003c /* INTERRUPT Register */
-#define PCIE_CFG_VPD_CAPABILITIES 0x00000040 /* VPD_CAPABILITIES Register */
-#define PCIE_CFG_VPD_DATA 0x00000044 /* VPD_DATA Register */
-#define PCIE_CFG_POWER_MANAGEMENT_CAPABILITY 0x00000048 /* POWER_MANAGEMENT_CAPABILITY Register */
-#define PCIE_CFG_POWER_MANAGEMENT_CONTROL_STATUS 0x0000004c /* POWER_MANAGEMENT_CONTROL_STATUS Register */
-#define PCIE_CFG_MSI_CAPABILITY_HEADER 0x00000050 /* MSI_CAPABILITY_HEADER Register */
-#define PCIE_CFG_MSI_LOWER_ADDRESS 0x00000054 /* MSI_LOWER_ADDRESS Register */
-#define PCIE_CFG_MSI_UPPER_ADDRESS_REGISTER 0x00000058 /* MSI_UPPER_ADDRESS_REGISTER Register */
-#define PCIE_CFG_MSI_DATA 0x0000005c /* MSI_DATA Register */
-#define PCIE_CFG_BROADCOM_VENDOR_SPECIFIC_CAPABILITY_HEADER 0x00000060 /* BROADCOM_VENDOR_SPECIFIC_CAPABILITY_HEADER Register */
-#define PCIE_CFG_RESET_COUNTERS_INITIAL_VALUES 0x00000064 /* RESET_COUNTERS_INITIAL_VALUES Register */
-#define PCIE_CFG_MISCELLANEOUS_HOST_CONTROL 0x00000068 /* MISCELLANEOUS_HOST_CONTROL Register */
-#define PCIE_CFG_SPARE 0x0000006c /* SPARE Register */
-#define PCIE_CFG_PCI_STATE 0x00000070 /* PCI_STATE Register */
-#define PCIE_CFG_CLOCK_CONTROL 0x00000074 /* CLOCK_CONTROL Register */
-#define PCIE_CFG_REGISTER_BASE 0x00000078 /* REGISTER_BASE Register */
-#define PCIE_CFG_MEMORY_BASE 0x0000007c /* MEMORY_BASE Register */
-#define PCIE_CFG_REGISTER_DATA 0x00000080 /* REGISTER_DATA Register */
-#define PCIE_CFG_MEMORY_DATA 0x00000084 /* MEMORY_DATA Register */
-#define PCIE_CFG_EXPANSION_ROM_BAR_SIZE 0x00000088 /* EXPANSION_ROM_BAR_SIZE Register */
-#define PCIE_CFG_EXPANSION_ROM_ADDRESS 0x0000008c /* EXPANSION_ROM_ADDRESS Register */
-#define PCIE_CFG_EXPANSION_ROM_DATA 0x00000090 /* EXPANSION_ROM_DATA Register */
-#define PCIE_CFG_VPD_INTERFACE 0x00000094 /* VPD_INTERFACE Register */
-#define PCIE_CFG_UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_UPPER 0x00000098 /* UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_UPPER Register */
-#define PCIE_CFG_UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_LOWER 0x0000009c /* UNDI_RECEIVE_BD_STANDARD_PRODUCER_RING_PRODUCER_INDEX_MAILBOX_LOWER Register */
-#define PCIE_CFG_UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_UPPER 0x000000a0 /* UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_UPPER Register */
-#define PCIE_CFG_UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_LOWER 0x000000a4 /* UNDI_RECEIVE_RETURN_RING_CONSUMER_INDEX_LOWER Register */
-#define PCIE_CFG_UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_UPPER 0x000000a8 /* UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_UPPER Register */
-#define PCIE_CFG_UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_LOWER 0x000000ac /* UNDI_SEND_BD_PRODUCER_INDEX_MAILBOX_LOWER Register */
-#define PCIE_CFG_INT_MAILBOX_UPPER 0x000000b0 /* INT_MAILBOX_UPPER Register */
-#define PCIE_CFG_INT_MAILBOX_LOWER 0x000000b4 /* INT_MAILBOX_LOWER Register */
-#define PCIE_CFG_PRODUCT_ID_AND_ASIC_REVISION 0x000000bc /* PRODUCT_ID_AND_ASIC_REVISION Register */
-#define PCIE_CFG_FUNCTION_EVENT 0x000000c0 /* FUNCTION_EVENT Register */
-#define PCIE_CFG_FUNCTION_EVENT_MASK 0x000000c4 /* FUNCTION_EVENT_MASK Register */
-#define PCIE_CFG_FUNCTION_PRESENT 0x000000c8 /* FUNCTION_PRESENT Register */
-#define PCIE_CFG_PCIE_CAPABILITIES 0x000000cc /* PCIE_CAPABILITIES Register */
-#define PCIE_CFG_DEVICE_CAPABILITIES 0x000000d0 /* DEVICE_CAPABILITIES Register */
-#define PCIE_CFG_DEVICE_STATUS_CONTROL 0x000000d4 /* DEVICE_STATUS_CONTROL Register */
-#define PCIE_CFG_LINK_CAPABILITY 0x000000d8 /* LINK_CAPABILITY Register */
-#define PCIE_CFG_LINK_STATUS_CONTROL 0x000000dc /* LINK_STATUS_CONTROL Register */
-#define PCIE_CFG_DEVICE_CAPABILITIES_2 0x000000f0 /* DEVICE_CAPABILITIES_2 Register */
-#define PCIE_CFG_DEVICE_STATUS_CONTROL_2 0x000000f4 /* DEVICE_STATUS_CONTROL_2 Register */
-#define PCIE_CFG_LINK_CAPABILITIES_2 0x000000f8 /* LINK_CAPABILITIES_2 Register */
-#define PCIE_CFG_LINK_STATUS_CONTROL_2 0x000000fc /* LINK_STATUS_CONTROL_2 Register */
-#define PCIE_CFG_ADVANCED_ERROR_REPORTING_ENHANCED_CAPABILITY_HEADER 0x00000100 /* ADVANCED_ERROR_REPORTING_ENHANCED_CAPABILITY_HEADER Register */
-#define PCIE_CFG_UNCORRECTABLE_ERROR_STATUS 0x00000104 /* UNCORRECTABLE_ERROR_STATUS Register */
-#define PCIE_CFG_UNCORRECTABLE_ERROR_MASK 0x00000108 /* UNCORRECTABLE_ERROR_MASK Register */
-#define PCIE_CFG_UNCORRECTABLE_ERROR_SEVERITY 0x0000010c /* UNCORRECTABLE_ERROR_SEVERITY Register */
-#define PCIE_CFG_CORRECTABLE_ERROR_STATUS 0x00000110 /* CORRECTABLE_ERROR_STATUS Register */
-#define PCIE_CFG_CORRECTABLE_ERROR_MASK 0x00000114 /* CORRECTABLE_ERROR_MASK Register */
-#define PCIE_CFG_ADVANCED_ERROR_CAPABILITIES_AND_CONTROL 0x00000118 /* ADVANCED_ERROR_CAPABILITIES_AND_CONTROL Register */
-#define PCIE_CFG_HEADER_LOG_1 0x0000011c /* HEADER_LOG_1 Register */
-#define PCIE_CFG_HEADER_LOG_2 0x00000120 /* HEADER_LOG_2 Register */
-#define PCIE_CFG_HEADER_LOG_3 0x00000124 /* HEADER_LOG_3 Register */
-#define PCIE_CFG_HEADER_LOG_4 0x00000128 /* HEADER_LOG_4 Register */
-#define PCIE_CFG_VIRTUAL_CHANNEL_ENHANCED_CAPABILITY_HEADER 0x0000013c /* VIRTUAL_CHANNEL_ENHANCED_CAPABILITY_HEADER Register */
-#define PCIE_CFG_PORT_VC_CAPABILITY 0x00000140 /* PORT_VC_CAPABILITY Register */
-#define PCIE_CFG_PORT_VC_CAPABILITY_2 0x00000144 /* PORT_VC_CAPABILITY_2 Register */
-#define PCIE_CFG_PORT_VC_STATUS_CONTROL 0x00000148 /* PORT_VC_STATUS_CONTROL Register */
-#define PCIE_CFG_VC_RESOURCE_CAPABILITY 0x0000014c /* VC_RESOURCE_CAPABILITY Register */
-#define PCIE_CFG_VC_RESOURCE_CONTROL 0x00000150 /* VC_RESOURCE_CONTROL Register */
-#define PCIE_CFG_VC_RESOURCE_STATUS 0x00000154 /* VC_RESOURCE_STATUS Register */
-#define PCIE_CFG_DEVICE_SERIAL_NO_ENHANCED_CAPABILITY_HEADER 0x00000160 /* DEVICE_SERIAL_NO_ENHANCED_CAPABILITY_HEADER Register */
-#define PCIE_CFG_DEVICE_SERIAL_NO_LOWER_DW 0x00000164 /* DEVICE_SERIAL_NO_LOWER_DW Register */
-#define PCIE_CFG_DEVICE_SERIAL_NO_UPPER_DW 0x00000168 /* DEVICE_SERIAL_NO_UPPER_DW Register */
-#define PCIE_CFG_POWER_BUDGETING_ENHANCED_CAPABILITY_HEADER 0x0000016c /* POWER_BUDGETING_ENHANCED_CAPABILITY_HEADER Register */
-#define PCIE_CFG_POWER_BUDGETING_DATA_SELECT 0x00000170 /* POWER_BUDGETING_DATA_SELECT Register */
-#define PCIE_CFG_POWER_BUDGETING_DATA 0x00000174 /* POWER_BUDGETING_DATA Register */
-#define PCIE_CFG_POWER_BUDGETING_CAPABILITY 0x00000178 /* POWER_BUDGETING_CAPABILITY Register */
-#define PCIE_CFG_FIRMWARE_POWER_BUDGETING_2_1 0x0000017c /* FIRMWARE_POWER_BUDGETING_2_1 Register */
-#define PCIE_CFG_FIRMWARE_POWER_BUDGETING_4_3 0x00000180 /* FIRMWARE_POWER_BUDGETING_4_3 Register */
-#define PCIE_CFG_FIRMWARE_POWER_BUDGETING_6_5 0x00000184 /* FIRMWARE_POWER_BUDGETING_6_5 Register */
-#define PCIE_CFG_FIRMWARE_POWER_BUDGETING_8_7 0x00000188 /* FIRMWARE_POWER_BUDGETING_8_7 Register */
-#define PCIE_CFG_PCIE_1_1_ADVISORY_NON_FATAL_ERROR_MASKING 0x0000018c /* PCIE_1_1_ADVISORY_NON_FATAL_ERROR_MASKING Register */
-
-
-/****************************************************************************
- * BCM70012_TGT_TOP_PCIE_TL
- ***************************************************************************/
-#define PCIE_TL_TL_CONTROL 0x00000400 /* TL_CONTROL Register */
-#define PCIE_TL_TRANSACTION_CONFIGURATION 0x00000404 /* TRANSACTION_CONFIGURATION Register */
-
-
-/****************************************************************************
- * BCM70012_TGT_TOP_PCIE_DLL
- ***************************************************************************/
-#define PCIE_DLL_DATA_LINK_CONTROL 0x00000500 /* DATA_LINK_CONTROL Register */
-#define PCIE_DLL_DATA_LINK_STATUS 0x00000504 /* DATA_LINK_STATUS Register */
-
-
-/****************************************************************************
- * BCM70012_TGT_TOP_INTR
- ***************************************************************************/
-#define INTR_INTR_STATUS 0x00000700 /* Interrupt Status Register */
-#define INTR_INTR_SET 0x00000704 /* Interrupt Set Register */
-#define INTR_INTR_CLR_REG 0x00000708 /* Interrupt Clear Register */
-#define INTR_INTR_MSK_STS_REG 0x0000070c /* Interrupt Mask Status Register */
-#define INTR_INTR_MSK_SET_REG 0x00000710 /* Interrupt Mask Set Register */
-#define INTR_INTR_MSK_CLR_REG 0x00000714 /* Interrupt Mask Clear Register */
-#define INTR_EOI_CTRL 0x00000720 /* End of interrupt control register */
-
-
-/****************************************************************************
- * BCM70012_MISC_TOP_MISC1
- ***************************************************************************/
-#define MISC1_TX_FIRST_DESC_L_ADDR_LIST0 0x00000c00 /* Tx DMA Descriptor List0 First Descriptor lower Address */
-#define MISC1_TX_FIRST_DESC_U_ADDR_LIST0 0x00000c04 /* Tx DMA Descriptor List0 First Descriptor Upper Address */
-#define MISC1_TX_FIRST_DESC_L_ADDR_LIST1 0x00000c08 /* Tx DMA Descriptor List1 First Descriptor Lower Address */
-#define MISC1_TX_FIRST_DESC_U_ADDR_LIST1 0x00000c0c /* Tx DMA Descriptor List1 First Descriptor Upper Address */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS 0x00000c10 /* Tx DMA Software Descriptor List Control and Status */
-#define MISC1_TX_DMA_ERROR_STATUS 0x00000c18 /* Tx DMA Engine Error Status */
-#define MISC1_TX_DMA_LIST0_CUR_DESC_L_ADDR 0x00000c1c /* Tx DMA List0 Current Descriptor Lower Address */
-#define MISC1_TX_DMA_LIST0_CUR_DESC_U_ADDR 0x00000c20 /* Tx DMA List0 Current Descriptor Upper Address */
-#define MISC1_TX_DMA_LIST0_CUR_BYTE_CNT_REM 0x00000c24 /* Tx DMA List0 Current Descriptor Upper Address */
-#define MISC1_TX_DMA_LIST1_CUR_DESC_L_ADDR 0x00000c28 /* Tx DMA List1 Current Descriptor Lower Address */
-#define MISC1_TX_DMA_LIST1_CUR_DESC_U_ADDR 0x00000c2c /* Tx DMA List1 Current Descriptor Upper Address */
-#define MISC1_TX_DMA_LIST1_CUR_BYTE_CNT_REM 0x00000c30 /* Tx DMA List1 Current Descriptor Upper Address */
-#define MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0 0x00000c34 /* Y Rx Descriptor List0 First Descriptor Lower Address */
-#define MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST0 0x00000c38 /* Y Rx Descriptor List0 First Descriptor Upper Address */
-#define MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1 0x00000c3c /* Y Rx Descriptor List1 First Descriptor Lower Address */
-#define MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST1 0x00000c40 /* Y Rx Descriptor List1 First Descriptor Upper Address */
-#define MISC1_Y_RX_SW_DESC_LIST_CTRL_STS 0x00000c44 /* Y Rx Software Descriptor List Control and Status */
-#define MISC1_Y_RX_ERROR_STATUS 0x00000c4c /* Y Rx Engine Error Status */
-#define MISC1_Y_RX_LIST0_CUR_DESC_L_ADDR 0x00000c50 /* Y Rx List0 Current Descriptor Lower Address */
-#define MISC1_Y_RX_LIST0_CUR_DESC_U_ADDR 0x00000c54 /* Y Rx List0 Current Descriptor Upper Address */
-#define MISC1_Y_RX_LIST0_CUR_BYTE_CNT 0x00000c58 /* Y Rx List0 Current Descriptor Byte Count */
-#define MISC1_Y_RX_LIST1_CUR_DESC_L_ADDR 0x00000c5c /* Y Rx List1 Current Descriptor Lower address */
-#define MISC1_Y_RX_LIST1_CUR_DESC_U_ADDR 0x00000c60 /* Y Rx List1 Current Descriptor Upper address */
-#define MISC1_Y_RX_LIST1_CUR_BYTE_CNT 0x00000c64 /* Y Rx List1 Current Descriptor Byte Count */
-#define MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0 0x00000c68 /* UV Rx Descriptor List0 First Descriptor lower Address */
-#define MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST0 0x00000c6c /* UV Rx Descriptor List0 First Descriptor Upper Address */
-#define MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1 0x00000c70 /* UV Rx Descriptor List1 First Descriptor Lower Address */
-#define MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST1 0x00000c74 /* UV Rx Descriptor List1 First Descriptor Upper Address */
-#define MISC1_UV_RX_SW_DESC_LIST_CTRL_STS 0x00000c78 /* UV Rx Software Descriptor List Control and Status */
-#define MISC1_UV_RX_ERROR_STATUS 0x00000c7c /* UV Rx Engine Error Status */
-#define MISC1_UV_RX_LIST0_CUR_DESC_L_ADDR 0x00000c80 /* UV Rx List0 Current Descriptor Lower Address */
-#define MISC1_UV_RX_LIST0_CUR_DESC_U_ADDR 0x00000c84 /* UV Rx List0 Current Descriptor Upper Address */
-#define MISC1_UV_RX_LIST0_CUR_BYTE_CNT 0x00000c88 /* UV Rx List0 Current Descriptor Byte Count */
-#define MISC1_UV_RX_LIST1_CUR_DESC_L_ADDR 0x00000c8c /* UV Rx List1 Current Descriptor Lower Address */
-#define MISC1_UV_RX_LIST1_CUR_DESC_U_ADDR 0x00000c90 /* UV Rx List1 Current Descriptor Upper Address */
-#define MISC1_UV_RX_LIST1_CUR_BYTE_CNT 0x00000c94 /* UV Rx List1 Current Descriptor Byte Count */
-#define MISC1_DMA_DEBUG_OPTIONS_REG 0x00000c98 /* DMA Debug Options Register */
-#define MISC1_READ_CHANNEL_ERROR_STATUS 0x00000c9c /* Read Channel Error Status */
-#define MISC1_PCIE_DMA_CTRL 0x00000ca0 /* PCIE DMA Control Register */
-
-
-/****************************************************************************
- * BCM70012_MISC_TOP_MISC2
- ***************************************************************************/
-#define MISC2_GLOBAL_CTRL 0x00000d00 /* Global Control Register */
-#define MISC2_INTERNAL_STATUS 0x00000d04 /* Internal Status Register */
-#define MISC2_INTERNAL_STATUS_MUX_CTRL 0x00000d08 /* Internal Debug Mux Control */
-#define MISC2_DEBUG_FIFO_LENGTH 0x00000d0c /* Debug FIFO Length */
-
-
-/****************************************************************************
- * BCM70012_MISC_TOP_MISC3
- ***************************************************************************/
-#define MISC3_RESET_CTRL 0x00000e00 /* Reset Control Register */
-#define MISC3_BIST_CTRL 0x00000e04 /* BIST Control Register */
-#define MISC3_BIST_STATUS 0x00000e08 /* BIST Status Register */
-#define MISC3_RX_CHECKSUM 0x00000e0c /* Receive Checksum */
-#define MISC3_TX_CHECKSUM 0x00000e10 /* Transmit Checksum */
-#define MISC3_ECO_CTRL_CORE 0x00000e14 /* ECO Core Reset Control Register */
-#define MISC3_CSI_TEST_CTRL 0x00000e18 /* CSI Test Control Register */
-#define MISC3_HD_DVI_TEST_CTRL 0x00000e1c /* HD DVI Test Control Register */
-
-
-/****************************************************************************
- * BCM70012_MISC_TOP_MISC_PERST
- ***************************************************************************/
-#define MISC_PERST_ECO_CTRL_PERST 0x00000e80 /* ECO PCIE Reset Control Register */
-#define MISC_PERST_DECODER_CTRL 0x00000e84 /* Decoder Control Register */
-#define MISC_PERST_CCE_STATUS 0x00000e88 /* Config Copy Engine Status */
-#define MISC_PERST_PCIE_DEBUG 0x00000e8c /* PCIE Debug Control Register */
-#define MISC_PERST_PCIE_DEBUG_STATUS 0x00000e90 /* PCIE Debug Status Register */
-#define MISC_PERST_VREG_CTRL 0x00000e94 /* Voltage Regulator Control Register */
-#define MISC_PERST_MEM_CTRL 0x00000e98 /* Memory Control Register */
-#define MISC_PERST_CLOCK_CTRL 0x00000e9c /* Clock Control Register */
-
-
-/****************************************************************************
- * BCM70012_MISC_TOP_GISB_ARBITER
- ***************************************************************************/
-#define GISB_ARBITER_REVISION 0x00000f00 /* GISB ARBITER REVISION */
-#define GISB_ARBITER_SCRATCH 0x00000f04 /* GISB ARBITER Scratch Register */
-#define GISB_ARBITER_REQ_MASK 0x00000f08 /* GISB ARBITER Master Request Mask Register */
-#define GISB_ARBITER_TIMER 0x00000f0c /* GISB ARBITER Timer Value Register */
-
-
-/****************************************************************************
- * BCM70012_OTP_TOP_OTP
- ***************************************************************************/
-#define OTP_CONFIG_INFO 0x00001400 /* OTP Configuration Register */
-#define OTP_CMD 0x00001404 /* OTP Command Register */
-#define OTP_STATUS 0x00001408 /* OTP Status Register */
-#define OTP_CONTENT_MISC 0x0000140c /* Content : Miscellaneous Register */
-#define OTP_CONTENT_AES_0 0x00001410 /* Content : AES Key 0 Register */
-#define OTP_CONTENT_AES_1 0x00001414 /* Content : AES Key 1 Register */
-#define OTP_CONTENT_AES_2 0x00001418 /* Content : AES Key 2 Register */
-#define OTP_CONTENT_AES_3 0x0000141c /* Content : AES Key 3 Register */
-#define OTP_CONTENT_SHA_0 0x00001420 /* Content : SHA Key 0 Register */
-#define OTP_CONTENT_SHA_1 0x00001424 /* Content : SHA Key 1 Register */
-#define OTP_CONTENT_SHA_2 0x00001428 /* Content : SHA Key 2 Register */
-#define OTP_CONTENT_SHA_3 0x0000142c /* Content : SHA Key 3 Register */
-#define OTP_CONTENT_SHA_4 0x00001430 /* Content : SHA Key 4 Register */
-#define OTP_CONTENT_SHA_5 0x00001434 /* Content : SHA Key 5 Register */
-#define OTP_CONTENT_SHA_6 0x00001438 /* Content : SHA Key 6 Register */
-#define OTP_CONTENT_SHA_7 0x0000143c /* Content : SHA Key 7 Register */
-#define OTP_CONTENT_CHECKSUM 0x00001440 /* Content : Checksum Register */
-#define OTP_PROG_CTRL 0x00001444 /* Programming Control Register */
-#define OTP_PROG_STATUS 0x00001448 /* Programming Status Register */
-#define OTP_PROG_PULSE 0x0000144c /* Program Pulse Width Register */
-#define OTP_VERIFY_PULSE 0x00001450 /* Verify Pulse Width Register */
-#define OTP_PROG_MASK 0x00001454 /* Program Mask Register */
-#define OTP_DATA_INPUT 0x00001458 /* Data Input Register */
-#define OTP_DATA_OUTPUT 0x0000145c /* Data Output Register */
-
-
-/****************************************************************************
- * BCM70012_AES_TOP_AES
- ***************************************************************************/
-#define AES_CONFIG_INFO 0x00001800 /* AES Configuration Information Register */
-#define AES_CMD 0x00001804 /* AES Command Register */
-#define AES_STATUS 0x00001808 /* AES Status Register */
-#define AES_EEPROM_CONFIG 0x0000180c /* AES EEPROM Configuration Register */
-#define AES_EEPROM_DATA_0 0x00001810 /* AES EEPROM Data Register 0 */
-#define AES_EEPROM_DATA_1 0x00001814 /* AES EEPROM Data Register 1 */
-#define AES_EEPROM_DATA_2 0x00001818 /* AES EEPROM Data Register 2 */
-#define AES_EEPROM_DATA_3 0x0000181c /* AES EEPROM Data Register 3 */
-
-
-/****************************************************************************
- * BCM70012_DCI_TOP_DCI
- ***************************************************************************/
-#define DCI_CMD 0x00001c00 /* DCI Command Register */
-#define DCI_STATUS 0x00001c04 /* DCI Status Register */
-#define DCI_DRAM_BASE_ADDR 0x00001c08 /* DRAM Base Address Register */
-#define DCI_FIRMWARE_ADDR 0x00001c0c /* Firmware Address Register */
-#define DCI_FIRMWARE_DATA 0x00001c10 /* Firmware Data Register */
-#define DCI_SIGNATURE_DATA_0 0x00001c14 /* Signature Data Register 0 */
-#define DCI_SIGNATURE_DATA_1 0x00001c18 /* Signature Data Register 1 */
-#define DCI_SIGNATURE_DATA_2 0x00001c1c /* Signature Data Register 2 */
-#define DCI_SIGNATURE_DATA_3 0x00001c20 /* Signature Data Register 3 */
-#define DCI_SIGNATURE_DATA_4 0x00001c24 /* Signature Data Register 4 */
-#define DCI_SIGNATURE_DATA_5 0x00001c28 /* Signature Data Register 5 */
-#define DCI_SIGNATURE_DATA_6 0x00001c2c /* Signature Data Register 6 */
-#define DCI_SIGNATURE_DATA_7 0x00001c30 /* Signature Data Register 7 */
-
-
-/****************************************************************************
- * BCM70012_TGT_TOP_INTR
- ***************************************************************************/
-/****************************************************************************
- * INTR :: INTR_STATUS
- ***************************************************************************/
-/* INTR :: INTR_STATUS :: reserved0 [31:26] */
-#define INTR_INTR_STATUS_reserved0_MASK 0xfc000000
-#define INTR_INTR_STATUS_reserved0_ALIGN 0
-#define INTR_INTR_STATUS_reserved0_BITS 6
-#define INTR_INTR_STATUS_reserved0_SHIFT 26
-
-/* INTR :: INTR_STATUS :: PCIE_TGT_CA_ATTN [25:25] */
-#define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_MASK 0x02000000
-#define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_ALIGN 0
-#define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_BITS 1
-#define INTR_INTR_STATUS_PCIE_TGT_CA_ATTN_SHIFT 25
-
-/* INTR :: INTR_STATUS :: PCIE_TGT_UR_ATTN [24:24] */
-#define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_MASK 0x01000000
-#define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_ALIGN 0
-#define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_BITS 1
-#define INTR_INTR_STATUS_PCIE_TGT_UR_ATTN_SHIFT 24
-
-/* INTR :: INTR_STATUS :: reserved1 [23:14] */
-#define INTR_INTR_STATUS_reserved1_MASK 0x00ffc000
-#define INTR_INTR_STATUS_reserved1_ALIGN 0
-#define INTR_INTR_STATUS_reserved1_BITS 10
-#define INTR_INTR_STATUS_reserved1_SHIFT 14
-
-/* INTR :: INTR_STATUS :: L1_UV_RX_DMA_ERR_INTR [13:13] */
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_MASK 0x00002000
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_SHIFT 13
-
-/* INTR :: INTR_STATUS :: L1_UV_RX_DMA_DONE_INTR [12:12] */
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK 0x00001000
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_SHIFT 12
-
-/* INTR :: INTR_STATUS :: L1_Y_RX_DMA_ERR_INTR [11:11] */
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_MASK 0x00000800
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_SHIFT 11
-
-/* INTR :: INTR_STATUS :: L1_Y_RX_DMA_DONE_INTR [10:10] */
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK 0x00000400
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_SHIFT 10
-
-/* INTR :: INTR_STATUS :: L1_TX_DMA_ERR_INTR [09:09] */
-#define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK 0x00000200
-#define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_SHIFT 9
-
-/* INTR :: INTR_STATUS :: L1_TX_DMA_DONE_INTR [08:08] */
-#define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_MASK 0x00000100
-#define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_SHIFT 8
-
-/* INTR :: INTR_STATUS :: reserved2 [07:06] */
-#define INTR_INTR_STATUS_reserved2_MASK 0x000000c0
-#define INTR_INTR_STATUS_reserved2_ALIGN 0
-#define INTR_INTR_STATUS_reserved2_BITS 2
-#define INTR_INTR_STATUS_reserved2_SHIFT 6
-
-/* INTR :: INTR_STATUS :: L0_UV_RX_DMA_ERR_INTR [05:05] */
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_MASK 0x00000020
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_SHIFT 5
-
-/* INTR :: INTR_STATUS :: L0_UV_RX_DMA_DONE_INTR [04:04] */
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK 0x00000010
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_SHIFT 4
-
-/* INTR :: INTR_STATUS :: L0_Y_RX_DMA_ERR_INTR [03:03] */
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_MASK 0x00000008
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_SHIFT 3
-
-/* INTR :: INTR_STATUS :: L0_Y_RX_DMA_DONE_INTR [02:02] */
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK 0x00000004
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_SHIFT 2
-
-/* INTR :: INTR_STATUS :: L0_TX_DMA_ERR_INTR [01:01] */
-#define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK 0x00000002
-#define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_SHIFT 1
-
-/* INTR :: INTR_STATUS :: L0_TX_DMA_DONE_INTR [00:00] */
-#define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_MASK 0x00000001
-#define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_ALIGN 0
-#define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_BITS 1
-#define INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_SHIFT 0
-
-
-/****************************************************************************
- * MISC1 :: TX_SW_DESC_LIST_CTRL_STS
- ***************************************************************************/
-/* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: reserved0 [31:04] */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_MASK 0xfffffff0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_ALIGN 0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_BITS 28
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_reserved0_SHIFT 4
-
-/* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: DMA_DATA_SERV_PTR [03:03] */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_MASK 0x00000008
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_ALIGN 0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_BITS 1
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DMA_DATA_SERV_PTR_SHIFT 3
-
-/* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: DESC_SERV_PTR [02:02] */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_MASK 0x00000004
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_ALIGN 0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_BITS 1
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_DESC_SERV_PTR_SHIFT 2
-
-/* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: TX_DMA_HALT_ON_ERROR [01:01] */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_MASK 0x00000002
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_ALIGN 0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_BITS 1
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_HALT_ON_ERROR_SHIFT 1
-
-/* MISC1 :: TX_SW_DESC_LIST_CTRL_STS :: TX_DMA_RUN_STOP [00:00] */
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_MASK 0x00000001
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_ALIGN 0
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_BITS 1
-#define MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_SHIFT 0
-
-
-/****************************************************************************
- * MISC1 :: TX_DMA_ERROR_STATUS
- ***************************************************************************/
-/* MISC1 :: TX_DMA_ERROR_STATUS :: reserved0 [31:10] */
-#define MISC1_TX_DMA_ERROR_STATUS_reserved0_MASK 0xfffffc00
-#define MISC1_TX_DMA_ERROR_STATUS_reserved0_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_reserved0_BITS 22
-#define MISC1_TX_DMA_ERROR_STATUS_reserved0_SHIFT 10
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_DESC_TX_ABORT_ERRORS [09:09] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: reserved1 [08:08] */
-#define MISC1_TX_DMA_ERROR_STATUS_reserved1_MASK 0x00000100
-#define MISC1_TX_DMA_ERROR_STATUS_reserved1_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_reserved1_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_reserved1_SHIFT 8
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_DESC_TX_ABORT_ERRORS [07:07] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: reserved2 [06:06] */
-#define MISC1_TX_DMA_ERROR_STATUS_reserved2_MASK 0x00000040
-#define MISC1_TX_DMA_ERROR_STATUS_reserved2_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_reserved2_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_reserved2_SHIFT 6
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_DMA_DATA_TX_ABORT_ERRORS [05:05] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_MASK 0x00000020
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_SHIFT 5
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L1_FIFO_FULL_ERRORS [04:04] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK 0x00000010
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_SHIFT 4
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: reserved3 [03:03] */
-#define MISC1_TX_DMA_ERROR_STATUS_reserved3_MASK 0x00000008
-#define MISC1_TX_DMA_ERROR_STATUS_reserved3_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_reserved3_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_reserved3_SHIFT 3
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_DMA_DATA_TX_ABORT_ERRORS [02:02] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_MASK 0x00000004
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_SHIFT 2
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: TX_L0_FIFO_FULL_ERRORS [01:01] */
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK 0x00000002
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_SHIFT 1
-
-/* MISC1 :: TX_DMA_ERROR_STATUS :: reserved4 [00:00] */
-#define MISC1_TX_DMA_ERROR_STATUS_reserved4_MASK 0x00000001
-#define MISC1_TX_DMA_ERROR_STATUS_reserved4_ALIGN 0
-#define MISC1_TX_DMA_ERROR_STATUS_reserved4_BITS 1
-#define MISC1_TX_DMA_ERROR_STATUS_reserved4_SHIFT 0
-
-
-/****************************************************************************
- * MISC1 :: Y_RX_ERROR_STATUS
- ***************************************************************************/
-/* MISC1 :: Y_RX_ERROR_STATUS :: reserved0 [31:14] */
-#define MISC1_Y_RX_ERROR_STATUS_reserved0_MASK 0xffffc000
-#define MISC1_Y_RX_ERROR_STATUS_reserved0_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_reserved0_BITS 18
-#define MISC1_Y_RX_ERROR_STATUS_reserved0_SHIFT 14
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_UNDERRUN_ERROR [13:13] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK 0x00002000
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_SHIFT 13
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_OVERRUN_ERROR [12:12] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK 0x00001000
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_SHIFT 12
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_UNDERRUN_ERROR [11:11] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK 0x00000800
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_SHIFT 11
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_OVERRUN_ERROR [10:10] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK 0x00000400
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_SHIFT 10
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_DESC_TX_ABORT_ERRORS [09:09] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: reserved1 [08:08] */
-#define MISC1_Y_RX_ERROR_STATUS_reserved1_MASK 0x00000100
-#define MISC1_Y_RX_ERROR_STATUS_reserved1_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_reserved1_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_reserved1_SHIFT 8
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_DESC_TX_ABORT_ERRORS [07:07] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: reserved2 [06:05] */
-#define MISC1_Y_RX_ERROR_STATUS_reserved2_MASK 0x00000060
-#define MISC1_Y_RX_ERROR_STATUS_reserved2_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_reserved2_BITS 2
-#define MISC1_Y_RX_ERROR_STATUS_reserved2_SHIFT 5
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L1_FIFO_FULL_ERRORS [04:04] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK 0x00000010
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_SHIFT 4
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: reserved3 [03:02] */
-#define MISC1_Y_RX_ERROR_STATUS_reserved3_MASK 0x0000000c
-#define MISC1_Y_RX_ERROR_STATUS_reserved3_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_reserved3_BITS 2
-#define MISC1_Y_RX_ERROR_STATUS_reserved3_SHIFT 2
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: RX_L0_FIFO_FULL_ERRORS [01:01] */
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK 0x00000002
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_SHIFT 1
-
-/* MISC1 :: Y_RX_ERROR_STATUS :: reserved4 [00:00] */
-#define MISC1_Y_RX_ERROR_STATUS_reserved4_MASK 0x00000001
-#define MISC1_Y_RX_ERROR_STATUS_reserved4_ALIGN 0
-#define MISC1_Y_RX_ERROR_STATUS_reserved4_BITS 1
-#define MISC1_Y_RX_ERROR_STATUS_reserved4_SHIFT 0
-
-
-/****************************************************************************
- * MISC1 :: UV_RX_ERROR_STATUS
- ***************************************************************************/
-/* MISC1 :: UV_RX_ERROR_STATUS :: reserved0 [31:14] */
-#define MISC1_UV_RX_ERROR_STATUS_reserved0_MASK 0xffffc000
-#define MISC1_UV_RX_ERROR_STATUS_reserved0_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_reserved0_BITS 18
-#define MISC1_UV_RX_ERROR_STATUS_reserved0_SHIFT 14
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_UNDERRUN_ERROR [13:13] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK 0x00002000
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_SHIFT 13
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_OVERRUN_ERROR [12:12] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK 0x00001000
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_SHIFT 12
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_UNDERRUN_ERROR [11:11] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK 0x00000800
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_SHIFT 11
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_OVERRUN_ERROR [10:10] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK 0x00000400
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_SHIFT 10
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_DESC_TX_ABORT_ERRORS [09:09] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK 0x00000200
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_SHIFT 9
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: reserved1 [08:08] */
-#define MISC1_UV_RX_ERROR_STATUS_reserved1_MASK 0x00000100
-#define MISC1_UV_RX_ERROR_STATUS_reserved1_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_reserved1_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_reserved1_SHIFT 8
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_DESC_TX_ABORT_ERRORS [07:07] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK 0x00000080
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_SHIFT 7
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: reserved2 [06:05] */
-#define MISC1_UV_RX_ERROR_STATUS_reserved2_MASK 0x00000060
-#define MISC1_UV_RX_ERROR_STATUS_reserved2_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_reserved2_BITS 2
-#define MISC1_UV_RX_ERROR_STATUS_reserved2_SHIFT 5
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L1_FIFO_FULL_ERRORS [04:04] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK 0x00000010
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_SHIFT 4
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: reserved3 [03:02] */
-#define MISC1_UV_RX_ERROR_STATUS_reserved3_MASK 0x0000000c
-#define MISC1_UV_RX_ERROR_STATUS_reserved3_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_reserved3_BITS 2
-#define MISC1_UV_RX_ERROR_STATUS_reserved3_SHIFT 2
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: RX_L0_FIFO_FULL_ERRORS [01:01] */
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK 0x00000002
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_SHIFT 1
-
-/* MISC1 :: UV_RX_ERROR_STATUS :: reserved4 [00:00] */
-#define MISC1_UV_RX_ERROR_STATUS_reserved4_MASK 0x00000001
-#define MISC1_UV_RX_ERROR_STATUS_reserved4_ALIGN 0
-#define MISC1_UV_RX_ERROR_STATUS_reserved4_BITS 1
-#define MISC1_UV_RX_ERROR_STATUS_reserved4_SHIFT 0
-
-/****************************************************************************
- * Datatype Definitions.
- ***************************************************************************/
-#endif /* #ifndef MACFILE_H__ */
-
-/* End of File */
-
+++ /dev/null
-#ifndef _CRYSTALHD_H_
-#define _CRYSTALHD_H_
-
-#include "bc_dts_defs.h"
-#include "crystalhd_misc.h"
-#include "bc_dts_glob_lnx.h"
-#include "crystalhd_hw.h"
-#include "crystalhd_cmds.h"
-#include "crystalhd_lnx.h"
-#include "bcm_70012_regs.h"
-#include "crystalhd_fw_if.h"
-
-#endif
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_cmds . c
- *
- * Description:
- * BCM70010 Linux driver user command interfaces.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#include "crystalhd.h"
-
-static struct crystalhd_user *bc_cproc_get_uid(struct crystalhd_cmd *ctx)
-{
- struct crystalhd_user *user = NULL;
- int i;
-
- for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
- if (!ctx->user[i].in_use) {
- user = &ctx->user[i];
- break;
- }
- }
-
- return user;
-}
-
-static int bc_cproc_get_user_count(struct crystalhd_cmd *ctx)
-{
- int i, count = 0;
-
- for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
- if (ctx->user[i].in_use)
- count++;
- }
-
- return count;
-}
-
-static void bc_cproc_mark_pwr_state(struct crystalhd_cmd *ctx)
-{
- int i;
-
- for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
- if (!ctx->user[i].in_use)
- continue;
- if (ctx->user[i].mode == DTS_DIAG_MODE ||
- ctx->user[i].mode == DTS_PLAYBACK_MODE) {
- ctx->pwr_state_change = 1;
- break;
- }
- }
-}
-
-static enum BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- int rc = 0, i = 0;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- if (ctx->user[idata->u_id].mode != DTS_MODE_INV) {
- BCMLOG_ERR("Close the handle first..\n");
- return BC_STS_ERR_USAGE;
- }
- if (idata->udata.u.NotifyMode.Mode == DTS_MONITOR_MODE) {
- ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode;
- return BC_STS_SUCCESS;
- }
- if (ctx->state != BC_LINK_INVALID) {
- BCMLOG_ERR("Link invalid state %d\n", ctx->state);
- return BC_STS_ERR_USAGE;
- }
- /* Check for duplicate playback sessions..*/
- for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
- if (ctx->user[i].mode == DTS_DIAG_MODE ||
- ctx->user[i].mode == DTS_PLAYBACK_MODE) {
- BCMLOG_ERR("multiple playback sessions are not supported..\n");
- return BC_STS_ERR_USAGE;
- }
- }
- ctx->cin_wait_exit = 0;
- ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode;
- /* Setup mmap pool for uaddr sgl mapping..*/
- rc = crystalhd_create_dio_pool(ctx->adp, BC_LINK_MAX_SGLS);
- if (rc)
- return BC_STS_ERROR;
-
- /* Setup Hardware DMA rings */
- return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx);
-}
-
-static enum BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
- idata->udata.u.VerInfo.DriverMajor = crystalhd_kmod_major;
- idata->udata.u.VerInfo.DriverMinor = crystalhd_kmod_minor;
- idata->udata.u.VerInfo.DriverRevision = crystalhd_kmod_rev;
- return BC_STS_SUCCESS;
-}
-
-
-static enum BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_pci_cfg_rd(ctx->adp, 0, 2,
- (uint32_t *)&idata->udata.u.hwType.PciVenId);
- crystalhd_pci_cfg_rd(ctx->adp, 2, 2,
- (uint32_t *)&idata->udata.u.hwType.PciDevId);
- crystalhd_pci_cfg_rd(ctx->adp, 8, 1,
- (uint32_t *)&idata->udata.u.hwType.HwRev);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
- idata->udata.u.regAcc.Value = bc_dec_reg_rd(ctx->adp,
- idata->udata.u.regAcc.Offset);
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
-
- bc_dec_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset,
- idata->udata.u.regAcc.Value);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
-
- idata->udata.u.regAcc.Value = crystalhd_reg_rd(ctx->adp,
- idata->udata.u.regAcc.Offset);
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
-
- crystalhd_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset,
- idata->udata.u.regAcc.Value);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata || !idata->add_cdata)
- return BC_STS_INV_ARG;
-
- if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) {
- BCMLOG_ERR("insufficient buffer\n");
- return BC_STS_INV_ARG;
- }
- sts = crystalhd_mem_rd(ctx->adp, idata->udata.u.devMem.StartOff,
- idata->udata.u.devMem.NumDwords,
- (uint32_t *)idata->add_cdata);
- return sts;
-
-}
-
-static enum BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata || !idata->add_cdata)
- return BC_STS_INV_ARG;
-
- if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) {
- BCMLOG_ERR("insufficient buffer\n");
- return BC_STS_INV_ARG;
- }
-
- sts = crystalhd_mem_wr(ctx->adp, idata->udata.u.devMem.StartOff,
- idata->udata.u.devMem.NumDwords,
- (uint32_t *)idata->add_cdata);
- return sts;
-}
-
-static enum BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- uint32_t ix, cnt, off, len;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- uint32_t *temp;
-
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
-
- temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space;
- off = idata->udata.u.pciCfg.Offset;
- len = idata->udata.u.pciCfg.Size;
-
- if (len <= 4)
- return crystalhd_pci_cfg_rd(ctx->adp, off, len, temp);
-
- /* Truncate to dword alignment..*/
- len = 4;
- cnt = idata->udata.u.pciCfg.Size / len;
- for (ix = 0; ix < cnt; ix++) {
- sts = crystalhd_pci_cfg_rd(ctx->adp, off, len, &temp[ix]);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("config read : %d\n", sts);
- return sts;
- }
- off += len;
- }
-
- return sts;
-}
-
-static enum BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- uint32_t ix, cnt, off, len;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- uint32_t *temp;
-
- if (!ctx || !idata)
- return BC_STS_INV_ARG;
-
- temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space;
- off = idata->udata.u.pciCfg.Offset;
- len = idata->udata.u.pciCfg.Size;
-
- if (len <= 4)
- return crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[0]);
-
- /* Truncate to dword alignment..*/
- len = 4;
- cnt = idata->udata.u.pciCfg.Size / len;
- for (ix = 0; ix < cnt; ix++) {
- sts = crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[ix]);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("config write : %d\n", sts);
- return sts;
- }
- off += len;
- }
-
- return sts;
-}
-
-static enum BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- if (ctx->state != BC_LINK_INVALID) {
- BCMLOG_ERR("Link invalid state %d\n", ctx->state);
- return BC_STS_ERR_USAGE;
- }
-
- sts = crystalhd_download_fw(ctx->adp, (uint8_t *)idata->add_cdata,
- idata->add_cdata_sz);
-
- if (sts != BC_STS_SUCCESS)
- BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts);
- else
- ctx->state |= BC_LINK_INIT;
-
- return sts;
-}
-
-/*
- * We use the FW_CMD interface to sync up playback state with application
- * and firmware. This function will perform the required pre and post
- * processing of the Firmware commands.
- *
- * Pause -
- * Disable capture after decoder pause.
- * Resume -
- * First enable capture and issue decoder resume command.
- * Flush -
- * Abort pending input transfers and issue decoder flush command.
- *
- */
-static enum BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- enum BC_STATUS sts;
- uint32_t *cmd;
-
- if (!(ctx->state & BC_LINK_INIT)) {
- BCMLOG_ERR("Link invalid state %d\n", ctx->state);
- return BC_STS_ERR_USAGE;
- }
-
- cmd = idata->udata.u.fwCmd.cmd;
-
- /* Pre-Process */
- if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) {
- if (!cmd[3]) {
- ctx->state &= ~BC_LINK_PAUSED;
- crystalhd_hw_unpause(&ctx->hw_ctx);
- }
- } else if (cmd[0] == eCMD_C011_DEC_CHAN_FLUSH) {
- BCMLOG(BCMLOG_INFO, "Flush issued\n");
- if (cmd[3])
- ctx->cin_wait_exit = 1;
- }
-
- sts = crystalhd_do_fw_cmd(&ctx->hw_ctx, &idata->udata.u.fwCmd);
-
- if (sts != BC_STS_SUCCESS) {
- BCMLOG(BCMLOG_INFO, "fw cmd %x failed\n", cmd[0]);
- return sts;
- }
-
- /* Post-Process */
- if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) {
- if (cmd[3]) {
- ctx->state |= BC_LINK_PAUSED;
- crystalhd_hw_pause(&ctx->hw_ctx);
- }
- }
-
- return sts;
-}
-
-static void bc_proc_in_completion(struct crystalhd_dio_req *dio_hnd,
- wait_queue_head_t *event, enum BC_STATUS sts)
-{
- if (!dio_hnd || !event) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return;
- }
- if (sts == BC_STS_IO_USER_ABORT)
- return;
-
- dio_hnd->uinfo.comp_sts = sts;
- dio_hnd->uinfo.ev_sts = 1;
- crystalhd_set_event(event);
-}
-
-static enum BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx)
-{
- wait_queue_head_t sleep_ev;
- int rc = 0;
-
- if (ctx->state & BC_LINK_SUSPEND)
- return BC_STS_IO_USER_ABORT;
-
- if (ctx->cin_wait_exit) {
- ctx->cin_wait_exit = 0;
- return BC_STS_CMD_CANCELLED;
- }
- crystalhd_create_event(&sleep_ev);
- crystalhd_wait_on_event(&sleep_ev, 0, 100, rc, 0);
- if (rc == -EINTR)
- return BC_STS_IO_USER_ABORT;
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata,
- struct crystalhd_dio_req *dio)
-{
- uint32_t tx_listid = 0;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- wait_queue_head_t event;
- int rc = 0;
-
- if (!ctx || !idata || !dio) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_create_event(&event);
-
- ctx->tx_list_id = 0;
- /* msleep_interruptible(2000); */
- sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio, bc_proc_in_completion,
- &event, &tx_listid,
- idata->udata.u.ProcInput.Encrypted);
-
- while (sts == BC_STS_BUSY) {
- sts = bc_cproc_codein_sleep(ctx);
- if (sts != BC_STS_SUCCESS)
- break;
- sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio,
- bc_proc_in_completion,
- &event, &tx_listid,
- idata->udata.u.ProcInput.Encrypted);
- }
- if (sts != BC_STS_SUCCESS) {
- BCMLOG(BCMLOG_DBG, "_hw_txdma returning sts:%d\n", sts);
- return sts;
- }
- if (ctx->cin_wait_exit)
- ctx->cin_wait_exit = 0;
-
- ctx->tx_list_id = tx_listid;
-
- /* _post() succeeded.. wait for the completion. */
- crystalhd_wait_on_event(&event, (dio->uinfo.ev_sts), 3000, rc, 0);
- ctx->tx_list_id = 0;
- if (!rc) {
- return dio->uinfo.comp_sts;
- } else if (rc == -EBUSY) {
- BCMLOG(BCMLOG_DBG, "_tx_post() T/O\n");
- sts = BC_STS_TIMEOUT;
- } else if (rc == -EINTR) {
- BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n");
- sts = BC_STS_IO_USER_ABORT;
- } else {
- sts = BC_STS_IO_ERROR;
- }
-
- /* We are cancelling the IO from the same context as the _post().
- * so no need to wait on the event again.. the return itself
- * ensures the release of our resources.
- */
- crystalhd_hw_cancel_tx(&ctx->hw_ctx, tx_listid);
-
- return sts;
-}
-
-/* Helper function to check on user buffers */
-static enum BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff,
- uint32_t ub_sz, uint32_t uv_off, bool en_422)
-{
- if (!ubuff || !ub_sz) {
- BCMLOG_ERR("%s->Invalid Arg %p %x\n",
- ((pin) ? "TX" : "RX"), ubuff, ub_sz);
- return BC_STS_INV_ARG;
- }
-
- /* Check for alignment */
- if (((uintptr_t)ubuff) & 0x03) {
- BCMLOG_ERR(
- "%s-->Un-aligned address not implemented yet.. %p\n",
- ((pin) ? "TX" : "RX"), ubuff);
- return BC_STS_NOT_IMPL;
- }
- if (pin)
- return BC_STS_SUCCESS;
-
- if (!en_422 && !uv_off) {
- BCMLOG_ERR("Need UV offset for 420 mode.\n");
- return BC_STS_INV_ARG;
- }
-
- if (en_422 && uv_off) {
- BCMLOG_ERR("UV offset in 422 mode ??\n");
- return BC_STS_INV_ARG;
- }
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- void *ubuff;
- uint32_t ub_sz;
- struct crystalhd_dio_req *dio_hnd = NULL;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- ubuff = idata->udata.u.ProcInput.pDmaBuff;
- ub_sz = idata->udata.u.ProcInput.BuffSz;
-
- sts = bc_cproc_check_inbuffs(1, ubuff, ub_sz, 0, 0);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("dio map - %d\n", sts);
- return sts;
- }
-
- if (!dio_hnd)
- return BC_STS_ERROR;
-
- sts = bc_cproc_hw_txdma(ctx, idata, dio_hnd);
-
- crystalhd_unmap_dio(ctx->adp, dio_hnd);
-
- return sts;
-}
-
-static enum BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- void *ubuff;
- uint32_t ub_sz, uv_off;
- bool en_422;
- struct crystalhd_dio_req *dio_hnd = NULL;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- ubuff = idata->udata.u.RxBuffs.YuvBuff;
- ub_sz = idata->udata.u.RxBuffs.YuvBuffSz;
- uv_off = idata->udata.u.RxBuffs.UVbuffOffset;
- en_422 = idata->udata.u.RxBuffs.b422Mode;
-
- sts = bc_cproc_check_inbuffs(0, ubuff, ub_sz, uv_off, en_422);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off,
- en_422, 0, &dio_hnd);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("dio map - %d\n", sts);
- return sts;
- }
-
- if (!dio_hnd)
- return BC_STS_ERROR;
-
- sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio_hnd,
- (ctx->state == BC_LINK_READY));
- if ((sts != BC_STS_SUCCESS) && (sts != BC_STS_BUSY)) {
- crystalhd_unmap_dio(ctx->adp, dio_hnd);
- return sts;
- }
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx,
- struct crystalhd_dio_req *dio)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- ctx->state |= BC_LINK_FMT_CHG;
- if (ctx->state == BC_LINK_READY)
- sts = crystalhd_hw_start_capture(&ctx->hw_ctx);
-
- return sts;
-}
-
-static enum BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- struct crystalhd_dio_req *dio = NULL;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- struct BC_DEC_OUT_BUFF *frame;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- if (!(ctx->state & BC_LINK_CAP_EN)) {
- BCMLOG(BCMLOG_DBG, "Capture not enabled..%x\n", ctx->state);
- return BC_STS_ERR_USAGE;
- }
-
- frame = &idata->udata.u.DecOutData;
-
- sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx, &frame->PibInfo, &dio);
- if (sts != BC_STS_SUCCESS)
- return (ctx->state & BC_LINK_SUSPEND) ?
- BC_STS_IO_USER_ABORT : sts;
-
- frame->Flags = dio->uinfo.comp_flags;
-
- if (frame->Flags & COMP_FLAG_FMT_CHANGE)
- return bc_cproc_fmt_change(ctx, dio);
-
- frame->OutPutBuffs.YuvBuff = dio->uinfo.xfr_buff;
- frame->OutPutBuffs.YuvBuffSz = dio->uinfo.xfr_len;
- frame->OutPutBuffs.UVbuffOffset = dio->uinfo.uv_offset;
- frame->OutPutBuffs.b422Mode = dio->uinfo.b422mode;
-
- frame->OutPutBuffs.YBuffDoneSz = dio->uinfo.y_done_sz;
- frame->OutPutBuffs.UVBuffDoneSz = dio->uinfo.uv_done_sz;
-
- crystalhd_unmap_dio(ctx->adp, dio);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- ctx->state |= BC_LINK_CAP_EN;
- if (ctx->state == BC_LINK_READY)
- return crystalhd_hw_start_capture(&ctx->hw_ctx);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- struct crystalhd_dio_req *dio = NULL;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- struct BC_DEC_OUT_BUFF *frame;
- uint32_t count;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- if (!(ctx->state & BC_LINK_CAP_EN))
- return BC_STS_ERR_USAGE;
-
- /* We should ack flush even when we are in paused/suspend state */
- if (!(ctx->state & BC_LINK_READY))
- return crystalhd_hw_stop_capture(&ctx->hw_ctx);
-
- ctx->state &= ~(BC_LINK_CAP_EN|BC_LINK_FMT_CHG);
-
- frame = &idata->udata.u.DecOutData;
- for (count = 0; count < BC_RX_LIST_CNT; count++) {
-
- sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx,
- &frame->PibInfo, &dio);
- if (sts != BC_STS_SUCCESS)
- break;
-
- crystalhd_unmap_dio(ctx->adp, dio);
- }
-
- return crystalhd_hw_stop_capture(&ctx->hw_ctx);
-}
-
-static enum BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- struct BC_DTS_STATS *stats;
- struct crystalhd_hw_stats hw_stats;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_hw_stats(&ctx->hw_ctx, &hw_stats);
-
- stats = &idata->udata.u.drvStat;
- stats->drvRLL = hw_stats.rdyq_count;
- stats->drvFLL = hw_stats.freeq_count;
- stats->DrvTotalFrmDropped = hw_stats.rx_errors;
- stats->DrvTotalHWErrs = hw_stats.rx_errors + hw_stats.tx_errors;
- stats->intCount = hw_stats.num_interrupts;
- stats->DrvIgnIntrCnt = hw_stats.num_interrupts -
- hw_stats.dev_interrupts;
- stats->TxFifoBsyCnt = hw_stats.cin_busy;
- stats->pauseCount = hw_stats.pause_cnt;
-
- if (ctx->pwr_state_change)
- stats->pwr_state_change = 1;
- if (ctx->state & BC_LINK_PAUSED)
- stats->DrvPauseTime = 1;
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- crystalhd_hw_stats(&ctx->hw_ctx, NULL);
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- struct BC_CLOCK *clock;
- uint32_t oldClk;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- clock = &idata->udata.u.clockValue;
- oldClk = ctx->hw_ctx.core_clock_mhz;
- ctx->hw_ctx.core_clock_mhz = clock->clk;
-
- if (ctx->state & BC_LINK_READY) {
- sts = crystalhd_hw_set_core_clock(&ctx->hw_ctx);
- if (sts == BC_STS_CLK_NOCHG)
- ctx->hw_ctx.core_clock_mhz = oldClk;
- }
-
- clock->clk = ctx->hw_ctx.core_clock_mhz;
-
- return sts;
-}
-
-/*=============== Cmd Proc Table.. ======================================*/
-static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = {
- { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0},
- { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0},
- { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0},
- { BCM_IOC_REG_WR, bc_cproc_reg_wr, 0},
- { BCM_IOC_FPGA_RD, bc_cproc_link_reg_rd, 0},
- { BCM_IOC_FPGA_WR, bc_cproc_link_reg_wr, 0},
- { BCM_IOC_MEM_RD, bc_cproc_mem_rd, 0},
- { BCM_IOC_MEM_WR, bc_cproc_mem_wr, 0},
- { BCM_IOC_RD_PCI_CFG, bc_cproc_cfg_rd, 0},
- { BCM_IOC_WR_PCI_CFG, bc_cproc_cfg_wr, 1},
- { BCM_IOC_FW_DOWNLOAD, bc_cproc_download_fw, 1},
- { BCM_IOC_FW_CMD, bc_cproc_do_fw_cmd, 1},
- { BCM_IOC_PROC_INPUT, bc_cproc_proc_input, 1},
- { BCM_IOC_ADD_RXBUFFS, bc_cproc_add_cap_buff, 1},
- { BCM_IOC_FETCH_RXBUFF, bc_cproc_fetch_frame, 1},
- { BCM_IOC_START_RX_CAP, bc_cproc_start_capture, 1},
- { BCM_IOC_FLUSH_RX_CAP, bc_cproc_flush_cap_buffs, 1},
- { BCM_IOC_GET_DRV_STAT, bc_cproc_get_stats, 0},
- { BCM_IOC_RST_DRV_STAT, bc_cproc_reset_stats, 0},
- { BCM_IOC_NOTIFY_MODE, bc_cproc_notify_mode, 0},
- { BCM_IOC_CHG_CLK, bc_cproc_chg_clk, 0},
- { BCM_IOC_END, NULL},
-};
-
-/*=============== Cmd Proc Functions.. ===================================*/
-
-/**
- * crystalhd_suspend - Power management suspend request.
- * @ctx: Command layer context.
- * @idata: Iodata - required for internal use.
- *
- * Return:
- * status
- *
- * 1. Set the state to Suspend.
- * 2. Flush the Rx Buffers it will unmap all the buffers and
- * stop the RxDMA engine.
- * 3. Cancel The TX Io and Stop Dma Engine.
- * 4. Put the DDR in to deep sleep.
- * 5. Stop the hardware putting it in to Reset State.
- *
- * Current gstreamer frame work does not provide any power management
- * related notification to user mode decoder plug-in. As a work-around
- * we pass on the power management notification to our plug-in by completing
- * all outstanding requests with BC_STS_IO_USER_ABORT return code.
- */
-enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!ctx || !idata) {
- BCMLOG_ERR("Invalid Parameters\n");
- return BC_STS_ERROR;
- }
-
- if (ctx->state & BC_LINK_SUSPEND)
- return BC_STS_SUCCESS;
-
- if (ctx->state == BC_LINK_INVALID) {
- BCMLOG(BCMLOG_DBG, "Nothing To Do Suspend Success\n");
- return BC_STS_SUCCESS;
- }
-
- ctx->state |= BC_LINK_SUSPEND;
-
- bc_cproc_mark_pwr_state(ctx);
-
- if (ctx->state & BC_LINK_CAP_EN) {
- sts = bc_cproc_flush_cap_buffs(ctx, idata);
- if (sts != BC_STS_SUCCESS)
- return sts;
- }
-
- if (ctx->tx_list_id) {
- sts = crystalhd_hw_cancel_tx(&ctx->hw_ctx, ctx->tx_list_id);
- if (sts != BC_STS_SUCCESS)
- return sts;
- }
-
- sts = crystalhd_hw_suspend(&ctx->hw_ctx);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- BCMLOG(BCMLOG_DBG, "BCM70012 suspend success\n");
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_resume - Resume frame capture.
- * @ctx: Command layer contextx.
- *
- * Return:
- * status
- *
- *
- * Resume frame capture.
- *
- * PM_Resume can't resume the playback state back to pre-suspend state
- * because we don't keep video clip related information within driver.
- * To get back to the pre-suspend state App will re-open the device and
- * start a new playback session from the pre-suspend clip position.
- *
- */
-enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx)
-{
- BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state);
-
- bc_cproc_mark_pwr_state(ctx);
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_user_open - Create application handle.
- * @ctx: Command layer contextx.
- * @user_ctx: User ID context.
- *
- * Return:
- * status
- *
- * Creates an application specific UID and allocates
- * application specific resources. HW layer initialization
- * is done for the first open request.
- */
-enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx,
- struct crystalhd_user **user_ctx)
-{
- struct crystalhd_user *uc;
-
- if (!ctx || !user_ctx) {
- BCMLOG_ERR("Invalid arg..\n");
- return BC_STS_INV_ARG;
- }
-
- uc = bc_cproc_get_uid(ctx);
- if (!uc) {
- BCMLOG(BCMLOG_INFO, "No free user context...\n");
- return BC_STS_BUSY;
- }
-
- BCMLOG(BCMLOG_INFO, "Opening new user[%x] handle\n", uc->uid);
-
- crystalhd_hw_open(&ctx->hw_ctx, ctx->adp);
-
- uc->in_use = 1;
-
- *user_ctx = uc;
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_user_close - Close application handle.
- * @ctx: Command layer contextx.
- * @uc: User ID context.
- *
- * Return:
- * status
- *
- * Closer application handle and release app specific
- * resources.
- */
-enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx,
- struct crystalhd_user *uc)
-{
- uint32_t mode = uc->mode;
-
- ctx->user[uc->uid].mode = DTS_MODE_INV;
- ctx->user[uc->uid].in_use = 0;
- ctx->cin_wait_exit = 1;
- ctx->pwr_state_change = 0;
-
- BCMLOG(BCMLOG_INFO, "Closing user[%x] handle\n", uc->uid);
-
- if ((mode == DTS_DIAG_MODE) || (mode == DTS_PLAYBACK_MODE)) {
- crystalhd_hw_free_dma_rings(&ctx->hw_ctx);
- crystalhd_destroy_dio_pool(ctx->adp);
- } else if (bc_cproc_get_user_count(ctx)) {
- return BC_STS_SUCCESS;
- }
-
- crystalhd_hw_close(&ctx->hw_ctx);
-
- ctx->state = BC_LINK_INVALID;
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_setup_cmd_context - Setup Command layer resources.
- * @ctx: Command layer contextx.
- * @adp: Adapter context
- *
- * Return:
- * status
- *
- * Called at the time of driver load.
- */
-enum BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
- struct crystalhd_adp *adp)
-{
- int i = 0;
-
- if (!ctx || !adp) {
- BCMLOG_ERR("Invalid arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- if (ctx->adp)
- BCMLOG(BCMLOG_DBG, "Resetting Cmd context delete missing..\n");
-
- ctx->adp = adp;
- for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
- ctx->user[i].uid = i;
- ctx->user[i].in_use = 0;
- ctx->user[i].mode = DTS_MODE_INV;
- }
-
- /*Open and Close the Hardware to put it in to sleep state*/
- crystalhd_hw_open(&ctx->hw_ctx, ctx->adp);
- crystalhd_hw_close(&ctx->hw_ctx);
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_delete_cmd_context - Release Command layer resources.
- * @ctx: Command layer contextx.
- *
- * Return:
- * status
- *
- * Called at the time of driver un-load.
- */
-enum BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx)
-{
- BCMLOG(BCMLOG_DBG, "Deleting Command context..\n");
-
- ctx->adp = NULL;
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_get_cmd_proc - Cproc table lookup.
- * @ctx: Command layer contextx.
- * @cmd: IOCTL command code.
- * @uc: User ID context.
- *
- * Return:
- * command proc function pointer
- *
- * This function checks the process context, application's
- * mode of operation and returns the function pointer
- * from the cproc table.
- */
-crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx,
- uint32_t cmd, struct crystalhd_user *uc)
-{
- crystalhd_cmd_proc cproc = NULL;
- unsigned int i, tbl_sz;
-
- if (!ctx) {
- BCMLOG_ERR("Invalid arg.. Cmd[%d]\n", cmd);
- return NULL;
- }
-
- if ((cmd != BCM_IOC_GET_DRV_STAT) && (ctx->state & BC_LINK_SUSPEND)) {
- BCMLOG_ERR("Invalid State [suspend Set].. Cmd[%d]\n", cmd);
- return NULL;
- }
-
- tbl_sz = sizeof(g_crystalhd_cproc_tbl) /
- sizeof(struct crystalhd_cmd_tbl);
- for (i = 0; i < tbl_sz; i++) {
- if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) {
- if ((uc->mode == DTS_MONITOR_MODE) &&
- (g_crystalhd_cproc_tbl[i].block_mon)) {
- BCMLOG(BCMLOG_INFO, "Blocking cmd %d\n", cmd);
- break;
- }
- cproc = g_crystalhd_cproc_tbl[i].cmd_proc;
- break;
- }
- }
-
- return cproc;
-}
-
-/**
- * crystalhd_cmd_interrupt - ISR entry point
- * @ctx: Command layer contextx.
- *
- * Return:
- * TRUE: If interrupt from bcm70012 device.
- *
- *
- * ISR entry point from OS layer.
- */
-bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx)
-{
- if (!ctx) {
- BCMLOG_ERR("Invalid arg..\n");
- return false;
- }
-
- return crystalhd_hw_interrupt(ctx->adp, &ctx->hw_ctx);
-}
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_cmds . h
- *
- * Description:
- * BCM70010 Linux driver user command interfaces.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#ifndef _CRYSTALHD_CMDS_H_
-#define _CRYSTALHD_CMDS_H_
-
-/*
- * NOTE:: This is the main interface file between the Linux layer
- * and the hardware layer. This file will use the definitions
- * from _dts_glob and dts_defs etc.. which are defined for
- * windows.
- */
-
-#include "crystalhd.h"
-
-enum crystalhd_state {
- BC_LINK_INVALID = 0x00,
- BC_LINK_INIT = 0x01,
- BC_LINK_CAP_EN = 0x02,
- BC_LINK_FMT_CHG = 0x04,
- BC_LINK_SUSPEND = 0x10,
- BC_LINK_PAUSED = 0x20,
- BC_LINK_READY = (BC_LINK_INIT | BC_LINK_CAP_EN | BC_LINK_FMT_CHG),
-};
-
-struct crystalhd_user {
- uint32_t uid;
- uint32_t in_use;
- uint32_t mode;
-};
-
-#define DTS_MODE_INV (-1)
-
-struct crystalhd_cmd {
- uint32_t state;
- struct crystalhd_adp *adp;
- struct crystalhd_user user[BC_LINK_MAX_OPENS];
-
- spinlock_t ctx_lock;
- uint32_t tx_list_id;
- uint32_t cin_wait_exit;
- uint32_t pwr_state_change;
- struct crystalhd_hw hw_ctx;
-};
-
-typedef enum BC_STATUS(*crystalhd_cmd_proc)(struct crystalhd_cmd *,
- struct crystalhd_ioctl_data *);
-
-struct crystalhd_cmd_tbl {
- uint32_t cmd_id;
- const crystalhd_cmd_proc cmd_proc;
- uint32_t block_mon;
-};
-
-enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
- struct crystalhd_ioctl_data *idata);
-enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx);
-crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx,
- uint32_t cmd, struct crystalhd_user *uc);
-enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx,
- struct crystalhd_user **user_ctx);
-enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx,
- struct crystalhd_user *uc);
-enum BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
- struct crystalhd_adp *adp);
-enum BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx);
-bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx);
-
-#endif
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_fw_if . h
- *
- * Description:
- * BCM70012 Firmware interface definitions.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#ifndef _CRYSTALHD_FW_IF_H_
-#define _CRYSTALHD_FW_IF_H_
-
-/* TBD: Pull in only required defs into this file.. */
-
-/* User Data Header */
-struct user_data {
- struct user_data *next;
- uint32_t type;
- uint32_t size;
-};
-
-/*------------------------------------------------------*
- * MPEG Extension to the PPB *
- *------------------------------------------------------*/
-struct ppb_mpeg {
- uint32_t to_be_defined;
- uint32_t valid;
-
- /* Always valid, defaults to picture size if no
- sequence display extension in the stream. */
- uint32_t display_horizontal_size;
- uint32_t display_vertical_size;
-
- /* MPEG_VALID_PANSCAN
- Offsets are a copy values from the MPEG stream. */
- uint32_t offset_count;
- int32_t horizontal_offset[3];
- int32_t vertical_offset[3];
-
- /* MPEG_VALID_USERDATA
- User data is in the form of a linked list. */
- int32_t userDataSize;
- struct user_data *userData;
-
-};
-
-
-/*------------------------------------------------------*
- * VC1 Extension to the PPB *
- *------------------------------------------------------*/
-struct ppb_vc1 {
- uint32_t to_be_defined;
- uint32_t valid;
-
- /* Always valid, defaults to picture size if no
- sequence display extension in the stream. */
- uint32_t display_horizontal_size;
- uint32_t display_vertical_size;
-
- /* VC1 pan scan windows */
- uint32_t num_panscan_windows;
- int32_t ps_horiz_offset[4];
- int32_t ps_vert_offset[4];
- int32_t ps_width[4];
- int32_t ps_height[4];
-
- /* VC1_VALID_USERDATA
- User data is in the form of a linked list. */
- int32_t userDataSize;
- struct user_data *userData;
-
-};
-
-/*------------------------------------------------------*
- * H.264 Extension to the PPB *
- *------------------------------------------------------*/
-
-/**
- * @brief Film grain SEI message.
- *
- * Content of the film grain SEI message.
- */
-
-/* maximum number of model-values as for Thomson spec(standard says 5) */
-#define MAX_FGT_MODEL_VALUE (3)
-
-/* maximum number of intervals(as many as 256 intervals?) */
-#define MAX_FGT_VALUE_INTERVAL (256)
-
-struct fgt_sei {
- struct fgt_sei *next;
- unsigned char
- model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE];
- unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL];
- unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL];
-
- unsigned char cancel_flag; /* Cancel flag: 1 no film grain. */
- unsigned char model_id; /* Model id. */
-
- /* +unused SE based on Thomson spec */
- unsigned char color_desc_flag; /* Separate color description flag. */
- unsigned char bit_depth_luma; /* Bit depth luma minus 8. */
- unsigned char bit_depth_chroma; /* Bit depth chroma minus 8. */
- unsigned char full_range_flag; /* Full range flag. */
- unsigned char color_primaries; /* Color primaries. */
- unsigned char transfer_charact; /* Transfer characteristics. */
- unsigned char matrix_coeff; /*< Matrix coefficients. */
- /* -unused SE based on Thomson spec */
-
- unsigned char blending_mode_id; /* Blending mode. */
- unsigned char log2_scale_factor; /* Log2 scale factor (2-7). */
- unsigned char comp_flag[3]; /* Components [0,2]
- parameters present flag. */
- unsigned char num_intervals_minus1[3]; /* Number of
- intensity level intervals. */
- unsigned char num_model_values[3]; /* Number of model values. */
- uint16_t repetition_period; /* Repetition period (0-16384) */
-
-};
-
-struct ppb_h264 {
- /* 'valid' specifies which fields (or sets of
- * fields) below are valid. If the corresponding
- * bit in 'valid' is NOT set then that field(s)
- * is (are) not initialized. */
- uint32_t valid;
-
- int32_t poc_top; /* POC for Top Field/Frame */
- int32_t poc_bottom; /* POC for Bottom Field */
- uint32_t idr_pic_id;
-
- /* H264_VALID_PANSCAN */
- uint32_t pan_scan_count;
- int32_t pan_scan_left[3];
- int32_t pan_scan_right[3];
- int32_t pan_scan_top[3];
- int32_t pan_scan_bottom[3];
-
- /* H264_VALID_CT_TYPE */
- uint32_t ct_type_count;
- uint32_t ct_type[3];
-
- /* H264_VALID_SPS_CROP */
- int32_t sps_crop_left;
- int32_t sps_crop_right;
- int32_t sps_crop_top;
- int32_t sps_crop_bottom;
-
- /* H264_VALID_VUI */
- uint32_t chroma_top;
- uint32_t chroma_bottom;
-
- /* H264_VALID_USER */
- uint32_t user_data_size;
- struct user_data *user_data;
-
- /* H264 VALID FGT */
- struct fgt_sei *pfgt;
-
-};
-
-struct ppb {
- /* Common fields. */
- uint32_t picture_number; /* Ordinal display number */
- uint32_t video_buffer; /* Video (picbuf) number */
- uint32_t video_address; /* Address of picbuf Y */
- uint32_t video_address_uv; /* Address of picbuf UV */
- uint32_t video_stripe; /* Picbuf stripe */
- uint32_t video_width; /* Picbuf width */
- uint32_t video_height; /* Picbuf height */
-
- uint32_t channel_id; /* Decoder channel ID */
- uint32_t status; /* reserved */
- uint32_t width; /* pixels */
- uint32_t height; /* pixels */
- uint32_t chroma_format; /* see above */
- uint32_t pulldown; /* see above */
- uint32_t flags; /* see above */
- uint32_t pts; /* 32 LSBs of PTS */
- uint32_t protocol; /* protocolXXX (above) */
-
- uint32_t frame_rate; /* see above */
- uint32_t matrix_coeff; /* see above */
- uint32_t aspect_ratio; /* see above */
- uint32_t colour_primaries; /* see above */
- uint32_t transfer_char; /* see above */
- uint32_t pcr_offset; /* 45kHz if PCR type; else 27MHz */
- uint32_t n_drop; /* Number of pictures to be dropped */
-
- uint32_t custom_aspect_ratio_width_height;
- /* upper 16-bits is Y and lower 16-bits is X */
-
- uint32_t picture_tag; /* Indexing tag from BUD packets */
- uint32_t picture_done_payload;
- uint32_t picture_meta_payload;
- uint32_t reserved[1];
-
- /* Protocol-specific extensions. */
- union {
- struct ppb_h264 h264;
- struct ppb_mpeg mpeg;
- struct ppb_vc1 vc1;
- } other;
-
-};
-
-struct c011_pib {
- uint32_t bFormatChange;
- uint32_t resolution;
- uint32_t channelId;
- uint32_t ppbPtr;
- int32_t ptsStcOffset;
- uint32_t zeroPanscanValid;
- uint32_t dramOutBufAddr;
- uint32_t yComponent;
- struct ppb ppb;
-
-};
-
-struct dec_rsp_channel_start_video {
- uint32_t command;
- uint32_t sequence;
- uint32_t status;
- uint32_t picBuf;
- uint32_t picRelBuf;
- uint32_t picInfoDeliveryQ;
- uint32_t picInfoReleaseQ;
- uint32_t channelStatus;
- uint32_t userDataDeliveryQ;
- uint32_t userDataReleaseQ;
- uint32_t transportStreamCaptureAddr;
- uint32_t asyncEventQ;
-
-};
-
-#define eCMD_C011_CMD_BASE (0x73763000)
-
-/* host commands */
-enum c011_ts_cmd {
- eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */
- eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */
- eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */
-
- /* New API commands */
- /* General commands */
- eCMD_C011_INIT = eCMD_C011_CMD_BASE + 0x01,
- eCMD_C011_RESET = eCMD_C011_CMD_BASE + 0x02,
- eCMD_C011_SELF_TEST = eCMD_C011_CMD_BASE + 0x03,
- eCMD_C011_GET_VERSION = eCMD_C011_CMD_BASE + 0x04,
- eCMD_C011_GPIO = eCMD_C011_CMD_BASE + 0x05,
- eCMD_C011_DEBUG_SETUP = eCMD_C011_CMD_BASE + 0x06,
-
- /* Decoding commands */
- eCMD_C011_DEC_CHAN_OPEN = eCMD_C011_CMD_BASE + 0x100,
- eCMD_C011_DEC_CHAN_CLOSE = eCMD_C011_CMD_BASE + 0x101,
- eCMD_C011_DEC_CHAN_ACTIVATE = eCMD_C011_CMD_BASE + 0x102,
- eCMD_C011_DEC_CHAN_STATUS = eCMD_C011_CMD_BASE + 0x103,
- eCMD_C011_DEC_CHAN_FLUSH = eCMD_C011_CMD_BASE + 0x104,
- eCMD_C011_DEC_CHAN_TRICK_PLAY = eCMD_C011_CMD_BASE + 0x105,
- eCMD_C011_DEC_CHAN_TS_PIDS = eCMD_C011_CMD_BASE + 0x106,
- eCMD_C011_DEC_CHAN_PS_STREAM_ID = eCMD_C011_CMD_BASE + 0x107,
- eCMD_C011_DEC_CHAN_INPUT_PARAMS = eCMD_C011_CMD_BASE + 0x108,
- eCMD_C011_DEC_CHAN_VIDEO_OUTPUT = eCMD_C011_CMD_BASE + 0x109,
- eCMD_C011_DEC_CHAN_OUTPUT_FORMAT = eCMD_C011_CMD_BASE + 0x10A,
- eCMD_C011_DEC_CHAN_SCALING_FILTERS = eCMD_C011_CMD_BASE + 0x10B,
- eCMD_C011_DEC_CHAN_OSD_MODE = eCMD_C011_CMD_BASE + 0x10D,
- eCMD_C011_DEC_CHAN_DROP = eCMD_C011_CMD_BASE + 0x10E,
- eCMD_C011_DEC_CHAN_RELEASE = eCMD_C011_CMD_BASE + 0x10F,
- eCMD_C011_DEC_CHAN_STREAM_SETTINGS = eCMD_C011_CMD_BASE + 0x110,
- eCMD_C011_DEC_CHAN_PAUSE_OUTPUT = eCMD_C011_CMD_BASE + 0x111,
- eCMD_C011_DEC_CHAN_CHANGE = eCMD_C011_CMD_BASE + 0x112,
- eCMD_C011_DEC_CHAN_SET_STC = eCMD_C011_CMD_BASE + 0x113,
- eCMD_C011_DEC_CHAN_SET_PTS = eCMD_C011_CMD_BASE + 0x114,
- eCMD_C011_DEC_CHAN_CC_MODE = eCMD_C011_CMD_BASE + 0x115,
- eCMD_C011_DEC_CREATE_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x116,
- eCMD_C011_DEC_COPY_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x117,
- eCMD_C011_DEC_DELETE_AUDIO_CONTEXT = eCMD_C011_CMD_BASE + 0x118,
- eCMD_C011_DEC_CHAN_SET_DECYPTION = eCMD_C011_CMD_BASE + 0x119,
- eCMD_C011_DEC_CHAN_START_VIDEO = eCMD_C011_CMD_BASE + 0x11A,
- eCMD_C011_DEC_CHAN_STOP_VIDEO = eCMD_C011_CMD_BASE + 0x11B,
- eCMD_C011_DEC_CHAN_PIC_CAPTURE = eCMD_C011_CMD_BASE + 0x11C,
- eCMD_C011_DEC_CHAN_PAUSE = eCMD_C011_CMD_BASE + 0x11D,
- eCMD_C011_DEC_CHAN_PAUSE_STATE = eCMD_C011_CMD_BASE + 0x11E,
- eCMD_C011_DEC_CHAN_SET_SLOWM_RATE = eCMD_C011_CMD_BASE + 0x11F,
- eCMD_C011_DEC_CHAN_GET_SLOWM_RATE = eCMD_C011_CMD_BASE + 0x120,
- eCMD_C011_DEC_CHAN_SET_FF_RATE = eCMD_C011_CMD_BASE + 0x121,
- eCMD_C011_DEC_CHAN_GET_FF_RATE = eCMD_C011_CMD_BASE + 0x122,
- eCMD_C011_DEC_CHAN_FRAME_ADVANCE = eCMD_C011_CMD_BASE + 0x123,
- eCMD_C011_DEC_CHAN_SET_SKIP_PIC_MODE = eCMD_C011_CMD_BASE + 0x124,
- eCMD_C011_DEC_CHAN_GET_SKIP_PIC_MODE = eCMD_C011_CMD_BASE + 0x125,
- eCMD_C011_DEC_CHAN_FILL_PIC_BUF = eCMD_C011_CMD_BASE + 0x126,
- eCMD_C011_DEC_CHAN_SET_CONTINUITY_CHECK = eCMD_C011_CMD_BASE + 0x127,
- eCMD_C011_DEC_CHAN_GET_CONTINUITY_CHECK = eCMD_C011_CMD_BASE + 0x128,
- eCMD_C011_DEC_CHAN_SET_BRCM_TRICK_MODE = eCMD_C011_CMD_BASE + 0x129,
- eCMD_C011_DEC_CHAN_GET_BRCM_TRICK_MODE = eCMD_C011_CMD_BASE + 0x12A,
- eCMD_C011_DEC_CHAN_REVERSE_FIELD_STATUS = eCMD_C011_CMD_BASE + 0x12B,
- eCMD_C011_DEC_CHAN_I_PICTURE_FOUND = eCMD_C011_CMD_BASE + 0x12C,
- eCMD_C011_DEC_CHAN_SET_PARAMETER = eCMD_C011_CMD_BASE + 0x12D,
- eCMD_C011_DEC_CHAN_SET_USER_DATA_MODE = eCMD_C011_CMD_BASE + 0x12E,
- eCMD_C011_DEC_CHAN_SET_PAUSE_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x12F,
- eCMD_C011_DEC_CHAN_SET_SLOW_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x130,
- eCMD_C011_DEC_CHAN_SET_FF_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x131,
- eCMD_C011_DEC_CHAN_SET_DISPLAY_TIMING_MODE = eCMD_C011_CMD_BASE +
- 0x132,
- eCMD_C011_DEC_CHAN_SET_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x133,
- eCMD_C011_DEC_CHAN_GET_DISPLAY_MODE = eCMD_C011_CMD_BASE + 0x134,
- eCMD_C011_DEC_CHAN_SET_REVERSE_FIELD = eCMD_C011_CMD_BASE + 0x135,
- eCMD_C011_DEC_CHAN_STREAM_OPEN = eCMD_C011_CMD_BASE + 0x136,
- eCMD_C011_DEC_CHAN_SET_PCR_PID = eCMD_C011_CMD_BASE + 0x137,
- eCMD_C011_DEC_CHAN_SET_VID_PID = eCMD_C011_CMD_BASE + 0x138,
- eCMD_C011_DEC_CHAN_SET_PAN_SCAN_MODE = eCMD_C011_CMD_BASE + 0x139,
- eCMD_C011_DEC_CHAN_START_DISPLAY_AT_PTS = eCMD_C011_CMD_BASE + 0x140,
- eCMD_C011_DEC_CHAN_STOP_DISPLAY_AT_PTS = eCMD_C011_CMD_BASE + 0x141,
- eCMD_C011_DEC_CHAN_SET_DISPLAY_ORDER = eCMD_C011_CMD_BASE + 0x142,
- eCMD_C011_DEC_CHAN_GET_DISPLAY_ORDER = eCMD_C011_CMD_BASE + 0x143,
- eCMD_C011_DEC_CHAN_SET_HOST_TRICK_MODE = eCMD_C011_CMD_BASE + 0x144,
- eCMD_C011_DEC_CHAN_SET_OPERATION_MODE = eCMD_C011_CMD_BASE + 0x145,
- eCMD_C011_DEC_CHAN_DISPLAY_PAUSE_UNTO_PTS = eCMD_C011_CMD_BASE + 0x146,
- eCMD_C011_DEC_CHAN_SET_PTS_STC_DIFF_THRESHOLD = eCMD_C011_CMD_BASE +
- 0x147,
- eCMD_C011_DEC_CHAN_SEND_COMPRESSED_BUF = eCMD_C011_CMD_BASE + 0x148,
- eCMD_C011_DEC_CHAN_SET_CLIPPING = eCMD_C011_CMD_BASE + 0x149,
- eCMD_C011_DEC_CHAN_SET_PARAMETERS_FOR_HARD_RESET_INTERRUPT_TO_HOST
- = eCMD_C011_CMD_BASE + 0x150,
-
- /* Decoder RevD commands */
- eCMD_C011_DEC_CHAN_SET_CSC = eCMD_C011_CMD_BASE + 0x180, /* color
- space conversion */
- eCMD_C011_DEC_CHAN_SET_RANGE_REMAP = eCMD_C011_CMD_BASE + 0x181,
- eCMD_C011_DEC_CHAN_SET_FGT = eCMD_C011_CMD_BASE + 0x182,
- /* Note: 0x183 not implemented yet in Rev D main */
- eCMD_C011_DEC_CHAN_SET_LASTPICTURE_PADDING = eCMD_C011_CMD_BASE +
- 0x183,
-
- /* Decoder 7412 commands (7412-only) */
- eCMD_C011_DEC_CHAN_SET_CONTENT_KEY = eCMD_C011_CMD_BASE + 0x190,
- eCMD_C011_DEC_CHAN_SET_SESSION_KEY = eCMD_C011_CMD_BASE + 0x191,
- eCMD_C011_DEC_CHAN_FMT_CHANGE_ACK = eCMD_C011_CMD_BASE + 0x192,
-
- eCMD_C011_DEC_CHAN_CUSTOM_VIDOUT = eCMD_C011_CMD_BASE + 0x1FF,
-
- /* Encoding commands */
- eCMD_C011_ENC_CHAN_OPEN = eCMD_C011_CMD_BASE + 0x200,
- eCMD_C011_ENC_CHAN_CLOSE = eCMD_C011_CMD_BASE + 0x201,
- eCMD_C011_ENC_CHAN_ACTIVATE = eCMD_C011_CMD_BASE + 0x202,
- eCMD_C011_ENC_CHAN_CONTROL = eCMD_C011_CMD_BASE + 0x203,
- eCMD_C011_ENC_CHAN_STATISTICS = eCMD_C011_CMD_BASE + 0x204,
-
- eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210,
-
-};
-
-#endif
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_hw . c
- *
- * Description:
- * BCM70010 Linux driver HW layer.
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#include "crystalhd.h"
-
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-
-/* Functions internal to this file */
-
-static void crystalhd_enable_uarts(struct crystalhd_adp *adp)
-{
- bc_dec_reg_wr(adp, UartSelectA, BSVS_UART_STREAM);
- bc_dec_reg_wr(adp, UartSelectB, BSVS_UART_DEC_OUTER);
-}
-
-
-static void crystalhd_start_dram(struct crystalhd_adp *adp)
-{
- bc_dec_reg_wr(adp, SDRAM_PARAM, ((40 / 5 - 1) << 0) |
- /* tras (40ns tras)/(5ns period) -1 ((15/5 - 1) << 4) | // trcd */
- ((15 / 5 - 1) << 7) | /* trp */
- ((10 / 5 - 1) << 10) | /* trrd */
- ((15 / 5 + 1) << 12) | /* twr */
- ((2 + 1) << 16) | /* twtr */
- ((70 / 5 - 2) << 19) | /* trfc */
- (0 << 23));
-
- bc_dec_reg_wr(adp, SDRAM_PRECHARGE, 0);
- bc_dec_reg_wr(adp, SDRAM_EXT_MODE, 2);
- bc_dec_reg_wr(adp, SDRAM_MODE, 0x132);
- bc_dec_reg_wr(adp, SDRAM_PRECHARGE, 0);
- bc_dec_reg_wr(adp, SDRAM_REFRESH, 0);
- bc_dec_reg_wr(adp, SDRAM_REFRESH, 0);
- bc_dec_reg_wr(adp, SDRAM_MODE, 0x32);
- /* setting the refresh rate here */
- bc_dec_reg_wr(adp, SDRAM_REF_PARAM, ((1 << 12) | 96));
-}
-
-
-static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp)
-{
- union link_misc_perst_deco_ctrl rst_deco_cntrl;
- union link_misc_perst_clk_ctrl rst_clk_cntrl;
- uint32_t temp;
-
- /*
- * Link clocks: MISC_PERST_CLOCK_CTRL Clear PLL power down bit,
- * delay to allow PLL to lock Clear alternate clock, stop clock bits
- */
- rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL);
- rst_clk_cntrl.pll_pwr_dn = 0;
- crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg);
- msleep_interruptible(50);
-
- rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL);
- rst_clk_cntrl.stop_core_clk = 0;
- rst_clk_cntrl.sel_alt_clk = 0;
-
- crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg);
- msleep_interruptible(50);
-
- /*
- * Bus Arbiter Timeout: GISB_ARBITER_TIMER
- * Set internal bus arbiter timeout to 40us based on core clock speed
- * (63MHz * 40us = 0x9D8)
- */
- crystalhd_reg_wr(adp, GISB_ARBITER_TIMER, 0x9D8);
-
- /*
- * Decoder clocks: MISC_PERST_DECODER_CTRL
- * Enable clocks while 7412 reset is asserted, delay
- * De-assert 7412 reset
- */
- rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp,
- MISC_PERST_DECODER_CTRL);
- rst_deco_cntrl.stop_bcm_7412_clk = 0;
- rst_deco_cntrl.bcm7412_rst = 1;
- crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL,
- rst_deco_cntrl.whole_reg);
- msleep_interruptible(10);
-
- rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp,
- MISC_PERST_DECODER_CTRL);
- rst_deco_cntrl.bcm7412_rst = 0;
- crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL,
- rst_deco_cntrl.whole_reg);
- msleep_interruptible(50);
-
- /* Disable OTP_CONTENT_MISC to 0 to disable all secure modes */
- crystalhd_reg_wr(adp, OTP_CONTENT_MISC, 0);
-
- /* Clear bit 29 of 0x404 */
- temp = crystalhd_reg_rd(adp, PCIE_TL_TRANSACTION_CONFIGURATION);
- temp &= ~BC_BIT(29);
- crystalhd_reg_wr(adp, PCIE_TL_TRANSACTION_CONFIGURATION, temp);
-
- /* 2.5V regulator must be set to 2.6 volts (+6%) */
- /* FIXME: jarod: what's the point of this reg read? */
- temp = crystalhd_reg_rd(adp, MISC_PERST_VREG_CTRL);
- crystalhd_reg_wr(adp, MISC_PERST_VREG_CTRL, 0xF3);
-
- return true;
-}
-
-static bool crystalhd_put_in_reset(struct crystalhd_adp *adp)
-{
- union link_misc_perst_deco_ctrl rst_deco_cntrl;
- union link_misc_perst_clk_ctrl rst_clk_cntrl;
- uint32_t temp;
-
- /*
- * Decoder clocks: MISC_PERST_DECODER_CTRL
- * Assert 7412 reset, delay
- * Assert 7412 stop clock
- */
- rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp,
- MISC_PERST_DECODER_CTRL);
- rst_deco_cntrl.stop_bcm_7412_clk = 1;
- crystalhd_reg_wr(adp, MISC_PERST_DECODER_CTRL,
- rst_deco_cntrl.whole_reg);
- msleep_interruptible(50);
-
- /* Bus Arbiter Timeout: GISB_ARBITER_TIMER
- * Set internal bus arbiter timeout to 40us based on core clock speed
- * (6.75MHZ * 40us = 0x10E)
- */
- crystalhd_reg_wr(adp, GISB_ARBITER_TIMER, 0x10E);
-
- /* Link clocks: MISC_PERST_CLOCK_CTRL
- * Stop core clk, delay
- * Set alternate clk, delay, set PLL power down
- */
- rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL);
- rst_clk_cntrl.stop_core_clk = 1;
- rst_clk_cntrl.sel_alt_clk = 1;
- crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg);
- msleep_interruptible(50);
-
- rst_clk_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC_PERST_CLOCK_CTRL);
- rst_clk_cntrl.pll_pwr_dn = 1;
- crystalhd_reg_wr(adp, MISC_PERST_CLOCK_CTRL, rst_clk_cntrl.whole_reg);
-
- /*
- * Read and restore the Transaction Configuration Register
- * after core reset
- */
- temp = crystalhd_reg_rd(adp, PCIE_TL_TRANSACTION_CONFIGURATION);
-
- /*
- * Link core soft reset: MISC3_RESET_CTRL
- * - Write BIT[0]=1 and read it back for core reset to take place
- */
- crystalhd_reg_wr(adp, MISC3_RESET_CTRL, 1);
- rst_deco_cntrl.whole_reg = crystalhd_reg_rd(adp, MISC3_RESET_CTRL);
- msleep_interruptible(50);
-
- /* restore the transaction configuration register */
- crystalhd_reg_wr(adp, PCIE_TL_TRANSACTION_CONFIGURATION, temp);
-
- return true;
-}
-
-static void crystalhd_disable_interrupts(struct crystalhd_adp *adp)
-{
- union intr_mask_reg intr_mask;
- intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG);
- intr_mask.mask_pcie_err = 1;
- intr_mask.mask_pcie_rbusmast_err = 1;
- intr_mask.mask_pcie_rgr_bridge = 1;
- intr_mask.mask_rx_done = 1;
- intr_mask.mask_rx_err = 1;
- intr_mask.mask_tx_done = 1;
- intr_mask.mask_tx_err = 1;
- crystalhd_reg_wr(adp, INTR_INTR_MSK_SET_REG, intr_mask.whole_reg);
-
- return;
-}
-
-static void crystalhd_enable_interrupts(struct crystalhd_adp *adp)
-{
- union intr_mask_reg intr_mask;
- intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG);
- intr_mask.mask_pcie_err = 1;
- intr_mask.mask_pcie_rbusmast_err = 1;
- intr_mask.mask_pcie_rgr_bridge = 1;
- intr_mask.mask_rx_done = 1;
- intr_mask.mask_rx_err = 1;
- intr_mask.mask_tx_done = 1;
- intr_mask.mask_tx_err = 1;
- crystalhd_reg_wr(adp, INTR_INTR_MSK_CLR_REG, intr_mask.whole_reg);
-
- return;
-}
-
-static void crystalhd_clear_errors(struct crystalhd_adp *adp)
-{
- uint32_t reg;
-
- /* FIXME: jarod: wouldn't we want to write a 0 to the reg?
- Or does the write clear the bits specified? */
- reg = crystalhd_reg_rd(adp, MISC1_Y_RX_ERROR_STATUS);
- if (reg)
- crystalhd_reg_wr(adp, MISC1_Y_RX_ERROR_STATUS, reg);
-
- reg = crystalhd_reg_rd(adp, MISC1_UV_RX_ERROR_STATUS);
- if (reg)
- crystalhd_reg_wr(adp, MISC1_UV_RX_ERROR_STATUS, reg);
-
- reg = crystalhd_reg_rd(adp, MISC1_TX_DMA_ERROR_STATUS);
- if (reg)
- crystalhd_reg_wr(adp, MISC1_TX_DMA_ERROR_STATUS, reg);
-}
-
-static void crystalhd_clear_interrupts(struct crystalhd_adp *adp)
-{
- uint32_t intr_sts = crystalhd_reg_rd(adp, INTR_INTR_STATUS);
-
- if (intr_sts) {
- crystalhd_reg_wr(adp, INTR_INTR_CLR_REG, intr_sts);
-
- /* Write End Of Interrupt for PCIE */
- crystalhd_reg_wr(adp, INTR_EOI_CTRL, 1);
- }
-}
-
-static void crystalhd_soft_rst(struct crystalhd_adp *adp)
-{
- uint32_t val;
-
- /* Assert c011 soft reset*/
- bc_dec_reg_wr(adp, DecHt_HostSwReset, 0x00000001);
- msleep_interruptible(50);
-
- /* Release c011 soft reset*/
- bc_dec_reg_wr(adp, DecHt_HostSwReset, 0x00000000);
-
- /* Disable Stuffing..*/
- val = crystalhd_reg_rd(adp, MISC2_GLOBAL_CTRL);
- val |= BC_BIT(8);
- crystalhd_reg_wr(adp, MISC2_GLOBAL_CTRL, val);
-}
-
-static bool crystalhd_load_firmware_config(struct crystalhd_adp *adp)
-{
- uint32_t i = 0, reg;
-
- crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (BC_DRAM_FW_CFG_ADDR >> 19));
-
- crystalhd_reg_wr(adp, AES_CMD, 0);
- crystalhd_reg_wr(adp, AES_CONFIG_INFO,
- (BC_DRAM_FW_CFG_ADDR & 0x7FFFF));
- crystalhd_reg_wr(adp, AES_CMD, 0x1);
-
- /* FIXME: jarod: I've seen this fail,
- and introducing extra delays helps... */
- for (i = 0; i < 100; ++i) {
- reg = crystalhd_reg_rd(adp, AES_STATUS);
- if (reg & 0x1)
- return true;
- msleep_interruptible(10);
- }
-
- return false;
-}
-
-
-static bool crystalhd_start_device(struct crystalhd_adp *adp)
-{
- uint32_t dbg_options, glb_cntrl = 0, reg_pwrmgmt = 0;
-
- BCMLOG(BCMLOG_INFO, "Starting BCM70012 Device\n");
-
- reg_pwrmgmt = crystalhd_reg_rd(adp, PCIE_DLL_DATA_LINK_CONTROL);
- reg_pwrmgmt &= ~ASPM_L1_ENABLE;
-
- crystalhd_reg_wr(adp, PCIE_DLL_DATA_LINK_CONTROL, reg_pwrmgmt);
-
- if (!crystalhd_bring_out_of_rst(adp)) {
- BCMLOG_ERR("Failed To Bring Link Out Of Reset\n");
- return false;
- }
-
- crystalhd_disable_interrupts(adp);
-
- crystalhd_clear_errors(adp);
-
- crystalhd_clear_interrupts(adp);
-
- crystalhd_enable_interrupts(adp);
-
- /* Enable the option for getting the total no. of DWORDS
- * that have been transferred by the RXDMA engine
- */
- dbg_options = crystalhd_reg_rd(adp, MISC1_DMA_DEBUG_OPTIONS_REG);
- dbg_options |= 0x10;
- crystalhd_reg_wr(adp, MISC1_DMA_DEBUG_OPTIONS_REG, dbg_options);
-
- /* Enable PCI Global Control options */
- glb_cntrl = crystalhd_reg_rd(adp, MISC2_GLOBAL_CTRL);
- glb_cntrl |= 0x100;
- glb_cntrl |= 0x8000;
- crystalhd_reg_wr(adp, MISC2_GLOBAL_CTRL, glb_cntrl);
-
- crystalhd_enable_interrupts(adp);
-
- crystalhd_soft_rst(adp);
- crystalhd_start_dram(adp);
- crystalhd_enable_uarts(adp);
-
- return true;
-}
-
-static bool crystalhd_stop_device(struct crystalhd_adp *adp)
-{
- uint32_t reg;
-
- BCMLOG(BCMLOG_INFO, "Stopping BCM70012 Device\n");
- /* Clear and disable interrupts */
- crystalhd_disable_interrupts(adp);
- crystalhd_clear_errors(adp);
- crystalhd_clear_interrupts(adp);
-
- if (!crystalhd_put_in_reset(adp))
- BCMLOG_ERR("Failed to Put Link To Reset State\n");
-
- reg = crystalhd_reg_rd(adp, PCIE_DLL_DATA_LINK_CONTROL);
- reg |= ASPM_L1_ENABLE;
- crystalhd_reg_wr(adp, PCIE_DLL_DATA_LINK_CONTROL, reg);
-
- /* Set PCI Clk Req */
- reg = crystalhd_reg_rd(adp, PCIE_CLK_REQ_REG);
- reg |= PCI_CLK_REQ_ENABLE;
- crystalhd_reg_wr(adp, PCIE_CLK_REQ_REG, reg);
-
- return true;
-}
-
-static struct crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(
- struct crystalhd_hw *hw)
-{
- unsigned long flags = 0;
- struct crystalhd_rx_dma_pkt *temp = NULL;
-
- if (!hw)
- return NULL;
-
- spin_lock_irqsave(&hw->lock, flags);
- temp = hw->rx_pkt_pool_head;
- if (temp) {
- hw->rx_pkt_pool_head = hw->rx_pkt_pool_head->next;
- temp->dio_req = NULL;
- temp->pkt_tag = 0;
- temp->flags = 0;
- }
- spin_unlock_irqrestore(&hw->lock, flags);
-
- return temp;
-}
-
-static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw,
- struct crystalhd_rx_dma_pkt *pkt)
-{
- unsigned long flags = 0;
-
- if (!hw || !pkt)
- return;
-
- spin_lock_irqsave(&hw->lock, flags);
- pkt->next = hw->rx_pkt_pool_head;
- hw->rx_pkt_pool_head = pkt;
- spin_unlock_irqrestore(&hw->lock, flags);
-}
-
-/*
- * Call back from TX - IOQ deletion.
- *
- * This routine will release the TX DMA rings allocated
- * during setup_dma rings interface.
- *
- * Memory is allocated per DMA ring basis. This is just
- * a place holder to be able to create the dio queues.
- */
-static void crystalhd_tx_desc_rel_call_back(void *context, void *data)
-{
-}
-
-/*
- * Rx Packet release callback..
- *
- * Release All user mapped capture buffers and Our DMA packets
- * back to our free pool. The actual cleanup of the DMA
- * ring descriptors happen during dma ring release.
- */
-static void crystalhd_rx_pkt_rel_call_back(void *context, void *data)
-{
- struct crystalhd_hw *hw = (struct crystalhd_hw *)context;
- struct crystalhd_rx_dma_pkt *pkt = (struct crystalhd_rx_dma_pkt *)data;
-
- if (!pkt || !hw) {
- BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt);
- return;
- }
-
- if (pkt->dio_req)
- crystalhd_unmap_dio(hw->adp, pkt->dio_req);
- else
- BCMLOG_ERR("Missing dio_req: 0x%x\n", pkt->pkt_tag);
-
- crystalhd_hw_free_rx_pkt(hw, pkt);
-}
-
-#define crystalhd_hw_delete_ioq(adp, q) \
-do { \
- if (q) { \
- crystalhd_delete_dioq(adp, q); \
- q = NULL; \
- } \
-} while (0)
-
-static void crystalhd_hw_delete_ioqs(struct crystalhd_hw *hw)
-{
- if (!hw)
- return;
-
- BCMLOG(BCMLOG_DBG, "Deleting IOQs\n");
- crystalhd_hw_delete_ioq(hw->adp, hw->tx_actq);
- crystalhd_hw_delete_ioq(hw->adp, hw->tx_freeq);
- crystalhd_hw_delete_ioq(hw->adp, hw->rx_actq);
- crystalhd_hw_delete_ioq(hw->adp, hw->rx_freeq);
- crystalhd_hw_delete_ioq(hw->adp, hw->rx_rdyq);
-}
-
-#define crystalhd_hw_create_ioq(sts, hw, q, cb) \
-do { \
- sts = crystalhd_create_dioq(hw->adp, &q, cb, hw); \
- if (sts != BC_STS_SUCCESS) \
- goto hw_create_ioq_err; \
-} while (0)
-
-/*
- * Create IOQs..
- *
- * TX - Active & Free
- * RX - Active, Ready and Free.
- */
-static enum BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_hw_create_ioq(sts, hw, hw->tx_freeq,
- crystalhd_tx_desc_rel_call_back);
- crystalhd_hw_create_ioq(sts, hw, hw->tx_actq,
- crystalhd_tx_desc_rel_call_back);
-
- crystalhd_hw_create_ioq(sts, hw, hw->rx_freeq,
- crystalhd_rx_pkt_rel_call_back);
- crystalhd_hw_create_ioq(sts, hw, hw->rx_rdyq,
- crystalhd_rx_pkt_rel_call_back);
- crystalhd_hw_create_ioq(sts, hw, hw->rx_actq,
- crystalhd_rx_pkt_rel_call_back);
-
- return sts;
-
-hw_create_ioq_err:
- crystalhd_hw_delete_ioqs(hw);
-
- return sts;
-}
-
-
-static bool crystalhd_code_in_full(struct crystalhd_adp *adp,
- uint32_t needed_sz, bool b_188_byte_pkts, uint8_t flags)
-{
- uint32_t base, end, writep, readp;
- uint32_t cpbSize, cpbFullness, fifoSize;
-
- if (flags & 0x02) { /* ASF Bit is set */
- base = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Base);
- end = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2End);
- writep = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Wrptr);
- readp = bc_dec_reg_rd(adp, REG_Dec_TsAudCDB2Rdptr);
- } else if (b_188_byte_pkts) { /*Encrypted 188 byte packets*/
- base = bc_dec_reg_rd(adp, REG_Dec_TsUser0Base);
- end = bc_dec_reg_rd(adp, REG_Dec_TsUser0End);
- writep = bc_dec_reg_rd(adp, REG_Dec_TsUser0Wrptr);
- readp = bc_dec_reg_rd(adp, REG_Dec_TsUser0Rdptr);
- } else {
- base = bc_dec_reg_rd(adp, REG_DecCA_RegCinBase);
- end = bc_dec_reg_rd(adp, REG_DecCA_RegCinEnd);
- writep = bc_dec_reg_rd(adp, REG_DecCA_RegCinWrPtr);
- readp = bc_dec_reg_rd(adp, REG_DecCA_RegCinRdPtr);
- }
-
- cpbSize = end - base;
- if (writep >= readp)
- cpbFullness = writep - readp;
- else
- cpbFullness = (end - base) - (readp - writep);
-
- fifoSize = cpbSize - cpbFullness;
-
- if (fifoSize < BC_INFIFO_THRESHOLD)
- return true;
-
- if (needed_sz > (fifoSize - BC_INFIFO_THRESHOLD))
- return true;
-
- return false;
-}
-
-static enum BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw,
- uint32_t list_id, enum BC_STATUS cs)
-{
- struct tx_dma_pkt *tx_req;
-
- if (!hw || !list_id) {
- BCMLOG_ERR("Invalid Arg..\n");
- return BC_STS_INV_ARG;
- }
-
- hw->pwr_lock--;
-
- tx_req = (struct tx_dma_pkt *)crystalhd_dioq_find_and_fetch(
- hw->tx_actq, list_id);
- if (!tx_req) {
- if (cs != BC_STS_IO_USER_ABORT)
- BCMLOG_ERR("Find and Fetch Did not find req\n");
- return BC_STS_NO_DATA;
- }
-
- if (tx_req->call_back) {
- tx_req->call_back(tx_req->dio_req, tx_req->cb_event, cs);
- tx_req->dio_req = NULL;
- tx_req->cb_event = NULL;
- tx_req->call_back = NULL;
- } else {
- BCMLOG(BCMLOG_DBG, "Missing Tx Callback - %X\n",
- tx_req->list_tag);
- }
-
- /* Now put back the tx_list back in FreeQ */
- tx_req->list_tag = 0;
-
- return crystalhd_dioq_add(hw->tx_freeq, tx_req, false, 0);
-}
-
-static bool crystalhd_tx_list0_handler(struct crystalhd_hw *hw,
- uint32_t err_sts)
-{
- uint32_t err_mask, tmp;
- unsigned long flags = 0;
-
- err_mask = MISC1_TX_DMA_ERROR_STATUS_TX_L0_DESC_TX_ABORT_ERRORS_MASK |
- MISC1_TX_DMA_ERROR_STATUS_TX_L0_DMA_DATA_TX_ABORT_ERRORS_MASK |
- MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK;
-
- if (!(err_sts & err_mask))
- return false;
-
- BCMLOG_ERR("Error on Tx-L0 %x\n", err_sts);
-
- tmp = err_mask;
-
- if (err_sts & MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK)
- tmp &= ~MISC1_TX_DMA_ERROR_STATUS_TX_L0_FIFO_FULL_ERRORS_MASK;
-
- if (tmp) {
- spin_lock_irqsave(&hw->lock, flags);
- /* reset list index.*/
- hw->tx_list_post_index = 0;
- spin_unlock_irqrestore(&hw->lock, flags);
- }
-
- tmp = err_sts & err_mask;
- crystalhd_reg_wr(hw->adp, MISC1_TX_DMA_ERROR_STATUS, tmp);
-
- return true;
-}
-
-static bool crystalhd_tx_list1_handler(struct crystalhd_hw *hw,
- uint32_t err_sts)
-{
- uint32_t err_mask, tmp;
- unsigned long flags = 0;
-
- err_mask = MISC1_TX_DMA_ERROR_STATUS_TX_L1_DESC_TX_ABORT_ERRORS_MASK |
- MISC1_TX_DMA_ERROR_STATUS_TX_L1_DMA_DATA_TX_ABORT_ERRORS_MASK |
- MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK;
-
- if (!(err_sts & err_mask))
- return false;
-
- BCMLOG_ERR("Error on Tx-L1 %x\n", err_sts);
-
- tmp = err_mask;
-
- if (err_sts & MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK)
- tmp &= ~MISC1_TX_DMA_ERROR_STATUS_TX_L1_FIFO_FULL_ERRORS_MASK;
-
- if (tmp) {
- spin_lock_irqsave(&hw->lock, flags);
- /* reset list index.*/
- hw->tx_list_post_index = 0;
- spin_unlock_irqrestore(&hw->lock, flags);
- }
-
- tmp = err_sts & err_mask;
- crystalhd_reg_wr(hw->adp, MISC1_TX_DMA_ERROR_STATUS, tmp);
-
- return true;
-}
-
-static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts)
-{
- uint32_t err_sts;
-
- if (int_sts & INTR_INTR_STATUS_L0_TX_DMA_DONE_INTR_MASK)
- crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 0,
- BC_STS_SUCCESS);
-
- if (int_sts & INTR_INTR_STATUS_L1_TX_DMA_DONE_INTR_MASK)
- crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 1,
- BC_STS_SUCCESS);
-
- if (!(int_sts & (INTR_INTR_STATUS_L0_TX_DMA_ERR_INTR_MASK |
- INTR_INTR_STATUS_L1_TX_DMA_ERR_INTR_MASK))) {
- /* No error mask set.. */
- return;
- }
-
- /* Handle Tx errors. */
- err_sts = crystalhd_reg_rd(hw->adp, MISC1_TX_DMA_ERROR_STATUS);
-
- if (crystalhd_tx_list0_handler(hw, err_sts))
- crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 0,
- BC_STS_ERROR);
-
- if (crystalhd_tx_list1_handler(hw, err_sts))
- crystalhd_hw_tx_req_complete(hw, hw->tx_ioq_tag_seed + 1,
- BC_STS_ERROR);
-
- hw->stats.tx_errors++;
-}
-
-static void crystalhd_hw_dump_desc(struct dma_descriptor *p_dma_desc,
- uint32_t ul_desc_index, uint32_t cnt)
-{
- uint32_t ix, ll = 0;
-
- if (!p_dma_desc || !cnt)
- return;
-
- /* FIXME: jarod: perhaps a modparam desc_debug to enable this,
- rather than setting ll (log level, I presume) to non-zero? */
- if (!ll)
- return;
-
- for (ix = ul_desc_index; ix < (ul_desc_index + cnt); ix++) {
- BCMLOG(ll,
- "%s[%d] Buff[%x:%x] Next:[%x:%x] XferSz:%x Intr:%x,Last:%x\n",
- ((p_dma_desc[ul_desc_index].dma_dir) ? "TDesc" : "RDesc"),
- ul_desc_index,
- p_dma_desc[ul_desc_index].buff_addr_high,
- p_dma_desc[ul_desc_index].buff_addr_low,
- p_dma_desc[ul_desc_index].next_desc_addr_high,
- p_dma_desc[ul_desc_index].next_desc_addr_low,
- p_dma_desc[ul_desc_index].xfer_size,
- p_dma_desc[ul_desc_index].intr_enable,
- p_dma_desc[ul_desc_index].last_rec_indicator);
- }
-
-}
-
-static enum BC_STATUS crystalhd_hw_fill_desc(struct crystalhd_dio_req *ioreq,
- struct dma_descriptor *desc,
- dma_addr_t desc_paddr_base,
- uint32_t sg_cnt, uint32_t sg_st_ix,
- uint32_t sg_st_off, uint32_t xfr_sz)
-{
- uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0;
- dma_addr_t desc_phy_addr = desc_paddr_base;
- union addr_64 addr_temp;
-
- if (!ioreq || !desc || !desc_paddr_base || !xfr_sz ||
- (!sg_cnt && !ioreq->uinfo.dir_tx)) {
- BCMLOG_ERR("Invalid Args\n");
- return BC_STS_INV_ARG;
- }
-
- for (ix = 0; ix < sg_cnt; ix++) {
-
- /* Setup SGLE index. */
- sg_ix = ix + sg_st_ix;
-
- /* Get SGLE length */
- len = crystalhd_get_sgle_len(ioreq, sg_ix);
- if (len % 4) {
- BCMLOG_ERR(" len in sg %d %d %d\n", len, sg_ix,
- sg_cnt);
- return BC_STS_NOT_IMPL;
- }
- /* Setup DMA desc with Phy addr & Length at current index. */
- addr_temp.full_addr = crystalhd_get_sgle_paddr(ioreq, sg_ix);
- if (sg_ix == sg_st_ix) {
- addr_temp.full_addr += sg_st_off;
- len -= sg_st_off;
- }
- memset(&desc[ix], 0, sizeof(desc[ix]));
- desc[ix].buff_addr_low = addr_temp.low_part;
- desc[ix].buff_addr_high = addr_temp.high_part;
- desc[ix].dma_dir = ioreq->uinfo.dir_tx;
-
- /* Chain DMA descriptor. */
- addr_temp.full_addr = desc_phy_addr +
- sizeof(struct dma_descriptor);
- desc[ix].next_desc_addr_low = addr_temp.low_part;
- desc[ix].next_desc_addr_high = addr_temp.high_part;
-
- if ((count + len) > xfr_sz)
- len = xfr_sz - count;
-
- /* Debug.. */
- if ((!len) || (len > crystalhd_get_sgle_len(ioreq, sg_ix))) {
- BCMLOG_ERR(
- "inv-len(%x) Ix(%d) count:%x xfr_sz:%x sg_cnt:%d\n",
- len, ix, count, xfr_sz, sg_cnt);
- return BC_STS_ERROR;
- }
- /* Length expects Multiple of 4 */
- desc[ix].xfer_size = (len / 4);
-
- crystalhd_hw_dump_desc(desc, ix, 1);
-
- count += len;
- desc_phy_addr += sizeof(struct dma_descriptor);
- }
-
- last_desc_ix = ix - 1;
-
- if (ioreq->fb_size) {
- memset(&desc[ix], 0, sizeof(desc[ix]));
- addr_temp.full_addr = ioreq->fb_pa;
- desc[ix].buff_addr_low = addr_temp.low_part;
- desc[ix].buff_addr_high = addr_temp.high_part;
- desc[ix].dma_dir = ioreq->uinfo.dir_tx;
- desc[ix].xfer_size = 1;
- desc[ix].fill_bytes = 4 - ioreq->fb_size;
- count += ioreq->fb_size;
- last_desc_ix++;
- }
-
- /* setup last descriptor..*/
- desc[last_desc_ix].last_rec_indicator = 1;
- desc[last_desc_ix].next_desc_addr_low = 0;
- desc[last_desc_ix].next_desc_addr_high = 0;
- desc[last_desc_ix].intr_enable = 1;
-
- crystalhd_hw_dump_desc(desc, last_desc_ix, 1);
-
- if (count != xfr_sz) {
- BCMLOG_ERR("internal error sz curr:%x exp:%x\n", count, xfr_sz);
- return BC_STS_ERROR;
- }
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS crystalhd_xlat_sgl_to_dma_desc(
- struct crystalhd_dio_req *ioreq,
- struct dma_desc_mem *pdesc_mem,
- uint32_t *uv_desc_index)
-{
- struct dma_descriptor *desc = NULL;
- dma_addr_t desc_paddr_base = 0;
- uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0;
- uint32_t xfr_sz = 0;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- /* Check params.. */
- if (!ioreq || !pdesc_mem || !uv_desc_index) {
- BCMLOG_ERR("Invalid Args\n");
- return BC_STS_INV_ARG;
- }
-
- if (!pdesc_mem->sz || !pdesc_mem->pdma_desc_start ||
- !ioreq->sg || (!ioreq->sg_cnt && !ioreq->uinfo.dir_tx)) {
- BCMLOG_ERR("Invalid Args\n");
- return BC_STS_INV_ARG;
- }
-
- if ((ioreq->uinfo.dir_tx) && (ioreq->uinfo.uv_offset)) {
- BCMLOG_ERR("UV offset for TX??\n");
- return BC_STS_INV_ARG;
-
- }
-
- desc = pdesc_mem->pdma_desc_start;
- desc_paddr_base = pdesc_mem->phy_addr;
-
- if (ioreq->uinfo.dir_tx || (ioreq->uinfo.uv_offset == 0)) {
- sg_cnt = ioreq->sg_cnt;
- xfr_sz = ioreq->uinfo.xfr_len;
- } else {
- sg_cnt = ioreq->uinfo.uv_sg_ix + 1;
- xfr_sz = ioreq->uinfo.uv_offset;
- }
-
- sts = crystalhd_hw_fill_desc(ioreq, desc, desc_paddr_base, sg_cnt,
- sg_st_ix, sg_st_off, xfr_sz);
-
- if ((sts != BC_STS_SUCCESS) || !ioreq->uinfo.uv_offset)
- return sts;
-
- /* Prepare for UV mapping.. */
- desc = &pdesc_mem->pdma_desc_start[sg_cnt];
- desc_paddr_base = pdesc_mem->phy_addr +
- (sg_cnt * sizeof(struct dma_descriptor));
-
- /* Done with desc addr.. now update sg stuff.*/
- sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix;
- xfr_sz = ioreq->uinfo.xfr_len - ioreq->uinfo.uv_offset;
- sg_st_ix = ioreq->uinfo.uv_sg_ix;
- sg_st_off = ioreq->uinfo.uv_sg_off;
-
- sts = crystalhd_hw_fill_desc(ioreq, desc, desc_paddr_base, sg_cnt,
- sg_st_ix, sg_st_off, xfr_sz);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- *uv_desc_index = sg_st_ix;
-
- return sts;
-}
-
-static void crystalhd_start_tx_dma_engine(struct crystalhd_hw *hw)
-{
- uint32_t dma_cntrl;
-
- dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS);
- if (!(dma_cntrl & DMA_START_BIT)) {
- dma_cntrl |= DMA_START_BIT;
- crystalhd_reg_wr(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS,
- dma_cntrl);
- }
-
- return;
-}
-
-/* _CHECK_THIS_
- *
- * Verify if the Stop generates a completion interrupt or not.
- * if it does not generate an interrupt, then add polling here.
- */
-static enum BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw)
-{
- uint32_t dma_cntrl, cnt = 30;
- uint32_t l1 = 1, l2 = 1;
- unsigned long flags = 0;
-
- dma_cntrl = crystalhd_reg_rd(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS);
-
- BCMLOG(BCMLOG_DBG, "Stopping TX DMA Engine..\n");
-
- if (!(dma_cntrl & DMA_START_BIT)) {
- BCMLOG(BCMLOG_DBG, "Already Stopped\n");
- return BC_STS_SUCCESS;
- }
-
- crystalhd_disable_interrupts(hw->adp);
-
- /* Issue stop to HW */
- /* This bit when set gave problems. Please check*/
- dma_cntrl &= ~DMA_START_BIT;
- crystalhd_reg_wr(hw->adp, MISC1_TX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
-
- BCMLOG(BCMLOG_DBG, "Cleared the DMA Start bit\n");
-
- /* Poll for 3seconds (30 * 100ms) on both the lists..*/
- while ((l1 || l2) && cnt) {
-
- if (l1) {
- l1 = crystalhd_reg_rd(hw->adp,
- MISC1_TX_FIRST_DESC_L_ADDR_LIST0);
- l1 &= DMA_START_BIT;
- }
-
- if (l2) {
- l2 = crystalhd_reg_rd(hw->adp,
- MISC1_TX_FIRST_DESC_L_ADDR_LIST1);
- l2 &= DMA_START_BIT;
- }
-
- msleep_interruptible(100);
-
- cnt--;
- }
-
- if (!cnt) {
- BCMLOG_ERR("Failed to stop TX DMA.. l1 %d, l2 %d\n", l1, l2);
- crystalhd_enable_interrupts(hw->adp);
- return BC_STS_ERROR;
- }
-
- spin_lock_irqsave(&hw->lock, flags);
- hw->tx_list_post_index = 0;
- spin_unlock_irqrestore(&hw->lock, flags);
- BCMLOG(BCMLOG_DBG, "stopped TX DMA..\n");
- crystalhd_enable_interrupts(hw->adp);
-
- return BC_STS_SUCCESS;
-}
-
-static uint32_t crystalhd_get_pib_avail_cnt(struct crystalhd_hw *hw)
-{
- /*
- * Position of the PIB Entries can be found at
- * 0th and the 1st location of the Circular list.
- */
- uint32_t Q_addr;
- uint32_t pib_cnt, r_offset, w_offset;
-
- Q_addr = hw->pib_del_Q_addr;
-
- /* Get the Read Pointer */
- crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset);
-
- /* Get the Write Pointer */
- crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset);
-
- if (r_offset == w_offset)
- return 0; /* Queue is empty */
-
- if (w_offset > r_offset)
- pib_cnt = w_offset - r_offset;
- else
- pib_cnt = (w_offset + MAX_PIB_Q_DEPTH) -
- (r_offset + MIN_PIB_Q_DEPTH);
-
- if (pib_cnt > MAX_PIB_Q_DEPTH) {
- BCMLOG_ERR("Invalid PIB Count (%u)\n", pib_cnt);
- return 0;
- }
-
- return pib_cnt;
-}
-
-static uint32_t crystalhd_get_addr_from_pib_Q(struct crystalhd_hw *hw)
-{
- uint32_t Q_addr;
- uint32_t addr_entry, r_offset, w_offset;
-
- Q_addr = hw->pib_del_Q_addr;
-
- /* Get the Read Pointer 0Th Location is Read Pointer */
- crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset);
-
- /* Get the Write Pointer 1st Location is Write pointer */
- crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset);
-
- /* Queue is empty */
- if (r_offset == w_offset)
- return 0;
-
- if ((r_offset < MIN_PIB_Q_DEPTH) || (r_offset >= MAX_PIB_Q_DEPTH))
- return 0;
-
- /* Get the Actual Address of the PIB */
- crystalhd_mem_rd(hw->adp, Q_addr + (r_offset * sizeof(uint32_t)),
- 1, &addr_entry);
-
- /* Increment the Read Pointer */
- r_offset++;
-
- if (MAX_PIB_Q_DEPTH == r_offset)
- r_offset = MIN_PIB_Q_DEPTH;
-
- /* Write back the read pointer to It's Location */
- crystalhd_mem_wr(hw->adp, Q_addr, 1, &r_offset);
-
- return addr_entry;
-}
-
-static bool crystalhd_rel_addr_to_pib_Q(struct crystalhd_hw *hw,
- uint32_t addr_to_rel)
-{
- uint32_t Q_addr;
- uint32_t r_offset, w_offset, n_offset;
-
- Q_addr = hw->pib_rel_Q_addr;
-
- /* Get the Read Pointer */
- crystalhd_mem_rd(hw->adp, Q_addr, 1, &r_offset);
-
- /* Get the Write Pointer */
- crystalhd_mem_rd(hw->adp, Q_addr + sizeof(uint32_t), 1, &w_offset);
-
- if ((r_offset < MIN_PIB_Q_DEPTH) ||
- (r_offset >= MAX_PIB_Q_DEPTH))
- return false;
-
- n_offset = w_offset + 1;
-
- if (MAX_PIB_Q_DEPTH == n_offset)
- n_offset = MIN_PIB_Q_DEPTH;
-
- if (r_offset == n_offset)
- return false; /* should never happen */
-
- /* Write the DRAM ADDR to the Queue at Next Offset */
- crystalhd_mem_wr(hw->adp, Q_addr + (w_offset * sizeof(uint32_t)),
- 1, &addr_to_rel);
-
- /* Put the New value of the write pointer in Queue */
- crystalhd_mem_wr(hw->adp, Q_addr + sizeof(uint32_t), 1, &n_offset);
-
- return true;
-}
-
-static void cpy_pib_to_app(struct c011_pib *src_pib,
- struct BC_PIC_INFO_BLOCK *dst_pib)
-{
- if (!src_pib || !dst_pib) {
- BCMLOG_ERR("Invalid Arguments\n");
- return;
- }
-
- dst_pib->timeStamp = 0;
- dst_pib->picture_number = src_pib->ppb.picture_number;
- dst_pib->width = src_pib->ppb.width;
- dst_pib->height = src_pib->ppb.height;
- dst_pib->chroma_format = src_pib->ppb.chroma_format;
- dst_pib->pulldown = src_pib->ppb.pulldown;
- dst_pib->flags = src_pib->ppb.flags;
- dst_pib->sess_num = src_pib->ptsStcOffset;
- dst_pib->aspect_ratio = src_pib->ppb.aspect_ratio;
- dst_pib->colour_primaries = src_pib->ppb.colour_primaries;
- dst_pib->picture_meta_payload = src_pib->ppb.picture_meta_payload;
- dst_pib->frame_rate = src_pib->resolution;
- return;
-}
-
-static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw)
-{
- unsigned int cnt;
- struct c011_pib src_pib;
- uint32_t pib_addr, pib_cnt;
- struct BC_PIC_INFO_BLOCK *AppPib;
- struct crystalhd_rx_dma_pkt *rx_pkt = NULL;
-
- pib_cnt = crystalhd_get_pib_avail_cnt(hw);
-
- if (!pib_cnt)
- return;
-
- for (cnt = 0; cnt < pib_cnt; cnt++) {
-
- pib_addr = crystalhd_get_addr_from_pib_Q(hw);
- crystalhd_mem_rd(hw->adp, pib_addr, sizeof(struct c011_pib) / 4,
- (uint32_t *)&src_pib);
-
- if (src_pib.bFormatChange) {
- rx_pkt = (struct crystalhd_rx_dma_pkt *)
- crystalhd_dioq_fetch(hw->rx_freeq);
- if (!rx_pkt)
- return;
- rx_pkt->flags = 0;
- rx_pkt->flags |= COMP_FLAG_PIB_VALID |
- COMP_FLAG_FMT_CHANGE;
- AppPib = &rx_pkt->pib;
- cpy_pib_to_app(&src_pib, AppPib);
-
- BCMLOG(BCMLOG_DBG,
- "App PIB:%x %x %x %x %x %x %x %x %x %x\n",
- rx_pkt->pib.picture_number,
- rx_pkt->pib.aspect_ratio,
- rx_pkt->pib.chroma_format,
- rx_pkt->pib.colour_primaries,
- rx_pkt->pib.frame_rate,
- rx_pkt->pib.height,
- rx_pkt->pib.height,
- rx_pkt->pib.n_drop,
- rx_pkt->pib.pulldown,
- rx_pkt->pib.ycom);
-
- crystalhd_dioq_add(hw->rx_rdyq, (void *)rx_pkt, true,
- rx_pkt->pkt_tag);
-
- }
-
- crystalhd_rel_addr_to_pib_Q(hw, pib_addr);
- }
-}
-
-static void crystalhd_start_rx_dma_engine(struct crystalhd_hw *hw)
-{
- uint32_t dma_cntrl;
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS);
- if (!(dma_cntrl & DMA_START_BIT)) {
- dma_cntrl |= DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS);
- if (!(dma_cntrl & DMA_START_BIT)) {
- dma_cntrl |= DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
-
- return;
-}
-
-static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw)
-{
- uint32_t dma_cntrl = 0, count = 30;
- uint32_t l0y = 1, l0uv = 1, l1y = 1, l1uv = 1;
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS);
- if ((dma_cntrl & DMA_START_BIT)) {
- dma_cntrl &= ~DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS);
- if ((dma_cntrl & DMA_START_BIT)) {
- dma_cntrl &= ~DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
-
- /* Poll for 3seconds (30 * 100ms) on both the lists..*/
- while ((l0y || l0uv || l1y || l1uv) && count) {
-
- if (l0y) {
- l0y = crystalhd_reg_rd(hw->adp,
- MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0);
- l0y &= DMA_START_BIT;
- if (!l0y)
- hw->rx_list_sts[0] &= ~rx_waiting_y_intr;
- }
-
- if (l1y) {
- l1y = crystalhd_reg_rd(hw->adp,
- MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1);
- l1y &= DMA_START_BIT;
- if (!l1y)
- hw->rx_list_sts[1] &= ~rx_waiting_y_intr;
- }
-
- if (l0uv) {
- l0uv = crystalhd_reg_rd(hw->adp,
- MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0);
- l0uv &= DMA_START_BIT;
- if (!l0uv)
- hw->rx_list_sts[0] &= ~rx_waiting_uv_intr;
- }
-
- if (l1uv) {
- l1uv = crystalhd_reg_rd(hw->adp,
- MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1);
- l1uv &= DMA_START_BIT;
- if (!l1uv)
- hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
- }
- msleep_interruptible(100);
- count--;
- }
-
- hw->rx_list_post_index = 0;
-
- BCMLOG(BCMLOG_SSTEP, "Capture Stop: %d List0:Sts:%x List1:Sts:%x\n",
- count, hw->rx_list_sts[0], hw->rx_list_sts[1]);
-}
-
-static enum BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw,
- struct crystalhd_rx_dma_pkt *rx_pkt)
-{
- uint32_t y_low_addr_reg, y_high_addr_reg;
- uint32_t uv_low_addr_reg, uv_high_addr_reg;
- union addr_64 desc_addr;
- unsigned long flags;
-
- if (!hw || !rx_pkt) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- if (hw->rx_list_post_index >= DMA_ENGINE_CNT) {
- BCMLOG_ERR("List Out Of bounds %x\n", hw->rx_list_post_index);
- return BC_STS_INV_ARG;
- }
-
- spin_lock_irqsave(&hw->rx_lock, flags);
- /* FIXME: jarod: sts_free is an enum for 0,
- in crystalhd_hw.h... yuk... */
- if (sts_free != hw->rx_list_sts[hw->rx_list_post_index]) {
- spin_unlock_irqrestore(&hw->rx_lock, flags);
- return BC_STS_BUSY;
- }
-
- if (!hw->rx_list_post_index) {
- y_low_addr_reg = MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST0;
- y_high_addr_reg = MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST0;
- uv_low_addr_reg = MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST0;
- uv_high_addr_reg = MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST0;
- } else {
- y_low_addr_reg = MISC1_Y_RX_FIRST_DESC_L_ADDR_LIST1;
- y_high_addr_reg = MISC1_Y_RX_FIRST_DESC_U_ADDR_LIST1;
- uv_low_addr_reg = MISC1_UV_RX_FIRST_DESC_L_ADDR_LIST1;
- uv_high_addr_reg = MISC1_UV_RX_FIRST_DESC_U_ADDR_LIST1;
- }
- rx_pkt->pkt_tag = hw->rx_pkt_tag_seed + hw->rx_list_post_index;
- hw->rx_list_sts[hw->rx_list_post_index] |= rx_waiting_y_intr;
- if (rx_pkt->uv_phy_addr)
- hw->rx_list_sts[hw->rx_list_post_index] |= rx_waiting_uv_intr;
- hw->rx_list_post_index = (hw->rx_list_post_index + 1) % DMA_ENGINE_CNT;
- spin_unlock_irqrestore(&hw->rx_lock, flags);
-
- crystalhd_dioq_add(hw->rx_actq, (void *)rx_pkt, false,
- rx_pkt->pkt_tag);
-
- crystalhd_start_rx_dma_engine(hw);
- /* Program the Y descriptor */
- desc_addr.full_addr = rx_pkt->desc_mem.phy_addr;
- crystalhd_reg_wr(hw->adp, y_high_addr_reg, desc_addr.high_part);
- crystalhd_reg_wr(hw->adp, y_low_addr_reg, desc_addr.low_part | 0x01);
-
- if (rx_pkt->uv_phy_addr) {
- /* Program the UV descriptor */
- desc_addr.full_addr = rx_pkt->uv_phy_addr;
- crystalhd_reg_wr(hw->adp, uv_high_addr_reg,
- desc_addr.high_part);
- crystalhd_reg_wr(hw->adp, uv_low_addr_reg,
- desc_addr.low_part | 0x01);
- }
-
- return BC_STS_SUCCESS;
-}
-
-static enum BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw,
- struct crystalhd_rx_dma_pkt *rx_pkt)
-{
- enum BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt);
-
- if (sts == BC_STS_BUSY)
- crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt,
- false, rx_pkt->pkt_tag);
-
- return sts;
-}
-
-static void crystalhd_get_dnsz(struct crystalhd_hw *hw, uint32_t list_index,
- uint32_t *y_dw_dnsz, uint32_t *uv_dw_dnsz)
-{
- uint32_t y_dn_sz_reg, uv_dn_sz_reg;
-
- if (!list_index) {
- y_dn_sz_reg = MISC1_Y_RX_LIST0_CUR_BYTE_CNT;
- uv_dn_sz_reg = MISC1_UV_RX_LIST0_CUR_BYTE_CNT;
- } else {
- y_dn_sz_reg = MISC1_Y_RX_LIST1_CUR_BYTE_CNT;
- uv_dn_sz_reg = MISC1_UV_RX_LIST1_CUR_BYTE_CNT;
- }
-
- *y_dw_dnsz = crystalhd_reg_rd(hw->adp, y_dn_sz_reg);
- *uv_dw_dnsz = crystalhd_reg_rd(hw->adp, uv_dn_sz_reg);
-}
-
-/*
- * This function should be called only after making sure that the two DMA
- * lists are free. This function does not check if DMA's are active, before
- * turning off the DMA.
- */
-static void crystalhd_hw_finalize_pause(struct crystalhd_hw *hw)
-{
- uint32_t dma_cntrl, aspm;
-
- hw->stop_pending = 0;
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS);
- if (dma_cntrl & DMA_START_BIT) {
- dma_cntrl &= ~DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_Y_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
-
- dma_cntrl = crystalhd_reg_rd(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS);
- if (dma_cntrl & DMA_START_BIT) {
- dma_cntrl &= ~DMA_START_BIT;
- crystalhd_reg_wr(hw->adp,
- MISC1_UV_RX_SW_DESC_LIST_CTRL_STS, dma_cntrl);
- }
- hw->rx_list_post_index = 0;
-
- aspm = crystalhd_reg_rd(hw->adp, PCIE_DLL_DATA_LINK_CONTROL);
- aspm |= ASPM_L1_ENABLE;
- /* NAREN BCMLOG(BCMLOG_INFO, "aspm on\n"); */
- crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm);
-}
-
-static enum BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw,
- uint32_t list_index, enum BC_STATUS comp_sts)
-{
- struct crystalhd_rx_dma_pkt *rx_pkt = NULL;
- uint32_t y_dw_dnsz, uv_dw_dnsz;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- if (!hw || list_index >= DMA_ENGINE_CNT) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- rx_pkt = crystalhd_dioq_find_and_fetch(hw->rx_actq,
- hw->rx_pkt_tag_seed + list_index);
- if (!rx_pkt) {
- BCMLOG_ERR(
- "Act-Q:PostIx:%x L0Sts:%x L1Sts:%x current L:%x tag:%x comp:%x\n",
- hw->rx_list_post_index, hw->rx_list_sts[0],
- hw->rx_list_sts[1], list_index,
- hw->rx_pkt_tag_seed + list_index, comp_sts);
- return BC_STS_INV_ARG;
- }
-
- if (comp_sts == BC_STS_SUCCESS) {
- crystalhd_get_dnsz(hw, list_index, &y_dw_dnsz, &uv_dw_dnsz);
- rx_pkt->dio_req->uinfo.y_done_sz = y_dw_dnsz;
- rx_pkt->flags = COMP_FLAG_DATA_VALID;
- if (rx_pkt->uv_phy_addr)
- rx_pkt->dio_req->uinfo.uv_done_sz = uv_dw_dnsz;
- crystalhd_dioq_add(hw->rx_rdyq, rx_pkt, true,
- hw->rx_pkt_tag_seed + list_index);
- return sts;
- }
-
- /* Check if we can post this DIO again. */
- return crystalhd_hw_post_cap_buff(hw, rx_pkt);
-}
-
-static bool crystalhd_rx_list0_handler(struct crystalhd_hw *hw,
- uint32_t int_sts, uint32_t y_err_sts, uint32_t uv_err_sts)
-{
- uint32_t tmp;
- enum list_sts tmp_lsts;
-
- if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK))
- return false;
-
- tmp_lsts = hw->rx_list_sts[0];
-
- /* Y0 - DMA */
- tmp = y_err_sts & GET_Y0_ERR_MSK;
- if (int_sts & INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK)
- hw->rx_list_sts[0] &= ~rx_waiting_y_intr;
-
- if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK) {
- hw->rx_list_sts[0] &= ~rx_waiting_y_intr;
- tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK;
- }
-
- if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) {
- hw->rx_list_sts[0] &= ~rx_y_mask;
- hw->rx_list_sts[0] |= rx_y_error;
- tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK;
- }
-
- if (tmp) {
- hw->rx_list_sts[0] &= ~rx_y_mask;
- hw->rx_list_sts[0] |= rx_y_error;
- hw->rx_list_post_index = 0;
- }
-
- /* UV0 - DMA */
- tmp = uv_err_sts & GET_UV0_ERR_MSK;
- if (int_sts & INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK)
- hw->rx_list_sts[0] &= ~rx_waiting_uv_intr;
-
- if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK) {
- hw->rx_list_sts[0] &= ~rx_waiting_uv_intr;
- tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK;
- }
-
- if (uv_err_sts &
- MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK) {
- hw->rx_list_sts[0] &= ~rx_uv_mask;
- hw->rx_list_sts[0] |= rx_uv_error;
- tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK;
- }
-
- if (tmp) {
- hw->rx_list_sts[0] &= ~rx_uv_mask;
- hw->rx_list_sts[0] |= rx_uv_error;
- hw->rx_list_post_index = 0;
- }
-
- if (y_err_sts & GET_Y0_ERR_MSK) {
- tmp = y_err_sts & GET_Y0_ERR_MSK;
- crystalhd_reg_wr(hw->adp, MISC1_Y_RX_ERROR_STATUS, tmp);
- }
-
- if (uv_err_sts & GET_UV0_ERR_MSK) {
- tmp = uv_err_sts & GET_UV0_ERR_MSK;
- crystalhd_reg_wr(hw->adp, MISC1_UV_RX_ERROR_STATUS, tmp);
- }
-
- return tmp_lsts != hw->rx_list_sts[0];
-}
-
-static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw,
- uint32_t int_sts, uint32_t y_err_sts, uint32_t uv_err_sts)
-{
- uint32_t tmp;
- enum list_sts tmp_lsts;
-
- if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK))
- return false;
-
- tmp_lsts = hw->rx_list_sts[1];
-
- /* Y1 - DMA */
- tmp = y_err_sts & GET_Y1_ERR_MSK;
- if (int_sts & INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK)
- hw->rx_list_sts[1] &= ~rx_waiting_y_intr;
-
- if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) {
- hw->rx_list_sts[1] &= ~rx_waiting_y_intr;
- tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK;
- }
-
- if (y_err_sts & MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) {
- /* Add retry-support..*/
- hw->rx_list_sts[1] &= ~rx_y_mask;
- hw->rx_list_sts[1] |= rx_y_error;
- tmp &= ~MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK;
- }
-
- if (tmp) {
- hw->rx_list_sts[1] &= ~rx_y_mask;
- hw->rx_list_sts[1] |= rx_y_error;
- hw->rx_list_post_index = 0;
- }
-
- /* UV1 - DMA */
- tmp = uv_err_sts & GET_UV1_ERR_MSK;
- if (int_sts & INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK)
- hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
-
- if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK) {
- hw->rx_list_sts[1] &= ~rx_waiting_uv_intr;
- tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK;
- }
-
- if (uv_err_sts & MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK) {
- /* Add retry-support*/
- hw->rx_list_sts[1] &= ~rx_uv_mask;
- hw->rx_list_sts[1] |= rx_uv_error;
- tmp &= ~MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK;
- }
-
- if (tmp) {
- hw->rx_list_sts[1] &= ~rx_uv_mask;
- hw->rx_list_sts[1] |= rx_uv_error;
- hw->rx_list_post_index = 0;
- }
-
- if (y_err_sts & GET_Y1_ERR_MSK) {
- tmp = y_err_sts & GET_Y1_ERR_MSK;
- crystalhd_reg_wr(hw->adp, MISC1_Y_RX_ERROR_STATUS, tmp);
- }
-
- if (uv_err_sts & GET_UV1_ERR_MSK) {
- tmp = uv_err_sts & GET_UV1_ERR_MSK;
- crystalhd_reg_wr(hw->adp, MISC1_UV_RX_ERROR_STATUS, tmp);
- }
-
- return tmp_lsts != hw->rx_list_sts[1];
-}
-
-
-static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts)
-{
- unsigned long flags;
- uint32_t i, list_avail = 0;
- enum BC_STATUS comp_sts = BC_STS_NO_DATA;
- uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0;
- bool ret = false;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return;
- }
-
- if (!(intr_sts & GET_RX_INTR_MASK))
- return;
-
- y_err_sts = crystalhd_reg_rd(hw->adp, MISC1_Y_RX_ERROR_STATUS);
- uv_err_sts = crystalhd_reg_rd(hw->adp, MISC1_UV_RX_ERROR_STATUS);
-
- for (i = 0; i < DMA_ENGINE_CNT; i++) {
- /* Update States..*/
- spin_lock_irqsave(&hw->rx_lock, flags);
- if (i == 0)
- ret = crystalhd_rx_list0_handler(hw, intr_sts,
- y_err_sts, uv_err_sts);
- else
- ret = crystalhd_rx_list1_handler(hw, intr_sts,
- y_err_sts, uv_err_sts);
- if (ret) {
- switch (hw->rx_list_sts[i]) {
- case sts_free:
- comp_sts = BC_STS_SUCCESS;
- list_avail = 1;
- break;
- case rx_y_error:
- case rx_uv_error:
- case rx_sts_error:
- /* We got error on both or Y or uv. */
- hw->stats.rx_errors++;
- crystalhd_get_dnsz(hw, i, &y_dn_sz, &uv_dn_sz);
- /* FIXME: jarod: this is where
- my mini pci-e card is tripping up */
- BCMLOG(BCMLOG_DBG, "list_index:%x rx[%d] Y:%x UV:%x Int:%x YDnSz:%x UVDnSz:%x\n",
- i, hw->stats.rx_errors, y_err_sts,
- uv_err_sts, intr_sts, y_dn_sz,
- uv_dn_sz);
- hw->rx_list_sts[i] = sts_free;
- comp_sts = BC_STS_ERROR;
- break;
- default:
- /* Wait for completion..*/
- comp_sts = BC_STS_NO_DATA;
- break;
- }
- }
- spin_unlock_irqrestore(&hw->rx_lock, flags);
-
- /* handle completion...*/
- if (comp_sts != BC_STS_NO_DATA) {
- crystalhd_rx_pkt_done(hw, i, comp_sts);
- comp_sts = BC_STS_NO_DATA;
- }
- }
-
- if (list_avail) {
- if (hw->stop_pending) {
- if ((hw->rx_list_sts[0] == sts_free) &&
- (hw->rx_list_sts[1] == sts_free))
- crystalhd_hw_finalize_pause(hw);
- } else {
- crystalhd_hw_start_capture(hw);
- }
- }
-}
-
-static enum BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw,
- struct BC_FW_CMD *fw_cmd)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
- struct dec_rsp_channel_start_video *st_rsp = NULL;
-
- switch (fw_cmd->cmd[0]) {
- case eCMD_C011_DEC_CHAN_START_VIDEO:
- st_rsp = (struct dec_rsp_channel_start_video *)fw_cmd->rsp;
- hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ;
- hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ;
- BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n",
- hw->pib_del_Q_addr, hw->pib_rel_Q_addr);
- break;
- case eCMD_C011_INIT:
- if (!(crystalhd_load_firmware_config(hw->adp))) {
- BCMLOG_ERR("Invalid Params.\n");
- sts = BC_STS_FW_AUTH_FAILED;
- }
- break;
- default:
- break;
- }
- return sts;
-}
-
-static enum BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw)
-{
- uint32_t reg;
- union link_misc_perst_decoder_ctrl rst_cntrl_reg;
-
- /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */
- rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp,
- MISC_PERST_DECODER_CTRL);
-
- rst_cntrl_reg.bcm_7412_rst = 1;
- crystalhd_reg_wr(hw->adp, MISC_PERST_DECODER_CTRL,
- rst_cntrl_reg.whole_reg);
- msleep_interruptible(50);
-
- rst_cntrl_reg.bcm_7412_rst = 0;
- crystalhd_reg_wr(hw->adp, MISC_PERST_DECODER_CTRL,
- rst_cntrl_reg.whole_reg);
-
- /* Close all banks, put DDR in idle */
- bc_dec_reg_wr(hw->adp, SDRAM_PRECHARGE, 0);
-
- /* Set bit 25 (drop CKE pin of DDR) */
- reg = bc_dec_reg_rd(hw->adp, SDRAM_PARAM);
- reg |= 0x02000000;
- bc_dec_reg_wr(hw->adp, SDRAM_PARAM, reg);
-
- /* Reset the audio block */
- bc_dec_reg_wr(hw->adp, AUD_DSP_MISC_SOFT_RESET, 0x1);
-
- /* Power down Raptor PLL */
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllCCtl);
- reg |= 0x00008000;
- bc_dec_reg_wr(hw->adp, DecHt_PllCCtl, reg);
-
- /* Power down all Audio PLL */
- bc_dec_reg_wr(hw->adp, AIO_MISC_PLL_RESET, 0x1);
-
- /* Power down video clock (75MHz) */
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllECtl);
- reg |= 0x00008000;
- bc_dec_reg_wr(hw->adp, DecHt_PllECtl, reg);
-
- /* Power down video clock (75MHz) */
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllDCtl);
- reg |= 0x00008000;
- bc_dec_reg_wr(hw->adp, DecHt_PllDCtl, reg);
-
- /* Power down core clock (200MHz) */
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl);
- reg |= 0x00008000;
- bc_dec_reg_wr(hw->adp, DecHt_PllACtl, reg);
-
- /* Power down core clock (200MHz) */
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllBCtl);
- reg |= 0x00008000;
- bc_dec_reg_wr(hw->adp, DecHt_PllBCtl, reg);
-
- return BC_STS_SUCCESS;
-}
-
-/************************************************
-**
-*************************************************/
-
-enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer,
- uint32_t sz)
-{
- uint32_t reg_data, cnt, *temp_buff;
- uint32_t fw_sig_len = 36;
- uint32_t dram_offset = BC_FWIMG_ST_ADDR, sig_reg;
-
-
- if (!adp || !buffer || !sz) {
- BCMLOG_ERR("Invalid Params.\n");
- return BC_STS_INV_ARG;
- }
-
- reg_data = crystalhd_reg_rd(adp, OTP_CMD);
- if (!(reg_data & 0x02)) {
- BCMLOG_ERR("Invalid hw config.. otp not programmed\n");
- return BC_STS_ERROR;
- }
-
- reg_data = 0;
- crystalhd_reg_wr(adp, DCI_CMD, 0);
- reg_data |= BC_BIT(0);
- crystalhd_reg_wr(adp, DCI_CMD, reg_data);
-
- reg_data = 0;
- cnt = 1000;
- msleep_interruptible(10);
-
- while (reg_data != BC_BIT(4)) {
- reg_data = crystalhd_reg_rd(adp, DCI_STATUS);
- reg_data &= BC_BIT(4);
- if (--cnt == 0) {
- BCMLOG_ERR("Firmware Download RDY Timeout.\n");
- return BC_STS_TIMEOUT;
- }
- }
-
- msleep_interruptible(10);
- /* Load the FW to the FW_ADDR field in the DCI_FIRMWARE_ADDR */
- crystalhd_reg_wr(adp, DCI_FIRMWARE_ADDR, dram_offset);
- temp_buff = (uint32_t *)buffer;
- for (cnt = 0; cnt < (sz - fw_sig_len); cnt += 4) {
- crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (dram_offset >> 19));
- crystalhd_reg_wr(adp, DCI_FIRMWARE_DATA, *temp_buff);
- dram_offset += 4;
- temp_buff++;
- }
- msleep_interruptible(10);
-
- temp_buff++;
-
- sig_reg = (uint32_t)DCI_SIGNATURE_DATA_7;
- for (cnt = 0; cnt < 8; cnt++) {
- uint32_t swapped_data = *temp_buff;
- swapped_data = bswap_32_1(swapped_data);
- crystalhd_reg_wr(adp, sig_reg, swapped_data);
- sig_reg -= 4;
- temp_buff++;
- }
- msleep_interruptible(10);
-
- reg_data = 0;
- reg_data |= BC_BIT(1);
- crystalhd_reg_wr(adp, DCI_CMD, reg_data);
- msleep_interruptible(10);
-
- reg_data = 0;
- reg_data = crystalhd_reg_rd(adp, DCI_STATUS);
-
- if ((reg_data & BC_BIT(9)) == BC_BIT(9)) {
- cnt = 1000;
- while ((reg_data & BC_BIT(0)) != BC_BIT(0)) {
- reg_data = crystalhd_reg_rd(adp, DCI_STATUS);
- reg_data &= BC_BIT(0);
- if (!(--cnt))
- break;
- msleep_interruptible(10);
- }
- reg_data = 0;
- reg_data = crystalhd_reg_rd(adp, DCI_CMD);
- reg_data |= BC_BIT(4);
- crystalhd_reg_wr(adp, DCI_CMD, reg_data);
-
- } else {
- BCMLOG_ERR("F/w Signature mismatch\n");
- return BC_STS_FW_AUTH_FAILED;
- }
-
- BCMLOG(BCMLOG_INFO, "Firmware Downloaded Successfully\n");
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw,
- struct BC_FW_CMD *fw_cmd)
-{
- uint32_t cnt = 0, cmd_res_addr;
- uint32_t *cmd_buff, *res_buff;
- wait_queue_head_t fw_cmd_event;
- int rc = 0;
- enum BC_STATUS sts;
-
- crystalhd_create_event(&fw_cmd_event);
-
- if (!hw || !fw_cmd) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- cmd_buff = fw_cmd->cmd;
- res_buff = fw_cmd->rsp;
-
- if (!cmd_buff || !res_buff) {
- BCMLOG_ERR("Invalid Parameters for F/W Command\n");
- return BC_STS_INV_ARG;
- }
-
- hw->pwr_lock++;
-
- hw->fwcmd_evt_sts = 0;
- hw->pfw_cmd_event = &fw_cmd_event;
-
- /*Write the command to the memory*/
- crystalhd_mem_wr(hw->adp, TS_Host2CpuSnd, FW_CMD_BUFF_SZ, cmd_buff);
-
- /*Memory Read for memory arbitrator flush*/
- crystalhd_mem_rd(hw->adp, TS_Host2CpuSnd, 1, &cnt);
-
- /* Write the command address to mailbox */
- bc_dec_reg_wr(hw->adp, Hst2CpuMbx1, TS_Host2CpuSnd);
- msleep_interruptible(50);
-
- crystalhd_wait_on_event(&fw_cmd_event, hw->fwcmd_evt_sts, 20000, rc, 0);
-
- if (!rc) {
- sts = BC_STS_SUCCESS;
- } else if (rc == -EBUSY) {
- BCMLOG_ERR("Firmware command T/O\n");
- sts = BC_STS_TIMEOUT;
- } else if (rc == -EINTR) {
- BCMLOG(BCMLOG_DBG, "FwCmd Wait Signal int.\n");
- sts = BC_STS_IO_USER_ABORT;
- } else {
- BCMLOG_ERR("FwCmd IO Error.\n");
- sts = BC_STS_IO_ERROR;
- }
-
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("FwCmd Failed.\n");
- hw->pwr_lock--;
- return sts;
- }
-
- /*Get the Response Address*/
- cmd_res_addr = bc_dec_reg_rd(hw->adp, Cpu2HstMbx1);
-
- /*Read the Response*/
- crystalhd_mem_rd(hw->adp, cmd_res_addr, FW_CMD_BUFF_SZ, res_buff);
-
- hw->pwr_lock--;
-
- if (res_buff[2] != C011_RET_SUCCESS) {
- BCMLOG_ERR("res_buff[2] != C011_RET_SUCCESS\n");
- return BC_STS_FW_CMD_ERR;
- }
-
- sts = crystalhd_fw_cmd_post_proc(hw, fw_cmd);
- if (sts != BC_STS_SUCCESS)
- BCMLOG_ERR("crystalhd_fw_cmd_post_proc Failed.\n");
-
- return sts;
-}
-
-bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw)
-{
- uint32_t intr_sts = 0;
- uint32_t deco_intr = 0;
- bool rc = false;
-
- if (!adp || !hw->dev_started)
- return rc;
-
- hw->stats.num_interrupts++;
- hw->pwr_lock++;
-
- deco_intr = bc_dec_reg_rd(adp, Stream2Host_Intr_Sts);
- intr_sts = crystalhd_reg_rd(adp, INTR_INTR_STATUS);
-
- if (intr_sts) {
- /* let system know we processed interrupt..*/
- rc = true;
- hw->stats.dev_interrupts++;
- }
-
- if (deco_intr && (deco_intr != 0xdeaddead)) {
-
- if (deco_intr & 0x80000000) {
- /*Set the Event and the status flag*/
- if (hw->pfw_cmd_event) {
- hw->fwcmd_evt_sts = 1;
- crystalhd_set_event(hw->pfw_cmd_event);
- }
- }
-
- if (deco_intr & BC_BIT(1))
- crystalhd_hw_proc_pib(hw);
-
- bc_dec_reg_wr(adp, Stream2Host_Intr_Sts, deco_intr);
- /* FIXME: jarod: No udelay? might this be
- the real reason mini pci-e cards were stalling out? */
- bc_dec_reg_wr(adp, Stream2Host_Intr_Sts, 0);
- rc = true;
- }
-
- /* Rx interrupts */
- crystalhd_rx_isr(hw, intr_sts);
-
- /* Tx interrupts*/
- crystalhd_tx_isr(hw, intr_sts);
-
- /* Clear interrupts */
- if (rc) {
- if (intr_sts)
- crystalhd_reg_wr(adp, INTR_INTR_CLR_REG, intr_sts);
-
- crystalhd_reg_wr(adp, INTR_EOI_CTRL, 1);
- }
-
- hw->pwr_lock--;
-
- return rc;
-}
-
-enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw,
- struct crystalhd_adp *adp)
-{
- if (!hw || !adp) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- if (hw->dev_started)
- return BC_STS_SUCCESS;
-
- memset(hw, 0, sizeof(struct crystalhd_hw));
-
- hw->adp = adp;
- spin_lock_init(&hw->lock);
- spin_lock_init(&hw->rx_lock);
- /* FIXME: jarod: what are these magic numbers?!? */
- hw->tx_ioq_tag_seed = 0x70023070;
- hw->rx_pkt_tag_seed = 0x70029070;
-
- hw->stop_pending = 0;
- crystalhd_start_device(hw->adp);
- hw->dev_started = true;
-
- /* set initial core clock */
- hw->core_clock_mhz = CLOCK_PRESET;
- hw->prev_n = 0;
- hw->pwr_lock = 0;
- crystalhd_hw_set_core_clock(hw);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw)
-{
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- if (!hw->dev_started)
- return BC_STS_SUCCESS;
-
- /* Stop and DDR sleep will happen in here */
- crystalhd_hw_suspend(hw);
- hw->dev_started = false;
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw)
-{
- unsigned int i;
- void *mem;
- size_t mem_len;
- dma_addr_t phy_addr;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- struct crystalhd_rx_dma_pkt *rpkt;
-
- if (!hw || !hw->adp) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- sts = crystalhd_hw_create_ioqs(hw);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("Failed to create IOQs..\n");
- return sts;
- }
-
- mem_len = BC_LINK_MAX_SGLS * sizeof(struct dma_descriptor);
-
- for (i = 0; i < BC_TX_LIST_CNT; i++) {
- mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr);
- if (mem) {
- memset(mem, 0, mem_len);
- } else {
- BCMLOG_ERR("Insufficient Memory For TX\n");
- crystalhd_hw_free_dma_rings(hw);
- return BC_STS_INSUFF_RES;
- }
- /* rx_pkt_pool -- static memory allocation */
- hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem;
- hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr;
- hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS *
- sizeof(struct dma_descriptor);
- hw->tx_pkt_pool[i].list_tag = 0;
-
- /* Add TX dma requests to Free Queue..*/
- sts = crystalhd_dioq_add(hw->tx_freeq,
- &hw->tx_pkt_pool[i], false, 0);
- if (sts != BC_STS_SUCCESS) {
- crystalhd_hw_free_dma_rings(hw);
- return sts;
- }
- }
-
- for (i = 0; i < BC_RX_LIST_CNT; i++) {
- rpkt = kzalloc(sizeof(*rpkt), GFP_KERNEL);
- if (!rpkt) {
- BCMLOG_ERR("Insufficient Memory For RX\n");
- crystalhd_hw_free_dma_rings(hw);
- return BC_STS_INSUFF_RES;
- }
-
- mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr);
- if (mem) {
- memset(mem, 0, mem_len);
- } else {
- BCMLOG_ERR("Insufficient Memory For RX\n");
- crystalhd_hw_free_dma_rings(hw);
- kfree(rpkt);
- return BC_STS_INSUFF_RES;
- }
- rpkt->desc_mem.pdma_desc_start = mem;
- rpkt->desc_mem.phy_addr = phy_addr;
- rpkt->desc_mem.sz = BC_LINK_MAX_SGLS *
- sizeof(struct dma_descriptor);
- rpkt->pkt_tag = hw->rx_pkt_tag_seed + i;
- crystalhd_hw_free_rx_pkt(hw, rpkt);
- }
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw)
-{
- unsigned int i;
- struct crystalhd_rx_dma_pkt *rpkt = NULL;
-
- if (!hw || !hw->adp) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- /* Delete all IOQs.. */
- crystalhd_hw_delete_ioqs(hw);
-
- for (i = 0; i < BC_TX_LIST_CNT; i++) {
- if (hw->tx_pkt_pool[i].desc_mem.pdma_desc_start) {
- bc_kern_dma_free(hw->adp,
- hw->tx_pkt_pool[i].desc_mem.sz,
- hw->tx_pkt_pool[i].desc_mem.pdma_desc_start,
- hw->tx_pkt_pool[i].desc_mem.phy_addr);
-
- hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = NULL;
- }
- }
-
- BCMLOG(BCMLOG_DBG, "Releasing RX Pkt pool\n");
- do {
- rpkt = crystalhd_hw_alloc_rx_pkt(hw);
- if (!rpkt)
- break;
- bc_kern_dma_free(hw->adp, rpkt->desc_mem.sz,
- rpkt->desc_mem.pdma_desc_start,
- rpkt->desc_mem.phy_addr);
- kfree(rpkt);
- } while (rpkt);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw,
- struct crystalhd_dio_req *ioreq,
- hw_comp_callback call_back,
- wait_queue_head_t *cb_event, uint32_t *list_id,
- uint8_t data_flags)
-{
- struct tx_dma_pkt *tx_dma_packet = NULL;
- uint32_t first_desc_u_addr, first_desc_l_addr;
- uint32_t low_addr, high_addr;
- union addr_64 desc_addr;
- enum BC_STATUS sts, add_sts;
- uint32_t dummy_index = 0;
- unsigned long flags;
- bool rc;
-
- if (!hw || !ioreq || !call_back || !cb_event || !list_id) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- /*
- * Since we hit code in busy condition very frequently,
- * we will check the code in status first before
- * checking the availability of free elem.
- *
- * This will avoid the Q fetch/add in normal condition.
- */
- rc = crystalhd_code_in_full(hw->adp, ioreq->uinfo.xfr_len,
- false, data_flags);
- if (rc) {
- hw->stats.cin_busy++;
- return BC_STS_BUSY;
- }
-
- /* Get a list from TxFreeQ */
- tx_dma_packet = (struct tx_dma_pkt *)crystalhd_dioq_fetch(
- hw->tx_freeq);
- if (!tx_dma_packet) {
- BCMLOG_ERR("No empty elements..\n");
- return BC_STS_ERR_USAGE;
- }
-
- sts = crystalhd_xlat_sgl_to_dma_desc(ioreq,
- &tx_dma_packet->desc_mem,
- &dummy_index);
- if (sts != BC_STS_SUCCESS) {
- add_sts = crystalhd_dioq_add(hw->tx_freeq, tx_dma_packet,
- false, 0);
- if (add_sts != BC_STS_SUCCESS)
- BCMLOG_ERR("double fault..\n");
-
- return sts;
- }
-
- hw->pwr_lock++;
-
- desc_addr.full_addr = tx_dma_packet->desc_mem.phy_addr;
- low_addr = desc_addr.low_part;
- high_addr = desc_addr.high_part;
-
- tx_dma_packet->call_back = call_back;
- tx_dma_packet->cb_event = cb_event;
- tx_dma_packet->dio_req = ioreq;
-
- spin_lock_irqsave(&hw->lock, flags);
-
- if (hw->tx_list_post_index == 0) {
- first_desc_u_addr = MISC1_TX_FIRST_DESC_U_ADDR_LIST0;
- first_desc_l_addr = MISC1_TX_FIRST_DESC_L_ADDR_LIST0;
- } else {
- first_desc_u_addr = MISC1_TX_FIRST_DESC_U_ADDR_LIST1;
- first_desc_l_addr = MISC1_TX_FIRST_DESC_L_ADDR_LIST1;
- }
-
- *list_id = tx_dma_packet->list_tag = hw->tx_ioq_tag_seed +
- hw->tx_list_post_index;
-
- hw->tx_list_post_index = (hw->tx_list_post_index + 1) % DMA_ENGINE_CNT;
-
- spin_unlock_irqrestore(&hw->lock, flags);
-
-
- /* Insert in Active Q..*/
- crystalhd_dioq_add(hw->tx_actq, tx_dma_packet, false,
- tx_dma_packet->list_tag);
-
- /*
- * Interrupt will come as soon as you write
- * the valid bit. So be ready for that. All
- * the initialization should happen before that.
- */
- crystalhd_start_tx_dma_engine(hw);
- crystalhd_reg_wr(hw->adp, first_desc_u_addr, desc_addr.high_part);
-
- crystalhd_reg_wr(hw->adp, first_desc_l_addr, desc_addr.low_part |
- 0x01);
- /* Be sure we set the valid bit ^^^^ */
-
- return BC_STS_SUCCESS;
-}
-
-/*
- * This is a force cancel and we are racing with ISR.
- *
- * Will try to remove the req from ActQ before ISR gets it.
- * If ISR gets it first then the completion happens in the
- * normal path and we will return _STS_NO_DATA from here.
- *
- * FIX_ME: Not Tested the actual condition..
- */
-enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw,
- uint32_t list_id)
-{
- if (!hw || !list_id) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_stop_tx_dma_engine(hw);
- crystalhd_hw_tx_req_complete(hw, list_id, BC_STS_IO_USER_ABORT);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
- struct crystalhd_dio_req *ioreq, bool en_post)
-{
- struct crystalhd_rx_dma_pkt *rpkt;
- uint32_t tag, uv_desc_ix = 0;
- enum BC_STATUS sts;
-
- if (!hw || !ioreq) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- rpkt = crystalhd_hw_alloc_rx_pkt(hw);
- if (!rpkt) {
- BCMLOG_ERR("Insufficient resources\n");
- return BC_STS_INSUFF_RES;
- }
-
- rpkt->dio_req = ioreq;
- tag = rpkt->pkt_tag;
-
- sts = crystalhd_xlat_sgl_to_dma_desc(ioreq, &rpkt->desc_mem,
- &uv_desc_ix);
- if (sts != BC_STS_SUCCESS)
- return sts;
-
- rpkt->uv_phy_addr = 0;
-
- /* Store the address of UV in the rx packet for post*/
- if (uv_desc_ix)
- rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr +
- (sizeof(struct dma_descriptor) * (uv_desc_ix + 1));
-
- if (en_post)
- sts = crystalhd_hw_post_cap_buff(hw, rpkt);
- else
- sts = crystalhd_dioq_add(hw->rx_freeq, rpkt, false, tag);
-
- return sts;
-}
-
-enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw,
- struct BC_PIC_INFO_BLOCK *pib,
- struct crystalhd_dio_req **ioreq)
-{
- struct crystalhd_rx_dma_pkt *rpkt;
- uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000;
- uint32_t sig_pending = 0;
-
-
- if (!hw || !ioreq || !pib) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- rpkt = crystalhd_dioq_fetch_wait(hw->rx_rdyq, timeout, &sig_pending);
- if (!rpkt) {
- if (sig_pending) {
- BCMLOG(BCMLOG_INFO, "wait on frame time out %d\n",
- sig_pending);
- return BC_STS_IO_USER_ABORT;
- } else {
- return BC_STS_TIMEOUT;
- }
- }
-
- rpkt->dio_req->uinfo.comp_flags = rpkt->flags;
-
- if (rpkt->flags & COMP_FLAG_PIB_VALID)
- memcpy(pib, &rpkt->pib, sizeof(*pib));
-
- *ioreq = rpkt->dio_req;
-
- crystalhd_hw_free_rx_pkt(hw, rpkt);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw)
-{
- struct crystalhd_rx_dma_pkt *rx_pkt;
- enum BC_STATUS sts;
- uint32_t i;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- /* This is start of capture.. Post to both the lists.. */
- for (i = 0; i < DMA_ENGINE_CNT; i++) {
- rx_pkt = crystalhd_dioq_fetch(hw->rx_freeq);
- if (!rx_pkt)
- return BC_STS_NO_DATA;
- sts = crystalhd_hw_post_cap_buff(hw, rx_pkt);
- if (BC_STS_SUCCESS != sts)
- break;
-
- }
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw)
-{
- void *temp = NULL;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- crystalhd_stop_rx_dma_engine(hw);
-
- do {
- temp = crystalhd_dioq_fetch(hw->rx_freeq);
- if (temp)
- crystalhd_rx_pkt_rel_call_back(hw, temp);
- } while (temp);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw)
-{
- hw->stats.pause_cnt++;
- hw->stop_pending = 1;
-
- if ((hw->rx_list_sts[0] == sts_free) &&
- (hw->rx_list_sts[1] == sts_free))
- crystalhd_hw_finalize_pause(hw);
-
- return BC_STS_SUCCESS;
-}
-
-enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw)
-{
- enum BC_STATUS sts;
- uint32_t aspm;
-
- hw->stop_pending = 0;
-
- aspm = crystalhd_reg_rd(hw->adp, PCIE_DLL_DATA_LINK_CONTROL);
- aspm &= ~ASPM_L1_ENABLE;
-/* NAREN BCMLOG(BCMLOG_INFO, "aspm off\n"); */
- crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm);
-
- sts = crystalhd_hw_start_capture(hw);
- return sts;
-}
-
-enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw)
-{
- enum BC_STATUS sts;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- sts = crystalhd_put_ddr2sleep(hw);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("Failed to Put DDR To Sleep!!\n");
- return BC_STS_ERROR;
- }
-
- if (!crystalhd_stop_device(hw->adp)) {
- BCMLOG_ERR("Failed to Stop Device!!\n");
- return BC_STS_ERROR;
- }
-
- return BC_STS_SUCCESS;
-}
-
-void crystalhd_hw_stats(struct crystalhd_hw *hw,
- struct crystalhd_hw_stats *stats)
-{
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return;
- }
-
- /* if called w/NULL stats, its a req to zero out the stats */
- if (!stats) {
- memset(&hw->stats, 0, sizeof(hw->stats));
- return;
- }
-
- hw->stats.freeq_count = crystalhd_dioq_count(hw->rx_freeq);
- hw->stats.rdyq_count = crystalhd_dioq_count(hw->rx_rdyq);
- memcpy(stats, &hw->stats, sizeof(*stats));
-}
-
-enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw)
-{
- uint32_t reg, n, i;
- uint32_t vco_mg, refresh_reg;
-
- if (!hw) {
- BCMLOG_ERR("Invalid Arguments\n");
- return BC_STS_INV_ARG;
- }
-
- /* FIXME: jarod: wha? */
- /*n = (hw->core_clock_mhz * 3) / 20 + 1; */
- n = hw->core_clock_mhz/5;
-
- if (n == hw->prev_n)
- return BC_STS_CLK_NOCHG;
-
- if (hw->pwr_lock > 0) {
- /* BCMLOG(BCMLOG_INFO,"pwr_lock is %u\n", hw->pwr_lock) */
- return BC_STS_CLK_NOCHG;
- }
-
- i = n * 27;
- if (i < 560)
- vco_mg = 0;
- else if (i < 900)
- vco_mg = 1;
- else if (i < 1030)
- vco_mg = 2;
- else
- vco_mg = 3;
-
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl);
-
- reg &= 0xFFFFCFC0;
- reg |= n;
- reg |= vco_mg << 12;
-
- BCMLOG(BCMLOG_INFO, "clock is moving to %d with n %d with vco_mg %d\n",
- hw->core_clock_mhz, n, vco_mg);
-
- /* Change the DRAM refresh rate to accommodate the new frequency */
- /* refresh reg = ((refresh_rate * clock_rate)/16) - 1; rounding up*/
- refresh_reg = (7 * hw->core_clock_mhz / 16);
- bc_dec_reg_wr(hw->adp, SDRAM_REF_PARAM, ((1 << 12) | refresh_reg));
-
- bc_dec_reg_wr(hw->adp, DecHt_PllACtl, reg);
-
- i = 0;
-
- for (i = 0; i < 10; i++) {
- reg = bc_dec_reg_rd(hw->adp, DecHt_PllACtl);
-
- if (reg & 0x00020000) {
- hw->prev_n = n;
- /* FIXME: jarod: outputting
- a random "C" is... confusing... */
- BCMLOG(BCMLOG_INFO, "C");
- return BC_STS_SUCCESS;
- } else {
- msleep_interruptible(10);
- }
- }
- BCMLOG(BCMLOG_INFO, "clk change failed\n");
- return BC_STS_CLK_NOCHG;
-}
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_hw . h
- *
- * Description:
- * BCM70012 Linux driver hardware layer.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#ifndef _CRYSTALHD_HW_H_
-#define _CRYSTALHD_HW_H_
-
-#include "crystalhd.h"
-
-/* HW constants..*/
-#define DMA_ENGINE_CNT 2
-#define MAX_PIB_Q_DEPTH 64
-#define MIN_PIB_Q_DEPTH 2
-#define WR_POINTER_OFF 4
-
-#define ASPM_L1_ENABLE (BC_BIT(27))
-
-/*************************************************
- 7412 Decoder Registers.
-**************************************************/
-#define FW_CMD_BUFF_SZ 64
-#define TS_Host2CpuSnd 0x00000100
-#define Hst2CpuMbx1 0x00100F00
-#define Cpu2HstMbx1 0x00100F04
-#define MbxStat1 0x00100F08
-#define Stream2Host_Intr_Sts 0x00100F24
-#define C011_RET_SUCCESS 0x0 /* Return status of firmware command. */
-
-/* TS input status register */
-#define TS_StreamAFIFOStatus 0x0010044C
-#define TS_StreamBFIFOStatus 0x0010084C
-
-/*UART Selection definitions*/
-#define UartSelectA 0x00100300
-#define UartSelectB 0x00100304
-
-#define BSVS_UART_DEC_NONE 0x00
-#define BSVS_UART_DEC_OUTER 0x01
-#define BSVS_UART_DEC_INNER 0x02
-#define BSVS_UART_STREAM 0x03
-
-/* Code-In fifo */
-#define REG_DecCA_RegCinCTL 0xa00
-#define REG_DecCA_RegCinBase 0xa0c
-#define REG_DecCA_RegCinEnd 0xa10
-#define REG_DecCA_RegCinWrPtr 0xa04
-#define REG_DecCA_RegCinRdPtr 0xa08
-
-#define REG_Dec_TsUser0Base 0x100864
-#define REG_Dec_TsUser0Rdptr 0x100868
-#define REG_Dec_TsUser0Wrptr 0x10086C
-#define REG_Dec_TsUser0End 0x100874
-
-/* ASF Case ...*/
-#define REG_Dec_TsAudCDB2Base 0x10036c
-#define REG_Dec_TsAudCDB2Rdptr 0x100378
-#define REG_Dec_TsAudCDB2Wrptr 0x100374
-#define REG_Dec_TsAudCDB2End 0x100370
-
-/* DRAM bringup Registers */
-#define SDRAM_PARAM 0x00040804
-#define SDRAM_PRECHARGE 0x000408B0
-#define SDRAM_EXT_MODE 0x000408A4
-#define SDRAM_MODE 0x000408A0
-#define SDRAM_REFRESH 0x00040890
-#define SDRAM_REF_PARAM 0x00040808
-
-#define DecHt_PllACtl 0x34000C
-#define DecHt_PllBCtl 0x340010
-#define DecHt_PllCCtl 0x340014
-#define DecHt_PllDCtl 0x340034
-#define DecHt_PllECtl 0x340038
-#define AUD_DSP_MISC_SOFT_RESET 0x00240104
-#define AIO_MISC_PLL_RESET 0x0026000C
-#define PCIE_CLK_REQ_REG 0xDC
-#define PCI_CLK_REQ_ENABLE (BC_BIT(8))
-
-/*************************************************
- F/W Copy engine definitions..
-**************************************************/
-#define BC_FWIMG_ST_ADDR 0x00000000
-/* FIXME: jarod: there's a kernel function that'll do this for us... */
-#define rotr32_1(x, n) (((x) >> n) | ((x) << (32 - n)))
-#define bswap_32_1(x) ((rotr32_1((x), 24) & 0x00ff00ff) | (rotr32_1((x), 8) & 0xff00ff00))
-
-#define DecHt_HostSwReset 0x340000
-#define BC_DRAM_FW_CFG_ADDR 0x001c2000
-
-union addr_64 {
- struct {
- uint32_t low_part;
- uint32_t high_part;
- };
-
- uint64_t full_addr;
-
-};
-
-union intr_mask_reg {
- struct {
- uint32_t mask_tx_done:1;
- uint32_t mask_tx_err:1;
- uint32_t mask_rx_done:1;
- uint32_t mask_rx_err:1;
- uint32_t mask_pcie_err:1;
- uint32_t mask_pcie_rbusmast_err:1;
- uint32_t mask_pcie_rgr_bridge:1;
- uint32_t reserved:25;
- };
-
- uint32_t whole_reg;
-
-};
-
-union link_misc_perst_deco_ctrl {
- struct {
- uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held
- in reset. Reset value 1.*/
- uint32_t reserved0:3; /* Reserved.No Effect*/
- uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of
- 27MHz clk used to clk BCM7412*/
- uint32_t reserved1:27; /* Reserved. No Effect*/
- };
-
- uint32_t whole_reg;
-
-};
-
-union link_misc_perst_clk_ctrl {
- struct {
- uint32_t sel_alt_clk:1; /* When set, selects a
- 6.75MHz clock as the source of core_clk */
- uint32_t stop_core_clk:1; /* When set, stops the branch
- of core_clk that is not needed for low power operation */
- uint32_t pll_pwr_dn:1; /* When set, powers down the
- main PLL. The alternate clock bit should be set to
- select an alternate clock before setting this bit.*/
- uint32_t reserved0:5; /* Reserved */
- uint32_t pll_mult:8; /* This setting controls
- the multiplier for the PLL. */
- uint32_t pll_div:4; /* This setting controls
- the divider for the PLL. */
- uint32_t reserved1:12; /* Reserved */
- };
-
- uint32_t whole_reg;
-
-};
-
-union link_misc_perst_decoder_ctrl {
- struct {
- uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held
- in reset. Reset value 1.*/
- uint32_t res0:3; /* Reserved.No Effect*/
- uint32_t stop_7412_clk:1; /* 1 ->Stops branch of 27MHz
- clk used to clk BCM7412*/
- uint32_t res1:27; /* Reserved. No Effect */
- };
-
- uint32_t whole_reg;
-
-};
-
-union desc_low_addr_reg {
- struct {
- uint32_t list_valid:1;
- uint32_t reserved:4;
- uint32_t low_addr:27;
- };
-
- uint32_t whole_reg;
-
-};
-
-struct dma_descriptor { /* 8 32-bit values */
- /* 0th u32 */
- uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */
- uint32_t res0:4; /* bits 28-31: Reserved */
-
- /* 1st u32 */
- uint32_t buff_addr_low; /* 1 buffer address low */
- uint32_t buff_addr_high; /* 2 buffer address high */
-
- /* 3rd u32 */
- uint32_t res2:2; /* 0-1 - Reserved */
- uint32_t xfer_size:23; /* 2-24 = Xfer size in words */
- uint32_t res3:6; /* 25-30 reserved */
- uint32_t intr_enable:1; /* 31 - Interrupt After this desc */
-
- /* 4th u32 */
- uint32_t endian_xlat_align:2; /* 0-1 Endian Translation */
- uint32_t next_desc_cont:1; /* 2 - Next desc is in contig memory */
- uint32_t res4:25; /* 3 - 27 Reserved bits */
- uint32_t fill_bytes:2; /* 28-29 Bits Fill Bytes */
- uint32_t dma_dir:1; /* 30 bit DMA Direction */
- uint32_t last_rec_indicator:1; /* 31 bit Last Record Indicator */
-
- /* 5th u32 */
- uint32_t next_desc_addr_low; /* 32-bits Next Desc Addr lower */
-
- /* 6th u32 */
- uint32_t next_desc_addr_high; /* 32-bits Next Desc Addr Higher */
-
- /* 7th u32 */
- uint32_t res8; /* Last 32bits reserved */
-
-};
-
-/*
- * We will allocate the memory in 4K pages
- * the linked list will be a list of 32 byte descriptors.
- * The virtual address will determine what should be freed.
- */
-struct dma_desc_mem {
- struct dma_descriptor *pdma_desc_start; /* 32-bytes for dma
- descriptor. should be first element */
- dma_addr_t phy_addr; /* physical address
- of each DMA desc */
- uint32_t sz;
- struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */
-
-};
-
-enum list_sts {
- sts_free = 0,
-
- /* RX-Y Bits 0:7 */
- rx_waiting_y_intr = 0x00000001,
- rx_y_error = 0x00000004,
-
- /* RX-UV Bits 8:16 */
- rx_waiting_uv_intr = 0x0000100,
- rx_uv_error = 0x0000400,
-
- rx_sts_waiting = (rx_waiting_y_intr|rx_waiting_uv_intr),
- rx_sts_error = (rx_y_error|rx_uv_error),
-
- rx_y_mask = 0x000000FF,
- rx_uv_mask = 0x0000FF00,
-};
-
-struct tx_dma_pkt {
- struct dma_desc_mem desc_mem;
- hw_comp_callback call_back;
- struct crystalhd_dio_req *dio_req;
- wait_queue_head_t *cb_event;
- uint32_t list_tag;
-};
-
-struct crystalhd_rx_dma_pkt {
- struct dma_desc_mem desc_mem;
- struct crystalhd_dio_req *dio_req;
- uint32_t pkt_tag;
- uint32_t flags;
- struct BC_PIC_INFO_BLOCK pib;
- dma_addr_t uv_phy_addr;
- struct crystalhd_rx_dma_pkt *next;
-};
-
-struct crystalhd_hw_stats {
- uint32_t rx_errors;
- uint32_t tx_errors;
- uint32_t freeq_count;
- uint32_t rdyq_count;
- uint32_t num_interrupts;
- uint32_t dev_interrupts;
- uint32_t cin_busy;
- uint32_t pause_cnt;
-};
-
-struct crystalhd_hw {
- struct tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT];
- spinlock_t lock;
-
- uint32_t tx_ioq_tag_seed;
- uint32_t tx_list_post_index;
-
- struct crystalhd_rx_dma_pkt *rx_pkt_pool_head;
- uint32_t rx_pkt_tag_seed;
-
- bool dev_started;
- void *adp;
-
- wait_queue_head_t *pfw_cmd_event;
- int fwcmd_evt_sts;
-
- uint32_t pib_del_Q_addr;
- uint32_t pib_rel_Q_addr;
-
- struct crystalhd_dioq *tx_freeq;
- struct crystalhd_dioq *tx_actq;
-
- /* Rx DMA Engine Specific Locks */
- spinlock_t rx_lock;
- uint32_t rx_list_post_index;
- enum list_sts rx_list_sts[DMA_ENGINE_CNT];
- struct crystalhd_dioq *rx_rdyq;
- struct crystalhd_dioq *rx_freeq;
- struct crystalhd_dioq *rx_actq;
- uint32_t stop_pending;
-
- /* HW counters.. */
- struct crystalhd_hw_stats stats;
-
- /* Core clock in MHz */
- uint32_t core_clock_mhz;
- uint32_t prev_n;
- uint32_t pwr_lock;
-};
-
-/* Clock defines for power control */
-#define CLOCK_PRESET 175
-
-/* DMA engine register BIT mask wrappers.. */
-#define DMA_START_BIT MISC1_TX_SW_DESC_LIST_CTRL_STS_TX_DMA_RUN_STOP_MASK
-
-#define GET_RX_INTR_MASK (INTR_INTR_STATUS_L1_UV_RX_DMA_ERR_INTR_MASK | \
- INTR_INTR_STATUS_L1_UV_RX_DMA_DONE_INTR_MASK | \
- INTR_INTR_STATUS_L1_Y_RX_DMA_ERR_INTR_MASK | \
- INTR_INTR_STATUS_L1_Y_RX_DMA_DONE_INTR_MASK | \
- INTR_INTR_STATUS_L0_UV_RX_DMA_ERR_INTR_MASK | \
- INTR_INTR_STATUS_L0_UV_RX_DMA_DONE_INTR_MASK | \
- INTR_INTR_STATUS_L0_Y_RX_DMA_ERR_INTR_MASK | \
- INTR_INTR_STATUS_L0_Y_RX_DMA_DONE_INTR_MASK)
-
-#define GET_Y0_ERR_MSK (MISC1_Y_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK)
-
-#define GET_UV0_ERR_MSK (MISC1_UV_RX_ERROR_STATUS_RX_L0_OVERRUN_ERROR_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L0_UNDERRUN_ERROR_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L0_DESC_TX_ABORT_ERRORS_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L0_FIFO_FULL_ERRORS_MASK)
-
-#define GET_Y1_ERR_MSK (MISC1_Y_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK | \
- MISC1_Y_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK)
-
-#define GET_UV1_ERR_MSK (MISC1_UV_RX_ERROR_STATUS_RX_L1_OVERRUN_ERROR_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L1_UNDERRUN_ERROR_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L1_DESC_TX_ABORT_ERRORS_MASK | \
- MISC1_UV_RX_ERROR_STATUS_RX_L1_FIFO_FULL_ERRORS_MASK)
-
-
-/**** API Exposed to the other layers ****/
-enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp,
- void *buffer, uint32_t sz);
-enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw,
- struct BC_FW_CMD *fw_cmd);
-bool crystalhd_hw_interrupt(struct crystalhd_adp *adp,
- struct crystalhd_hw *hw);
-enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *,
- struct crystalhd_adp *);
-enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *);
-enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *);
-enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *);
-
-
-enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw,
- struct crystalhd_dio_req *ioreq,
- hw_comp_callback call_back,
- wait_queue_head_t *cb_event,
- uint32_t *list_id, uint8_t data_flags);
-
-enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw);
-enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw);
-enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw);
-enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw,
- uint32_t list_id);
-enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw,
- struct crystalhd_dio_req *ioreq, bool en_post);
-enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw,
- struct BC_PIC_INFO_BLOCK *pib,
- struct crystalhd_dio_req **ioreq);
-enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw);
-enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw);
-void crystalhd_hw_stats(struct crystalhd_hw *hw,
- struct crystalhd_hw_stats *stats);
-
-/* API to program the core clock on the decoder */
-enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *);
-
-#endif
+++ /dev/null
-/***************************************************************************
- BCM70010 Linux driver
- Copyright (c) 2005-2009, Broadcom Corporation.
-
- This driver is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation, version 2 of the License.
-
- This driver is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this driver. If not, see <http://www.gnu.org/licenses/>.
-***************************************************************************/
-
-#include "crystalhd.h"
-
-#include <linux/mutex.h>
-#include <linux/slab.h>
-
-
-static DEFINE_MUTEX(chd_dec_mutex);
-static struct class *crystalhd_class;
-
-static struct crystalhd_adp *g_adp_info;
-
-static irqreturn_t chd_dec_isr(int irq, void *arg)
-{
- struct crystalhd_adp *adp = arg;
- int rc = 0;
- if (adp)
- rc = crystalhd_cmd_interrupt(&adp->cmds);
-
- return IRQ_RETVAL(rc);
-}
-
-static int chd_dec_enable_int(struct crystalhd_adp *adp)
-{
- int rc = 0;
-
- if (!adp || !adp->pdev) {
- BCMLOG_ERR("Invalid arg!!\n");
- return -EINVAL;
- }
-
- if (adp->pdev->msi_enabled)
- adp->msi = 1;
- else
- adp->msi = pci_enable_msi(adp->pdev);
-
- rc = request_irq(adp->pdev->irq, chd_dec_isr, IRQF_SHARED,
- adp->name, (void *)adp);
- if (rc) {
- BCMLOG_ERR("Interrupt request failed..\n");
- pci_disable_msi(adp->pdev);
- }
-
- return rc;
-}
-
-static int chd_dec_disable_int(struct crystalhd_adp *adp)
-{
- if (!adp || !adp->pdev) {
- BCMLOG_ERR("Invalid arg!!\n");
- return -EINVAL;
- }
-
- free_irq(adp->pdev->irq, adp);
-
- if (adp->msi)
- pci_disable_msi(adp->pdev);
-
- return 0;
-}
-
-static struct
-crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp,
- bool isr)
-{
- unsigned long flags = 0;
- struct crystalhd_ioctl_data *temp;
-
- if (!adp)
- return NULL;
-
- spin_lock_irqsave(&adp->lock, flags);
-
- temp = adp->idata_free_head;
- if (temp) {
- adp->idata_free_head = adp->idata_free_head->next;
- memset(temp, 0, sizeof(*temp));
- }
-
- spin_unlock_irqrestore(&adp->lock, flags);
- return temp;
-}
-
-static void chd_dec_free_iodata(struct crystalhd_adp *adp,
- struct crystalhd_ioctl_data *iodata, bool isr)
-{
- unsigned long flags = 0;
-
- if (!adp || !iodata)
- return;
-
- spin_lock_irqsave(&adp->lock, flags);
- iodata->next = adp->idata_free_head;
- adp->idata_free_head = iodata;
- spin_unlock_irqrestore(&adp->lock, flags);
-}
-
-static inline int crystalhd_user_data(void __user *ud, void *dr,
- int size, int set)
-{
- int rc;
-
- if (!ud || !dr) {
- BCMLOG_ERR("Invalid arg\n");
- return -EINVAL;
- }
-
- if (set)
- rc = copy_to_user(ud, dr, size);
- else
- rc = copy_from_user(dr, ud, size);
-
- if (rc) {
- BCMLOG_ERR("Invalid args for command\n");
- rc = -EFAULT;
- }
-
- return rc;
-}
-
-static int chd_dec_fetch_cdata(struct crystalhd_adp *adp,
- struct crystalhd_ioctl_data *io, uint32_t m_sz,
- unsigned long ua)
-{
- unsigned long ua_off;
- int rc = 0;
-
- if (!adp || !io || !ua || !m_sz) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return -EINVAL;
- }
-
- io->add_cdata = vmalloc(m_sz);
- if (!io->add_cdata) {
- BCMLOG_ERR("kalloc fail for sz:%x\n", m_sz);
- return -ENOMEM;
- }
-
- io->add_cdata_sz = m_sz;
- ua_off = ua + sizeof(io->udata);
- rc = crystalhd_user_data((void __user *)ua_off, io->add_cdata,
- io->add_cdata_sz, 0);
- if (rc) {
- BCMLOG_ERR("failed to pull add_cdata sz:%x ua_off:%x\n",
- io->add_cdata_sz, (unsigned int)ua_off);
- vfree(io->add_cdata);
- io->add_cdata = NULL;
- return -ENODATA;
- }
-
- return rc;
-}
-
-static int chd_dec_release_cdata(struct crystalhd_adp *adp,
- struct crystalhd_ioctl_data *io,
- unsigned long ua)
-{
- unsigned long ua_off;
- int rc;
-
- if (!adp || !io || !ua) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return -EINVAL;
- }
-
- if (io->cmd != BCM_IOC_FW_DOWNLOAD) {
- ua_off = ua + sizeof(io->udata);
- rc = crystalhd_user_data((void __user *)ua_off, io->add_cdata,
- io->add_cdata_sz, 1);
- if (rc) {
- BCMLOG_ERR(
- "failed to push add_cdata sz:%x ua_off:%x\n",
- io->add_cdata_sz, (unsigned int)ua_off);
- return -ENODATA;
- }
- }
-
- if (io->add_cdata) {
- vfree(io->add_cdata);
- io->add_cdata = NULL;
- }
-
- return 0;
-}
-
-static int chd_dec_proc_user_data(struct crystalhd_adp *adp,
- struct crystalhd_ioctl_data *io,
- unsigned long ua, int set)
-{
- int rc;
- uint32_t m_sz = 0;
-
- if (!adp || !io || !ua) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return -EINVAL;
- }
-
- rc = crystalhd_user_data((void __user *)ua, &io->udata,
- sizeof(io->udata), set);
- if (rc) {
- BCMLOG_ERR("failed to %s iodata\n", (set ? "set" : "get"));
- return rc;
- }
-
- switch (io->cmd) {
- case BCM_IOC_MEM_RD:
- case BCM_IOC_MEM_WR:
- case BCM_IOC_FW_DOWNLOAD:
- m_sz = io->udata.u.devMem.NumDwords * 4;
- if (set)
- rc = chd_dec_release_cdata(adp, io, ua);
- else
- rc = chd_dec_fetch_cdata(adp, io, m_sz, ua);
- break;
- default:
- break;
- }
-
- return rc;
-}
-
-static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua,
- uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func)
-{
- int rc;
- struct crystalhd_ioctl_data *temp;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- temp = chd_dec_alloc_iodata(adp, 0);
- if (!temp) {
- BCMLOG_ERR("Failed to get iodata..\n");
- return -EINVAL;
- }
-
- temp->u_id = uid;
- temp->cmd = cmd;
-
- rc = chd_dec_proc_user_data(adp, temp, ua, 0);
- if (!rc) {
- sts = func(&adp->cmds, temp);
- if (sts == BC_STS_PENDING)
- sts = BC_STS_NOT_IMPL;
- temp->udata.RetSts = sts;
- rc = chd_dec_proc_user_data(adp, temp, ua, 1);
- }
-
- chd_dec_free_iodata(adp, temp, 0);
-
- return rc;
-}
-
-/* API interfaces */
-static long chd_dec_ioctl(struct file *fd, unsigned int cmd, unsigned long ua)
-{
- struct crystalhd_adp *adp = chd_get_adp();
- crystalhd_cmd_proc cproc;
- struct crystalhd_user *uc;
- int ret;
-
- if (!adp || !fd) {
- BCMLOG_ERR("Invalid adp\n");
- return -EINVAL;
- }
-
- uc = fd->private_data;
- if (!uc) {
- BCMLOG_ERR("Failed to get uc\n");
- return -ENODATA;
- }
-
- mutex_lock(&chd_dec_mutex);
- cproc = crystalhd_get_cmd_proc(&adp->cmds, cmd, uc);
- if (!cproc) {
- BCMLOG_ERR("Unhandled command: %d\n", cmd);
- mutex_unlock(&chd_dec_mutex);
- return -EINVAL;
- }
-
- ret = chd_dec_api_cmd(adp, ua, uc->uid, cmd, cproc);
- mutex_unlock(&chd_dec_mutex);
- return ret;
-}
-
-static int chd_dec_open(struct inode *in, struct file *fd)
-{
- struct crystalhd_adp *adp = chd_get_adp();
- int rc = 0;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- struct crystalhd_user *uc = NULL;
-
- if (!adp) {
- BCMLOG_ERR("Invalid adp\n");
- return -EINVAL;
- }
-
- if (adp->cfg_users >= BC_LINK_MAX_OPENS) {
- BCMLOG(BCMLOG_INFO, "Already in use.%d\n", adp->cfg_users);
- return -EBUSY;
- }
-
- sts = crystalhd_user_open(&adp->cmds, &uc);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("cmd_user_open - %d\n", sts);
- rc = -EBUSY;
- }
-
- adp->cfg_users++;
-
- fd->private_data = uc;
-
- return rc;
-}
-
-static int chd_dec_close(struct inode *in, struct file *fd)
-{
- struct crystalhd_adp *adp = chd_get_adp();
- struct crystalhd_user *uc;
-
- if (!adp) {
- BCMLOG_ERR("Invalid adp\n");
- return -EINVAL;
- }
-
- uc = fd->private_data;
- if (!uc) {
- BCMLOG_ERR("Failed to get uc\n");
- return -ENODATA;
- }
-
- crystalhd_user_close(&adp->cmds, uc);
-
- adp->cfg_users--;
-
- return 0;
-}
-
-static const struct file_operations chd_dec_fops = {
- .owner = THIS_MODULE,
- .unlocked_ioctl = chd_dec_ioctl,
- .open = chd_dec_open,
- .release = chd_dec_close,
- .llseek = noop_llseek,
-};
-
-static int chd_dec_init_chdev(struct crystalhd_adp *adp)
-{
- struct crystalhd_ioctl_data *temp;
- struct device *dev;
- int rc = -ENODEV, i = 0;
-
- if (!adp)
- goto fail;
-
- adp->chd_dec_major = register_chrdev(0, CRYSTALHD_API_NAME,
- &chd_dec_fops);
- if (adp->chd_dec_major < 0) {
- BCMLOG_ERR("Failed to create config dev\n");
- rc = adp->chd_dec_major;
- goto fail;
- }
-
- /* register crystalhd class */
- crystalhd_class = class_create(THIS_MODULE, "crystalhd");
- if (IS_ERR(crystalhd_class)) {
- rc = PTR_ERR(crystalhd_class);
- BCMLOG_ERR("failed to create class\n");
- goto class_create_fail;
- }
-
- dev = device_create(crystalhd_class, NULL,
- MKDEV(adp->chd_dec_major, 0), NULL, "crystalhd");
- if (IS_ERR(dev)) {
- rc = PTR_ERR(dev);
- BCMLOG_ERR("failed to create device\n");
- goto device_create_fail;
- }
-
- rc = crystalhd_create_elem_pool(adp, BC_LINK_ELEM_POOL_SZ);
- if (rc) {
- BCMLOG_ERR("failed to create device\n");
- goto elem_pool_fail;
- }
-
- /* Allocate general purpose ioctl pool. */
- for (i = 0; i < CHD_IODATA_POOL_SZ; i++) {
- temp = kzalloc(sizeof(*temp), GFP_KERNEL);
- if (!temp) {
- BCMLOG_ERR("ioctl data pool kzalloc failed\n");
- rc = -ENOMEM;
- goto kzalloc_fail;
- }
- /* Add to global pool.. */
- chd_dec_free_iodata(adp, temp, 0);
- }
-
- return 0;
-
-kzalloc_fail:
- crystalhd_delete_elem_pool(adp);
-elem_pool_fail:
- device_destroy(crystalhd_class, MKDEV(adp->chd_dec_major, 0));
-device_create_fail:
- class_destroy(crystalhd_class);
-class_create_fail:
- unregister_chrdev(adp->chd_dec_major, CRYSTALHD_API_NAME);
-fail:
- return rc;
-}
-
-static void chd_dec_release_chdev(struct crystalhd_adp *adp)
-{
- struct crystalhd_ioctl_data *temp = NULL;
- if (!adp)
- return;
-
- if (adp->chd_dec_major > 0) {
- /* unregister crystalhd class */
- device_destroy(crystalhd_class, MKDEV(adp->chd_dec_major, 0));
- unregister_chrdev(adp->chd_dec_major, CRYSTALHD_API_NAME);
- BCMLOG(BCMLOG_INFO, "released api device - %d\n",
- adp->chd_dec_major);
- class_destroy(crystalhd_class);
- }
- adp->chd_dec_major = 0;
-
- /* Clear iodata pool.. */
- do {
- temp = chd_dec_alloc_iodata(adp, 0);
- kfree(temp);
- } while (temp);
-
- crystalhd_delete_elem_pool(adp);
-}
-
-static int chd_pci_reserve_mem(struct crystalhd_adp *pinfo)
-{
- int rc;
- unsigned long bar2 = pci_resource_start(pinfo->pdev, 2);
- uint32_t mem_len = pci_resource_len(pinfo->pdev, 2);
- unsigned long bar0 = pci_resource_start(pinfo->pdev, 0);
- uint32_t i2o_len = pci_resource_len(pinfo->pdev, 0);
-
- BCMLOG(BCMLOG_SSTEP, "bar2:0x%lx-0x%08x bar0:0x%lx-0x%08x\n",
- bar2, mem_len, bar0, i2o_len);
-
- rc = check_mem_region(bar2, mem_len);
- if (rc) {
- BCMLOG_ERR("No valid mem region...\n");
- return -ENOMEM;
- }
-
- pinfo->addr = ioremap_nocache(bar2, mem_len);
- if (!pinfo->addr) {
- BCMLOG_ERR("Failed to remap mem region...\n");
- return -ENOMEM;
- }
-
- pinfo->pci_mem_start = bar2;
- pinfo->pci_mem_len = mem_len;
-
- rc = check_mem_region(bar0, i2o_len);
- if (rc) {
- BCMLOG_ERR("No valid mem region...\n");
- return -ENOMEM;
- }
-
- pinfo->i2o_addr = ioremap_nocache(bar0, i2o_len);
- if (!pinfo->i2o_addr) {
- BCMLOG_ERR("Failed to remap mem region...\n");
- return -ENOMEM;
- }
-
- pinfo->pci_i2o_start = bar0;
- pinfo->pci_i2o_len = i2o_len;
-
- rc = pci_request_regions(pinfo->pdev, pinfo->name);
- if (rc < 0) {
- BCMLOG_ERR("Region request failed: %d\n", rc);
- return rc;
- }
-
- BCMLOG(BCMLOG_SSTEP, "Mapped addr:0x%08lx i2o_addr:0x%08lx\n",
- (unsigned long)pinfo->addr, (unsigned long)pinfo->i2o_addr);
-
- return 0;
-}
-
-static void chd_pci_release_mem(struct crystalhd_adp *pinfo)
-{
- if (!pinfo)
- return;
-
- if (pinfo->addr)
- iounmap(pinfo->addr);
-
- if (pinfo->i2o_addr)
- iounmap(pinfo->i2o_addr);
-
- pci_release_regions(pinfo->pdev);
-}
-
-
-static void chd_dec_pci_remove(struct pci_dev *pdev)
-{
- struct crystalhd_adp *pinfo;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- pinfo = pci_get_drvdata(pdev);
- if (!pinfo) {
- BCMLOG_ERR("could not get adp\n");
- return;
- }
-
- sts = crystalhd_delete_cmd_context(&pinfo->cmds);
- if (sts != BC_STS_SUCCESS)
- BCMLOG_ERR("cmd delete :%d\n", sts);
-
- chd_dec_release_chdev(pinfo);
-
- chd_dec_disable_int(pinfo);
-
- chd_pci_release_mem(pinfo);
- pci_disable_device(pinfo->pdev);
-
- kfree(pinfo);
- g_adp_info = NULL;
-}
-
-static int chd_dec_pci_probe(struct pci_dev *pdev,
- const struct pci_device_id *entry)
-{
- struct crystalhd_adp *pinfo;
- int rc;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- BCMLOG(BCMLOG_DBG,
- "PCI_INFO: Vendor:0x%04x Device:0x%04x s_vendor:0x%04x s_device: 0x%04x\n",
- pdev->vendor, pdev->device, pdev->subsystem_vendor,
- pdev->subsystem_device);
-
- pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
- if (!pinfo) {
- BCMLOG_ERR("Failed to allocate memory\n");
- return -ENOMEM;
- }
-
- pinfo->pdev = pdev;
-
- rc = pci_enable_device(pdev);
- if (rc) {
- BCMLOG_ERR("Failed to enable PCI device\n");
- goto err;
- }
-
- snprintf(pinfo->name, sizeof(pinfo->name), "crystalhd_pci_e:%d:%d:%d",
- pdev->bus->number, PCI_SLOT(pdev->devfn),
- PCI_FUNC(pdev->devfn));
-
- rc = chd_pci_reserve_mem(pinfo);
- if (rc) {
- BCMLOG_ERR("Failed to setup memory regions.\n");
- pci_disable_device(pdev);
- rc = -ENOMEM;
- goto err;
- }
-
- pinfo->present = 1;
- pinfo->drv_data = entry->driver_data;
-
- /* Setup adapter level lock.. */
- spin_lock_init(&pinfo->lock);
-
- /* setup api stuff.. */
- chd_dec_init_chdev(pinfo);
- rc = chd_dec_enable_int(pinfo);
- if (rc) {
- BCMLOG_ERR("_enable_int err:%d\n", rc);
- pci_disable_device(pdev);
- rc = -ENODEV;
- goto err;
- }
-
- /* Set dma mask... */
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
- pinfo->dmabits = 64;
- } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
- pinfo->dmabits = 32;
- } else {
- BCMLOG_ERR("Unabled to setup DMA %d\n", rc);
- pci_disable_device(pdev);
- rc = -ENODEV;
- goto err;
- }
-
- sts = crystalhd_setup_cmd_context(&pinfo->cmds, pinfo);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("cmd setup :%d\n", sts);
- pci_disable_device(pdev);
- rc = -ENODEV;
- goto err;
- }
-
- pci_set_master(pdev);
-
- pci_set_drvdata(pdev, pinfo);
-
- g_adp_info = pinfo;
-
- return 0;
-
-err:
- kfree(pinfo);
- return rc;
-}
-
-#ifdef CONFIG_PM
-static int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state)
-{
- struct crystalhd_adp *adp;
- struct crystalhd_ioctl_data *temp;
- enum BC_STATUS sts = BC_STS_SUCCESS;
-
- adp = pci_get_drvdata(pdev);
- if (!adp) {
- BCMLOG_ERR("could not get adp\n");
- return -ENODEV;
- }
-
- temp = chd_dec_alloc_iodata(adp, false);
- if (!temp) {
- BCMLOG_ERR("could not get ioctl data\n");
- return -ENODEV;
- }
-
- sts = crystalhd_suspend(&adp->cmds, temp);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("BCM70012 Suspend %d\n", sts);
- return -ENODEV;
- }
-
- chd_dec_free_iodata(adp, temp, false);
- chd_dec_disable_int(adp);
- pci_save_state(pdev);
-
- /* Disable IO/bus master/irq router */
- pci_disable_device(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
- return 0;
-}
-
-static int chd_dec_pci_resume(struct pci_dev *pdev)
-{
- struct crystalhd_adp *adp;
- enum BC_STATUS sts = BC_STS_SUCCESS;
- int rc;
-
- adp = pci_get_drvdata(pdev);
- if (!adp) {
- BCMLOG_ERR("could not get adp\n");
- return -ENODEV;
- }
-
- pci_set_power_state(pdev, PCI_D0);
- pci_restore_state(pdev);
-
- /* device's irq possibly is changed, driver should take care */
- if (pci_enable_device(pdev)) {
- BCMLOG_ERR("Failed to enable PCI device\n");
- return 1;
- }
-
- pci_set_master(pdev);
-
- rc = chd_dec_enable_int(adp);
- if (rc) {
- BCMLOG_ERR("_enable_int err:%d\n", rc);
- pci_disable_device(pdev);
- return -ENODEV;
- }
-
- sts = crystalhd_resume(&adp->cmds);
- if (sts != BC_STS_SUCCESS) {
- BCMLOG_ERR("BCM70012 Resume %d\n", sts);
- pci_disable_device(pdev);
- return -ENODEV;
- }
-
- return 0;
-}
-#endif
-
-static const struct pci_device_id chd_dec_pci_id_table[] = {
- { PCI_VDEVICE(BROADCOM, 0x1612), 8 },
- { 0, },
-};
-MODULE_DEVICE_TABLE(pci, chd_dec_pci_id_table);
-
-static struct pci_driver bc_chd_70012_driver = {
- .name = "Broadcom 70012 Decoder",
- .probe = chd_dec_pci_probe,
- .remove = chd_dec_pci_remove,
- .id_table = chd_dec_pci_id_table,
-#ifdef CONFIG_PM
- .suspend = chd_dec_pci_suspend,
- .resume = chd_dec_pci_resume
-#endif
-};
-
-void chd_set_log_level(struct crystalhd_adp *adp, char *arg)
-{
- if ((!arg) || (strlen(arg) < 3))
- g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA;
- else if (!strncmp(arg, "sstep", 5))
- g_linklog_level = BCMLOG_INFO | BCMLOG_DATA | BCMLOG_DBG |
- BCMLOG_SSTEP | BCMLOG_ERROR;
- else if (!strncmp(arg, "info", 4))
- g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA | BCMLOG_INFO;
- else if (!strncmp(arg, "debug", 5))
- g_linklog_level = BCMLOG_ERROR | BCMLOG_DATA | BCMLOG_INFO |
- BCMLOG_DBG;
- else if (!strncmp(arg, "pball", 5))
- g_linklog_level = 0xFFFFFFFF & ~(BCMLOG_SPINLOCK);
- else if (!strncmp(arg, "silent", 6))
- g_linklog_level = 0;
- else
- g_linklog_level = 0;
-}
-
-struct crystalhd_adp *chd_get_adp(void)
-{
- return g_adp_info;
-}
-
-static int __init chd_dec_module_init(void)
-{
- int rc;
-
- chd_set_log_level(NULL, "debug");
- BCMLOG(BCMLOG_DATA, "Loading crystalhd %d.%d.%d\n",
- crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev);
-
- rc = pci_register_driver(&bc_chd_70012_driver);
-
- if (rc < 0)
- BCMLOG_ERR("Could not find any devices. err:%d\n", rc);
-
- return rc;
-}
-module_init(chd_dec_module_init);
-
-static void __exit chd_dec_module_cleanup(void)
-{
- BCMLOG(BCMLOG_DATA, "unloading crystalhd %d.%d.%d\n",
- crystalhd_kmod_major, crystalhd_kmod_minor, crystalhd_kmod_rev);
-
- pci_unregister_driver(&bc_chd_70012_driver);
-}
-module_exit(chd_dec_module_cleanup);
-
-MODULE_AUTHOR("Naren Sankar <nsankar@broadcom.com>");
-MODULE_AUTHOR("Prasad Bolisetty <prasadb@broadcom.com>");
-MODULE_DESCRIPTION(CRYSTAL_HD_NAME);
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("bcm70012");
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_lnx . h
- *
- * Description:
- * BCM70012 Linux driver
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#ifndef _CRYSTALHD_LNX_H_
-#define _CRYSTALHD_LNX_H_
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/fb.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/pagemap.h>
-#include <linux/vmalloc.h>
-
-#include <linux/io.h>
-#include <asm/irq.h>
-#include <asm/pgtable.h>
-#include <linux/uaccess.h>
-
-#include "crystalhd.h"
-
-#define CRYSTAL_HD_NAME "Broadcom Crystal HD Decoder (BCM70012) Driver"
-
-/* OS specific PCI information structure and adapter information. */
-struct crystalhd_adp {
- /* Hardware board/PCI specifics */
- char name[32];
- struct pci_dev *pdev;
-
- unsigned long pci_mem_start;
- uint32_t pci_mem_len;
- void __iomem *addr;
-
- unsigned long pci_i2o_start;
- uint32_t pci_i2o_len;
- void __iomem *i2o_addr;
-
- unsigned int drv_data;
- unsigned int dmabits; /* 32 | 64 */
- unsigned int registered;
- unsigned int present;
- unsigned int msi;
-
- spinlock_t lock;
-
- /* API Related */
- int chd_dec_major;
- unsigned int cfg_users;
-
- struct crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */
- struct crystalhd_elem *elem_pool_head; /* Queue element pool */
-
- struct crystalhd_cmd cmds;
-
- struct crystalhd_dio_req *ua_map_free_head;
- struct pci_pool *fill_byte_pool;
-};
-
-
-struct crystalhd_adp *chd_get_adp(void);
-void chd_set_log_level(struct crystalhd_adp *adp, char *arg);
-
-#endif
-
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_misc . c
- *
- * Description:
- * BCM70012 Linux driver misc routines.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#include "crystalhd.h"
-
-#include <linux/slab.h>
-
-uint32_t g_linklog_level;
-
-static inline uint32_t crystalhd_dram_rd(struct crystalhd_adp *adp,
- uint32_t mem_off)
-{
- crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (mem_off >> 19));
- return bc_dec_reg_rd(adp, (0x00380000 | (mem_off & 0x0007FFFF)));
-}
-
-static inline void crystalhd_dram_wr(struct crystalhd_adp *adp,
- uint32_t mem_off, uint32_t val)
-{
- crystalhd_reg_wr(adp, DCI_DRAM_BASE_ADDR, (mem_off >> 19));
- bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val);
-}
-
-static inline enum BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp,
- uint32_t start_off, uint32_t cnt)
-{
- return BC_STS_SUCCESS;
-}
-
-static struct crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp)
-{
- unsigned long flags = 0;
- struct crystalhd_dio_req *temp = NULL;
-
- if (!adp) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return temp;
- }
-
- spin_lock_irqsave(&adp->lock, flags);
- temp = adp->ua_map_free_head;
- if (temp)
- adp->ua_map_free_head = adp->ua_map_free_head->next;
- spin_unlock_irqrestore(&adp->lock, flags);
-
- return temp;
-}
-
-static void crystalhd_free_dio(struct crystalhd_adp *adp,
- struct crystalhd_dio_req *dio)
-{
- unsigned long flags = 0;
-
- if (!adp || !dio)
- return;
- spin_lock_irqsave(&adp->lock, flags);
- dio->sig = crystalhd_dio_inv;
- dio->page_cnt = 0;
- dio->fb_size = 0;
- memset(&dio->uinfo, 0, sizeof(dio->uinfo));
- dio->next = adp->ua_map_free_head;
- adp->ua_map_free_head = dio;
- spin_unlock_irqrestore(&adp->lock, flags);
-}
-
-static struct crystalhd_elem *crystalhd_alloc_elem(struct crystalhd_adp *adp)
-{
- unsigned long flags = 0;
- struct crystalhd_elem *temp = NULL;
-
- if (!adp)
- return temp;
- spin_lock_irqsave(&adp->lock, flags);
- temp = adp->elem_pool_head;
- if (temp) {
- adp->elem_pool_head = adp->elem_pool_head->flink;
- memset(temp, 0, sizeof(*temp));
- }
- spin_unlock_irqrestore(&adp->lock, flags);
-
- return temp;
-}
-static void crystalhd_free_elem(struct crystalhd_adp *adp,
- struct crystalhd_elem *elem)
-{
- unsigned long flags = 0;
-
- if (!adp || !elem)
- return;
- spin_lock_irqsave(&adp->lock, flags);
- elem->flink = adp->elem_pool_head;
- adp->elem_pool_head = elem;
- spin_unlock_irqrestore(&adp->lock, flags);
-}
-
-static inline void crystalhd_set_sg(struct scatterlist *sg, struct page *page,
- unsigned int len, unsigned int offset)
-{
- sg_set_page(sg, page, len, offset);
-#ifdef CONFIG_X86_64
- sg->dma_length = len;
-#endif
-}
-
-static inline void crystalhd_init_sg(struct scatterlist *sg,
- unsigned int entries)
-{
- /* http://lkml.org/lkml/2007/11/27/68 */
- sg_init_table(sg, entries);
-}
-
-/*========================== Extern ========================================*/
-/**
- * bc_dec_reg_rd - Read 7412's device register.
- * @adp: Adapter instance
- * @reg_off: Register offset.
- *
- * Return:
- * 32bit value read
- *
- * 7412's device register read routine. This interface use
- * 7412's device access range mapped from BAR-2 (4M) of PCIe
- * configuration space.
- */
-uint32_t bc_dec_reg_rd(struct crystalhd_adp *adp, uint32_t reg_off)
-{
- if (!adp || (reg_off > adp->pci_mem_len)) {
- BCMLOG_ERR("dec_rd_reg_off outof range: 0x%08x\n", reg_off);
- return 0;
- }
-
- return readl(adp->addr + reg_off);
-}
-
-/**
- * bc_dec_reg_wr - Write 7412's device register
- * @adp: Adapter instance
- * @reg_off: Register offset.
- * @val: Dword value to be written.
- *
- * Return:
- * none.
- *
- * 7412's device register write routine. This interface use
- * 7412's device access range mapped from BAR-2 (4M) of PCIe
- * configuration space.
- */
-void bc_dec_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off, uint32_t val)
-{
- if (!adp || (reg_off > adp->pci_mem_len)) {
- BCMLOG_ERR("dec_wr_reg_off outof range: 0x%08x\n", reg_off);
- return;
- }
- writel(val, adp->addr + reg_off);
- udelay(8);
-}
-
-/**
- * crystalhd_reg_rd - Read Link's device register.
- * @adp: Adapter instance
- * @reg_off: Register offset.
- *
- * Return:
- * 32bit value read
- *
- * Link device register read routine. This interface use
- * Link's device access range mapped from BAR-1 (64K) of PCIe
- * configuration space.
- *
- */
-uint32_t crystalhd_reg_rd(struct crystalhd_adp *adp, uint32_t reg_off)
-{
- if (!adp || (reg_off > adp->pci_i2o_len)) {
- BCMLOG_ERR("link_rd_reg_off outof range: 0x%08x\n", reg_off);
- return 0;
- }
- return readl(adp->i2o_addr + reg_off);
-}
-
-/**
- * crystalhd_reg_wr - Write Link's device register
- * @adp: Adapter instance
- * @reg_off: Register offset.
- * @val: Dword value to be written.
- *
- * Return:
- * none.
- *
- * Link device register write routine. This interface use
- * Link's device access range mapped from BAR-1 (64K) of PCIe
- * configuration space.
- *
- */
-void crystalhd_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off,
- uint32_t val)
-{
- if (!adp || (reg_off > adp->pci_i2o_len)) {
- BCMLOG_ERR("link_wr_reg_off outof range: 0x%08x\n", reg_off);
- return;
- }
- writel(val, adp->i2o_addr + reg_off);
-}
-
-/**
- * crystalhd_mem_rd - Read data from 7412's DRAM area.
- * @adp: Adapter instance
- * @start_off: Start offset.
- * @dw_cnt: Count in dwords.
- * @rd_buff: Buffer to copy the data from dram.
- *
- * Return:
- * Status.
- *
- * 7412's Dram read routine.
- */
-enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off,
- uint32_t dw_cnt, uint32_t *rd_buff)
-{
- uint32_t ix = 0;
-
- if (!adp || !rd_buff ||
- (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
- for (ix = 0; ix < dw_cnt; ix++)
- rd_buff[ix] = crystalhd_dram_rd(adp, (start_off + (ix * 4)));
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_mem_wr - Write data to 7412's DRAM area.
- * @adp: Adapter instance
- * @start_off: Start offset.
- * @dw_cnt: Count in dwords.
- * @wr_buff: Data Buffer to be written.
- *
- * Return:
- * Status.
- *
- * 7412's Dram write routine.
- */
-enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off,
- uint32_t dw_cnt, uint32_t *wr_buff)
-{
- uint32_t ix = 0;
-
- if (!adp || !wr_buff ||
- (bc_chk_dram_range(adp, start_off, dw_cnt) != BC_STS_SUCCESS)) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
-
- for (ix = 0; ix < dw_cnt; ix++)
- crystalhd_dram_wr(adp, (start_off + (ix * 4)), wr_buff[ix]);
-
- return BC_STS_SUCCESS;
-}
-/**
- * crystalhd_pci_cfg_rd - PCIe config read
- * @adp: Adapter instance
- * @off: PCI config space offset.
- * @len: Size -- Byte, Word & dword.
- * @val: Value read
- *
- * Return:
- * Status.
- *
- * Get value from Link's PCIe config space.
- */
-enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off,
- uint32_t len, uint32_t *val)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
- int rc = 0;
-
- if (!adp || !val) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
-
- switch (len) {
- case 1:
- rc = pci_read_config_byte(adp->pdev, off, (u8 *)val);
- break;
- case 2:
- rc = pci_read_config_word(adp->pdev, off, (u16 *)val);
- break;
- case 4:
- rc = pci_read_config_dword(adp->pdev, off, (u32 *)val);
- break;
- default:
- rc = -EINVAL;
- sts = BC_STS_INV_ARG;
- BCMLOG_ERR("Invalid len:%d\n", len);
- }
-
- if (rc && (sts == BC_STS_SUCCESS))
- sts = BC_STS_ERROR;
-
- return sts;
-}
-
-/**
- * crystalhd_pci_cfg_wr - PCIe config write
- * @adp: Adapter instance
- * @off: PCI config space offset.
- * @len: Size -- Byte, Word & dword.
- * @val: Value to be written
- *
- * Return:
- * Status.
- *
- * Set value to Link's PCIe config space.
- */
-enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off,
- uint32_t len, uint32_t val)
-{
- enum BC_STATUS sts = BC_STS_SUCCESS;
- int rc = 0;
-
- if (!adp || !val) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
-
- switch (len) {
- case 1:
- rc = pci_write_config_byte(adp->pdev, off, (u8)val);
- break;
- case 2:
- rc = pci_write_config_word(adp->pdev, off, (u16)val);
- break;
- case 4:
- rc = pci_write_config_dword(adp->pdev, off, val);
- break;
- default:
- rc = -EINVAL;
- sts = BC_STS_INV_ARG;
- BCMLOG_ERR("Invalid len:%d\n", len);
- }
-
- if (rc && (sts == BC_STS_SUCCESS))
- sts = BC_STS_ERROR;
-
- return sts;
-}
-
-/**
- * bc_kern_dma_alloc - Allocate memory for Dma rings
- * @adp: Adapter instance
- * @sz: Size of the memory to allocate.
- * @phy_addr: Physical address of the memory allocated.
- * Typedef to system's dma_addr_t (u64)
- *
- * Return:
- * Pointer to allocated memory..
- *
- * Wrapper to Linux kernel interface.
- *
- */
-void *bc_kern_dma_alloc(struct crystalhd_adp *adp, uint32_t sz,
- dma_addr_t *phy_addr)
-{
- void *temp = NULL;
-
- if (!adp || !sz || !phy_addr) {
- BCMLOG_ERR("Invalid Arg..\n");
- return temp;
- }
-
- temp = pci_alloc_consistent(adp->pdev, sz, phy_addr);
- if (temp)
- memset(temp, 0, sz);
-
- return temp;
-}
-
-/**
- * bc_kern_dma_free - Release Dma ring memory.
- * @adp: Adapter instance
- * @sz: Size of the memory to allocate.
- * @ka: Kernel virtual address returned during _dio_alloc()
- * @phy_addr: Physical address of the memory allocated.
- * Typedef to system's dma_addr_t (u64)
- *
- * Return:
- * none.
- */
-void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka,
- dma_addr_t phy_addr)
-{
- if (!adp || !ka || !sz || !phy_addr) {
- BCMLOG_ERR("Invalid Arg..\n");
- return;
- }
-
- pci_free_consistent(adp->pdev, sz, ka, phy_addr);
-}
-
-/**
- * crystalhd_create_dioq - Create Generic DIO queue
- * @adp: Adapter instance
- * @dioq_hnd: Handle to the dio queue created
- * @cb : Optional - Call back To free the element.
- * @cbctx: Context to pass to callback.
- *
- * Return:
- * status
- *
- * Initialize Generic DIO queue to hold any data. Callback
- * will be used to free elements while deleting the queue.
- */
-enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp,
- struct crystalhd_dioq **dioq_hnd,
- crystalhd_data_free_cb cb, void *cbctx)
-{
- struct crystalhd_dioq *dioq = NULL;
-
- if (!adp || !dioq_hnd) {
- BCMLOG_ERR("Invalid arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- dioq = kzalloc(sizeof(*dioq), GFP_KERNEL);
- if (!dioq)
- return BC_STS_INSUFF_RES;
-
- spin_lock_init(&dioq->lock);
- dioq->sig = BC_LINK_DIOQ_SIG;
- dioq->head = (struct crystalhd_elem *)&dioq->head;
- dioq->tail = (struct crystalhd_elem *)&dioq->head;
- crystalhd_create_event(&dioq->event);
- dioq->adp = adp;
- dioq->data_rel_cb = cb;
- dioq->cb_context = cbctx;
- *dioq_hnd = dioq;
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_delete_dioq - Delete Generic DIO queue
- * @adp: Adapter instance
- * @dioq: DIOQ instance..
- *
- * Return:
- * None.
- *
- * Release Generic DIO queue. This function will remove
- * all the entries from the Queue and will release data
- * by calling the call back provided during creation.
- *
- */
-void crystalhd_delete_dioq(struct crystalhd_adp *adp,
- struct crystalhd_dioq *dioq)
-{
- void *temp;
-
- if (!dioq || (dioq->sig != BC_LINK_DIOQ_SIG))
- return;
-
- do {
- temp = crystalhd_dioq_fetch(dioq);
- if (temp && dioq->data_rel_cb)
- dioq->data_rel_cb(dioq->cb_context, temp);
- } while (temp);
- dioq->sig = 0;
- kfree(dioq);
-}
-
-/**
- * crystalhd_dioq_add - Add new DIO request element.
- * @ioq: DIO queue instance
- * @t: DIO request to be added.
- * @wake: True - Wake up suspended process.
- * @tag: Special tag to assign - For search and get.
- *
- * Return:
- * Status.
- *
- * Insert new element to Q tail.
- */
-enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data,
- bool wake, uint32_t tag)
-{
- unsigned long flags = 0;
- struct crystalhd_elem *tmp;
-
- if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) {
- BCMLOG_ERR("Invalid arg!!\n");
- return BC_STS_INV_ARG;
- }
-
- tmp = crystalhd_alloc_elem(ioq->adp);
- if (!tmp) {
- BCMLOG_ERR("No free elements.\n");
- return BC_STS_INSUFF_RES;
- }
-
- tmp->data = data;
- tmp->tag = tag;
- spin_lock_irqsave(&ioq->lock, flags);
- tmp->flink = (struct crystalhd_elem *)&ioq->head;
- tmp->blink = ioq->tail;
- tmp->flink->blink = tmp;
- tmp->blink->flink = tmp;
- ioq->count++;
- spin_unlock_irqrestore(&ioq->lock, flags);
-
- if (wake)
- crystalhd_set_event(&ioq->event);
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_dioq_fetch - Fetch element from head.
- * @ioq: DIO queue instance
- *
- * Return:
- * data element from the head..
- *
- * Remove an element from Queue.
- */
-void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq)
-{
- unsigned long flags = 0;
- struct crystalhd_elem *tmp;
- struct crystalhd_elem *ret = NULL;
- void *data = NULL;
-
- if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) {
- BCMLOG_ERR("Invalid arg!!\n");
- return data;
- }
-
- spin_lock_irqsave(&ioq->lock, flags);
- tmp = ioq->head;
- if (tmp != (struct crystalhd_elem *)&ioq->head) {
- ret = tmp;
- tmp->flink->blink = tmp->blink;
- tmp->blink->flink = tmp->flink;
- ioq->count--;
- }
- spin_unlock_irqrestore(&ioq->lock, flags);
- if (ret) {
- data = ret->data;
- crystalhd_free_elem(ioq->adp, ret);
- }
-
- return data;
-}
-/**
- * crystalhd_dioq_find_and_fetch - Search the tag and Fetch element
- * @ioq: DIO queue instance
- * @tag: Tag to search for.
- *
- * Return:
- * element from the head..
- *
- * Search TAG and remove the element.
- */
-void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag)
-{
- unsigned long flags = 0;
- struct crystalhd_elem *tmp;
- struct crystalhd_elem *ret = NULL;
- void *data = NULL;
-
- if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) {
- BCMLOG_ERR("Invalid arg!!\n");
- return data;
- }
-
- spin_lock_irqsave(&ioq->lock, flags);
- tmp = ioq->head;
- while (tmp != (struct crystalhd_elem *)&ioq->head) {
- if (tmp->tag == tag) {
- ret = tmp;
- tmp->flink->blink = tmp->blink;
- tmp->blink->flink = tmp->flink;
- ioq->count--;
- break;
- }
- tmp = tmp->flink;
- }
- spin_unlock_irqrestore(&ioq->lock, flags);
-
- if (ret) {
- data = ret->data;
- crystalhd_free_elem(ioq->adp, ret);
- }
-
- return data;
-}
-
-/**
- * crystalhd_dioq_fetch_wait - Fetch element from Head.
- * @ioq: DIO queue instance
- * @to_secs: Wait timeout in seconds..
- *
- * Return:
- * element from the head..
- *
- * Return element from head if Q is not empty. Wait for new element
- * if Q is empty for Timeout seconds.
- */
-void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs,
- uint32_t *sig_pend)
-{
- unsigned long flags = 0;
- int rc = 0, count;
- void *tmp = NULL;
-
- if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !to_secs || !sig_pend) {
- BCMLOG_ERR("Invalid arg!!\n");
- return tmp;
- }
-
- count = to_secs;
- spin_lock_irqsave(&ioq->lock, flags);
- while ((ioq->count == 0) && count) {
- spin_unlock_irqrestore(&ioq->lock, flags);
-
- crystalhd_wait_on_event(&ioq->event,
- (ioq->count > 0), 1000, rc, 0);
- if (rc == 0) {
- goto out;
- } else if (rc == -EINTR) {
- BCMLOG(BCMLOG_INFO, "Cancelling fetch wait\n");
- *sig_pend = 1;
- return tmp;
- }
- spin_lock_irqsave(&ioq->lock, flags);
- count--;
- }
- spin_unlock_irqrestore(&ioq->lock, flags);
-
-out:
- return crystalhd_dioq_fetch(ioq);
-}
-
-/**
- * crystalhd_map_dio - Map user address for DMA
- * @adp: Adapter instance
- * @ubuff: User buffer to map.
- * @ubuff_sz: User buffer size.
- * @uv_offset: UV buffer offset.
- * @en_422mode: TRUE:422 FALSE:420 Capture mode.
- * @dir_tx: TRUE for Tx (To device from host)
- * @dio_hnd: Handle to mapped DIO request.
- *
- * Return:
- * Status.
- *
- * This routine maps user address and lock pages for DMA.
- *
- */
-enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff,
- uint32_t ubuff_sz, uint32_t uv_offset,
- bool en_422mode, bool dir_tx,
- struct crystalhd_dio_req **dio_hnd)
-{
- struct crystalhd_dio_req *dio;
- /* FIXME: jarod: should some of these
- unsigned longs be uint32_t or uintptr_t? */
- unsigned long start = 0, end = 0, uaddr = 0, count = 0;
- unsigned long spsz = 0, uv_start = 0;
- int i = 0, rw = 0, res = 0, nr_pages = 0, skip_fb_sg = 0;
-
- if (!adp || !ubuff || !ubuff_sz || !dio_hnd) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
- /* Compute pages */
- uaddr = (unsigned long)ubuff;
- count = (unsigned long)ubuff_sz;
- end = (uaddr + count + PAGE_SIZE - 1) >> PAGE_SHIFT;
- start = uaddr >> PAGE_SHIFT;
- nr_pages = end - start;
-
- if (!count || ((uaddr + count) < uaddr)) {
- BCMLOG_ERR("User addr overflow!!\n");
- return BC_STS_INV_ARG;
- }
-
- dio = crystalhd_alloc_dio(adp);
- if (!dio) {
- BCMLOG_ERR("dio pool empty..\n");
- return BC_STS_INSUFF_RES;
- }
-
- if (dir_tx) {
- rw = WRITE;
- dio->direction = DMA_TO_DEVICE;
- } else {
- rw = READ;
- dio->direction = DMA_FROM_DEVICE;
- }
-
- if (nr_pages > dio->max_pages) {
- BCMLOG_ERR("max_pages(%d) exceeded(%d)!!\n",
- dio->max_pages, nr_pages);
- crystalhd_unmap_dio(adp, dio);
- return BC_STS_INSUFF_RES;
- }
-
- if (uv_offset) {
- uv_start = (uaddr + (unsigned long)uv_offset) >> PAGE_SHIFT;
- dio->uinfo.uv_sg_ix = uv_start - start;
- dio->uinfo.uv_sg_off = ((uaddr + (unsigned long)uv_offset) &
- ~PAGE_MASK);
- }
-
- dio->fb_size = ubuff_sz & 0x03;
- if (dio->fb_size) {
- res = copy_from_user(dio->fb_va,
- (void __user *)(uaddr + count - dio->fb_size),
- dio->fb_size);
- if (res) {
- BCMLOG_ERR("failed %d to copy %u fill bytes from %p\n",
- res, dio->fb_size,
- (void *)(uaddr + count-dio->fb_size));
- crystalhd_unmap_dio(adp, dio);
- return BC_STS_INSUFF_RES;
- }
- }
-
- down_read(¤t->mm->mmap_sem);
- res = get_user_pages(current, current->mm, uaddr, nr_pages, rw == READ,
- 0, dio->pages, NULL);
- up_read(¤t->mm->mmap_sem);
-
- /* Save for release..*/
- dio->sig = crystalhd_dio_locked;
- if (res < nr_pages) {
- BCMLOG_ERR("get pages failed: %d-%d\n", nr_pages, res);
- dio->page_cnt = res;
- crystalhd_unmap_dio(adp, dio);
- return BC_STS_ERROR;
- }
-
- dio->page_cnt = nr_pages;
- /* Get scatter/gather */
- crystalhd_init_sg(dio->sg, dio->page_cnt);
- crystalhd_set_sg(&dio->sg[0], dio->pages[0], 0, uaddr & ~PAGE_MASK);
- if (nr_pages > 1) {
- dio->sg[0].length = PAGE_SIZE - dio->sg[0].offset;
-
-#ifdef CONFIG_X86_64
- dio->sg[0].dma_length = dio->sg[0].length;
-#endif
- count -= dio->sg[0].length;
- for (i = 1; i < nr_pages; i++) {
- if (count < 4) {
- spsz = count;
- skip_fb_sg = 1;
- } else {
- spsz = (count < PAGE_SIZE) ?
- (count & ~0x03) : PAGE_SIZE;
- }
- crystalhd_set_sg(&dio->sg[i], dio->pages[i], spsz, 0);
- count -= spsz;
- }
- } else {
- if (count < 4) {
- dio->sg[0].length = count;
- skip_fb_sg = 1;
- } else {
- dio->sg[0].length = count - dio->fb_size;
- }
-#ifdef CONFIG_X86_64
- dio->sg[0].dma_length = dio->sg[0].length;
-#endif
- }
- dio->sg_cnt = pci_map_sg(adp->pdev, dio->sg,
- dio->page_cnt, dio->direction);
- if (dio->sg_cnt <= 0) {
- BCMLOG_ERR("sg map %d-%d\n", dio->sg_cnt, dio->page_cnt);
- crystalhd_unmap_dio(adp, dio);
- return BC_STS_ERROR;
- }
- if (dio->sg_cnt && skip_fb_sg)
- dio->sg_cnt -= 1;
- dio->sig = crystalhd_dio_sg_mapped;
- /* Fill in User info.. */
- dio->uinfo.xfr_len = ubuff_sz;
- dio->uinfo.xfr_buff = ubuff;
- dio->uinfo.uv_offset = uv_offset;
- dio->uinfo.b422mode = en_422mode;
- dio->uinfo.dir_tx = dir_tx;
-
- *dio_hnd = dio;
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_unmap_sgl - Release mapped resources
- * @adp: Adapter instance
- * @dio: DIO request instance
- *
- * Return:
- * Status.
- *
- * This routine is to unmap the user buffer pages.
- */
-enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp,
- struct crystalhd_dio_req *dio)
-{
- struct page *page = NULL;
- int j = 0;
-
- if (!adp || !dio) {
- BCMLOG_ERR("Invalid arg\n");
- return BC_STS_INV_ARG;
- }
-
- if ((dio->page_cnt > 0) && (dio->sig != crystalhd_dio_inv)) {
- for (j = 0; j < dio->page_cnt; j++) {
- page = dio->pages[j];
- if (page) {
- if (!PageReserved(page) &&
- (dio->direction == DMA_FROM_DEVICE))
- SetPageDirty(page);
- page_cache_release(page);
- }
- }
- }
- if (dio->sig == crystalhd_dio_sg_mapped)
- pci_unmap_sg(adp->pdev, dio->sg, dio->page_cnt,
- dio->direction);
-
- crystalhd_free_dio(adp, dio);
-
- return BC_STS_SUCCESS;
-}
-
-/**
- * crystalhd_create_dio_pool - Allocate mem pool for DIO management.
- * @adp: Adapter instance
- * @max_pages: Max pages for size calculation.
- *
- * Return:
- * system error.
- *
- * This routine creates a memory pool to hold dio context for
- * for HW Direct IO operation.
- */
-int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages)
-{
- uint32_t asz = 0, i = 0;
- uint8_t *temp;
- struct crystalhd_dio_req *dio;
-
- if (!adp || !max_pages) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return -EINVAL;
- }
-
- /* Get dma memory for fill byte handling..*/
- adp->fill_byte_pool = pci_pool_create("crystalhd_fbyte",
- adp->pdev, 8, 8, 0);
- if (!adp->fill_byte_pool) {
- BCMLOG_ERR("failed to create fill byte pool\n");
- return -ENOMEM;
- }
-
- /* Get the max size from user based on 420/422 modes */
- asz = (sizeof(*dio->pages) * max_pages) +
- (sizeof(*dio->sg) * max_pages) + sizeof(*dio);
-
- BCMLOG(BCMLOG_DBG, "Initializing Dio pool %d %d %x %p\n",
- BC_LINK_SG_POOL_SZ, max_pages, asz, adp->fill_byte_pool);
-
- for (i = 0; i < BC_LINK_SG_POOL_SZ; i++) {
- temp = kzalloc(asz, GFP_KERNEL);
- if ((temp) == NULL) {
- BCMLOG_ERR("Failed to alloc %d mem\n", asz);
- return -ENOMEM;
- }
-
- dio = (struct crystalhd_dio_req *)temp;
- temp += sizeof(*dio);
- dio->pages = (struct page **)temp;
- temp += (sizeof(*dio->pages) * max_pages);
- dio->sg = (struct scatterlist *)temp;
- dio->max_pages = max_pages;
- dio->fb_va = pci_pool_alloc(adp->fill_byte_pool, GFP_KERNEL,
- &dio->fb_pa);
- if (!dio->fb_va) {
- BCMLOG_ERR("fill byte alloc failed.\n");
- return -ENOMEM;
- }
-
- crystalhd_free_dio(adp, dio);
- }
-
- return 0;
-}
-
-/**
- * crystalhd_destroy_dio_pool - Release DIO mem pool.
- * @adp: Adapter instance
- *
- * Return:
- * none.
- *
- * This routine releases dio memory pool during close.
- */
-void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp)
-{
- struct crystalhd_dio_req *dio;
- int count = 0;
-
- if (!adp) {
- BCMLOG_ERR("Invalid Arg!!\n");
- return;
- }
-
- do {
- dio = crystalhd_alloc_dio(adp);
- if (dio) {
- if (dio->fb_va)
- pci_pool_free(adp->fill_byte_pool,
- dio->fb_va, dio->fb_pa);
- count++;
- kfree(dio);
- }
- } while (dio);
-
- if (adp->fill_byte_pool) {
- pci_pool_destroy(adp->fill_byte_pool);
- adp->fill_byte_pool = NULL;
- }
-
- BCMLOG(BCMLOG_DBG, "Released dio pool %d\n", count);
-}
-
-/**
- * crystalhd_create_elem_pool - List element pool creation.
- * @adp: Adapter instance
- * @pool_size: Number of elements in the pool.
- *
- * Return:
- * 0 - success, <0 error
- *
- * Create general purpose list element pool to hold pending,
- * and active requests.
- */
-int crystalhd_create_elem_pool(struct crystalhd_adp *adp,
- uint32_t pool_size)
-{
- uint32_t i;
- struct crystalhd_elem *temp;
-
- if (!adp || !pool_size)
- return -EINVAL;
-
- for (i = 0; i < pool_size; i++) {
- temp = kzalloc(sizeof(*temp), GFP_KERNEL);
- if (!temp) {
- BCMLOG_ERR("kalloc failed\n");
- return -ENOMEM;
- }
- crystalhd_free_elem(adp, temp);
- }
- BCMLOG(BCMLOG_DBG, "allocated %d elem\n", pool_size);
- return 0;
-}
-
-/**
- * crystalhd_delete_elem_pool - List element pool deletion.
- * @adp: Adapter instance
- *
- * Return:
- * none
- *
- * Delete general purpose list element pool.
- */
-void crystalhd_delete_elem_pool(struct crystalhd_adp *adp)
-{
- struct crystalhd_elem *temp;
- int dbg_cnt = 0;
-
- if (!adp)
- return;
-
- do {
- temp = crystalhd_alloc_elem(adp);
- if (temp) {
- kfree(temp);
- dbg_cnt++;
- }
- } while (temp);
-
- BCMLOG(BCMLOG_DBG, "released %d elem\n", dbg_cnt);
-}
-
-/*================ Debug support routines.. ================================*/
-void crystalhd_show_buffer(uint32_t off, uint8_t *buff, uint32_t dwcount)
-{
- uint32_t i, k = 1;
-
- for (i = 0; i < dwcount; i++) {
- if (k == 1)
- BCMLOG(BCMLOG_DATA, "0x%08X : ", off);
-
- BCMLOG(BCMLOG_DATA, " 0x%08X ", *((uint32_t *)buff));
-
- buff += sizeof(uint32_t);
- off += sizeof(uint32_t);
- k++;
- if ((i == dwcount - 1) || (k > 4)) {
- BCMLOG(BCMLOG_DATA, "\n");
- k = 1;
- }
- }
-}
+++ /dev/null
-/***************************************************************************
- * Copyright (c) 2005-2009, Broadcom Corporation.
- *
- * Name: crystalhd_misc . h
- *
- * Description:
- * BCM70012 Linux driver general purpose routines.
- * Includes reg/mem read and write routines.
- *
- * HISTORY:
- *
- **********************************************************************
- * This file is part of the crystalhd device driver.
- *
- * This driver is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 2 of the License.
- *
- * This driver is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this driver. If not, see <http://www.gnu.org/licenses/>.
- **********************************************************************/
-
-#ifndef _CRYSTALHD_MISC_H_
-#define _CRYSTALHD_MISC_H_
-
-#include "crystalhd.h"
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/ioctl.h>
-#include <linux/dma-mapping.h>
-#include <linux/sched.h>
-#include "bc_dts_glob_lnx.h"
-
-/* Global log level variable defined in crystal_misc.c file */
-extern uint32_t g_linklog_level;
-
-/* Global element pool for all Queue management.
- * TX: Active = BC_TX_LIST_CNT, Free = BC_TX_LIST_CNT.
- * RX: Free = BC_RX_LIST_CNT, Active = 2
- * FW-CMD: 4
- */
-#define BC_LINK_ELEM_POOL_SZ ((BC_TX_LIST_CNT * 2) + BC_RX_LIST_CNT + 2 + 4)
-
-/* Driver's IODATA pool count */
-#define CHD_IODATA_POOL_SZ (BC_IOCTL_DATA_POOL_SIZE * BC_LINK_MAX_OPENS)
-
-/* Scatter Gather memory pool size for Tx and Rx */
-#define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT)
-
-enum crystalhd_dio_sig {
- crystalhd_dio_inv = 0,
- crystalhd_dio_locked,
- crystalhd_dio_sg_mapped,
-};
-
-struct crystalhd_dio_user_info {
- void *xfr_buff;
- uint32_t xfr_len;
- uint32_t uv_offset;
- bool dir_tx;
-
- uint32_t uv_sg_ix;
- uint32_t uv_sg_off;
- int comp_sts;
- int ev_sts;
- uint32_t y_done_sz;
- uint32_t uv_done_sz;
- uint32_t comp_flags;
- bool b422mode;
-};
-
-struct crystalhd_dio_req {
- uint32_t sig;
- uint32_t max_pages;
- struct page **pages;
- struct scatterlist *sg;
- int sg_cnt;
- int page_cnt;
- int direction;
- struct crystalhd_dio_user_info uinfo;
- void *fb_va;
- uint32_t fb_size;
- dma_addr_t fb_pa;
- struct crystalhd_dio_req *next;
-};
-
-#define BC_LINK_DIOQ_SIG (0x09223280)
-
-struct crystalhd_elem {
- struct crystalhd_elem *flink;
- struct crystalhd_elem *blink;
- void *data;
- uint32_t tag;
-};
-
-typedef void (*crystalhd_data_free_cb)(void *context, void *data);
-
-struct crystalhd_dioq {
- uint32_t sig;
- struct crystalhd_adp *adp;
- struct crystalhd_elem *head;
- struct crystalhd_elem *tail;
- uint32_t count;
- spinlock_t lock;
- wait_queue_head_t event;
- crystalhd_data_free_cb data_rel_cb;
- void *cb_context;
-};
-
-typedef void (*hw_comp_callback)(struct crystalhd_dio_req *,
- wait_queue_head_t *event, enum BC_STATUS sts);
-
-/*========= Decoder (7412) register access routines.================= */
-uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t);
-void bc_dec_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
-
-/*========= Link (70012) register access routines.. =================*/
-uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t);
-void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t);
-
-/*========= Decoder (7412) memory access routines..=================*/
-enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *,
- uint32_t, uint32_t, uint32_t *);
-enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *,
- uint32_t, uint32_t, uint32_t *);
-
-/*==========Link (70012) PCIe Config access routines.================*/
-enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *,
- uint32_t, uint32_t, uint32_t *);
-enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *,
- uint32_t, uint32_t, uint32_t);
-
-/*========= Linux Kernel Interface routines. ======================= */
-void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *);
-void bc_kern_dma_free(struct crystalhd_adp *, uint32_t,
- void *, dma_addr_t);
-#define crystalhd_create_event(_ev) init_waitqueue_head(_ev)
-#define crystalhd_set_event(_ev) wake_up_interruptible(_ev)
-#define crystalhd_wait_on_event(ev, condition, timeout, ret, nosig) \
-do { \
- DECLARE_WAITQUEUE(entry, current); \
- unsigned long end = jiffies + ((timeout * HZ) / 1000); \
- ret = 0; \
- add_wait_queue(ev, &entry); \
- for (;;) { \
- __set_current_state(TASK_INTERRUPTIBLE); \
- if (condition) { \
- break; \
- } \
- if (time_after_eq(jiffies, end)) { \
- ret = -EBUSY; \
- break; \
- } \
- schedule_timeout((HZ / 100 > 1) ? HZ / 100 : 1); \
- if (!nosig && signal_pending(current)) { \
- ret = -EINTR; \
- break; \
- } \
- } \
- __set_current_state(TASK_RUNNING); \
- remove_wait_queue(ev, &entry); \
-} while (0)
-
-/*================ Direct IO mapping routines ==================*/
-extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t);
-extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *);
-extern enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *,
- uint32_t, uint32_t, bool, bool, struct crystalhd_dio_req**);
-
-extern enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *,
- struct crystalhd_dio_req*);
-#define crystalhd_get_sgle_paddr(_dio, _ix) (sg_dma_address(&_dio->sg[_ix]))
-#define crystalhd_get_sgle_len(_dio, _ix) (sg_dma_len(&_dio->sg[_ix]))
-
-/*================ General Purpose Queues ==================*/
-extern enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *,
- struct crystalhd_dioq **, crystalhd_data_free_cb , void *);
-extern void crystalhd_delete_dioq(struct crystalhd_adp *,
- struct crystalhd_dioq *);
-extern enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq,
- void *data, bool wake, uint32_t tag);
-extern void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq);
-extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq,
- uint32_t tag);
-extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq,
- uint32_t to_secs, uint32_t *sig_pend);
-
-#define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0)
-
-extern int crystalhd_create_elem_pool(struct crystalhd_adp *, uint32_t);
-extern void crystalhd_delete_elem_pool(struct crystalhd_adp *);
-
-
-/*================ Debug routines/macros .. ================================*/
-extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff,
- uint32_t dwcount);
-
-enum _chd_log_levels {
- BCMLOG_ERROR = 0x80000000, /* Don't disable this option */
- BCMLOG_DATA = 0x40000000, /* Data, enable by default */
- BCMLOG_SPINLOCK = 0x20000000, /* Special case for Spin locks*/
-
- /* Following are allowed only in debug mode */
- BCMLOG_INFO = 0x00000001, /* Generic informational */
- BCMLOG_DBG = 0x00000002, /* First level Debug info */
- BCMLOG_SSTEP = 0x00000004, /* Stepping information */
-};
-
-
-#define BCMLOG(trace, fmt, args...) \
-do { \
- if (g_linklog_level & trace) \
- printk(fmt, ##args); \
-} while (0)
-
-
-#define BCMLOG_ERR(fmt, args...) \
-do { \
- if (g_linklog_level & BCMLOG_ERROR) \
- pr_err("*ERR*:%s:%d: "fmt, \
- __FILE__, __LINE__, ##args); \
-} while (0)
-
-#endif
/*******************************************************************/
static int
-musycc_dump_rxbuffer_ring(mch_t *ch, int lockit)
+musycc_dump_rxbuffer_ring_locked(mch_t *ch)
{
struct mdesc *m;
- unsigned long flags = 0;
u_int32_t status;
int n;
u_int32_t *dp;
int len = 0;
#endif
- if (lockit)
- spin_lock_irqsave(&ch->ch_rxlock, flags);
if (ch->rxd_num == 0)
pr_info(" ZERO receive buffers allocated for this channel.");
else {
}
pr_info("\n");
- if (lockit)
- spin_unlock_irqrestore(&ch->ch_rxlock, flags);
return 0;
}
static int
-musycc_dump_txbuffer_ring(mch_t *ch, int lockit)
+musycc_dump_rxbuffer_ring(mch_t *ch)
{
- struct mdesc *m;
unsigned long flags = 0;
+ int ret;
+
+ spin_lock_irqsave(&ch->ch_rxlock, flags);
+ ret = musycc_dump_rxbuffer_ring_locked(ch);
+ spin_unlock_irqrestore(&ch->ch_rxlock, flags);
+
+ return ret;
+}
+
+static int
+musycc_dump_txbuffer_ring_locked(mch_t *ch)
+{
+ struct mdesc *m;
u_int32_t status;
int n;
#ifdef RLD_DUMP_BUFDATA
int len = 0;
#endif
- if (lockit)
- spin_lock_irqsave(&ch->ch_txlock, flags);
if (ch->txd_num == 0)
pr_info(" ZERO transmit buffers allocated for this channel.");
else {
} /* -for- */
pr_info("\n");
- if (lockit)
- spin_unlock_irqrestore(&ch->ch_txlock, flags);
return 0;
}
+static int
+musycc_dump_txbuffer_ring(mch_t *ch)
+{
+ unsigned long flags = 0;
+ int ret;
+
+ spin_lock_irqsave(&ch->ch_txlock, flags);
+ ret = musycc_dump_txbuffer_ring_locked(ch);
+ spin_unlock_irqrestore(&ch->ch_txlock, flags);
+
+ return ret;
+}
+
/*
* The following supports a backdoor debug facility which can be used to
* display the state of a board's channel.
ch->user, ch->txd_irq_srv, ch->txd_usr_add,
sd_queue_stopped(ch->user),
ch->ch_start_tx, ch->tx_full, ch->txd_free, ch->p.chan_mode);
- musycc_dump_txbuffer_ring(ch, 1);
+ musycc_dump_txbuffer_ring(ch);
pr_info("RX Buffer Ring - Channel %d, rxd_num %d. IRQ_SRV[%d] 0x%p, start_rx %x rxpkt %lu\n",
chan, ch->rxd_num, ch->rxix_irq_srv,
&ch->mdr[ch->rxix_irq_srv], ch->ch_start_rx, ch->s.rx_packets);
- musycc_dump_rxbuffer_ring(ch, 1);
+ musycc_dump_rxbuffer_ring(ch);
return SBE_DRVR_SUCCESS;
}
ch->channum, ch->rxix_irq_srv,
md, le32_to_cpu(md->status),
ch->s.rx_packets);
- musycc_dump_rxbuffer_ring(ch, 1); /* RLD DEBUG */
+ musycc_dump_rxbuffer_ring(ch); /* RLD DEBUG */
#endif
}
#endif
ch->channum, md,
le32_to_cpu(md->status),
le32_to_cpu(md->data), ch->ch_start_tx);
- musycc_dump_txbuffer_ring(ch, 0);
+ musycc_dump_txbuffer_ring_locked(ch);
}
#endif
}
sd_queue_stopped(ch->user),
ch->ch_start_tx, ch->tx_full,
ch->txd_free, ch->p.chan_mode);
- musycc_dump_txbuffer_ring(ch, 0);
+ musycc_dump_txbuffer_ring_locked(ch);
}
break; /* Not our mdesc, done */
} else {
ch->tx_full,
ch->txd_free,
ch->p.chan_mode);
- musycc_dump_txbuffer_ring(ch, 0);
+ musycc_dump_txbuffer_ring_locked(ch);
}
#endif
}
ci->devname, ch->channum,
ch->p.chan_mode);
#ifdef RLD_DEBUG
- musycc_dump_rxbuffer_ring(ch, 0);
+ musycc_dump_rxbuffer_ring_locked(ch);
#endif
}
}
static int dgap_start(void);
static void dgap_init_globals(void);
-static int dgap_found_board(struct pci_dev *pdev, int id);
+static struct board_t *dgap_found_board(struct pci_dev *pdev, int id,
+ int boardnum);
static void dgap_cleanup_board(struct board_t *brd);
static void dgap_poll_handler(ulong dummy);
static int dgap_init_pci(void);
static int dgap_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static void dgap_remove_one(struct pci_dev *dev);
-static int dgap_probe1(struct pci_dev *pdev, int card_type);
static int dgap_do_remap(struct board_t *brd);
+static void dgap_release_remap(struct board_t *brd);
static irqreturn_t dgap_intr(int irq, void *voidbrd);
static int dgap_tty_open(struct tty_struct *tty, struct file *file);
static void dgap_tty_send_xchar(struct tty_struct *tty, char ch);
static int dgap_tty_register(struct board_t *brd);
+static void dgap_tty_unregister(struct board_t *brd);
static int dgap_tty_init(struct board_t *);
-static void dgap_tty_uninit(struct board_t *);
+static void dgap_tty_free(struct board_t *);
+static void dgap_cleanup_tty(struct board_t *);
static void dgap_carrier(struct channel_t *ch);
static void dgap_input(struct channel_t *ch);
/*
* Function prototypes from dgap_parse.h
*/
-static int dgap_parsefile(char **in, int remove);
+static int dgap_parsefile(char **in);
static struct cnode *dgap_find_config(int type, int bus, int slot);
static uint dgap_config_get_num_prts(struct board_t *bd);
static char *dgap_create_config_string(struct board_t *bd, char *string);
#ifdef DIGI_CONCENTRATORS_SUPPORTED
static void dgap_do_conc_load(struct board_t *brd, u8 *uaddr, int len);
#endif
-static int dgap_after_config_loaded(int board);
-static int dgap_finalize_board_init(struct board_t *brd);
+static int dgap_alloc_flipbuf(struct board_t *brd);
+static void dgap_free_flipbuf(struct board_t *brd);
+static int dgap_request_irq(struct board_t *brd);
+static void dgap_free_irq(struct board_t *brd);
static void dgap_get_vpd(struct board_t *brd);
static void dgap_do_reset_board(struct board_t *brd);
static int dgap_test_bios(struct board_t *brd);
static int dgap_test_fep(struct board_t *brd);
static int dgap_tty_register_ports(struct board_t *brd);
-static int dgap_firmware_load(struct pci_dev *pdev, int card_type);
+static int dgap_firmware_load(struct pci_dev *pdev, int card_type,
+ struct board_t* brd);
static void dgap_cleanup_module(void);
static uint dgap_numboards;
static struct board_t *dgap_board[MAXBOARDS];
static ulong dgap_poll_counter;
-static char *dgap_config_buf;
static int dgap_driver_state = DRIVER_INITIALIZED;
static wait_queue_head_t dgap_dl_wait;
static int dgap_poll_tick = 20; /* Poll interval - 20 ms */
static int dgap_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
int rc;
+ struct board_t* brd;
if (dgap_numboards >= MAXBOARDS)
return -EPERM;
if (rc)
return -EIO;
- rc = dgap_probe1(pdev, ent->driver_data);
+ brd = dgap_found_board(pdev, ent->driver_data, dgap_numboards);
+ if (IS_ERR(brd))
+ return PTR_ERR(brd);
+
+ rc = dgap_firmware_load(pdev, ent->driver_data, brd);
if (rc)
- return rc;
+ goto cleanup_brd;
- dgap_numboards++;
- return dgap_firmware_load(pdev, ent->driver_data);
-}
+ rc = dgap_alloc_flipbuf(brd);
+ if (rc)
+ goto cleanup_brd;
-static int dgap_probe1(struct pci_dev *pdev, int card_type)
-{
- return dgap_found_board(pdev, card_type);
+ rc = dgap_tty_register(brd);
+ if (rc)
+ goto free_flipbuf;
+
+ rc = dgap_request_irq(brd);
+ if (rc)
+ goto unregister_tty;
+
+ /*
+ * Do tty device initialization.
+ */
+ rc = dgap_tty_init(brd);
+ if (rc < 0)
+ goto free_irq;
+
+ rc = dgap_tty_register_ports(brd);
+ if (rc)
+ goto tty_free;
+
+ brd->state = BOARD_READY;
+ brd->dpastatus = BD_RUNNING;
+
+ dgap_board[dgap_numboards++] = brd;
+
+ return 0;
+
+tty_free:
+ dgap_tty_free(brd);
+free_irq:
+ dgap_free_irq(brd);
+unregister_tty:
+ dgap_tty_unregister(brd);
+free_flipbuf:
+ dgap_free_flipbuf(brd);
+cleanup_brd:
+ dgap_release_remap(brd);
+ kfree(brd);
+
+ return rc;
}
static void dgap_remove_one(struct pci_dev *dev)
for (i = 0; i < dgap_numboards; ++i) {
dgap_remove_ports_sysfiles(dgap_board[i]);
- dgap_tty_uninit(dgap_board[i]);
+ dgap_cleanup_tty(dgap_board[i]);
dgap_cleanup_board(dgap_board[i]);
}
if (!brd || brd->magic != DGAP_BOARD_MAGIC)
return;
- if (brd->intr_used && brd->irq)
- free_irq(brd->irq, brd);
+ dgap_free_irq(brd);
tasklet_kill(&brd->helper_tasklet);
*
* A board has been found, init it.
*/
-static int dgap_found_board(struct pci_dev *pdev, int id)
+static struct board_t *dgap_found_board(struct pci_dev *pdev, int id,
+ int boardnum)
{
struct board_t *brd;
unsigned int pci_irq;
int i;
+ int ret;
/* get the board structure and prep it */
brd = kzalloc(sizeof(struct board_t), GFP_KERNEL);
if (!brd)
- return -ENOMEM;
-
- dgap_board[dgap_numboards] = brd;
+ return ERR_PTR(-ENOMEM);
/* store the info for the board we've found */
brd->magic = DGAP_BOARD_MAGIC;
- brd->boardnum = dgap_numboards;
- brd->firstminor = 0;
+ brd->boardnum = boardnum;
brd->vendor = dgap_pci_tbl[id].vendor;
brd->device = dgap_pci_tbl[id].device;
brd->pdev = pdev;
brd->membase_end = pci_resource_end(pdev, 0);
}
- if (!brd->membase)
- return -ENODEV;
+ if (!brd->membase) {
+ ret = -ENODEV;
+ goto free_brd;
+ }
if (brd->membase & 1)
brd->membase &= ~3;
tasklet_init(&brd->helper_tasklet, dgap_poll_tasklet,
(unsigned long) brd);
- i = dgap_do_remap(brd);
- if (i)
- brd->state = BOARD_FAILED;
+ ret = dgap_do_remap(brd);
+ if (ret)
+ goto free_brd;
pr_info("dgap: board %d: %s (rev %d), irq %ld\n",
- dgap_numboards, brd->name, brd->rev, brd->irq);
+ boardnum, brd->name, brd->rev, brd->irq);
- return 0;
+ return brd;
+
+free_brd:
+ kfree(brd);
+
+ return ERR_PTR(ret);
}
-static int dgap_finalize_board_init(struct board_t *brd)
+static int dgap_request_irq(struct board_t *brd)
{
int rc;
return 0;
}
-static int dgap_firmware_load(struct pci_dev *pdev, int card_type)
+static void dgap_free_irq(struct board_t *brd)
+{
+ if (brd->intr_used && brd->irq)
+ free_irq(brd->irq, brd);
+}
+
+static int dgap_firmware_load(struct pci_dev *pdev, int card_type,
+ struct board_t* brd)
{
- struct board_t *brd = dgap_board[dgap_numboards - 1];
const struct firmware *fw;
char *tmp_ptr;
int ret;
+ char *dgap_config_buf;
dgap_get_vpd(brd);
dgap_do_reset_board(brd);
- if ((fw_info[card_type].conf_name) && !dgap_config_buf) {
+ if (fw_info[card_type].conf_name) {
ret = request_firmware(&fw, fw_info[card_type].conf_name,
&pdev->dev);
if (ret) {
*/
tmp_ptr = dgap_config_buf;
- if (dgap_parsefile(&tmp_ptr, TRUE) != 0) {
+ if (dgap_parsefile(&tmp_ptr) != 0) {
kfree(dgap_config_buf);
return -EINVAL;
}
kfree(dgap_config_buf);
}
- ret = dgap_after_config_loaded(brd->boardnum);
- if (ret)
- return ret;
/*
* Match this board to a config the user created for us.
*/
return -EINVAL;
}
- ret = dgap_tty_register(brd);
- if (ret)
- return ret;
-
- ret = dgap_finalize_board_init(brd);
- if (ret)
- return ret;
-
if (fw_info[card_type].bios_name) {
ret = request_firmware(&fw, fw_info[card_type].bios_name,
&pdev->dev);
release_firmware(fw);
}
#endif
- /*
- * Do tty device initialization.
- */
- ret = dgap_tty_init(brd);
- if (ret < 0) {
- dgap_tty_uninit(brd);
- return ret;
- }
-
- ret = dgap_tty_register_ports(brd);
- if (ret)
- return ret;
-
- brd->state = BOARD_READY;
- brd->dpastatus = BD_RUNNING;
return 0;
}
return 0;
}
+static void dgap_release_remap(struct board_t *brd)
+{
+ release_mem_region(brd->membase, 0x200000);
+ release_mem_region(brd->membase + PCI_IO_OFFSET, 0x200000);
+ iounmap(brd->re_map_membase);
+}
/*****************************************************************************
*
* Function:
return rc;
}
+static void dgap_tty_unregister(struct board_t *brd)
+{
+ tty_unregister_driver(brd->print_driver);
+ tty_unregister_driver(brd->serial_driver);
+ put_tty_driver(brd->print_driver);
+ put_tty_driver(brd->serial_driver);
+}
+
/*
* dgap_tty_init()
*
struct channel_t *ch;
struct bs_t __iomem *bs;
struct cm_t __iomem *cm;
+ int ret;
if (!brd)
return -EIO;
* when the driver was first loaded.
*/
for (i = 0; i < brd->nasync; i++) {
+ brd->channels[i] =
+ kzalloc(sizeof(struct channel_t), GFP_KERNEL);
if (!brd->channels[i]) {
- brd->channels[i] =
- kzalloc(sizeof(struct channel_t), GFP_KERNEL);
- if (!brd->channels[i])
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_chan;
}
}
/* Set up channel variables */
for (i = 0; i < brd->nasync; i++, ch = brd->channels[i], bs++) {
- if (!brd->channels[i])
- continue;
-
spin_lock_init(&ch->ch_lock);
/* Store all our magic numbers */
}
return 0;
+
+free_chan:
+ while (--i >= 0) {
+ kfree(brd->channels[i]);
+ brd->channels[i] = NULL;
+ }
+ return ret;
}
/*
- * dgap_tty_uninit()
+ * dgap_tty_free()
+ *
+ * Free the channles which are allocated in dgap_tty_init().
+ */
+static void dgap_tty_free(struct board_t *brd)
+{
+ int i;
+
+ for (i = 0; i < brd->nasync; i++)
+ kfree(brd->channels[i]);
+}
+/*
+ * dgap_cleanup_tty()
*
* Uninitialize the TTY portion of this driver. Free all memory and
* resources.
*/
-static void dgap_tty_uninit(struct board_t *brd)
+static void dgap_cleanup_tty(struct board_t *brd)
{
struct device *dev;
int i;
}
}
-static int dgap_after_config_loaded(int board)
+static int dgap_alloc_flipbuf(struct board_t *brd)
{
/*
* Initialize KME waitqueues...
*/
- init_waitqueue_head(&(dgap_board[board]->kme_wait));
+ init_waitqueue_head(&brd->kme_wait);
/*
* allocate flip buffer for board.
*/
- dgap_board[board]->flipbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
- if (!dgap_board[board]->flipbuf)
+ brd->flipbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
+ if (!brd->flipbuf)
return -ENOMEM;
- dgap_board[board]->flipflagbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
- if (!dgap_board[board]->flipflagbuf) {
- kfree(dgap_board[board]->flipbuf);
+ brd->flipflagbuf = kmalloc(MYFLIPLEN, GFP_KERNEL);
+ if (!brd->flipflagbuf) {
+ kfree(brd->flipbuf);
return -ENOMEM;
}
return 0;
}
+static void dgap_free_flipbuf(struct board_t *brd)
+{
+ kfree(brd->flipbuf);
+ kfree(brd->flipflagbuf);
+}
+
/*
* Create pr and tty device entries
*/
{
struct channel_t *ch;
int i;
+ int ret;
brd->serial_ports = kcalloc(brd->nasync, sizeof(*brd->serial_ports),
GFP_KERNEL);
brd->printer_ports = kcalloc(brd->nasync, sizeof(*brd->printer_ports),
GFP_KERNEL);
if (!brd->printer_ports) {
- kfree(brd->serial_ports);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_serial_ports;
}
for (i = 0; i < brd->nasync; i++) {
struct device *classp;
classp = tty_port_register_device(&brd->serial_ports[i],
- brd->serial_driver,
- brd->firstminor + i, NULL);
+ brd->serial_driver,
+ i, NULL);
+
+ if (IS_ERR(classp)) {
+ ret = PTR_ERR(classp);
+ goto unregister_ttys;
+ }
dgap_create_tty_sysfs(&ch->ch_tun, classp);
ch->ch_tun.un_sysfs = classp;
classp = tty_port_register_device(&brd->printer_ports[i],
- brd->print_driver,
- brd->firstminor + i, NULL);
+ brd->print_driver,
+ i, NULL);
+
+ if (IS_ERR(classp)) {
+ ret = PTR_ERR(classp);
+ goto unregister_ttys;
+ }
dgap_create_tty_sysfs(&ch->ch_pun, classp);
ch->ch_pun.un_sysfs = classp;
dgap_create_ports_sysfiles(brd);
return 0;
+
+unregister_ttys:
+ while (i >= 0) {
+ ch = brd->channels[i];
+ if (ch->ch_tun.un_sysfs) {
+ dgap_remove_tty_sysfs(ch->ch_tun.un_sysfs);
+ tty_unregister_device(brd->serial_driver, i);
+ }
+
+ if (ch->ch_pun.un_sysfs) {
+ dgap_remove_tty_sysfs(ch->ch_pun.un_sysfs);
+ tty_unregister_device(brd->print_driver, i);
+ }
+ i--;
+ }
+
+ for (i = 0; i < brd->nasync; i++) {
+ tty_port_destroy(&brd->serial_ports[i]);
+ tty_port_destroy(&brd->printer_ports[i]);
+ }
+
+ kfree(brd->printer_ports);
+ brd->printer_ports = NULL;
+
+free_serial_ports:
+ kfree(brd->serial_ports);
+ brd->serial_ports = NULL;
+
+ return ret;
}
/*
/*
* Parse a configuration file read into memory as a string.
*/
-static int dgap_parsefile(char **in, int remove)
+static int dgap_parsefile(char **in)
{
struct cnode *p, *brd, *line, *conc;
int rc;
struct board_t {
int magic; /* Board Magic number. */
int boardnum; /* Board number: 0-3 */
- int firstminor; /* First minor, e.g. 0, 30, 60 */
int type; /* Type of board */
char *name; /* Product Name */
}
-static int dgnc_finalize_board_init(struct dgnc_board *brd) {
+static int dgnc_finalize_board_init(struct dgnc_board *brd)
+{
int rc = 0;
DPR_INIT(("dgnc_finalize_board_init() - start\n"));
--- /dev/null
+config USB_EMXX
+ boolean "EMXX USB Function Device Controller"
+ depends on USB_GADGET && (ARCH_SHMOBILE || (ARM && COMPILE_TEST))
+ help
+ The Emma Mobile series of SoCs from Renesas Electronics and
+ former NEC Electronics include USB Function hardware.
+
+ Say "y" to link the driver statically, or "m" to build a
+ dynamically linked module called "emxx_udc" and force all
+ gadget drivers to also be dynamically linked.
--- /dev/null
+obj-$(CONFIG_USB_EMXX) := emxx_udc.o
--- /dev/null
+* add clock framework support (platform device with CCF needs special care)
+* break out board-specific VBUS GPIO to work with multiplatform
+* DT bindings
+* move driver into drivers/usb/gadget/
--- /dev/null
+/*
+ * drivers/usb/gadget/emxx_udc.c
+ * EMXX FCD (Function Controller Driver) for USB.
+ *
+ * Copyright (C) 2010 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/interrupt.h>
+#include <linux/proc_fs.h>
+#include <linux/clk.h>
+#include <linux/ctype.h>
+#include <linux/string.h>
+#include <linux/dma-mapping.h>
+#include <linux/workqueue.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include "emxx_udc.h"
+
+#define DRIVER_DESC "EMXX UDC driver"
+#define DMA_ADDR_INVALID (~(dma_addr_t)0)
+
+static const char driver_name[] = "emxx_udc";
+static const char driver_desc[] = DRIVER_DESC;
+
+/*===========================================================================*/
+/* Prototype */
+static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
+static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
+/*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
+static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
+static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
+static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
+
+static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
+static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
+
+/*===========================================================================*/
+/* Macro */
+#define _nbu2ss_zero_len_pkt(udc, epnum) \
+ _nbu2ss_ep_in_end(udc, epnum, 0, 0)
+
+
+/*===========================================================================*/
+/* Global */
+struct nbu2ss_udc udc_controller;
+
+
+/*-------------------------------------------------------------------------*/
+/* Read */
+static inline u32 _nbu2ss_readl(void *address)
+{
+ return __raw_readl(address) ;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Write */
+static inline void _nbu2ss_writel(void *address, u32 udata)
+{
+ __raw_writel(udata, address) ;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Set Bit */
+static inline void _nbu2ss_bitset(void *address, u32 udata)
+{
+ u32 reg_dt = __raw_readl(address) | (udata);
+ __raw_writel(reg_dt, address) ;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Clear Bit */
+static inline void _nbu2ss_bitclr(void *address, u32 udata)
+{
+ u32 reg_dt = __raw_readl(address) & ~(udata);
+ __raw_writel(reg_dt, address) ;
+}
+
+#ifdef UDC_DEBUG_DUMP
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
+{
+ int i;
+ u32 reg_data;
+
+ pr_info("=== %s()\n", __func__);
+
+ if (udc == NULL) {
+ ERR("%s udc == NULL\n", __func__);
+ return;
+ }
+
+ spin_unlock(&udc->lock);
+
+ printk(KERN_DEBUG "\n-USB REG-\n");
+ for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
+ reg_data = _nbu2ss_readl(
+ (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
+ printk(KERN_DEBUG "USB%04x =%08x", i, (int)reg_data);
+
+ reg_data = _nbu2ss_readl(
+ (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
+ printk(KERN_DEBUG " %08x", (int)reg_data);
+
+ reg_data = _nbu2ss_readl(
+ (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
+ printk(KERN_DEBUG " %08x", (int)reg_data);
+
+ reg_data = _nbu2ss_readl(
+ (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
+ printk(KERN_DEBUG " %08x\n", (int)reg_data);
+
+ }
+
+ spin_lock(&udc->lock);
+}
+#endif /* UDC_DEBUG_DUMP */
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint 0 Callback (Complete) */
+static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
+{
+ u8 recipient;
+ u16 selector;
+ u32 test_mode;
+ struct usb_ctrlrequest *p_ctrl;
+ struct nbu2ss_udc *udc;
+
+ if ((_ep == NULL) || (_req == NULL))
+ return;
+
+ udc = (struct nbu2ss_udc *)_req->context;
+ p_ctrl = &udc->ctrl;
+ if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
+
+ if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
+ /*-------------------------------------------------*/
+ /* SET_FEATURE */
+ recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
+ selector = p_ctrl->wValue;
+ if ((recipient == USB_RECIP_DEVICE) &&
+ (selector == USB_DEVICE_TEST_MODE)) {
+ test_mode = (u32)(p_ctrl->wIndex >> 8);
+ _nbu2ss_set_test_mode(udc, test_mode);
+ }
+ }
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+/* Initialization usb_request */
+static void _nbu2ss_create_ep0_packet(
+ struct nbu2ss_udc *udc,
+ void *p_buf,
+ unsigned length
+)
+{
+ udc->ep0_req.req.buf = p_buf;
+ udc->ep0_req.req.length = length;
+ udc->ep0_req.req.dma = 0;
+ udc->ep0_req.req.zero = TRUE;
+ udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
+ udc->ep0_req.req.status = -EINPROGRESS;
+ udc->ep0_req.req.context = udc;
+ udc->ep0_req.req.actual = 0;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Acquisition of the first address of RAM(FIFO) */
+static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
+{
+ u32 num, buf_type;
+ u32 data, last_ram_adr, use_ram_size;
+
+ PT_EP_REGS p_ep_regs;
+
+ last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
+ use_ram_size = 0;
+
+ for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
+ p_ep_regs = &udc->p_regs->EP_REGS[num];
+ data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
+ buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
+ if (buf_type == 0) {
+ /* Single Buffer */
+ use_ram_size += (data & EPn_MPKT) / sizeof(u32);
+ } else {
+ /* Double Buffer */
+ use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
+ }
+
+ if ((data >> 16) > last_ram_adr)
+ last_ram_adr = data>>16;
+ }
+
+ return last_ram_adr + use_ram_size;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Construction of Endpoint */
+static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ u32 num;
+ u32 data;
+ u32 begin_adrs;
+
+ if (ep->epnum == 0)
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ /*-------------------------------------------------------------*/
+ /* RAM Transfer Address */
+ begin_adrs = _nbu2ss_get_begin_ram_address(udc);
+ data = (begin_adrs << 16) | ep->ep.maxpacket;
+ _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
+
+ /*-------------------------------------------------------------*/
+ /* Interrupt Enable */
+ data = 1 << (ep->epnum + 8);
+ _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
+
+ /*-------------------------------------------------------------*/
+ /* Endpoint Type(Mode) */
+ /* Bulk, Interrupt, ISO */
+ switch (ep->ep_type) {
+ case USB_ENDPOINT_XFER_BULK:
+ data = EPn_BULK;
+ break;
+
+ case USB_ENDPOINT_XFER_INT:
+ data = EPn_BUF_SINGLE | EPn_INTERRUPT;
+ break;
+
+ case USB_ENDPOINT_XFER_ISOC:
+ data = EPn_ISO;
+ break;
+
+ default:
+ data = 0;
+ break;
+ }
+
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+ _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
+
+ if (ep->direct == USB_DIR_OUT) {
+ /*---------------------------------------------------------*/
+ /* OUT */
+ data = EPn_EN | EPn_BCLR | EPn_DIR0;
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = (EPn_ONAK | EPn_OSTL_EN | EPn_OSTL);
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = (EPn_OUT_EN | EPn_OUT_END_EN);
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
+ } else {
+ /*---------------------------------------------------------*/
+ /* IN */
+ data = (EPn_EN | EPn_BCLR | EPn_AUTO);
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = (EPn_ISTL);
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = (EPn_IN_EN | EPn_IN_END_EN);
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Release of Endpoint */
+static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ u32 num;
+ u32 data;
+
+ if ((ep->epnum == 0) || (udc->vbus_active == 0))
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ /*-------------------------------------------------------------*/
+ /* RAM Transfer Address */
+ _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
+
+ /*-------------------------------------------------------------*/
+ /* Interrupt Disable */
+ data = 1 << (ep->epnum + 8);
+ _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
+
+ if (ep->direct == USB_DIR_OUT) {
+ /*---------------------------------------------------------*/
+ /* OUT */
+ data = EPn_ONAK | EPn_BCLR;
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = EPn_EN | EPn_DIR0;
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = EPn_OUT_EN | EPn_OUT_END_EN;
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
+ } else {
+ /*---------------------------------------------------------*/
+ /* IN */
+ data = EPn_BCLR;
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = EPn_EN | EPn_AUTO;
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+
+ data = EPn_IN_EN | EPn_IN_END_EN;
+ _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+/* DMA setting (without Endpoint 0) */
+static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ u32 num;
+ u32 data;
+
+ data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
+ if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
+ return; /* Not Support DMA */
+
+ num = ep->epnum - 1;
+
+ if (ep->direct == USB_DIR_OUT) {
+ /*---------------------------------------------------------*/
+ /* OUT */
+ data = ep->ep.maxpacket;
+ _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
+
+ /*---------------------------------------------------------*/
+ /* Transfer Direct */
+ data = DCR1_EPn_DIR0;
+ _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
+
+ /*---------------------------------------------------------*/
+ /* DMA Mode etc. */
+ data = EPn_STOP_MODE | EPn_STOP_SET | EPn_DMAMODE0;
+ _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
+ } else {
+ /*---------------------------------------------------------*/
+ /* IN */
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
+
+ /*---------------------------------------------------------*/
+ /* DMA Mode etc. */
+ data = EPn_BURST_SET | EPn_DMAMODE0;
+ _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+/* DMA setting release */
+static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ u32 num;
+ u32 data;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (udc->vbus_active == 0)
+ return; /* VBUS OFF */
+
+ data = _nbu2ss_readl(&preg->USBSSCONF);
+ if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
+ return; /* Not Support DMA */
+
+ num = ep->epnum - 1;
+
+ _nbu2ss_ep_dma_abort(udc, ep);
+
+ if (ep->direct == USB_DIR_OUT) {
+ /*---------------------------------------------------------*/
+ /* OUT */
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
+ _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
+ } else {
+ /*---------------------------------------------------------*/
+ /* IN */
+ _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+/* Abort DMA */
+static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ PT_FC_REGS preg = udc->p_regs;
+
+ _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
+ mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
+ _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum-1].EP_DMA_CTRL, EPn_DMA_EN);
+}
+
+/*-------------------------------------------------------------------------*/
+/* Start IN Transfer */
+static void _nbu2ss_ep_in_end(
+ struct nbu2ss_udc *udc,
+ u32 epnum,
+ u32 data32,
+ u32 length
+)
+{
+ u32 data;
+ u32 num;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (length >= sizeof(u32))
+ return;
+
+ if (epnum == 0) {
+ _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
+
+ /* Writing of 1-4 bytes */
+ if (length)
+ _nbu2ss_writel(&preg->EP0_WRITE, data32);
+
+ data = ((length << 5) & EP0_DW) | EP0_DEND;
+ _nbu2ss_writel(&preg->EP0_CONTROL, data);
+
+ _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
+ } else {
+ num = epnum - 1;
+
+ _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
+
+ /* Writing of 1-4 bytes */
+ if (length)
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
+
+ data = (((((u32)length) << 5) & EPn_DW) | EPn_DEND);
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
+
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
+ }
+
+ return;
+}
+
+#ifdef USE_DMA
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_dma_map_single(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u8 direct
+)
+{
+ if (req->req.dma == DMA_ADDR_INVALID) {
+ if (req->unaligned)
+ req->req.dma = ep->phys_buf;
+ else {
+ req->req.dma = dma_map_single(
+ udc->gadget.dev.parent,
+ req->req.buf,
+ req->req.length,
+ (direct == USB_DIR_IN)
+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+ }
+ req->mapped = 1;
+ } else {
+ if (!req->unaligned)
+ dma_sync_single_for_device(
+ udc->gadget.dev.parent,
+ req->req.dma,
+ req->req.length,
+ (direct == USB_DIR_IN)
+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
+
+ req->mapped = 0;
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_dma_unmap_single(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u8 direct
+)
+{
+ u8 data[4];
+ u8 *p;
+ u32 count = 0;
+
+ if (direct == USB_DIR_OUT) {
+ count = req->req.actual % 4;
+ if (count) {
+ p = req->req.buf;
+ p += (req->req.actual - count);
+ memcpy(data, p, count);
+ }
+ }
+
+ if (req->mapped) {
+ if (req->unaligned) {
+ if (direct == USB_DIR_OUT)
+ memcpy(req->req.buf, ep->virt_buf,
+ req->req.actual & 0xfffffffc);
+ } else
+ dma_unmap_single(udc->gadget.dev.parent,
+ req->req.dma, req->req.length,
+ (direct == USB_DIR_IN)
+ ? DMA_TO_DEVICE
+ : DMA_FROM_DEVICE);
+ req->req.dma = DMA_ADDR_INVALID;
+ req->mapped = 0;
+ } else {
+ if (!req->unaligned)
+ dma_sync_single_for_cpu(udc->gadget.dev.parent,
+ req->req.dma, req->req.length,
+ (direct == USB_DIR_IN)
+ ? DMA_TO_DEVICE
+ : DMA_FROM_DEVICE);
+ }
+
+ if (count) {
+ p = req->req.buf;
+ p += (req->req.actual - count);
+ memcpy(p, data, count);
+ }
+}
+#endif
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint 0 OUT Transfer (PIO) */
+static int EP0_out_PIO(struct nbu2ss_udc *udc, u8* pBuf, u32 length)
+{
+ u32 i;
+ int nret = 0;
+ u32 iWordLength = 0;
+ USB_REG_ACCESS* pBuf32 = (USB_REG_ACCESS *)pBuf;
+
+ /*------------------------------------------------------------*/
+ /* Read Length */
+ iWordLength = length / sizeof(u32);
+
+ /*------------------------------------------------------------*/
+ /* PIO Read */
+ if (iWordLength) {
+ for (i = 0; i < iWordLength; i++) {
+ pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
+ pBuf32++;
+ }
+ nret = iWordLength * sizeof(u32);
+ }
+
+ return nret;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint 0 OUT Transfer (PIO, OverBytes) */
+static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8* pBuf, u32 length)
+{
+ u32 i;
+ u32 iReadSize = 0;
+ USB_REG_ACCESS Temp32;
+ USB_REG_ACCESS* pBuf32 = (USB_REG_ACCESS *)pBuf;
+
+ if ((0 < length) && (length < sizeof(u32))) {
+ Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
+ for (i = 0 ; i < length ; i++)
+ pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
+ iReadSize += length;
+ }
+
+ return iReadSize;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint 0 IN Transfer (PIO) */
+static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
+{
+ u32 i;
+ u32 iMaxLength = EP0_PACKETSIZE;
+ u32 iWordLength = 0;
+ u32 iWriteLength = 0;
+ USB_REG_ACCESS* pBuf32 = (USB_REG_ACCESS *)pBuf;
+
+ /*------------------------------------------------------------*/
+ /* Transfer Length */
+ if (iMaxLength < length)
+ iWordLength = iMaxLength / sizeof(u32);
+ else
+ iWordLength = length / sizeof(u32);
+
+ /*------------------------------------------------------------*/
+ /* PIO */
+ for (i = 0; i < iWordLength; i++) {
+ _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
+ pBuf32++;
+ iWriteLength += sizeof(u32);
+ }
+
+ return iWriteLength;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint 0 IN Transfer (PIO, OverBytes) */
+static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
+{
+ u32 i;
+ USB_REG_ACCESS Temp32;
+ USB_REG_ACCESS* pBuf32 = (USB_REG_ACCESS *)pBuf;
+
+ if ((0 < iRemainSize) && (iRemainSize < sizeof(u32))) {
+ for (i = 0 ; i < iRemainSize ; i++)
+ Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
+ _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
+
+ return iRemainSize;
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Transfer NULL Packet (Epndoint 0) */
+static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
+{
+ u32 data;
+
+ data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
+ data &= ~(u32)EP0_INAK;
+
+ if (pid_flag)
+ data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
+ else
+ data |= (EP0_INAK_EN | EP0_DEND);
+
+ _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Receive NULL Packet (Endpoint 0) */
+static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
+{
+ u32 data;
+
+ data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
+ data &= ~(u32)EP0_ONAK;
+
+ if (pid_flag)
+ data |= EP0_PIDCLR;
+
+ _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_ep0_in_transfer(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req
+)
+{
+ u8 *pBuffer; /* IN Data Buffer */
+ u32 data;
+ u32 iRemainSize = 0;
+ int result = 0;
+
+ /*-------------------------------------------------------------*/
+ /* End confirmation */
+ if (req->req.actual == req->req.length) {
+ if ((req->req.actual % EP0_PACKETSIZE) == 0) {
+ if (req->zero) {
+ req->zero = 0;
+ EP0_send_NULL(udc, FALSE);
+ return 1;
+ }
+ }
+
+ return 0; /* Transfer End */
+ }
+
+ /*-------------------------------------------------------------*/
+ /* NAK release */
+ data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
+ data |= EP0_INAK_EN;
+ data &= ~(u32)EP0_INAK;
+ _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
+
+ iRemainSize = req->req.length - req->req.actual;
+ pBuffer = (u8 *)req->req.buf;
+ pBuffer += req->req.actual;
+
+ /*-------------------------------------------------------------*/
+ /* Data transfer */
+ result = EP0_in_PIO(udc, pBuffer, iRemainSize);
+
+ req->div_len = result;
+ iRemainSize -= result;
+
+ if (iRemainSize == 0) {
+ EP0_send_NULL(udc, FALSE);
+ return result;
+ }
+
+ if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
+ pBuffer += result;
+ result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
+ req->div_len = result;
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_ep0_out_transfer(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req
+)
+{
+ u8 *pBuffer;
+ u32 iRemainSize;
+ u32 iRecvLength;
+ int result = 0;
+ int fRcvZero;
+
+ /*-------------------------------------------------------------*/
+ /* Receive data confirmation */
+ iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
+ if (iRecvLength != 0) {
+
+ fRcvZero = 0;
+
+ iRemainSize = req->req.length - req->req.actual;
+ pBuffer = (u8 *)req->req.buf;
+ pBuffer += req->req.actual;
+
+ result = EP0_out_PIO(udc, pBuffer
+ , min(iRemainSize, iRecvLength));
+ if (result < 0)
+ return result;
+
+ req->req.actual += result;
+ iRecvLength -= result;
+
+ if ((0 < iRecvLength) && (iRecvLength < sizeof(u32))) {
+ pBuffer += result;
+ iRemainSize -= result;
+
+ result = EP0_out_OverBytes(udc, pBuffer
+ , min(iRemainSize, iRecvLength));
+ req->req.actual += result;
+ }
+ } else {
+ fRcvZero = 1;
+ }
+
+ /*-------------------------------------------------------------*/
+ /* End confirmation */
+ if (req->req.actual == req->req.length) {
+ if ((req->req.actual % EP0_PACKETSIZE) == 0) {
+ if (req->zero) {
+ req->zero = 0;
+ EP0_receive_NULL(udc, FALSE);
+ return 1;
+ }
+ }
+
+ return 0; /* Transfer End */
+ }
+
+ if ((req->req.actual % EP0_PACKETSIZE) != 0)
+ return 0; /* Short Packet Transfer End */
+
+ if (req->req.actual > req->req.length) {
+ ERR(" *** Overrun Error\n");
+ return -EOVERFLOW;
+ }
+
+ if (fRcvZero != 0) {
+ iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
+ if (iRemainSize & EP0_ONAK) {
+ /*---------------------------------------------------*/
+ /* NACK release */
+ _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
+ }
+ result = 1;
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_out_dma(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_req *req,
+ u32 num,
+ u32 length
+)
+{
+ u8 *pBuffer;
+ u32 mpkt;
+ u32 lmpkt;
+ u32 dmacnt;
+ u32 burst = 1;
+ u32 data;
+ int result = -EINVAL;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (req->dma_flag)
+ return 1; /* DMA is forwarded */
+
+ req->dma_flag = TRUE;
+ pBuffer = (u8 *)req->req.dma;
+ pBuffer += req->req.actual;
+
+ /* DMA Address */
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
+
+ /* Number of transfer packets */
+ mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
+ dmacnt = (length / mpkt);
+ lmpkt = (length % mpkt) & ~(u32)0x03;
+
+ if (DMA_MAX_COUNT < dmacnt) {
+ dmacnt = DMA_MAX_COUNT;
+ lmpkt = 0;
+ } else if (0 != lmpkt) {
+ if (0 == dmacnt)
+ burst = 0; /* Burst OFF */
+ dmacnt++;
+ }
+
+ data = mpkt | (lmpkt << 16);
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
+
+ data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
+
+ if (0 == burst) {
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
+ _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
+ } else {
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
+ , (dmacnt << 16));
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
+ }
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
+
+ result = length & ~(u32)0x03;
+ req->div_len = result;
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_out_pio(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u32 length
+)
+{
+ u8 *pBuffer;
+ u32 i;
+ u32 data;
+ u32 iWordLength;
+ USB_REG_ACCESS Temp32;
+ USB_REG_ACCESS *pBuf32;
+ int result = 0;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (req->dma_flag)
+ return 1; /* DMA is forwarded */
+
+ if (length == 0)
+ return 0;
+
+ pBuffer = (u8 *)req->req.buf;
+ pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+
+ iWordLength = length / sizeof(u32);
+ if (iWordLength > 0) {
+ /*---------------------------------------------------------*/
+ /* Copy of every four bytes */
+ for (i = 0; i < iWordLength; i++) {
+ pBuf32->dw =
+ _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
+ pBuf32++;
+ }
+ result = iWordLength * sizeof(u32);
+ }
+
+ data = length - result;
+ if (data > 0) {
+ /*---------------------------------------------------------*/
+ /* Copy of fraction byte */
+ Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
+ for (i = 0 ; i < data ; i++)
+ pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
+ result += data;
+ }
+
+ req->req.actual += result;
+
+ if ((req->req.actual == req->req.length)
+ || ((req->req.actual % ep->ep.maxpacket) != 0)) {
+
+ result = 0;
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_out_data(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u32 data_size
+)
+{
+ u32 num;
+ u32 iBufSize;
+ int nret = 1;
+
+ if (ep->epnum == 0)
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ iBufSize = min((req->req.length - req->req.actual), data_size);
+
+ if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
+ && (req->req.dma != 0)
+ && (iBufSize >= sizeof(u32))) {
+ nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
+ } else {
+ iBufSize = min(iBufSize, (u32)ep->ep.maxpacket);
+ nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
+ }
+
+ return nret;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_out_transfer(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req
+)
+{
+ u32 num;
+ u32 iRecvLength;
+ int result = 1;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (ep->epnum == 0)
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ /*-------------------------------------------------------------*/
+ /* Receive Length */
+ iRecvLength
+ = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
+
+ if (iRecvLength != 0) {
+ result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
+ if (iRecvLength < ep->ep.maxpacket) {
+ if (iRecvLength == result) {
+ req->req.actual += result;
+ result = 0;
+ }
+ }
+ } else {
+ if ((req->req.actual == req->req.length)
+ || ((req->req.actual % ep->ep.maxpacket) != 0)) {
+
+ result = 0;
+ }
+ }
+
+ if (result == 0) {
+ if ((req->req.actual % ep->ep.maxpacket) == 0) {
+ if (req->zero) {
+ req->zero = 0;
+ return 1;
+ }
+ }
+ }
+
+ if (req->req.actual > req->req.length) {
+ ERR(" *** Overrun Error\n");
+ ERR(" *** actual = %d, length = %d\n",
+ req->req.actual, req->req.length);
+ result = -EOVERFLOW;
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_in_dma(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u32 num,
+ u32 length
+)
+{
+ u8 *pBuffer;
+ u32 mpkt; /* MaxPacketSize */
+ u32 lmpkt; /* Last Packet Data Size */
+ u32 dmacnt; /* IN Data Size */
+ u32 iWriteLength;
+ u32 data;
+ int result = -EINVAL;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (req->dma_flag)
+ return 1; /* DMA is forwarded */
+
+#ifdef USE_DMA
+ if (req->req.actual == 0)
+ _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
+#endif
+ req->dma_flag = TRUE;
+
+ /* MAX Packet Size */
+ mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
+
+ if ((DMA_MAX_COUNT * mpkt) < length)
+ iWriteLength = DMA_MAX_COUNT * mpkt;
+ else
+ iWriteLength = length;
+
+ /*------------------------------------------------------------*/
+ /* Number of transmission packets */
+ if (mpkt < iWriteLength) {
+ dmacnt = iWriteLength / mpkt;
+ lmpkt = (iWriteLength % mpkt) & ~(u32)0x3;
+ if (lmpkt != 0)
+ dmacnt++;
+ else
+ lmpkt = mpkt & ~(u32)0x3;
+
+ } else {
+ dmacnt = 1;
+ lmpkt = iWriteLength & ~(u32)0x3;
+ }
+
+ /* Packet setting */
+ data = mpkt | (lmpkt << 16);
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
+
+ /* Address setting */
+ pBuffer = (u8 *)req->req.dma;
+ pBuffer += req->req.actual;
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
+
+ /* Packet and DMA setting */
+ data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
+ _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
+
+ /* Packet setting of EPC */
+ data = dmacnt << 16;
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
+
+ /*DMA setting of EPC */
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
+
+ result = iWriteLength & ~(u32)0x3;
+ req->div_len = result;
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_in_pio(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u32 length
+)
+{
+ u8 *pBuffer;
+ u32 i;
+ u32 data;
+ u32 iWordLength;
+ USB_REG_ACCESS Temp32;
+ USB_REG_ACCESS *pBuf32 = NULL;
+ int result = 0;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (req->dma_flag)
+ return 1; /* DMA is forwarded */
+
+ if (length > 0) {
+ pBuffer = (u8 *)req->req.buf;
+ pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+
+ iWordLength = length / sizeof(u32);
+ if (iWordLength > 0) {
+ for (i = 0; i < iWordLength; i++) {
+ _nbu2ss_writel(
+ &preg->EP_REGS[ep->epnum-1].EP_WRITE
+ , pBuf32->dw
+ );
+
+ pBuf32++;
+ }
+ result = iWordLength * sizeof(u32);
+ }
+ }
+
+ if (result != ep->ep.maxpacket) {
+ data = length - result;
+ Temp32.dw = 0;
+ for (i = 0 ; i < data ; i++)
+ Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
+
+ _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
+ result += data;
+ }
+
+ req->div_len = result;
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_in_data(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ u32 data_size
+)
+{
+ u32 num;
+ int nret = 1;
+
+ if (ep->epnum == 0)
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
+ && (req->req.dma != 0)
+ && (data_size >= sizeof(u32))) {
+ nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
+ } else {
+ data_size = min(data_size, (u32)ep->ep.maxpacket);
+ nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
+ }
+
+ return nret;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_epn_in_transfer(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req
+)
+{
+ u32 num;
+ u32 iBufSize;
+ int result = 0;
+ u32 status;
+
+ if (ep->epnum == 0)
+ return -EINVAL;
+
+ num = ep->epnum - 1;
+
+ status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
+
+ /*-------------------------------------------------------------*/
+ /* State confirmation of FIFO */
+ if (req->req.actual == 0) {
+ if ((status & EPn_IN_EMPTY) == 0)
+ return 1; /* Not Empty */
+
+ } else {
+ if ((status & EPn_IN_FULL) != 0)
+ return 1; /* Not Empty */
+ }
+
+ /*-------------------------------------------------------------*/
+ /* Start tranfer */
+ iBufSize = req->req.length - req->req.actual;
+ if (iBufSize > 0)
+ result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
+ else if (req->req.length == 0)
+ _nbu2ss_zero_len_pkt(udc, ep->epnum);
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_start_transfer(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ bool bflag)
+{
+ int nret = -EINVAL;
+
+ req->dma_flag = FALSE;
+ req->div_len = 0;
+
+ if (req->req.length == 0)
+ req->zero = 0;
+ else {
+ if ((req->req.length % ep->ep.maxpacket) == 0)
+ req->zero = req->req.zero;
+ else
+ req->zero = 0;
+ }
+
+ if (ep->epnum == 0) {
+ /* EP0 */
+ switch (udc->ep0state) {
+ case EP0_IN_DATA_PHASE:
+ nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
+ break;
+
+ case EP0_OUT_DATA_PHASE:
+ nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
+ break;
+
+ case EP0_IN_STATUS_PHASE:
+ nret = EP0_send_NULL(udc, TRUE);
+ break;
+
+ default:
+ break;
+ }
+
+ } else {
+ /* EPn */
+ if (ep->direct == USB_DIR_OUT) {
+ /* OUT */
+ if (bflag == FALSE)
+ nret = _nbu2ss_epn_out_transfer(udc, ep, req);
+ } else {
+ /* IN */
+ nret = _nbu2ss_epn_in_transfer(udc, ep, req);
+ }
+ }
+
+ return nret;
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
+{
+ u32 length;
+ bool bflag = FALSE;
+ struct nbu2ss_req *req;
+
+ if (list_empty(&ep->queue))
+ req = NULL;
+ else
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+
+ if (req == NULL)
+ return;
+
+ if (ep->epnum > 0) {
+ length = _nbu2ss_readl(
+ &ep->udc->p_regs->EP_REGS[ep->epnum-1].EP_LEN_DCNT);
+
+ length &= EPn_LDATA;
+ if (length < ep->ep.maxpacket)
+ bflag = TRUE;
+ }
+
+ _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
+}
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint Toggle Reset */
+static void _nbu2ss_endpoint_toggle_reset(
+ struct nbu2ss_udc *udc,
+ u8 ep_adrs)
+{
+ u8 num;
+ u32 data;
+
+ if ((ep_adrs == 0) || (ep_adrs == 0x80))
+ return;
+
+ num = (ep_adrs & 0x7F) - 1;
+
+ if (ep_adrs & USB_DIR_IN)
+ data = EPn_IPIDCLR;
+ else
+ data = EPn_BCLR | EPn_OPIDCLR;
+
+ _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
+}
+
+/*-------------------------------------------------------------------------*/
+/* Endpoint STALL set */
+static void _nbu2ss_set_endpoint_stall(
+ struct nbu2ss_udc *udc,
+ u8 ep_adrs,
+ bool bstall)
+{
+ u8 num, epnum;
+ u32 data;
+ struct nbu2ss_ep *ep;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
+ if (bstall) {
+ /* Set STALL */
+ _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
+ } else {
+ /* Clear STALL */
+ _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
+ }
+ } else {
+ epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
+ num = epnum - 1;
+ ep = &udc->ep[epnum];
+
+ if (bstall) {
+ /* Set STALL */
+ ep->halted = TRUE;
+
+ if (ep_adrs & USB_DIR_IN)
+ data = EPn_BCLR | EPn_ISTL;
+ else
+ data = EPn_OSTL_EN | EPn_OSTL;
+
+ _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
+ } else {
+ /* Clear STALL */
+ ep->stalled = FALSE;
+ if (ep_adrs & USB_DIR_IN) {
+ _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
+ , EPn_ISTL);
+ } else {
+ data =
+ _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
+
+ data &= ~EPn_OSTL;
+ data |= EPn_OSTL_EN;
+
+ _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
+ , data);
+ }
+
+ ep->stalled = FALSE;
+ if (ep->halted) {
+ ep->halted = FALSE;
+ _nbu2ss_restert_transfer(ep);
+ }
+ }
+ }
+
+ return;
+}
+
+
+/*-------------------------------------------------------------------------*/
+/* Device Descriptor */
+static struct usb_device_descriptor device_desc = {
+ .bLength = sizeof(device_desc),
+ .bDescriptorType = USB_DT_DEVICE,
+ .bcdUSB = __constant_cpu_to_le16(0x0200),
+ .bDeviceClass = USB_CLASS_VENDOR_SPEC,
+ .bDeviceSubClass = 0x00,
+ .bDeviceProtocol = 0x00,
+ .bMaxPacketSize0 = 64,
+ .idVendor = __constant_cpu_to_le16 (0x0409),
+ .idProduct = __constant_cpu_to_le16 (0xfff0),
+ .bcdDevice = 0xffff,
+ .iManufacturer = 0x00,
+ .iProduct = 0x00,
+ .iSerialNumber = 0x00,
+ .bNumConfigurations = 0x01,
+};
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
+{
+ u32 data;
+
+ if (mode > MAX_TEST_MODE_NUM)
+ return;
+
+ pr_info("SET FEATURE : test mode = %d\n", mode);
+
+ data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
+ data &= ~TEST_FORCE_ENABLE;
+ data |= mode << TEST_MODE_SHIFT;
+
+ _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
+ _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_set_feature_device(
+ struct nbu2ss_udc *udc,
+ u16 selector,
+ u16 wIndex
+)
+{
+ int result = -EOPNOTSUPP;
+
+ switch (selector) {
+ case USB_DEVICE_REMOTE_WAKEUP:
+ if (0x0000 == wIndex) {
+ udc->remote_wakeup = U2F_ENABLE;
+ result = 0;
+ }
+ break;
+
+ case USB_DEVICE_TEST_MODE:
+ wIndex = wIndex >> 8;
+ if (wIndex <= MAX_TEST_MODE_NUM)
+ result = 0;
+ break;
+
+ default:
+ break;
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
+{
+ u8 epnum;
+ u32 data = 0, bit_data;
+ PT_FC_REGS preg = udc->p_regs;
+
+ epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
+ if (epnum == 0) {
+ data = _nbu2ss_readl(&preg->EP0_CONTROL);
+ bit_data = EP0_STL;
+
+ } else {
+ data = _nbu2ss_readl(&preg->EP_REGS[epnum-1].EP_CONTROL);
+ if ((data & EPn_EN) == 0)
+ return -1;
+
+ if (ep_adrs & USB_ENDPOINT_DIR_MASK)
+ bit_data = EPn_ISTL;
+ else
+ bit_data = EPn_OSTL;
+ }
+
+ if ((data & bit_data) == 0)
+ return 0;
+ else
+ return 1;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
+{
+ u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
+ u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
+ u16 selector = udc->ctrl.wValue;
+ u16 wIndex = udc->ctrl.wIndex;
+ u8 ep_adrs;
+ int result = -EOPNOTSUPP;
+
+ if ((0x0000 != udc->ctrl.wLength) ||
+ (USB_DIR_OUT != direction)) {
+ return -EINVAL;
+ }
+
+ switch (recipient) {
+ case USB_RECIP_DEVICE:
+ if (bset)
+ result =
+ _nbu2ss_set_feature_device(udc, selector, wIndex);
+ break;
+
+ case USB_RECIP_ENDPOINT:
+ if (0x0000 == (wIndex & 0xFF70)) {
+ if (USB_ENDPOINT_HALT == selector) {
+ ep_adrs = wIndex & 0xFF;
+ if (bset == FALSE) {
+ _nbu2ss_endpoint_toggle_reset(
+ udc, ep_adrs);
+ }
+
+ _nbu2ss_set_endpoint_stall(
+ udc, ep_adrs, bset);
+
+ result = 0;
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ if (result >= 0)
+ _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
+{
+ u32 data;
+ enum usb_device_speed speed = USB_SPEED_FULL;
+
+ data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
+ if (data & HIGH_SPEED)
+ speed = USB_SPEED_HIGH;
+
+ return speed;
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_epn_set_stall(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep
+)
+{
+ u8 ep_adrs;
+ u32 regdata;
+ int limit_cnt = 0;
+
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (ep->direct == USB_DIR_IN) {
+ for (limit_cnt = 0
+ ; limit_cnt < IN_DATA_EMPTY_COUNT
+ ; limit_cnt++) {
+
+ regdata = _nbu2ss_readl(
+ &preg->EP_REGS[ep->epnum-1].EP_STATUS);
+
+ if ((regdata & EPn_IN_DATA) == 0)
+ break;
+
+ mdelay(1);
+ }
+ }
+
+ ep_adrs = ep->epnum | ep->direct;
+ _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
+}
+
+/*-------------------------------------------------------------------------*/
+static int std_req_get_status(struct nbu2ss_udc *udc)
+{
+ u32 length;
+ u16 status_data = 0;
+ u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
+ u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
+ u8 ep_adrs;
+ int result = -EINVAL;
+
+ if ((0x0000 != udc->ctrl.wValue)
+ || (USB_DIR_IN != direction)) {
+
+ return result;
+ }
+
+ length = min(udc->ctrl.wLength, (u16)sizeof(status_data));
+
+ switch (recipient) {
+ case USB_RECIP_DEVICE:
+ if (udc->ctrl.wIndex == 0x0000) {
+ if (udc->self_powered)
+ status_data |= (1 << USB_DEVICE_SELF_POWERED);
+
+ if (udc->remote_wakeup)
+ status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
+
+ result = 0;
+ }
+ break;
+
+ case USB_RECIP_ENDPOINT:
+ if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
+ ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
+ result = _nbu2ss_get_ep_stall(udc, ep_adrs);
+
+ if (result > 0)
+ status_data |= (1 << USB_ENDPOINT_HALT);
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ if (result >= 0) {
+ memcpy(udc->ep0_buf, &status_data, length);
+ _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
+ _nbu2ss_ep0_in_transfer(udc, &udc->ep[0], &udc->ep0_req);
+
+ } else {
+ ERR("*** Error GET_STATUS\n");
+ }
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int std_req_clear_feature(struct nbu2ss_udc *udc)
+{
+ return _nbu2ss_req_feature(udc, FALSE);
+}
+
+/*-------------------------------------------------------------------------*/
+static int std_req_set_feature(struct nbu2ss_udc *udc)
+{
+ return _nbu2ss_req_feature(udc, TRUE);
+}
+
+/*-------------------------------------------------------------------------*/
+static int std_req_set_address(struct nbu2ss_udc *udc)
+{
+ int result = 0;
+ u32 wValue = udc->ctrl.wValue;
+
+ if ((0x00 != udc->ctrl.bRequestType) ||
+ (0x0000 != udc->ctrl.wIndex) ||
+ (0x0000 != udc->ctrl.wLength)) {
+ return -EINVAL;
+ }
+
+ if (wValue != (wValue & 0x007F))
+ return -EINVAL;
+
+ wValue = wValue << USB_ADRS_SHIFT;
+
+ _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
+ _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
+
+ return result;
+}
+
+/*-------------------------------------------------------------------------*/
+static int std_req_set_configuration(struct nbu2ss_udc *udc)
+{
+ u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
+
+ if ((0x0000 != udc->ctrl.wIndex) ||
+ (0x0000 != udc->ctrl.wLength) ||
+ (0x00 != udc->ctrl.bRequestType)) {
+ return -EINVAL;
+ }
+
+ udc->curr_config = ConfigValue;
+
+ if (ConfigValue > 0) {
+ _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
+ udc->devstate = USB_STATE_CONFIGURED;
+
+ } else {
+ _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
+ udc->devstate = USB_STATE_ADDRESS;
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
+{
+ if ((udc == NULL) && (pdata == NULL))
+ return;
+
+ *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
+ pdata++;
+ *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
+}
+
+/*-------------------------------------------------------------------------*/
+static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
+{
+ bool bcall_back = TRUE;
+ int nret = -EINVAL;
+ struct usb_ctrlrequest *p_ctrl;
+
+ p_ctrl = &udc->ctrl;
+ _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
+
+ /* ep0 state control */
+ if (p_ctrl->wLength == 0) {
+ udc->ep0state = EP0_IN_STATUS_PHASE;
+
+ } else {
+ if (p_ctrl->bRequestType & USB_DIR_IN)
+ udc->ep0state = EP0_IN_DATA_PHASE;
+ else
+ udc->ep0state = EP0_OUT_DATA_PHASE;
+ }
+
+ if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
+ switch (p_ctrl->bRequest) {
+ case USB_REQ_GET_STATUS:
+ nret = std_req_get_status(udc);
+ bcall_back = FALSE;
+ break;
+
+ case USB_REQ_CLEAR_FEATURE:
+ nret = std_req_clear_feature(udc);
+ bcall_back = FALSE;
+ break;
+
+ case USB_REQ_SET_FEATURE:
+ nret = std_req_set_feature(udc);
+ bcall_back = FALSE;
+ break;
+
+ case USB_REQ_SET_ADDRESS:
+ nret = std_req_set_address(udc);
+ bcall_back = FALSE;
+ break;
+
+ case USB_REQ_SET_CONFIGURATION:
+ nret = std_req_set_configuration(udc);
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ if (bcall_back == FALSE) {
+ if (udc->ep0state == EP0_IN_STATUS_PHASE) {
+ if (nret >= 0) {
+ /*--------------------------------------*/
+ /* Status Stage */
+ nret = EP0_send_NULL(udc, TRUE);
+ }
+ }
+
+ } else {
+ spin_unlock(&udc->lock);
+ nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
+ spin_lock(&udc->lock);
+ }
+
+ if (nret < 0)
+ udc->ep0state = EP0_IDLE;
+
+ return nret;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
+{
+ int nret;
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep = &udc->ep[0];
+
+ if (list_empty(&ep->queue))
+ req = NULL;
+ else
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+
+ if (req == NULL)
+ req = &udc->ep0_req;
+
+ req->req.actual += req->div_len;
+ req->div_len = 0;
+
+ nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
+ if (nret == 0) {
+ udc->ep0state = EP0_OUT_STATUS_PAHSE;
+ EP0_receive_NULL(udc, TRUE);
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
+{
+ int nret;
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep = &udc->ep[0];
+
+ if (list_empty(&ep->queue))
+ req = NULL;
+ else
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+
+ if (req == NULL)
+ req = &udc->ep0_req;
+
+ nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
+ if (nret == 0) {
+ udc->ep0state = EP0_IN_STATUS_PHASE;
+ EP0_send_NULL(udc, TRUE);
+
+ } else if (nret < 0) {
+ _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
+ req->req.status = nret;
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
+{
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep = &udc->ep[0];
+
+ if (list_empty(&ep->queue))
+ req = NULL;
+ else
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+
+ if (req == NULL) {
+ req = &udc->ep0_req;
+ if (req->req.complete)
+ req->req.complete(&ep->ep, &req->req);
+
+ } else {
+ if (req->req.complete)
+ _nbu2ss_ep_done(ep, req, 0);
+ }
+
+ udc->ep0state = EP0_IDLE;
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
+{
+ int i;
+ u32 status;
+ u32 intr;
+ int nret = -1;
+
+ status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
+ intr = status & EP0_STATUS_RW_BIT;
+ _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
+
+ status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
+ | STG_END_INT | EP0_OUT_NULL_INT);
+
+ if (status == 0) {
+ pr_info("--- %s Not Decode Interrupt\n", __func__);
+ pr_info("--- EP0_STATUS = 0x%08x\n", intr);
+ return;
+ }
+
+ if (udc->gadget.speed == USB_SPEED_UNKNOWN)
+ udc->gadget.speed = _nbu2ss_get_speed(udc);
+
+ for (i = 0; i < EP0_END_XFER; i++) {
+ switch (udc->ep0state) {
+ case EP0_IDLE:
+ if (status & SETUP_INT) {
+ status = 0;
+ nret = _nbu2ss_decode_request(udc);
+ }
+ break;
+
+ case EP0_IN_DATA_PHASE:
+ if (status & EP0_IN_INT) {
+ status &= ~EP0_IN_INT;
+ nret = _nbu2ss_ep0_in_data_stage(udc);
+ }
+ break;
+
+ case EP0_OUT_DATA_PHASE:
+ if (status & EP0_OUT_INT) {
+ status &= ~EP0_OUT_INT;
+ nret = _nbu2ss_ep0_out_data_stage(udc);
+ }
+ break;
+
+ case EP0_IN_STATUS_PHASE:
+ if ((status & STG_END_INT) || (status & SETUP_INT)) {
+ status &= ~(STG_END_INT | EP0_IN_INT);
+ nret = _nbu2ss_ep0_status_stage(udc);
+ }
+ break;
+
+ case EP0_OUT_STATUS_PAHSE:
+ if ((status & STG_END_INT)
+ || (status & SETUP_INT)
+ || (status & EP0_OUT_NULL_INT)) {
+ status &= ~(STG_END_INT
+ | EP0_OUT_INT
+ | EP0_OUT_NULL_INT);
+
+ nret = _nbu2ss_ep0_status_stage(udc);
+ }
+
+ break;
+
+ default:
+ status = 0;
+ break;
+ }
+
+ if (status == 0)
+ break;
+ }
+
+ if (nret < 0) {
+ /* Send Stall */
+ _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_ep_done(
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req,
+ int status)
+{
+ struct nbu2ss_udc *udc = ep->udc;
+
+ list_del_init(&req->queue);
+
+ if (status == -ECONNRESET)
+ _nbu2ss_fifo_flush(udc, ep);
+
+ if (likely(req->req.status == -EINPROGRESS))
+ req->req.status = status;
+
+ if (ep->stalled)
+ _nbu2ss_epn_set_stall(udc, ep);
+ else {
+ if (!list_empty(&ep->queue))
+ _nbu2ss_restert_transfer(ep);
+ }
+
+#ifdef USE_DMA
+ if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
+ (req->req.dma != 0))
+ _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
+#endif
+
+ spin_unlock(&udc->lock);
+ req->req.complete(&ep->ep, &req->req);
+ spin_lock(&udc->lock);
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_epn_in_int(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req)
+{
+ int result = 0;
+ u32 status;
+
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (req->dma_flag)
+ return; /* DMA is forwarded */
+
+ req->req.actual += req->div_len;
+ req->div_len = 0;
+
+ if (req->req.actual != req->req.length) {
+ /*---------------------------------------------------------*/
+ /* remainder of data */
+ result = _nbu2ss_epn_in_transfer(udc, ep, req);
+
+ } else {
+ if ((req->zero != 0)
+ && ((req->req.actual % ep->ep.maxpacket) == 0)) {
+
+ status =
+ _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_STATUS);
+
+ if ((status & EPn_IN_FULL) == 0) {
+ /*-----------------------------------------*/
+ /* 0 Length Packet */
+ req->zero = 0;
+ _nbu2ss_zero_len_pkt(udc, ep->epnum);
+ }
+ return;
+ }
+ }
+
+ if (result <= 0) {
+ /*---------------------------------------------------------*/
+ /* Complete */
+ _nbu2ss_ep_done(ep, req, result);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_epn_out_int(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req)
+{
+ int result;
+
+ result = _nbu2ss_epn_out_transfer(udc, ep, req);
+ if (result <= 0)
+ _nbu2ss_ep_done(ep, req, result);
+
+ return;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_epn_in_dma_int(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req)
+{
+ u32 mpkt;
+ u32 size;
+ struct usb_request *preq;
+
+ preq = &req->req;
+
+ if (req->dma_flag == FALSE)
+ return;
+
+ preq->actual += req->div_len;
+ req->div_len = 0;
+ req->dma_flag = FALSE;
+
+#ifdef USE_DMA
+ _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
+#endif
+
+ if (preq->actual != preq->length) {
+ _nbu2ss_epn_in_transfer(udc, ep, req);
+ } else {
+ mpkt = ep->ep.maxpacket;
+ size = preq->actual % mpkt;
+ if (size > 0) {
+ if (((preq->actual & 0x03) == 0) && (size < mpkt))
+ _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
+ } else {
+ _nbu2ss_epn_in_int(udc, ep, req);
+ }
+ }
+
+ return;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_epn_out_dma_int(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ struct nbu2ss_req *req)
+{
+ int i;
+ u32 num;
+ u32 dmacnt, ep_dmacnt;
+ u32 mpkt;
+ PT_FC_REGS preg = udc->p_regs;
+
+ num = ep->epnum - 1;
+
+ if (req->req.actual == req->req.length) {
+ if ((req->req.length % ep->ep.maxpacket)
+ && (req->zero == 0)) {
+ req->div_len = 0;
+ req->dma_flag = FALSE;
+ _nbu2ss_ep_done(ep, req, 0);
+ return;
+ }
+ }
+
+ ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
+ & EPn_DMACNT;
+ ep_dmacnt >>= 16;
+
+ for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
+ dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
+ & DCR1_EPn_DMACNT;
+ dmacnt >>= 16;
+ if (ep_dmacnt == dmacnt)
+ break;
+ }
+
+ _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
+
+ if (dmacnt != 0) {
+ mpkt = ep->ep.maxpacket;
+ if ((req->div_len % mpkt) == 0)
+ req->div_len -= mpkt * dmacnt;
+ }
+
+ if ((req->req.actual % ep->ep.maxpacket) > 0) {
+ if (req->req.actual == req->div_len) {
+ req->div_len = 0;
+ req->dma_flag = FALSE;
+ _nbu2ss_ep_done(ep, req, 0);
+ return;
+ }
+ }
+
+ req->req.actual += req->div_len;
+ req->div_len = 0;
+ req->dma_flag = FALSE;
+
+ _nbu2ss_epn_out_int(udc, ep, req);
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
+{
+ u32 num;
+ u32 status;
+
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep = &udc->ep[epnum];
+
+ num = epnum - 1;
+
+ /* Interrupt Status */
+ status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
+
+ /* Interrupt Clear */
+ _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
+
+ if (list_empty(&ep->queue))
+ req = NULL;
+ else
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+
+ if (req == NULL) {
+ /* pr_warning("=== %s(%d) req == NULL\n", __func__, epnum); */
+ return;
+ }
+
+ if (status & EPn_OUT_END_INT) {
+ status &= ~EPn_OUT_INT;
+ _nbu2ss_epn_out_dma_int(udc, ep, req);
+ }
+
+ if (status & EPn_OUT_INT)
+ _nbu2ss_epn_out_int(udc, ep, req);
+
+ if (status & EPn_IN_END_INT) {
+ status &= ~EPn_IN_INT;
+ _nbu2ss_epn_in_dma_int(udc, ep, req);
+ }
+
+ if (status & EPn_IN_INT)
+ _nbu2ss_epn_in_int(udc, ep, req);
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
+{
+ if (epnum == 0)
+ _nbu2ss_ep0_int(udc);
+ else
+ _nbu2ss_epn_int(udc, epnum);
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
+{
+ _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
+ _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
+
+ return;
+}
+
+#if 0
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_ep0_disable(struct nbu2ss_udc *udc)
+{
+ _nbu2ss_bitclr(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
+
+ _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL
+ , (EP0_BCLR | EP0_INAK | EP0_ONAK | EP0_BCLR));
+
+ _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_AUTO);
+
+ return;
+}
+#endif
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ int status)
+{
+ struct nbu2ss_req *req;
+
+ /* Endpoint Disable */
+ _nbu2ss_epn_exit(udc, ep);
+
+ /* DMA Disable */
+ _nbu2ss_ep_dma_exit(udc, ep);
+
+ if (list_empty(&ep->queue))
+ return 0;
+
+ /* called with irqs blocked */
+ while (!list_empty(&ep->queue)) {
+ req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+ _nbu2ss_ep_done(ep, req, status);
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
+{
+ struct nbu2ss_ep *ep;
+
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+
+ _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
+
+ /* Endpoint n */
+ list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
+ _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
+{
+ u32 reg_dt;
+
+ if (!udc) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ if (udc->vbus_active == 0)
+ return -ESHUTDOWN;
+
+ if (is_on) {
+ /* D+ Pullup */
+/* INFO(" --- D+ Pullup\n"); */
+
+ if (udc->driver) {
+ reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
+ | PUE2) & ~(u32)CONNECTB;
+
+ _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
+ }
+
+ } else {
+ /* D+ Pulldown */
+/* INFO(" --- D+ Pulldown\n"); */
+
+ reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
+ & ~(u32)PUE2;
+
+ _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+ }
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
+{
+ PT_FC_REGS p = udc->p_regs;
+
+ if (udc->vbus_active == 0)
+ return;
+
+ if (ep->epnum == 0) {
+ /* EP0 */
+ _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
+
+ } else {
+ /* EPn */
+ _nbu2ss_ep_dma_abort(udc, ep);
+ _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
+{
+ int waitcnt = 0;
+
+ if (udc->udc_enabled)
+ return 0;
+
+#if 0
+ emxx_open_clockgate(EMXX_CLK_USB1);
+ /* emxx_clkctrl_off(EMXX_CLKCTRL_USB1); */
+ /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
+ emxx_unreset_device(EMXX_RST_USB1);
+#endif
+ /*
+ Reset
+ */
+ _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
+ udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
+
+ _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
+ mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
+
+ _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
+
+ _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
+
+#if 0
+ /* DMA Mode Setting */
+ if ((system_rev & EMXX_REV_MASK) == EMXX_REV_ES1) {
+ _nbu2ss_bitset(&udc->p_regs->AHBMCTR, BURST_TYPE);
+ _nbu2ss_bitclr(&udc->p_regs->AHBMCTR, HTRANS_MODE);
+ } else
+#endif
+ _nbu2ss_writel(&udc->p_regs->AHBMCTR,
+ HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
+
+ while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
+ waitcnt++;
+ udelay(1); /* 1us wait */
+ if (waitcnt == EPC_PLL_LOCK_COUNT) {
+ ERR("*** Reset Cancel failed\n");
+ return -EINVAL;
+ }
+ };
+
+#if 0
+ if ((system_rev & EMXX_REV_MASK) < EMXX_REV_ES3)
+#endif
+ _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
+
+ _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
+
+ /* EP0 */
+ _nbu2ss_ep0_enable(udc);
+
+ /* USB Interrupt Enable */
+ _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
+
+ udc->udc_enabled = TRUE;
+
+ return 0;
+}
+
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
+{
+ _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
+ _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
+}
+
+/*-------------------------------------------------------------------------*/
+static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
+{
+ if (udc->udc_enabled) {
+ udc->udc_enabled = FALSE;
+ _nbu2ss_reset_controller(udc);
+ _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
+ }
+#if 0
+ emxx_reset_device(EMXX_RST_USB1);
+ /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
+ emxx_close_clockgate(EMXX_CLK_USB1);
+#endif
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
+{
+ int nret;
+ u32 reg_dt;
+
+ /* chattering */
+ mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
+
+ /* VBUS ON Check*/
+ reg_dt = gpio_get_value(VBUS_VALUE);
+ if (reg_dt == 0) {
+
+ udc->linux_suspended = 0;
+
+ _nbu2ss_reset_controller(udc);
+ pr_info(" ----- VBUS OFF\n");
+
+ if (udc->vbus_active == 1) {
+ /* VBUS OFF */
+ udc->vbus_active = 0;
+ if (udc->usb_suspended) {
+ udc->usb_suspended = 0;
+ /* _nbu2ss_reset_controller(udc); */
+ }
+ udc->devstate = USB_STATE_NOTATTACHED;
+
+ _nbu2ss_quiesce(udc);
+ if (udc->driver) {
+ spin_unlock(&udc->lock);
+ udc->driver->disconnect(&udc->gadget);
+ spin_lock(&udc->lock);
+ }
+
+ _nbu2ss_disable_controller(udc);
+ }
+ } else {
+ mdelay(5); /* wait (5ms) */
+ reg_dt = gpio_get_value(VBUS_VALUE);
+ if (reg_dt == 0)
+ return;
+
+ pr_info(" ----- VBUS ON\n");
+
+ if (udc->linux_suspended)
+ return;
+
+ if (udc->vbus_active == 0) {
+ /* VBUS ON */
+ udc->vbus_active = 1;
+ udc->devstate = USB_STATE_POWERED;
+
+ nret = _nbu2ss_enable_controller(udc);
+ if (nret < 0) {
+ _nbu2ss_disable_controller(udc);
+ udc->vbus_active = 0;
+ return;
+ }
+
+ _nbu2ss_pullup(udc, 1);
+
+#ifdef UDC_DEBUG_DUMP
+ _nbu2ss_dump_register(udc);
+#endif /* UDC_DEBUG_DUMP */
+
+ } else {
+ if (udc->devstate == USB_STATE_POWERED)
+ _nbu2ss_pullup(udc, 1);
+ }
+ }
+
+ return;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
+{
+ udc->devstate = USB_STATE_DEFAULT;
+ udc->remote_wakeup = 0;
+
+ _nbu2ss_quiesce(udc);
+
+ udc->ep0state = EP0_IDLE;
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
+{
+ if (udc->usb_suspended == 1) {
+ udc->usb_suspended = 0;
+ if (udc->driver && udc->driver->resume) {
+ spin_unlock(&udc->lock);
+ udc->driver->resume(&udc->gadget);
+ spin_lock(&udc->lock);
+ }
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
+{
+ u32 reg_dt;
+
+ if (udc->usb_suspended == 0) {
+ reg_dt = gpio_get_value(VBUS_VALUE);
+
+ if (reg_dt == 0)
+ return;
+
+ udc->usb_suspended = 1;
+ if (udc->driver && udc->driver->suspend) {
+ spin_unlock(&udc->lock);
+ udc->driver->suspend(&udc->gadget);
+ spin_lock(&udc->lock);
+ }
+
+ _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+/* VBUS (GPIO153) Interrupt */
+static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
+{
+ struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
+
+ spin_lock(&udc->lock);
+ _nbu2ss_check_vbus(udc);
+ spin_unlock(&udc->lock);
+
+ return IRQ_HANDLED;
+}
+
+/*-------------------------------------------------------------------------*/
+/* Interrupt (udc) */
+static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
+{
+ u8 suspend_flag = 0;
+ u32 status;
+ u32 epnum, int_bit;
+
+ struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
+ PT_FC_REGS preg = udc->p_regs;
+
+ if (gpio_get_value(VBUS_VALUE) == 0) {
+ _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
+ _nbu2ss_writel(&preg->USB_INT_ENA, 0);
+ return IRQ_HANDLED;
+ }
+
+ spin_lock(&udc->lock);
+
+ for (;;) {
+ if (gpio_get_value(VBUS_VALUE) == 0) {
+ _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
+ _nbu2ss_writel(&preg->USB_INT_ENA, 0);
+ status = 0;
+ } else
+ status = _nbu2ss_readl(&preg->USB_INT_STA);
+
+ if (status == 0)
+ break;
+
+ _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
+
+ if (status & USB_RST_INT) {
+ /* USB Reset */
+ _nbu2ss_int_bus_reset(udc);
+ }
+
+ if (status & RSUM_INT) {
+ /* Resume */
+ _nbu2ss_int_usb_resume(udc);
+ }
+
+ if (status & SPND_INT) {
+ /* Suspend */
+ suspend_flag = 1;
+ }
+
+ if (status & EPn_INT) {
+ /* EP INT */
+ int_bit = status >> 8;
+
+ for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
+
+ if (0x01 & int_bit)
+ _nbu2ss_ep_int(udc, epnum);
+
+ int_bit >>= 1;
+
+ if (int_bit == 0)
+ break;
+ }
+ }
+ }
+
+ if (suspend_flag)
+ _nbu2ss_int_usb_suspend(udc);
+
+ spin_unlock(&udc->lock);
+
+ return IRQ_HANDLED;
+}
+
+/*-------------------------------------------------------------------------*/
+/* usb_ep_ops */
+static int nbu2ss_ep_enable(
+ struct usb_ep *_ep,
+ const struct usb_endpoint_descriptor *desc)
+{
+ u8 ep_type;
+ unsigned long flags;
+
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+
+ if ((_ep == NULL) || (desc == NULL)) {
+ ERR(" *** %s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if ((ep == NULL) || (ep->udc == NULL)) {
+ ERR(" *** %s, ep == NULL !!\n", __func__);
+ return -EINVAL;
+ }
+
+ ep_type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+ if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
+ || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
+
+ ERR(" *** %s, bat bmAttributes\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = ep->udc;
+ if (udc->vbus_active == 0)
+ return -ESHUTDOWN;
+
+ if ((udc->driver == NULL)
+ || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
+
+ ERR(" *** %s, udc !!\n", __func__);
+ return -ESHUTDOWN;
+ }
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ ep->desc = desc;
+ ep->epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
+ ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
+ ep->ep_type = ep_type;
+ ep->wedged = 0;
+ ep->halted = FALSE;
+ ep->stalled = FALSE;
+
+ ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
+
+ /* DMA setting */
+ _nbu2ss_ep_dma_init(udc, ep);
+
+ /* Endpoint setting */
+ _nbu2ss_ep_init(udc, ep);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_ep_disable(struct usb_ep *_ep)
+{
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+ if (_ep == NULL) {
+ ERR(" *** %s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if ((ep == NULL) || (ep->udc == NULL)) {
+ ERR(" *** %s, ep == NULL !!\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = ep->udc;
+ if (udc->vbus_active == 0)
+ return -ESHUTDOWN;
+
+ spin_lock_irqsave(&udc->lock, flags);
+ _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static struct usb_request *nbu2ss_ep_alloc_request(
+ struct usb_ep *ep,
+ gfp_t gfp_flags)
+{
+ struct nbu2ss_req *req;
+
+ req = kzalloc(sizeof(*req), gfp_flags);
+ if (!req)
+ return 0;
+
+#ifdef USE_DMA
+ req->req.dma = DMA_ADDR_INVALID;
+#endif
+ INIT_LIST_HEAD(&req->queue);
+
+ return &req->req;
+}
+
+/*-------------------------------------------------------------------------*/
+static void nbu2ss_ep_free_request(
+ struct usb_ep *_ep,
+ struct usb_request *_req)
+{
+ struct nbu2ss_req *req;
+
+ if (_req != NULL) {
+ req = container_of(_req, struct nbu2ss_req, req);
+
+ if (req != NULL)
+ kfree(req);
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_ep_queue(
+ struct usb_ep *_ep,
+ struct usb_request *_req,
+ gfp_t gfp_flags)
+{
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+ bool bflag;
+ int result = -EINVAL;
+
+ /* catch various bogus parameters */
+ if ((_ep == NULL) || (_req == NULL)) {
+ if (_ep == NULL)
+ ERR("*** %s --- _ep == NULL\n", __func__);
+
+ if (_req == NULL)
+ ERR("*** %s --- _req == NULL\n", __func__);
+
+ return -EINVAL;
+ }
+
+ req = container_of(_req, struct nbu2ss_req, req);
+ if (unlikely
+ (!_req->complete || !_req->buf
+ || !list_empty(&req->queue))) {
+
+ if (!_req->complete)
+ ERR("*** %s --- !_req->complete\n", __func__);
+
+ if (!_req->buf)
+ ERR("*** %s --- !_req->buf\n", __func__);
+
+ if (!list_empty(&req->queue))
+ ERR("*** %s --- !list_empty(&req->queue)\n", __func__);
+
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ udc = ep->udc;
+
+/* INFO("=== %s(ep%d), zero=%d\n", __func__, ep->epnum, _req->zero); */
+
+ if (udc->vbus_active == 0) {
+ pr_info("Can't ep_queue (VBUS OFF)\n");
+ return -ESHUTDOWN;
+ }
+
+ if (unlikely(!udc->driver)) {
+ ERR("%s, bogus device state %p\n", __func__, udc->driver);
+ return -ESHUTDOWN;
+ }
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+#ifdef USE_DMA
+ if ((u32)req->req.buf & 0x3)
+ req->unaligned = TRUE;
+ else
+ req->unaligned = FALSE;
+
+ if (req->unaligned) {
+ if (ep->virt_buf == NULL)
+ ep->virt_buf = (u8 *)dma_alloc_coherent(
+ NULL, PAGE_SIZE,
+ &ep->phys_buf, GFP_KERNEL | GFP_DMA);
+ if (ep->epnum > 0) {
+ if (ep->direct == USB_DIR_IN)
+ memcpy(ep->virt_buf, req->req.buf,
+ req->req.length);
+ }
+ }
+
+ if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
+ (req->req.dma != 0))
+ _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
+#endif
+
+ _req->status = -EINPROGRESS;
+ _req->actual = 0;
+
+ bflag = list_empty(&ep->queue);
+ list_add_tail(&req->queue, &ep->queue);
+
+ if ((bflag != FALSE) && (ep->stalled == FALSE)) {
+
+ result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
+ if (result < 0) {
+ ERR(" *** %s, result = %d\n", __func__, result);
+ list_del(&req->queue);
+ } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
+#ifdef USE_DMA
+ if (req->req.length < 4 &&
+ req->req.length == req->req.actual)
+#else
+ if (req->req.length == req->req.actual)
+#endif
+ _nbu2ss_ep_done(ep, req, result);
+ }
+ }
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_ep_dequeue(
+ struct usb_ep *_ep,
+ struct usb_request *_req)
+{
+ struct nbu2ss_req *req;
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+ /*INFO("=== %s()\n", __func__);*/
+
+ /* catch various bogus parameters */
+ if ((_ep == NULL) || (_req == NULL)) {
+ /* ERR("%s, bad param(1)\n", __func__); */
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if (!ep) {
+ ERR("%s, ep == NULL !!\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = ep->udc;
+ if (udc == NULL)
+ return -EINVAL;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ /* make sure it's actually queued on this endpoint */
+ list_for_each_entry(req, &ep->queue, queue) {
+ if (&req->req == _req)
+ break;
+ }
+ if (&req->req != _req) {
+ spin_unlock_irqrestore(&udc->lock, flags);
+ pr_debug("%s no queue(EINVAL)\n", __func__);
+ return -EINVAL;
+ }
+
+ _nbu2ss_ep_done(ep, req, -ECONNRESET);
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
+{
+ u8 ep_adrs;
+ unsigned long flags;
+
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (!_ep) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if (!ep) {
+ ERR("%s, bad ep\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = ep->udc;
+ if (!udc) {
+ ERR(" *** %s, bad udc\n", __func__);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ ep_adrs = ep->epnum | ep->direct;
+ if (value == 0) {
+ _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
+ ep->stalled = FALSE;
+ } else {
+ if (list_empty(&ep->queue))
+ _nbu2ss_epn_set_stall(udc, ep);
+ else
+ ep->stalled = TRUE;
+ }
+
+ if (value == 0)
+ ep->wedged = 0;
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
+{
+ return nbu2ss_ep_set_halt(_ep, 1);
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
+{
+ u32 data;
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+ PT_FC_REGS preg;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (!_ep) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if (!ep) {
+ ERR("%s, bad ep\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = ep->udc;
+ if (!udc) {
+ ERR("%s, bad udc\n", __func__);
+ return -EINVAL;
+ }
+
+ preg = udc->p_regs;
+
+ data = gpio_get_value(VBUS_VALUE);
+ if (data == 0)
+ return -EINVAL;
+
+ spin_lock_irqsave(&udc->lock, flags);
+
+ if (ep->epnum == 0) {
+ data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
+
+ } else {
+ data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_LEN_DCNT)
+ & EPn_LDATA;
+ }
+
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
+{
+ u32 data;
+ struct nbu2ss_ep *ep;
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (!_ep) {
+ ERR("%s, bad param\n", __func__);
+ return;
+ }
+
+ ep = container_of(_ep, struct nbu2ss_ep, ep);
+ if (!_ep) {
+ ERR("%s, bad ep\n", __func__);
+ return;
+ }
+
+ udc = ep->udc;
+ if (!udc) {
+ ERR("%s, bad udc\n", __func__);
+ return;
+ }
+
+ data = gpio_get_value(VBUS_VALUE);
+ if (data == 0)
+ return;
+
+ spin_lock_irqsave(&udc->lock, flags);
+ _nbu2ss_fifo_flush(udc, ep);
+ spin_unlock_irqrestore(&udc->lock, flags);
+}
+
+/*-------------------------------------------------------------------------*/
+static struct usb_ep_ops nbu2ss_ep_ops = {
+ .enable = nbu2ss_ep_enable,
+ .disable = nbu2ss_ep_disable,
+
+ .alloc_request = nbu2ss_ep_alloc_request,
+ .free_request = nbu2ss_ep_free_request,
+
+ .queue = nbu2ss_ep_queue,
+ .dequeue = nbu2ss_ep_dequeue,
+
+ .set_halt = nbu2ss_ep_set_halt,
+ .set_wedge = nbu2ss_ep_set_wedge,
+
+ .fifo_status = nbu2ss_ep_fifo_status,
+ .fifo_flush = nbu2ss_ep_fifo_flush,
+};
+
+
+/*-------------------------------------------------------------------------*/
+/* usb_gadget_ops */
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
+{
+ u32 data;
+ struct nbu2ss_udc *udc;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (pgadget == NULL) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = container_of(pgadget, struct nbu2ss_udc, gadget);
+ if (udc == NULL) {
+ ERR("%s, udc == NULL\n", __func__);
+ return -EINVAL;
+ }
+
+ data = gpio_get_value(VBUS_VALUE);
+ if (data == 0)
+ return -EINVAL;
+
+ data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
+
+ return data;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
+{
+ int i;
+ u32 data;
+
+ struct nbu2ss_udc *udc;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (pgadget == NULL) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = container_of(pgadget, struct nbu2ss_udc, gadget);
+ if (udc == NULL) {
+ ERR("%s, udc == NULL\n", __func__);
+ return -EINVAL;
+ }
+
+ data = gpio_get_value(VBUS_VALUE);
+ if (data == 0) {
+ pr_warning("VBUS LEVEL = %d\n", data);
+ return -EINVAL;
+ }
+
+ _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
+
+ for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
+ data = _nbu2ss_readl(&udc->p_regs->EPCTR);
+
+ if (data & PLL_LOCK)
+ break;
+ }
+
+ _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
+ int is_selfpowered)
+{
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (pgadget == NULL) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = container_of(pgadget, struct nbu2ss_udc, gadget);
+
+ spin_lock_irqsave(&udc->lock, flags);
+ udc->self_powered = (is_selfpowered != 0);
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
+{
+/* INFO("=== %s()\n", __func__); */
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned mA)
+{
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (pgadget == NULL) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = container_of(pgadget, struct nbu2ss_udc, gadget);
+
+ spin_lock_irqsave(&udc->lock, flags);
+ udc->mA = mA;
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
+{
+ struct nbu2ss_udc *udc;
+ unsigned long flags;
+
+/* INFO("=== %s()\n", __func__); */
+
+ if (pgadget == NULL) {
+ ERR("%s, bad param\n", __func__);
+ return -EINVAL;
+ }
+
+ udc = container_of(pgadget, struct nbu2ss_udc, gadget);
+
+ if (udc->driver == NULL) {
+ pr_warning("%s, Not Regist Driver\n", __func__);
+ return -EINVAL;
+ }
+
+ if (udc->vbus_active == 0)
+ return -ESHUTDOWN;
+
+ spin_lock_irqsave(&udc->lock, flags);
+ _nbu2ss_pullup(udc, is_on);
+ spin_unlock_irqrestore(&udc->lock, flags);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_gad_ioctl(
+ struct usb_gadget *pgadget,
+ unsigned code,
+ unsigned long param)
+{
+/* INFO("=== %s()\n", __func__); */
+ return 0;
+}
+
+
+static const struct usb_gadget_ops nbu2ss_gadget_ops = {
+ .get_frame = nbu2ss_gad_get_frame,
+ .wakeup = nbu2ss_gad_wakeup,
+ .set_selfpowered = nbu2ss_gad_set_selfpowered,
+ .vbus_session = nbu2ss_gad_vbus_session,
+ .vbus_draw = nbu2ss_gad_vbus_draw,
+ .pullup = nbu2ss_gad_pullup,
+ .ioctl = nbu2ss_gad_ioctl,
+};
+
+static char g_ep0_name[] = "ep0";
+static char g_ep1_name[] = "ep1-bulk";
+static char g_ep2_name[] = "ep2-bulk";
+static char g_ep3_name[] = "ep3in-int";
+static char g_ep4_name[] = "ep4-iso";
+static char g_ep5_name[] = "ep5-iso";
+static char g_ep6_name[] = "ep6-bulk";
+static char g_ep7_name[] = "ep7-bulk";
+static char g_ep8_name[] = "ep8in-int";
+static char g_ep9_name[] = "ep9-iso";
+static char g_epa_name[] = "epa-iso";
+static char g_epb_name[] = "epb-bulk";
+static char g_epc_name[] = "epc-nulk";
+static char g_epd_name[] = "epdin-int";
+
+static char *gp_ep_name[NUM_ENDPOINTS] = {
+ g_ep0_name,
+ g_ep1_name,
+ g_ep2_name,
+ g_ep3_name,
+ g_ep4_name,
+ g_ep5_name,
+ g_ep6_name,
+ g_ep7_name,
+ g_ep8_name,
+ g_ep9_name,
+ g_epa_name,
+ g_epb_name,
+ g_epc_name,
+ g_epd_name,
+};
+
+/*-------------------------------------------------------------------------*/
+static void __init nbu2ss_drv_set_ep_info(
+ struct nbu2ss_udc *udc,
+ struct nbu2ss_ep *ep,
+ u8 *name)
+{
+ ep->udc = udc;
+ ep->desc = NULL;
+
+ ep->ep.driver_data = NULL;
+ ep->ep.name = name;
+ ep->ep.ops = &nbu2ss_ep_ops;
+
+ if (isdigit(name[2])) {
+
+ long num;
+ int res;
+ char tempbuf[2];
+
+ tempbuf[0] = name[2];
+ tempbuf[1] = '\0';
+ res = strict_strtol(tempbuf, 16, &num);
+
+ if (num == 0)
+ ep->ep.maxpacket = EP0_PACKETSIZE;
+ else
+ ep->ep.maxpacket = EP_PACKETSIZE;
+
+ } else {
+ ep->ep.maxpacket = EP_PACKETSIZE;
+ }
+
+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
+ INIT_LIST_HEAD(&ep->queue);
+}
+
+/*-------------------------------------------------------------------------*/
+static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
+{
+ int i;
+
+ INIT_LIST_HEAD(&udc->gadget.ep_list);
+ udc->gadget.ep0 = &udc->ep[0].ep;
+
+
+ for (i = 0; i < NUM_ENDPOINTS; i++)
+ nbu2ss_drv_set_ep_info(udc, &udc->ep[i], gp_ep_name[i]);
+
+ list_del_init(&udc->ep[0].ep.ep_list);
+}
+
+/*-------------------------------------------------------------------------*/
+/* platform_driver */
+static int __init nbu2ss_drv_contest_init(
+ struct platform_device *pdev,
+ struct nbu2ss_udc *udc)
+{
+ spin_lock_init(&udc->lock);
+ udc->dev = &pdev->dev;
+
+ udc->self_powered = 1;
+ udc->devstate = USB_STATE_NOTATTACHED;
+ udc->pdev = pdev;
+ udc->mA = 0;
+
+ udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
+
+ /* init Endpoint */
+ nbu2ss_drv_ep_init(udc);
+
+ /* init Gadget */
+ udc->gadget.ops = &nbu2ss_gadget_ops;
+ udc->gadget.ep0 = &udc->ep[0].ep;
+ udc->gadget.speed = USB_SPEED_UNKNOWN;
+ udc->gadget.name = driver_name;
+ //udc->gadget.is_dualspeed = 1;
+
+ device_initialize(&udc->gadget.dev);
+
+ dev_set_name(&udc->gadget.dev, "gadget");
+ udc->gadget.dev.parent = &pdev->dev;
+ udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
+
+ return 0;
+}
+
+/*
+ * probe - binds to the platform device
+ */
+static int nbu2ss_drv_probe(struct platform_device *pdev)
+{
+ int status = -ENODEV;
+ struct nbu2ss_udc *udc;
+ struct resource *r;
+ int irq;
+ void __iomem *mmio_base;
+
+ udc = &udc_controller;
+ memset(udc, 0, sizeof(struct nbu2ss_udc));
+
+ platform_set_drvdata(pdev, udc);
+
+ /* require I/O memory and IRQ to be provided as resources */
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mmio_base = devm_request_and_ioremap(&pdev->dev, r);
+ if (IS_ERR(mmio_base)) {
+ dev_err(&pdev->dev, "failed to map I/O memory\n");
+ return PTR_ERR(mmio_base);
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "failed to get IRQ\n");
+ return irq;
+ }
+ status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
+ 0, driver_name, udc);
+
+ /* IO Memory */
+ udc->p_regs = (PT_FC_REGS)mmio_base;
+
+ /* USB Function Controller Interrupt */
+ if (status != 0) {
+ ERR("request_irq(USB_UDC_IRQ_1) failed\n");
+ goto cleanup1;
+ }
+
+ /* Driver Initialization */
+ status = nbu2ss_drv_contest_init(pdev, udc);
+ if (status < 0) {
+ /* Error */
+ goto cleanup1;
+ }
+
+ /* VBUS Interrupt */
+ irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
+ status = request_irq(INT_VBUS,
+ _nbu2ss_vbus_irq,
+ IRQF_SHARED,
+ driver_name,
+ udc);
+
+ if (status != 0) {
+ ERR("request_irq(INT_VBUS) failed\n");
+ goto cleanup1;
+ }
+
+ return status;
+
+cleanup1:
+ return status;
+}
+
+/*-------------------------------------------------------------------------*/
+static void nbu2ss_drv_shutdown(struct platform_device *pdev)
+{
+ struct nbu2ss_udc *udc;
+
+ udc = platform_get_drvdata(pdev);
+ if (udc == NULL)
+ return;
+
+ _nbu2ss_disable_controller(udc);
+}
+
+/*-------------------------------------------------------------------------*/
+static int __exit nbu2ss_drv_remove(struct platform_device *pdev)
+{
+ struct nbu2ss_udc *udc;
+ struct nbu2ss_ep *ep;
+ int i;
+
+ udc = &udc_controller;
+
+ for (i = 0; i < NUM_ENDPOINTS; i++) {
+ ep = &udc->ep[i];
+ if (ep->virt_buf)
+ dma_free_coherent(NULL, PAGE_SIZE,
+ (void *)ep->virt_buf, ep->phys_buf);
+ }
+
+ /* Interrupt Handler - Release */
+ free_irq(INT_VBUS, udc);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ struct nbu2ss_udc *udc;
+
+ udc = platform_get_drvdata(pdev);
+ if (udc == NULL)
+ return 0;
+
+ if (udc->vbus_active) {
+ udc->vbus_active = 0;
+ udc->devstate = USB_STATE_NOTATTACHED;
+ udc->linux_suspended = 1;
+
+ if (udc->usb_suspended) {
+ udc->usb_suspended = 0;
+ _nbu2ss_reset_controller(udc);
+ }
+
+ _nbu2ss_quiesce(udc);
+ }
+ _nbu2ss_disable_controller(udc);
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+static int nbu2ss_drv_resume(struct platform_device *pdev)
+{
+ u32 data;
+ struct nbu2ss_udc *udc;
+
+ udc = platform_get_drvdata(pdev);
+ if (udc == NULL)
+ return 0;
+
+ data = gpio_get_value(VBUS_VALUE);
+ if (data) {
+ udc->vbus_active = 1;
+ udc->devstate = USB_STATE_POWERED;
+ _nbu2ss_enable_controller(udc);
+ _nbu2ss_pullup(udc, 1);
+ }
+
+ udc->linux_suspended = 0;
+
+ return 0;
+}
+
+
+static struct platform_driver udc_driver = {
+ .probe = nbu2ss_drv_probe,
+ .shutdown = nbu2ss_drv_shutdown,
+ .remove = __exit_p(nbu2ss_drv_remove),
+ .suspend = nbu2ss_drv_suspend,
+ .resume = nbu2ss_drv_resume,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = driver_name,
+ },
+};
+
+
+
+/*-------------------------------------------------------------------------*/
+/* module */
+
+/*-------------------------------------------------------------------------*/
+static int __init udc_init(void)
+{
+ return platform_driver_register(&udc_driver);
+}
+module_init(udc_init);
+
+/*-------------------------------------------------------------------------*/
+static void __exit udc_exit(void)
+{
+ platform_driver_unregister(&udc_driver);
+}
+module_exit(udc_exit);
+
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_AUTHOR("Renesas Electronics Corporation");
+MODULE_LICENSE("GPL");
+
+
--- /dev/null
+/*
+ * EMXX FCD (Function Controller Driver) for USB.
+ *
+ * Copyright (C) 2010 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA.
+ */
+
+
+
+
+#ifndef _LINUX_EMXX_H
+#define _LINUX_EMXX_H
+
+
+
+/*---------------------------------------------------------------------------*/
+/*----------------- Default undef */
+#if 0
+#define DEBUG
+#define UDC_DEBUG_DUMP
+#endif
+
+/* #define USE_INT_COUNT_OVER */
+
+/*----------------- Default define */
+#define USE_DMA 1
+#define USE_SUSPEND_WAIT 1
+
+
+
+#ifndef TRUE
+#define TRUE 1
+#define FALSE 0
+#endif
+
+
+/*------------ Board dependence(Resource) */
+#define VBUS_VALUE GPIO_VBUS
+
+/* below hacked up for staging integration */
+#define GPIO_VBUS 0 /* GPIO_P153 on KZM9D */
+#define INT_VBUS 0 /* IRQ for GPIO_P153 */
+
+/*------------ Board dependence(Wait) */
+
+/* CHATTERING wait time ms */
+#define VBUS_CHATTERING_MDELAY 1
+/* DMA Abort wait time ms */
+#define DMA_DISABLE_TIME 10
+
+
+
+/*------------ Controller dependence */
+#define NUM_ENDPOINTS 14 /* Endpoint */
+#define REG_EP_NUM 15 /* Endpoint Register */
+#define DMA_MAX_COUNT 256 /* DMA Block */
+
+
+
+#define EPC_RST_DISABLE_TIME 1 /* 1 usec */
+#define EPC_DIRPD_DISABLE_TIME 1 /* 1 msec */
+#define EPC_PLL_LOCK_COUNT 1000 /* 1000 */
+#define IN_DATA_EMPTY_COUNT 1000 /* 1000 */
+
+#define CHATGER_TIME 700 /* 700msec */
+#define USB_SUSPEND_TIME 2000 /* 2 sec */
+
+
+/* U2F FLAG */
+#define U2F_ENABLE 1
+#define U2F_DISABLE 0
+
+
+/*------- BIT */
+#define BIT00 0x00000001
+#define BIT01 0x00000002
+#define BIT02 0x00000004
+#define BIT03 0x00000008
+#define BIT04 0x00000010
+#define BIT05 0x00000020
+#define BIT06 0x00000040
+#define BIT07 0x00000080
+#define BIT08 0x00000100
+#define BIT09 0x00000200
+#define BIT10 0x00000400
+#define BIT11 0x00000800
+#define BIT12 0x00001000
+#define BIT13 0x00002000
+#define BIT14 0x00004000
+#define BIT15 0x00008000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+
+#if 0
+/*------- (0x0000) USB Control Register */
+#define USBTESTMODE (BIT18+BIT17+BIT16)
+#define TEST_J BIT16
+#define TEST_K BIT17
+#define TEST_SE0_NAK (BIT17+BIT16)
+#define TEST_PACKET BIT18
+#endif
+#define TEST_FORCE_ENABLE (BIT18+BIT16)
+
+#define INT_SEL BIT10
+#define CONSTFS BIT09
+#define SOF_RCV BIT08
+#define RSUM_IN BIT07
+#define SUSPEND BIT06
+#define CONF BIT05
+#define DEFAULT BIT04
+#define CONNECTB BIT03
+#define PUE2 BIT02
+
+#define MAX_TEST_MODE_NUM 0x05
+#define TEST_MODE_SHIFT 16
+
+/*------- (0x0004) USB Status Register */
+#define SPEED_MODE BIT06
+#define HIGH_SPEED BIT06
+
+#define CONF BIT05
+#define DEFAULT BIT04
+#define USB_RST BIT03
+#define SPND_OUT BIT02
+#define RSUM_OUT BIT01
+
+/*------- (0x0008) USB Address Register */
+#define USB_ADDR 0x007F0000
+#define SOF_STATUS BIT15
+#define UFRAME (BIT14+BIT13+BIT12)
+#define FRAME 0x000007FF
+
+#define USB_ADRS_SHIFT 16
+
+/*------- (0x000C) UTMI Characteristic 1 Register */
+#define SQUSET (BIT07+BIT06+BIT05+BIT04)
+
+#define USB_SQUSET (BIT06+BIT05+BIT04)
+
+/*------- (0x0010) TEST Control Register */
+#define FORCEHS BIT02
+#define CS_TESTMODEEN BIT01
+#define LOOPBACK BIT00
+
+/*------- (0x0018) Setup Data 0 Register */
+/*------- (0x001C) Setup Data 1 Register */
+
+/*------- (0x0020) USB Interrupt Status Register */
+#define EPn_INT 0x00FFFF00
+#define EP15_INT BIT23
+#define EP14_INT BIT22
+#define EP13_INT BIT21
+#define EP12_INT BIT20
+#define EP11_INT BIT19
+#define EP10_INT BIT18
+#define EP9_INT BIT17
+#define EP8_INT BIT16
+#define EP7_INT BIT15
+#define EP6_INT BIT14
+#define EP5_INT BIT13
+#define EP4_INT BIT12
+#define EP3_INT BIT11
+#define EP2_INT BIT10
+#define EP1_INT BIT09
+#define EP0_INT BIT08
+#define SPEED_MODE_INT BIT06
+#define SOF_ERROR_INT BIT05
+#define SOF_INT BIT04
+#define USB_RST_INT BIT03
+#define SPND_INT BIT02
+#define RSUM_INT BIT01
+
+#define USB_INT_STA_RW 0x7E
+
+/*------- (0x0024) USB Interrupt Enable Register */
+#define EP15_0_EN 0x00FFFF00
+#define EP15_EN BIT23
+#define EP14_EN BIT22
+#define EP13_EN BIT21
+#define EP12_EN BIT20
+#define EP11_EN BIT19
+#define EP10_EN BIT18
+#define EP9_EN BIT17
+#define EP8_EN BIT16
+#define EP7_EN BIT15
+#define EP6_EN BIT14
+#define EP5_EN BIT13
+#define EP4_EN BIT12
+#define EP3_EN BIT11
+#define EP2_EN BIT10
+#define EP1_EN BIT09
+#define EP0_EN BIT08
+#define SPEED_MODE_EN BIT06
+#define SOF_ERROR_EN BIT05
+#define SOF_EN BIT04
+#define USB_RST_EN BIT03
+#define SPND_EN BIT02
+#define RSUM_EN BIT01
+
+#define USB_INT_EN_BIT \
+ (EP0_EN|SPEED_MODE_EN|USB_RST_EN|SPND_EN|RSUM_EN)
+
+/*------- (0x0028) EP0 Control Register */
+#define EP0_STGSEL BIT18
+#define EP0_OVERSEL BIT17
+#define EP0_AUTO BIT16
+#define EP0_PIDCLR BIT09
+#define EP0_BCLR BIT08
+#define EP0_DEND BIT07
+#define EP0_DW (BIT06+BIT05)
+#define EP0_DW4 0
+#define EP0_DW3 (BIT06+BIT05)
+#define EP0_DW2 BIT06
+#define EP0_DW1 BIT05
+
+#define EP0_INAK_EN BIT04
+#define EP0_PERR_NAK_CLR BIT03
+#define EP0_STL BIT02
+#define EP0_INAK BIT01
+#define EP0_ONAK BIT00
+
+/*------- (0x002C) EP0 Status Register */
+#define EP0_PID BIT18
+#define EP0_PERR_NAK BIT17
+#define EP0_PERR_NAK_INT BIT16
+#define EP0_OUT_NAK_INT BIT15
+#define EP0_OUT_NULL BIT14
+#define EP0_OUT_FULL BIT13
+#define EP0_OUT_EMPTY BIT12
+#define EP0_IN_NAK_INT BIT11
+#define EP0_IN_DATA BIT10
+#define EP0_IN_FULL BIT09
+#define EP0_IN_EMPTY BIT08
+#define EP0_OUT_NULL_INT BIT07
+#define EP0_OUT_OR_INT BIT06
+#define EP0_OUT_INT BIT05
+#define EP0_IN_INT BIT04
+#define EP0_STALL_INT BIT03
+#define STG_END_INT BIT02
+#define STG_START_INT BIT01
+#define SETUP_INT BIT00
+
+#define EP0_STATUS_RW_BIT (BIT16|BIT15|BIT11|0xFF)
+
+/*------- (0x0030) EP0 Interrupt Enable Register */
+#define EP0_PERR_NAK_EN BIT16
+#define EP0_OUT_NAK_EN BIT15
+
+#define EP0_IN_NAK_EN BIT11
+
+#define EP0_OUT_NULL_EN BIT07
+#define EP0_OUT_OR_EN BIT06
+#define EP0_OUT_EN BIT05
+#define EP0_IN_EN BIT04
+#define EP0_STALL_EN BIT03
+#define STG_END_EN BIT02
+#define STG_START_EN BIT01
+#define SETUP_EN BIT00
+
+#define EP0_INT_EN_BIT \
+ (EP0_OUT_OR_EN|EP0_OUT_EN|EP0_IN_EN|STG_END_EN|SETUP_EN)
+
+/*------- (0x0034) EP0 Length Register */
+#define EP0_LDATA 0x0000007F
+
+/*------- (0x0038) EP0 Read Register */
+/*------- (0x003C) EP0 Write Register */
+
+/*------- (0x0040:) EPn Control Register */
+#define EPn_EN BIT31
+#define EPn_BUF_TYPE BIT30
+#define EPn_BUF_SINGLE BIT30
+
+#define EPn_DIR0 BIT26
+#define EPn_MODE (BIT25+BIT24)
+#define EPn_BULK 0
+#define EPn_INTERRUPT BIT24
+#define EPn_ISO BIT25
+
+#define EPn_OVERSEL BIT17
+#define EPn_AUTO BIT16
+
+#define EPn_IPIDCLR BIT11
+#define EPn_OPIDCLR BIT10
+#define EPn_BCLR BIT09
+#define EPn_CBCLR BIT08
+#define EPn_DEND BIT07
+#define EPn_DW (BIT06+BIT05)
+#define EPn_DW4 0
+#define EPn_DW3 (BIT06+BIT05)
+#define EPn_DW2 BIT06
+#define EPn_DW1 BIT05
+
+#define EPn_OSTL_EN BIT04
+#define EPn_ISTL BIT03
+#define EPn_OSTL BIT02
+
+#define EPn_ONAK BIT00
+
+/*------- (0x0044:) EPn Status Register */
+#define EPn_ISO_PIDERR BIT29 /* R */
+#define EPn_OPID BIT28 /* R */
+#define EPn_OUT_NOTKN BIT27 /* R */
+#define EPn_ISO_OR BIT26 /* R */
+
+#define EPn_ISO_CRC BIT24 /* R */
+#define EPn_OUT_END_INT BIT23 /* RW */
+#define EPn_OUT_OR_INT BIT22 /* RW */
+#define EPn_OUT_NAK_ERR_INT BIT21 /* RW */
+#define EPn_OUT_STALL_INT BIT20 /* RW */
+#define EPn_OUT_INT BIT19 /* RW */
+#define EPn_OUT_NULL_INT BIT18 /* RW */
+#define EPn_OUT_FULL BIT17 /* R */
+#define EPn_OUT_EMPTY BIT16 /* R */
+
+#define EPn_IPID BIT10 /* R */
+#define EPn_IN_NOTKN BIT09 /* R */
+#define EPn_ISO_UR BIT08 /* R */
+#define EPn_IN_END_INT BIT07 /* RW */
+
+#define EPn_IN_NAK_ERR_INT BIT05 /* RW */
+#define EPn_IN_STALL_INT BIT04 /* RW */
+#define EPn_IN_INT BIT03 /* RW */
+#define EPn_IN_DATA BIT02 /* R */
+#define EPn_IN_FULL BIT01 /* R */
+#define EPn_IN_EMPTY BIT00 /* R */
+
+#define EPn_INT_EN \
+ (EPn_OUT_END_INT|EPn_OUT_INT|EPn_IN_END_INT|EPn_IN_INT)
+
+/*------- (0x0048:) EPn Interrupt Enable Register */
+#define EPn_OUT_END_EN BIT23 /* RW */
+#define EPn_OUT_OR_EN BIT22 /* RW */
+#define EPn_OUT_NAK_ERR_EN BIT21 /* RW */
+#define EPn_OUT_STALL_EN BIT20 /* RW */
+#define EPn_OUT_EN BIT19 /* RW */
+#define EPn_OUT_NULL_EN BIT18 /* RW */
+
+#define EPn_IN_END_EN BIT07 /* RW */
+
+#define EPn_IN_NAK_ERR_EN BIT05 /* RW */
+#define EPn_IN_STALL_EN BIT04 /* RW */
+#define EPn_IN_EN BIT03 /* RW */
+
+/*------- (0x004C:) EPn Interrupt Enable Register */
+#define EPn_STOP_MODE BIT11
+#define EPn_DEND_SET BIT10
+#define EPn_BURST_SET BIT09
+#define EPn_STOP_SET BIT08
+
+#define EPn_DMA_EN BIT04
+
+#define EPn_DMAMODE0 BIT00
+
+/*------- (0x0050:) EPn MaxPacket & BaseAddress Register */
+#define EPn_BASEAD 0x1FFF0000
+#define EPn_MPKT 0x000007FF
+
+/*------- (0x0054:) EPn Length & DMA Count Register */
+#define EPn_DMACNT 0x01FF0000
+#define EPn_LDATA 0x000007FF
+
+/*------- (0x0058:) EPn Read Register */
+/*------- (0x005C:) EPn Write Register */
+
+/*------- (0x1000) AHBSCTR Register */
+#define WAIT_MODE BIT00
+
+/*------- (0x1004) AHBMCTR Register */
+#define ARBITER_CTR BIT31 /* RW */
+#define MCYCLE_RST BIT12 /* RW */
+
+#define ENDIAN_CTR (BIT09+BIT08) /* RW */
+#define ENDIAN_BYTE_SWAP BIT09
+#define ENDIAN_HALF_WORD_SWAP ENDIAN_CTR
+
+#define HBUSREQ_MODE BIT05 /* RW */
+#define HTRANS_MODE BIT04 /* RW */
+
+#define WBURST_TYPE BIT02 /* RW */
+#define BURST_TYPE (BIT01+BIT00) /* RW */
+#define BURST_MAX_16 0
+#define BURST_MAX_8 BIT00
+#define BURST_MAX_4 BIT01
+#define BURST_SINGLE BURST_TYPE
+
+/*------- (0x1008) AHBBINT Register */
+#define DMA_ENDINT 0xFFFE0000 /* RW */
+
+#define AHB_VBUS_INT BIT13 /* RW */
+
+#define MBUS_ERRINT BIT06 /* RW */
+
+#define SBUS_ERRINT0 BIT04 /* RW */
+#define ERR_MASTER 0x0000000F /* R */
+
+/*------- (0x100C) AHBBINTEN Register */
+#define DMA_ENDINTEN 0xFFFE0000 /* RW */
+
+#define VBUS_INTEN BIT13 /* RW */
+
+#define MBUS_ERRINTEN BIT06 /* RW */
+
+#define SBUS_ERRINT0EN BIT04 /* RW */
+
+/*------- (0x1010) EPCTR Register */
+#define DIRPD BIT12 /* RW */
+
+#define VBUS_LEVEL BIT08 /* R */
+
+#define PLL_RESUME BIT05 /* RW */
+#define PLL_LOCK BIT04 /* R */
+
+#ifdef CONFIG_MACH_EMGR
+#define PLL_RST BIT02 /* RW */
+#endif
+
+#define EPC_RST BIT00 /* RW */
+
+/*------- (0x1014) USBF_EPTEST Register */
+#define LINESTATE (BIT09+BIT08) /* R */
+#define DM_LEVEL BIT09 /* R */
+#define DP_LEVEL BIT08 /* R */
+
+#define PHY_TST BIT01 /* RW */
+#define PHY_TSTCLK BIT00 /* RW */
+
+/*------- (0x1020) USBSSVER Register */
+#define AHBB_VER 0x00FF0000 /* R */
+#define EPC_VER 0x0000FF00 /* R */
+#define SS_VER 0x000000FF /* R */
+
+/*------- (0x1024) USBSSCONF Register */
+#define EP_AVAILABLE 0xFFFF0000 /* R */
+#define DMA_AVAILABLE 0x0000FFFF /* R */
+
+/*------- (0x1110:) EPnDCR1 Register */
+#define DCR1_EPn_DMACNT 0x00FF0000 /* RW */
+
+#define DCR1_EPn_DIR0 BIT01 /* RW */
+#define DCR1_EPn_REQEN BIT00 /* RW */
+
+/*------- (0x1114:) EPnDCR2 Register */
+#define DCR2_EPn_LMPKT 0x07FF0000 /* RW */
+
+#define DCR2_EPn_MPKT 0x000007FF /* RW */
+
+/*------- (0x1118:) EPnTADR Register */
+#define EPn_TADR 0xFFFFFFFF /* RW */
+
+
+
+/*===========================================================================*/
+/* Struct */
+/*------- T_EP_REGS */
+typedef struct _T_EP_REGS {
+ u32 EP_CONTROL; /* EP Control */
+ u32 EP_STATUS; /* EP Status */
+ u32 EP_INT_ENA; /* EP Interrupt Enable */
+ u32 EP_DMA_CTRL; /* EP DMA Control */
+ u32 EP_PCKT_ADRS; /* EP Maxpacket & BaseAddress */
+ u32 EP_LEN_DCNT; /* EP Length & DMA count */
+ u32 EP_READ; /* EP Read */
+ u32 EP_WRITE; /* EP Write */
+} T_EP_REGS, *PT_EP_REGS;
+
+/*------- T_EP_DCR */
+typedef struct _T_EP_DCR {
+ u32 EP_DCR1; /* EP_DCR1 */
+ u32 EP_DCR2; /* EP_DCR2 */
+ u32 EP_TADR; /* EP_TADR */
+ u32 Reserved; /* Reserved */
+} T_EP_DCR, *PT_EP_DCR;
+
+/*------- Function Registers */
+typedef struct _T_FC_REGS {
+ u32 USB_CONTROL; /* (0x0000) USB Control */
+ u32 USB_STATUS; /* (0x0004) USB Status */
+ u32 USB_ADDRESS; /* (0x0008) USB Address */
+ u32 UTMI_CHARACTER_1; /* (0x000C) UTMI Setting */
+ u32 TEST_CONTROL; /* (0x0010) TEST Control */
+ u32 Reserved_14; /* (0x0014) Reserved */
+ u32 SETUP_DATA0; /* (0x0018) Setup Data0 */
+ u32 SETUP_DATA1; /* (0x001C) Setup Data1 */
+ u32 USB_INT_STA; /* (0x0020) USB Interrupt Status */
+ u32 USB_INT_ENA; /* (0x0024) USB Interrupt Enable */
+ u32 EP0_CONTROL; /* (0x0028) EP0 Control */
+ u32 EP0_STATUS; /* (0x002C) EP0 Status */
+ u32 EP0_INT_ENA; /* (0x0030) EP0 Interrupt Enable */
+ u32 EP0_LENGTH; /* (0x0034) EP0 Length */
+ u32 EP0_READ; /* (0x0038) EP0 Read */
+ u32 EP0_WRITE; /* (0x003C) EP0 Write */
+
+ T_EP_REGS EP_REGS[REG_EP_NUM]; /* Endpoint Register */
+
+ u8 Reserved220[0x1000-0x220]; /* (0x0220:0x0FFF) Reserved */
+
+ u32 AHBSCTR; /* (0x1000) AHBSCTR */
+ u32 AHBMCTR; /* (0x1004) AHBMCTR */
+ u32 AHBBINT; /* (0x1008) AHBBINT */
+ u32 AHBBINTEN; /* (0x100C) AHBBINTEN */
+ u32 EPCTR; /* (0x1010) EPCTR */
+ u32 USBF_EPTEST; /* (0x1014) USBF_EPTEST */
+
+ u8 Reserved1018[0x20-0x18]; /* (0x1018:0x101F) Reserved */
+
+ u32 USBSSVER; /* (0x1020) USBSSVER */
+ u32 USBSSCONF; /* (0x1024) USBSSCONF */
+
+ u8 Reserved1028[0x110-0x28]; /* (0x1028:0x110F) Reserved */
+
+ T_EP_DCR EP_DCR[REG_EP_NUM]; /* */
+
+ u8 Reserved1200[0x1000-0x200]; /* Reserved */
+
+} __attribute__ ((aligned(32))) T_FC_REGS, *PT_FC_REGS;
+
+
+
+
+
+
+
+
+#define EP0_PACKETSIZE 64
+#define EP_PACKETSIZE 1024
+
+/* EPn RAM SIZE */
+#define D_RAM_SIZE_CTRL 64
+
+/* EPn Bulk Endpoint Max Packet Size */
+#define D_FS_RAM_SIZE_BULK 64
+#define D_HS_RAM_SIZE_BULK 512
+
+
+struct nbu2ss_udc;
+
+
+enum ep0_state {
+ EP0_IDLE,
+ EP0_IN_DATA_PHASE,
+ EP0_OUT_DATA_PHASE,
+ EP0_IN_STATUS_PHASE,
+ EP0_OUT_STATUS_PAHSE,
+ EP0_END_XFER,
+ EP0_SUSPEND,
+ EP0_STALL,
+};
+
+struct nbu2ss_req {
+ struct usb_request req;
+ struct list_head queue;
+
+ u32 div_len;
+ bool dma_flag;
+ bool zero;
+
+ bool unaligned;
+
+ unsigned mapped:1;
+};
+
+struct nbu2ss_ep {
+ struct usb_ep ep;
+ struct list_head queue;
+
+ struct nbu2ss_udc *udc;
+
+ const struct usb_endpoint_descriptor *desc;
+
+ u8 epnum;
+ u8 direct;
+ u8 ep_type;
+
+ unsigned wedged:1;
+ unsigned halted:1;
+ unsigned stalled:1;
+
+ u8 *virt_buf;
+ dma_addr_t phys_buf;
+};
+
+
+struct nbu2ss_udc {
+ struct usb_gadget gadget;
+ struct usb_gadget_driver *driver;
+ struct platform_device *pdev;
+ struct device *dev;
+ spinlock_t lock;
+ struct completion *pdone;
+
+ enum ep0_state ep0state;
+ enum usb_device_state devstate;
+ struct usb_ctrlrequest ctrl;
+ struct nbu2ss_req ep0_req;
+ u8 ep0_buf[EP0_PACKETSIZE];
+
+ struct nbu2ss_ep ep[NUM_ENDPOINTS];
+
+ unsigned softconnect:1;
+ unsigned vbus_active:1;
+ unsigned linux_suspended:1;
+ unsigned linux_resume:1;
+ unsigned usb_suspended:1;
+ unsigned self_powered:1;
+ unsigned remote_wakeup:1;
+ unsigned udc_enabled:1;
+
+ unsigned mA;
+
+ u32 curr_config; /* Current Configuration Number */
+
+ PT_FC_REGS p_regs;
+};
+
+/* USB register access structure */
+typedef volatile union {
+ struct {
+ unsigned char DATA[4];
+ } byte;
+ unsigned int dw;
+} USB_REG_ACCESS;
+
+/*-------------------------------------------------------------------------*/
+#define ERR(stuff...) printk(KERN_ERR "udc: " stuff)
+
+#endif /* _LINUX_EMXX_H */
len = dma_fifo_out_level(&port->tx_fifo);
if (len) {
unsigned long delay = (n == -ENOMEM) ? HZ : 1;
+
schedule_delayed_work(&port->drain, delay);
}
len = dma_fifo_level(&port->tx_fifo);
list_for_each_entry_rcu(peer, &serial->peer_list, list) {
int g = peer->generation;
+
smp_rmb();
if (generation == g && id == peer->node_id)
return peer;
list_for_each_entry_rcu(peer, &serial->peer_list, list) {
int g = peer->generation;
+
smp_rmb();
fwtty_dbg(card, "peer(%d:%x) guid: %016llx\n",
g, peer->node_id, (unsigned long long) peer->guid);
serial->self = peer;
if (create_loop_dev) {
struct fwtty_port *port;
+
port = fwserial_claim_port(peer, num_ttys);
if (!IS_ERR(port)) {
struct virt_plug_params params;
if (port)
fwserial_release_port(port, false);
kfree(pkt);
- return;
}
static void fwserial_handle_unplug_req(struct work_struct *work)
if (port)
fwserial_release_port(port, true);
kfree(pkt);
- return;
}
static int fwserial_parse_mgmt_write(struct fwtty_peer *peer,
*/
if (nic_type & NIC_TYPE_F_VLAN) {
struct vlan_ethhdr *vlan_eth = (struct vlan_ethhdr *)skb->data;
+
nic->vlan_id = ntohs(vlan_eth->h_vlan_TCI) & VLAN_VID_MASK;
data_buf = skb->data + (VLAN_ETH_HLEN - ETH_HLEN);
data_len = skb->len - (VLAN_ETH_HLEN - ETH_HLEN);
static struct net_device_stats *gdm_lte_stats(struct net_device *dev)
{
struct nic *nic = netdev_priv(dev);
+
return &nic->stats;
}
AUDIO_INT_WRITE_BUFFER_2_EMPTY);
AUDIO_WRITE(audio_data, AUDIO_INT_ENABLE, AUDIO_INT_MASK);
return 0;
- } else {
- atomic_dec(&open_count);
- return -EBUSY;
}
+
+ atomic_dec(&open_count);
+ return -EBUSY;
}
static int goldfish_audio_release(struct inode *ip, struct file *fp)
/* temporary workaround, until we switch to the ALSA API */
if (cmd == 315)
return -1;
- else
- return 0;
+
+ return 0;
}
static irqreturn_t goldfish_audio_interrupt(int irq, void *dev_id)
read_size = read(fp,
data,
toread*scan_size);
- if (read_size == -EAGAIN) {
- printf("nothing available\n");
- continue;
+ if (read_size < 0) {
+ if (errno == -EAGAIN) {
+ printf("nothing available\n");
+ continue;
+ } else
+ break;
}
for (i = 0; i < read_size/scan_size; i++)
process_scan(data + scan_size*i,
[IIO_TIMESTAMP] = "timestamp",
[IIO_CAPACITANCE] = "capacitance",
[IIO_ALTVOLTAGE] = "altvoltage",
+ [IIO_CCT] = "cct",
+ [IIO_PRESSURE] = "pressure",
+ [IIO_HUMIDITYRELATIVE] = "humidityrelative",
};
static const char * const iio_ev_type_text[] = {
[IIO_MOD_LIGHT_IR] = "ir",
[IIO_MOD_ROOT_SUM_SQUARED_X_Y] = "sqrt(x^2+y^2)",
[IIO_MOD_SUM_SQUARED_X_Y_Z] = "x^2+y^2+z^2",
+ [IIO_MOD_LIGHT_BOTH] = "both",
+ [IIO_MOD_LIGHT_IR] = "ir",
[IIO_MOD_LIGHT_CLEAR] = "clear",
[IIO_MOD_LIGHT_RED] = "red",
[IIO_MOD_LIGHT_GREEN] = "green",
case IIO_TIMESTAMP:
case IIO_CAPACITANCE:
case IIO_ALTVOLTAGE:
+ case IIO_CCT:
+ case IIO_PRESSURE:
+ case IIO_HUMIDITYRELATIVE:
break;
default:
return false;
case IIO_MOD_LIGHT_IR:
case IIO_MOD_ROOT_SUM_SQUARED_X_Y:
case IIO_MOD_SUM_SQUARED_X_Y_Z:
+ case IIO_MOD_LIGHT_BOTH:
+ case IIO_MOD_LIGHT_IR:
case IIO_MOD_LIGHT_CLEAR:
case IIO_MOD_LIGHT_RED:
case IIO_MOD_LIGHT_GREEN:
int read_sysfs_float(char *filename, char *basedir, float *val)
{
- float ret = 0;
+ int ret = 0;
FILE *sysfsfp;
char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
if (temp == NULL) {
return ret;
}
-read_sysfs_string(const char *filename, const char *basedir, char *str)
+int read_sysfs_string(const char *filename, const char *basedir, char *str)
{
- float ret = 0;
+ int ret = 0;
FILE *sysfsfp;
char *temp = malloc(strlen(basedir) + strlen(filename) + 2);
if (temp == NULL) {
Trigger Consumers
Currently triggers are only used for the filling of software
-buffers and as such any device supporting INDIO_RING_TRIGGERED has the
+buffers and as such any device supporting INDIO_BUFFER_TRIGGERED has the
consumer interface automatically created.
struct lis3l02dq_state *st = iio_priv(indio_dev);
if (st->trigger_on) {
- iio_trigger_poll(st->trig, iio_get_time_ns());
+ iio_trigger_poll(st->trig);
return IRQ_HANDLED;
} else
return IRQ_WAKE_THREAD;
mxs_lradc_handle_touch(lradc);
if (iio_buffer_enabled(iio))
- iio_trigger_poll(iio->trig, iio_get_time_ns());
+ iio_trigger_poll(iio->trig);
else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
complete(&lradc->completion);
static __init int iio_dummy_init(void)
{
int i, ret;
+
if (instances > 10) {
instances = 1;
return -EINVAL;
static __exit void iio_dummy_exit(void)
{
int i;
+
for (i = 0; i < instances; i++)
iio_dummy_remove(i);
kfree(iio_dummy_devs);
static irqreturn_t ade7758_data_rdy_trig_poll(int irq, void *private)
{
disable_irq_nosync(irq);
- iio_trigger_poll(private, iio_get_time_ns());
+ iio_trigger_poll(private);
return IRQ_HANDLED;
}
struct bfin_tmr_state *st = devid;
clear_gptimer_intr(st->t->id);
- iio_trigger_poll(st->trig, 0);
+ iio_trigger_poll(st->trig);
return IRQ_HANDLED;
}
struct rtc_device *rtc;
int frequency;
struct rtc_task task;
+ bool state;
};
static int iio_trig_periodic_rtc_set_state(struct iio_trigger *trig, bool state)
{
struct iio_prtc_trigger_info *trig_info = iio_trigger_get_drvdata(trig);
- if (trig_info->frequency == 0)
+ int ret;
+ if (trig_info->frequency == 0 && state)
return -EINVAL;
- dev_info(&trig_info->rtc->dev, "trigger frequency is %d\n",
+ dev_dbg(&trig_info->rtc->dev, "trigger frequency is %d\n",
trig_info->frequency);
- return rtc_irq_set_state(trig_info->rtc, &trig_info->task, state);
+ ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, state);
+ if (ret == 0)
+ trig_info->state = state;
+
+ return ret;
}
static ssize_t iio_trig_periodic_read_freq(struct device *dev,
if (ret)
goto error_ret;
- ret = rtc_irq_set_freq(trig_info->rtc, &trig_info->task, val);
+ if (val > 0) {
+ ret = rtc_irq_set_freq(trig_info->rtc, &trig_info->task, val);
+ if (ret == 0 && trig_info->state && trig_info->frequency == 0)
+ ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, 1);
+ } else if (val == 0) {
+ ret = rtc_irq_set_state(trig_info->rtc, &trig_info->task, 0);
+ } else
+ ret = -EINVAL;
if (ret)
goto error_ret;
static void iio_prtc_trigger_poll(void *private_data)
{
- /* Timestamp is not provided currently */
- iio_trigger_poll(private_data, 0);
+ iio_trigger_poll(private_data);
}
static const struct iio_trigger_ops iio_prtc_trigger_ops = {
iio_trigger_set_drvdata(trig, trig_info);
trig->ops = &iio_prtc_trigger_ops;
/* RTC access */
- trig_info->rtc
- = rtc_class_open(pdata[i]);
+ trig_info->rtc = rtc_class_open(pdata[i]);
if (trig_info->rtc == NULL) {
ret = -EINVAL;
goto error_free_trig_info;
module_platform_driver(iio_trig_periodic_rtc_driver);
MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
-MODULE_DESCRIPTION("Periodic realtime clock trigger for the iio subsystem");
+MODULE_DESCRIPTION("Periodic realtime clock trigger for the iio subsystem");
MODULE_LICENSE("GPL v2");
static int eucr_suspend(struct usb_interface *iface, pm_message_t message)
{
struct us_data *us = usb_get_intfdata(iface);
+
pr_info("--- eucr_suspend ---\n");
/* Wait until no command is running */
mutex_lock(&us->dev_mutex);
static int eucr_resume(struct usb_interface *iface)
{
u8 tmp = 0;
-
struct us_data *us = usb_get_intfdata(iface);
+
pr_info("--- eucr_resume---\n");
mutex_lock(&us->dev_mutex);
case LINE6_DEVID_POCKETPOD:
switch (interface_number) {
case 0:
- return 0; /* this interface has no endpoints */
+ return -ENODEV; /* this interface has no endpoints */
case 1:
alternate = 0;
break;
return -ENOMEM;
}
- memset(hdev->ibh_mrs, 0, sizeof(*hdev->ibh_mrs) * hdev->ibh_nmrs);
-
for (i = 0; i < hdev->ibh_nmrs; i++) {
struct ib_phys_buf ipb;
__u64 iova;
if (dev == NULL)
return NULL;
- memset(dev, 0, sizeof(*dev));
netdev = dev_get_by_name(&init_net, ifname);
if (netdev == NULL) {
dev->ibd_can_failover = 0;
if (net == NULL)
goto failed;
- memset(net, 0, sizeof(*net));
-
do_gettimeofday(&tv);
net->ibn_incarnation = (((__u64)tv.tv_sec) * 1000000) + tv.tv_usec;
if (peer == NULL)
return -ENOMEM;
- memset (peer, 0, sizeof (*peer)); /* NULL pointers/clear flags etc */
-
peer->ksnp_ni = ni;
peer->ksnp_id = id;
atomic_set (&peer->ksnp_refcount, 1); /* 1 ref for caller */
goto failed_0;
}
- memset (conn, 0, sizeof (*conn));
-
conn->ksnc_peer = NULL;
conn->ksnc_route = NULL;
conn->ksnc_sock = sock;
CDEBUG(D_NET, "set %s %d\n", libcfs_nid2str(lp->lp_nid), alive);
}
-void
+static void
lnet_ni_notify_locked(lnet_ni_t *ni, lnet_peer_t *lp)
{
int alive;
}
/* NB expects LNET_LOCK held */
-void
+static void
lnet_add_route_to_rnet (lnet_remotenet_t *rnet, lnet_route_t *route)
{
unsigned int len = 0;
if (pi == NULL)
goto out;
- memset(pi, 0, LNET_PINGINFO_SIZE);
for (i = 0; i < LNET_MAX_RTR_NIS; i++) {
pi->pi_ni[i].ns_nid = LNET_NID_ANY;
pi->pi_ni[i].ns_status = LNET_NI_STATUS_INVALID;
if (grp == NULL)
return -ENOMEM;
- memset(grp, 0, offsetof(lstcon_group_t,
- grp_ndl_hash[LST_NODE_HASHSIZE]));
-
grp->grp_ref = 1;
if (name != NULL)
strcpy(grp->grp_name, name);
return -ENOMEM;
}
- memset(gentp, 0, sizeof(lstcon_ndlist_ent_t));
-
list_for_each_entry(ndl, &grp->grp_ndl_list, ndl_link)
LST_NODE_STATE_COUNTER(ndl->ndl_node, gentp);
if (entp == NULL)
return -ENOMEM;
- memset(entp, 0, sizeof(lstcon_test_batch_ent_t));
-
if (test == NULL) {
entp->u.tbe_batch.bae_ntest = bat->bat_ntest;
entp->u.tbe_batch.bae_state = bat->bat_state;
goto out;
}
- memset(test, 0, offsetof(lstcon_test_t, tes_param[paramlen]));
test->tes_hdr.tsb_id = batch->bat_hdr.tsb_id;
test->tes_batch = batch;
test->tes_type = type;
if (entp == NULL)
return -ENOMEM;
- memset(entp, 0, sizeof(*entp));
-
list_for_each_entry(ndl, &console_session.ses_ndl_list, ndl_link)
LST_NODE_STATE_COUNTER(ndl->ndl_node, entp);
if (tsc == NULL)
return -ENOMEM;
- memset(tsc, 0, sizeof(sfw_test_case_t));
tsc->tsc_cli_ops = cliops;
tsc->tsc_srv_service = service;
return -ENOMEM;
}
- memset(tsi, 0, sizeof(*tsi));
spin_lock_init(&tsi->tsi_lock);
atomic_set(&tsi->tsi_nactive, 0);
INIT_LIST_HEAD(&tsi->tsi_units);
config LUSTRE_LLITE_LLOOP
tristate "Lustre virtual block device"
depends on LUSTRE_FS && BLOCK
+ depends on !PPC_64K_PAGES && !ARM64_64K_PAGES
default m
const char __user *buffer,
size_t count, loff_t *off)
{
- struct lu_client_seq *seq = ((struct seq_file *)file->private_data)->private;
+ struct lu_client_seq *seq;
int rc;
+ seq = ((struct seq_file *)file->private_data)->private;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
const char __user *buffer,
size_t count, loff_t *off)
{
- struct lu_client_seq *seq = ((struct seq_file *)file->private_data)->private;
+ struct lu_client_seq *seq;
__u64 max;
int rc, val;
+ seq = ((struct seq_file *)file->private_data)->private;
LASSERT(seq != NULL);
rc = lprocfs_write_helper(buffer, count, &val);
return;
}
#endif
-
EXPORT_SYMBOL(fld_client_proc_fini);
static inline int hash_is_sane(int hash)
fld_proc_hash_seq_write(struct file *file, const char *buffer,
size_t count, loff_t *off)
{
- struct lu_client_fld *fld = ((struct seq_file *)file->private_data)->private;
+ struct lu_client_fld *fld;
struct lu_fld_hash *hash = NULL;
int i;
+ fld = ((struct seq_file *)file->private_data)->private;
LASSERT(fld != NULL);
for (i = 0; fld_hash[i].fh_name != NULL; i++) {
io->ci_obj = clob;
*envout = env;
*ioout = io;
- result = +1;
+ result = 1;
} else
result = PTR_ERR(env);
} else
result = cl_io_get(inode, &env, &io, &refcheck);
if (result > 0) {
- again:
+again:
io->ci_verify_layout = 1;
result = cl_io_init(env, io, CIT_MISC, io->ci_obj);
if (result > 0)
struct lu_context_key *key, void *data)
{
struct ccc_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, ccc_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct ccc_session *session = data;
+
OBD_SLAB_FREE_PTR(session, ccc_session_kmem);
}
* fails. Access to this environment is serialized by ccc_inode_fini_guard
* mutex.
*/
-static struct lu_env *ccc_inode_fini_env = NULL;
+static struct lu_env *ccc_inode_fini_env;
/**
* A mutex serializing calls to slp_inode_fini() under extreme memory
void ccc_lock_fini(const struct lu_env *env, struct cl_lock_slice *slice)
{
struct ccc_lock *clk = cl2ccc_lock(slice);
+
OBD_SLAB_FREE_PTR(clk, ccc_lock_kmem);
}
loff_t start, loff_t end)
{
struct cl_object *obj = io->ci_obj;
+
return ccc_io_one_lock_index(env, io, enqflags, mode,
cl_index(obj, start), cl_index(obj, end));
}
* linux-2.6.18-128.1.1 miss to do that.
* --bug 17336 */
loff_t size = cl_isize_read(inode);
- unsigned long cur_index = start >> PAGE_CACHE_SHIFT;
+ loff_t cur_index = start >> PAGE_CACHE_SHIFT;
+ loff_t size_index = ((size - 1) >> PAGE_CACHE_SHIFT);
if ((size == 0 && cur_index != 0) ||
- (((size - 1) >> PAGE_CACHE_SHIFT) < cur_index))
- *exceed = 1;
+ size_index < cur_index)
+ *exceed = 1;
}
return result;
} else {
return lov_lsm_get(cl_i2info(inode)->lli_clob);
}
-void inline ccc_inode_lsm_put(struct inode *inode, struct lov_stripe_md *lsm)
+inline void ccc_inode_lsm_put(struct inode *inode, struct lov_stripe_md *lsm)
{
lov_lsm_put(cl_i2info(inode)->lli_clob, lsm);
}
if (rc)
return rc;
- stripes = min(desc.ld_tgt_count, (__u32)LOV_MAX_STRIPE_COUNT);
+ stripes = min_t(__u32, desc.ld_tgt_count, LOV_MAX_STRIPE_COUNT);
lsm.lsm_stripe_count = stripes;
easize = obd_size_diskmd(dt_exp, &lsm);
if (create) {
OBD_ALLOC(imp_conn, sizeof(*imp_conn));
- if (!imp_conn) {
+ if (!imp_conn)
GOTO(out_put, rc = -ENOMEM);
- }
}
spin_lock(&imp->imp_lock);
rc = ptlrpc_connect_import(imp);
if (rc != 0) {
- LASSERT (imp->imp_state == LUSTRE_IMP_DISCON);
+ LASSERT(imp->imp_state == LUSTRE_IMP_DISCON);
GOTO(out_ldlm, rc);
}
LASSERT(*exp != NULL && (*exp)->exp_connection);
struct ptlrpc_reply_state *rs;
struct obd_export *exp;
- if (req->rq_no_reply) {
+ if (req->rq_no_reply)
return;
- }
svcpt = req->rq_rqbd->rqbd_svcpt;
rs = req->rq_reply_state;
if (rs == NULL || !rs->rs_difficult) {
/* no notifiers */
- target_send_reply_msg (req, rc, fail_id);
+ target_send_reply_msg(req, rc, fail_id);
return;
}
/* must be an export if locks saved */
- LASSERT (req->rq_export != NULL);
+ LASSERT(req->rq_export != NULL);
/* req/reply consistent */
LASSERT(rs->rs_svcpt == svcpt);
/* "fresh" reply */
- LASSERT (!rs->rs_scheduled);
- LASSERT (!rs->rs_scheduled_ever);
- LASSERT (!rs->rs_handled);
- LASSERT (!rs->rs_on_net);
- LASSERT (rs->rs_export == NULL);
- LASSERT (list_empty(&rs->rs_obd_list));
- LASSERT (list_empty(&rs->rs_exp_list));
-
- exp = class_export_get (req->rq_export);
+ LASSERT(!rs->rs_scheduled);
+ LASSERT(!rs->rs_scheduled_ever);
+ LASSERT(!rs->rs_handled);
+ LASSERT(!rs->rs_on_net);
+ LASSERT(rs->rs_export == NULL);
+ LASSERT(list_empty(&rs->rs_obd_list));
+ LASSERT(list_empty(&rs->rs_exp_list));
+
+ exp = class_export_get(req->rq_export);
/* disable reply scheduling while I'm setting up */
rs->rs_scheduled = 1;
size_t count, loff_t *off)
{
struct ldlm_namespace *ns = ((struct seq_file *)file->private_data)->private;
- char dummy[MAX_STRING_SIZE + 1], *end;
+ char dummy[MAX_STRING_SIZE + 1];
unsigned long tmp;
int lru_resize;
+ int err;
dummy[MAX_STRING_SIZE] = '\0';
if (copy_from_user(dummy, buffer, MAX_STRING_SIZE))
return count;
}
- tmp = simple_strtoul(dummy, &end, 0);
- if (dummy == end) {
+ err = kstrtoul(dummy, 10, &tmp);
+ if (err != 0) {
CERROR("invalid value written\n");
return -EINVAL;
}
{
int rc;
- if (!ns) {
+ if (!ns)
return;
- }
spin_lock(&ns->ns_lock);
ns->ns_stopping = 1;
*/
void ldlm_namespace_free_post(struct ldlm_namespace *ns)
{
- if (!ns) {
+ if (!ns)
return;
- }
/* Make sure that nobody can find this ns in its list. */
ldlm_namespace_unregister(ns, ns->ns_client);
rc = -ENOMEM;
goto out1;
}
- /* NULL out all names[i] */
- memset (names, 0, nfound * sizeof(*names));
for (i = 0; i < nfound; i++) {
#include <linux/slab.h>
#include <linux/stat.h>
#include <linux/ctype.h>
-#include <asm/bitops.h>
-#include <asm/uaccess.h>
+#include <linux/bitops.h>
+#include <linux/uaccess.h>
#include <linux/utsname.h>
#define DEBUG_SUBSYSTEM S_CLASS
}
if (write) {
rc = lprocfs_write_frac_helper(buffer, *lenp,
- (unsigned int*)table->data,
+ (unsigned int *)table->data,
1 << (20 - PAGE_CACHE_SHIFT));
/* Don't allow them to let dirty pages exceed 90% of system
* memory and set a hard minimum of 4MB. */
int len;
len = lprocfs_read_frac_helper(buf, sizeof(buf),
- *(unsigned int*)table->data,
+ *(unsigned int *)table->data,
1 << (20 - PAGE_CACHE_SHIFT));
if (len > *lenp)
len = *lenp;
}
if (write) {
rc = lprocfs_write_frac_helper(buffer, *lenp,
- (unsigned int*)table->data,
+ (unsigned int *)table->data,
OBD_ALLOC_FAIL_MULT);
} else {
char buf[21];
int len;
len = lprocfs_read_frac_helper(buf, 21,
- *(unsigned int*)table->data,
+ *(unsigned int *)table->data,
OBD_ALLOC_FAIL_MULT);
if (len > *lenp)
len = *lenp;
};
#endif
-void obd_sysctl_init (void)
+void obd_sysctl_init(void)
{
#ifdef CONFIG_SYSCTL
- if ( !obd_table_header )
+ if (!obd_table_header)
obd_table_header = register_sysctl_table(parent_table);
#endif
}
-void obd_sysctl_clean (void)
+void obd_sysctl_clean(void)
{
#ifdef CONFIG_SYSCTL
- if ( obd_table_header )
+ if (obd_table_header)
unregister_sysctl_table(obd_table_header);
obd_table_header = NULL;
#endif
void lprocfs_echo_init_vars(struct lprocfs_static_vars *lvars)
{
- lvars->module_vars = lprocfs_echo_module_vars;
- lvars->obd_vars = lprocfs_echo_obd_vars;
+ lvars->module_vars = lprocfs_echo_module_vars;
+ lvars->obd_vars = lprocfs_echo_obd_vars;
}
#endif /* LPROCFS */
{
.ckd_cache = &osc_lock_kmem,
.ckd_name = "osc_lock_kmem",
- .ckd_size = sizeof (struct osc_lock)
+ .ckd_size = sizeof(struct osc_lock)
},
{
.ckd_cache = &osc_object_kmem,
.ckd_name = "osc_object_kmem",
- .ckd_size = sizeof (struct osc_object)
+ .ckd_size = sizeof(struct osc_object)
},
{
.ckd_cache = &osc_thread_kmem,
.ckd_name = "osc_thread_kmem",
- .ckd_size = sizeof (struct osc_thread_info)
+ .ckd_size = sizeof(struct osc_thread_info)
},
{
.ckd_cache = &osc_session_kmem,
.ckd_name = "osc_session_kmem",
- .ckd_size = sizeof (struct osc_session)
+ .ckd_size = sizeof(struct osc_session)
},
{
.ckd_cache = &osc_req_kmem,
.ckd_name = "osc_req_kmem",
- .ckd_size = sizeof (struct osc_req)
+ .ckd_size = sizeof(struct osc_req)
},
{
.ckd_cache = &osc_extent_kmem,
.ckd_name = "osc_extent_kmem",
- .ckd_size = sizeof (struct osc_extent)
+ .ckd_size = sizeof(struct osc_extent)
},
{
.ckd_cache = &osc_quota_kmem,
struct lu_context_key *key, void *data)
{
struct osc_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, osc_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct osc_session *info = data;
+
OBD_SLAB_FREE_PTR(info, osc_session_kmem);
}
struct proc_dir_entry *sptlrpc_proc_root = NULL;
EXPORT_SYMBOL(sptlrpc_proc_root);
-char *sec_flags2str(unsigned long flags, char *buf, int bufsize)
+static char *sec_flags2str(unsigned long flags, char *buf, int bufsize)
{
buf[0] = '\0';
#include <asm/irq.h>
#include <linux/fcntl.h>
#include <linux/platform_device.h>
-#ifdef LIRC_ON_SA1100
-#include <asm/hardware.h>
-#ifdef CONFIG_SA1100_COLLIE
-#include <asm/arch/tc35143.h>
-#include <asm/ucb1200.h>
-#endif
-#endif
#include <linux/timer.h>
static void init_act220(void);
#endif
-/*** SA1100 ***/
-#ifdef LIRC_ON_SA1100
-struct sa1100_ser2_registers {
- /* HSSP control register */
- unsigned char hscr0;
- /* UART registers */
- unsigned char utcr0;
- unsigned char utcr1;
- unsigned char utcr2;
- unsigned char utcr3;
- unsigned char utcr4;
- unsigned char utdr;
- unsigned char utsr0;
- unsigned char utsr1;
-} sr;
-
-static int irq = IRQ_Ser2ICP;
-
-#define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
-
-/* pulse/space ratio of 50/50 */
-static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
-/* 1000000/freq-pulse_width */
-static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
-static unsigned int freq = 38000; /* modulation frequency */
-static unsigned int duty_cycle = 50; /* duty cycle of 50% */
-
-#endif
-
#define RBUF_LEN 1024
#define WBUF_LEN 1024
static int init_port(void);
static void drop_port(void);
-#ifdef LIRC_ON_SA1100
-static void on(void)
-{
- PPSR |= PPC_TXD2;
-}
-
-static void off(void)
-{
- PPSR &= ~PPC_TXD2;
-}
-#else
static inline unsigned int sinp(int offset)
{
return inb(io + offset);
{
outb(value, io + offset);
}
-#endif
#ifndef MAX_UDELAY_MS
#define MAX_UDELAY_US 5000
if (IS_ERR(tx_buf))
return PTR_ERR(tx_buf);
i = 0;
-#ifdef LIRC_ON_SA1100
- /* disable receiver */
- Ser2UTCR3 = 0;
-#endif
local_irq_save(flags);
while (1) {
if (i >= count)
i++;
}
local_irq_restore(flags);
-#ifdef LIRC_ON_SA1100
- off();
- udelay(1000); /* wait 1ms for IR diode to recover */
- Ser2UTCR3 = 0;
- /* clear status register to prevent unwanted interrupts */
- Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
- /* enable receiver */
- Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
-#endif
kfree(tx_buf);
return count;
}
u32 __user *uptr = (u32 __user *)arg;
int retval = 0;
u32 value = 0;
-#ifdef LIRC_ON_SA1100
-
- if (cmd == LIRC_GET_FEATURES)
- value = LIRC_CAN_SEND_PULSE |
- LIRC_CAN_SET_SEND_DUTY_CYCLE |
- LIRC_CAN_SET_SEND_CARRIER |
- LIRC_CAN_REC_MODE2;
- else if (cmd == LIRC_GET_SEND_MODE)
- value = LIRC_MODE_PULSE;
- else if (cmd == LIRC_GET_REC_MODE)
- value = LIRC_MODE_MODE2;
-#else
if (cmd == LIRC_GET_FEATURES)
value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
else if (cmd == LIRC_GET_SEND_MODE)
value = LIRC_MODE_PULSE;
else if (cmd == LIRC_GET_REC_MODE)
value = LIRC_MODE_MODE2;
-#endif
switch (cmd) {
case LIRC_GET_FEATURES:
case LIRC_SET_REC_MODE:
retval = get_user(value, uptr);
break;
-#ifdef LIRC_ON_SA1100
- case LIRC_SET_SEND_DUTY_CYCLE:
- retval = get_user(value, uptr);
- if (retval)
- return retval;
- if (value <= 0 || value > 100)
- return -EINVAL;
- /* (value/100)*(1000000/freq) */
- duty_cycle = value;
- pulse_width = (unsigned long) duty_cycle*10000/freq;
- space_width = (unsigned long) 1000000L/freq-pulse_width;
- if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
- pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
- if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
- space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
- break;
- case LIRC_SET_SEND_CARRIER:
- retval = get_user(value, uptr);
- if (retval)
- return retval;
- if (value > 500000 || value < 20000)
- return -EINVAL;
- freq = value;
- pulse_width = (unsigned long) duty_cycle*10000/freq;
- space_width = (unsigned long) 1000000L/freq-pulse_width;
- if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
- pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
- if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
- space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
- break;
-#endif
default:
retval = -ENOIOCTLCMD;
/* avoid interference with interrupt */
spin_lock_irqsave(&timer_lock, flags);
if (last_value) {
-#ifndef LIRC_ON_SA1100
/* clear unread bits in UART and restart */
outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
-#endif
/* determine 'virtual' pulse end: */
pulse_end = delta(&last_tv, &last_intr_tv);
dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
unsigned char data;
struct timeval curr_tv;
static unsigned long deltv;
-#ifdef LIRC_ON_SA1100
- int status;
- static int n;
-
- status = Ser2UTSR0;
- /*
- * Deal with any receive errors first. The bytes in error may be
- * the only bytes in the receive FIFO, so we do this first.
- */
- while (status & UTSR0_EIF) {
- int bstat;
-
- if (debug) {
- dprintk("EIF\n");
- bstat = Ser2UTSR1;
-
- if (bstat & UTSR1_FRE)
- dprintk("frame error\n");
- if (bstat & UTSR1_ROR)
- dprintk("receive fifo overrun\n");
- if (bstat & UTSR1_PRE)
- dprintk("parity error\n");
- }
-
- bstat = Ser2UTDR;
- n++;
- status = Ser2UTSR0;
- }
-
- if (status & (UTSR0_RFS | UTSR0_RID)) {
- do_gettimeofday(&curr_tv);
- deltv = delta(&last_tv, &curr_tv);
- do {
- data = Ser2UTDR;
- dprintk("%d data: %u\n", n, (unsigned int) data);
- n++;
- } while (status & UTSR0_RID && /* do not empty fifo in order to
- * get UTSR0_RID in any case */
- Ser2UTSR1 & UTSR1_RNE); /* data ready */
-
- if (status&UTSR0_RID) {
- add_read_queue(0 , deltv - n * TIME_CONST); /*space*/
- add_read_queue(1, n * TIME_CONST); /*pulse*/
- n = 0;
- last_tv = curr_tv;
- }
- }
-
- if (status & UTSR0_TFS)
- pr_err("transmit fifo not full, shouldn't happen\n");
-
- /* We must clear certain bits. */
- status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
- if (status)
- Ser2UTSR0 = status;
-#else
unsigned long deltintrtv;
unsigned long flags;
int iir, lsr;
break;
}
}
-#endif
return IRQ_RETVAL(IRQ_HANDLED);
}
-#ifdef LIRC_ON_SA1100
-static void send_pulse(unsigned long length)
-{
- unsigned long k, delay;
- int flag;
-
- if (length == 0)
- return;
- /*
- * this won't give us the carrier frequency we really want
- * due to integer arithmetic, but we can accept this inaccuracy
- */
-
- for (k = flag = 0; k < length; k += delay, flag = !flag) {
- if (flag) {
- off();
- delay = space_width;
- } else {
- on();
- delay = pulse_width;
- }
- safe_udelay(delay);
- }
- off();
-}
-
-static void send_space(unsigned long length)
-{
- if (length == 0)
- return;
- off();
- safe_udelay(length);
-}
-#else
static void send_space(unsigned long len)
{
safe_udelay(len);
;
}
}
-#endif
-
-#ifdef CONFIG_SA1100_COLLIE
-static int sa1100_irda_set_power_collie(int state)
-{
- if (state) {
- /*
- * 0 - off
- * 1 - short range, lowest power
- * 2 - medium range, medium power
- * 3 - maximum range, high power
- */
- ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
- TC35143_IODIR_OUTPUT);
- ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW);
- udelay(100);
- } else {
- /* OFF */
- ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
- TC35143_IODIR_OUTPUT);
- ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH);
- }
- return 0;
-}
-#endif
static int init_hardware(void)
{
spin_lock_irqsave(&hardware_lock, flags);
/* reset UART */
-#ifdef LIRC_ON_SA1100
-#ifdef CONFIG_SA1100_COLLIE
- sa1100_irda_set_power_collie(3); /* power on */
-#endif
- sr.hscr0 = Ser2HSCR0;
-
- sr.utcr0 = Ser2UTCR0;
- sr.utcr1 = Ser2UTCR1;
- sr.utcr2 = Ser2UTCR2;
- sr.utcr3 = Ser2UTCR3;
- sr.utcr4 = Ser2UTCR4;
-
- sr.utdr = Ser2UTDR;
- sr.utsr0 = Ser2UTSR0;
- sr.utsr1 = Ser2UTSR1;
-
- /* configure GPIO */
- /* output */
- PPDR |= PPC_TXD2;
- PSDR |= PPC_TXD2;
- /* set output to 0 */
- off();
-
- /* Enable HP-SIR modulation, and ensure that the port is disabled. */
- Ser2UTCR3 = 0;
- Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP);
-
- /* clear status register to prevent unwanted interrupts */
- Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
-
- /* 7N1 */
- Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData;
- /* 115200 */
- Ser2UTCR1 = 0;
- Ser2UTCR2 = 1;
- /* use HPSIR, 1.6 usec pulses */
- Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us;
-
- /* enable receiver, receive fifo interrupt */
- Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
-
- /* clear status register to prevent unwanted interrupts */
- Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
-
-#elif defined(LIRC_SIR_TEKRAM)
+#if defined(LIRC_SIR_TEKRAM)
/* disable FIFO */
soutp(UART_FCR,
UART_FCR_CLEAR_RCVR|
spin_lock_irqsave(&hardware_lock, flags);
-#ifdef LIRC_ON_SA1100
- Ser2UTCR3 = 0;
-
- Ser2UTCR0 = sr.utcr0;
- Ser2UTCR1 = sr.utcr1;
- Ser2UTCR2 = sr.utcr2;
- Ser2UTCR4 = sr.utcr4;
- Ser2UTCR3 = sr.utcr3;
-
- Ser2HSCR0 = sr.hscr0;
-#ifdef CONFIG_SA1100_COLLIE
- sa1100_irda_set_power_collie(0); /* power off */
-#endif
-#else
/* turn off interrupts */
outb(0, io + UART_IER);
-#endif
+
spin_unlock_irqrestore(&hardware_lock, flags);
}
int retval;
/* get I/O port access and IRQ line */
-#ifndef LIRC_ON_SA1100
if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
pr_err("i/o port 0x%.4x already in use.\n", io);
return -EBUSY;
}
-#endif
retval = request_irq(irq, sir_interrupt, 0,
LIRC_DRIVER_NAME, NULL);
if (retval < 0) {
-# ifndef LIRC_ON_SA1100
release_region(io, 8);
-# endif
pr_err("IRQ %d already in use.\n", irq);
return retval;
}
-#ifndef LIRC_ON_SA1100
pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
-#endif
init_timer(&timerlist);
timerlist.function = sir_timeout;
{
free_irq(irq, NULL);
del_timer_sync(&timerlist);
-#ifndef LIRC_ON_SA1100
release_region(io, 8);
-#endif
}
#ifdef LIRC_SIR_ACTISYS_ACT200L
#ifdef LIRC_SIR_TEKRAM
MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
MODULE_AUTHOR("Christoph Bartelmus");
-#elif defined(LIRC_ON_SA1100)
-MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
-MODULE_AUTHOR("Christoph Bartelmus");
#elif defined(LIRC_SIR_ACTISYS_ACT200L)
MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
MODULE_AUTHOR("Karl Bongers");
#endif
MODULE_LICENSE("GPL");
-#ifdef LIRC_ON_SA1100
-module_param(irq, int, S_IRUGO);
-MODULE_PARM_DESC(irq, "Interrupt (16)");
-#else
module_param(io, int, S_IRUGO);
MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
module_param(threshold, int, S_IRUGO);
MODULE_PARM_DESC(threshold, "space detection threshold (3)");
-#endif
module_param(debug, bool, S_IRUGO | S_IWUSR);
MODULE_PARM_DESC(debug, "Enable debugging messages");
config USB_SN9C102
tristate "USB SN9C1xx PC Camera Controller support (DEPRECATED)"
- depends on VIDEO_V4L2 && MEDIA_USB_SUPPORT
+ depends on VIDEO_V4L2 && MEDIA_USB_SUPPORT && USB
---help---
This driver is DEPRECATED, please use the gspca sonixb and
sonixj modules instead.
static int hci_h4p_hci_flush(struct hci_dev *hdev)
{
struct hci_h4p_info *info = hci_get_drvdata(hdev);
+
skb_queue_purge(&info->txq);
return 0;
return phy_mii_ioctl(priv->phydev, rq, cmd);
}
-static void cvm_oct_adjust_link(struct net_device *dev)
+static void cvm_oct_note_carrier(struct octeon_ethernet *priv,
+ cvmx_helper_link_info_t li)
+{
+ if (li.s.link_up) {
+ pr_notice_ratelimited("%s: %u Mbps %s duplex, port %d\n",
+ netdev_name(priv->netdev), li.s.speed,
+ (li.s.full_duplex) ? "Full" : "Half",
+ priv->port);
+ } else {
+ pr_notice_ratelimited("%s: Link down\n",
+ netdev_name(priv->netdev));
+ }
+}
+
+void cvm_oct_set_carrier(struct octeon_ethernet *priv,
+ cvmx_helper_link_info_t link_info)
+{
+ cvm_oct_note_carrier(priv, link_info);
+ if (link_info.s.link_up) {
+ if (!netif_carrier_ok(priv->netdev))
+ netif_carrier_on(priv->netdev);
+ } else {
+ if (netif_carrier_ok(priv->netdev))
+ netif_carrier_off(priv->netdev);
+ }
+}
+
+void cvm_oct_adjust_link(struct net_device *dev)
{
struct octeon_ethernet *priv = netdev_priv(dev);
cvmx_helper_link_info_t link_info;
link_info.s.link_up = priv->last_link ? 1 : 0;
link_info.s.full_duplex = priv->phydev->duplex ? 1 : 0;
link_info.s.speed = priv->phydev->speed;
+
cvmx_helper_link_set(priv->port, link_info);
- if (priv->last_link) {
- netif_carrier_on(dev);
- if (priv->queue != -1)
- printk_ratelimited("%s: %u Mbps %s duplex, "
- "port %2d, queue %2d\n", dev->name,
- priv->phydev->speed,
- priv->phydev->duplex ? "Full" : "Half",
- priv->port, priv->queue);
- else
- printk_ratelimited("%s: %u Mbps %s duplex, "
- "port %2d, POW\n", dev->name,
- priv->phydev->speed,
- priv->phydev->duplex ? "Full" : "Half",
- priv->port);
- } else {
- netif_carrier_off(dev);
- printk_ratelimited("%s: Link down\n", dev->name);
- }
+ cvm_oct_note_carrier(priv, link_info);
}
}
+int cvm_oct_common_stop(struct net_device *dev)
+{
+ struct octeon_ethernet *priv = netdev_priv(dev);
+ cvmx_helper_link_info_t link_info;
+
+ priv->poll = NULL;
+
+ if (priv->phydev)
+ phy_disconnect(priv->phydev);
+ priv->phydev = NULL;
+
+ if (priv->last_link) {
+ link_info.u64 = 0;
+ priv->last_link = 0;
+
+ cvmx_helper_link_set(priv->port, link_info);
+ cvm_oct_note_carrier(priv, link_info);
+ }
+ return 0;
+}
/**
* cvm_oct_phy_setup_device - setup the PHY
struct device_node *phy_node;
if (!priv->of_node)
- return 0;
+ goto no_phy;
phy_node = of_parse_phandle(priv->of_node, "phy-handle", 0);
if (!phy_node)
- return 0;
+ goto no_phy;
priv->phydev = of_phy_connect(dev, phy_node, cvm_oct_adjust_link, 0,
PHY_INTERFACE_MODE_GMII);
priv->last_link = 0;
phy_start_aneg(priv->phydev);
+ return 0;
+no_phy:
+ /* If there is no phy, assume a direct MAC connection and that
+ * the link is up.
+ */
+ netif_carrier_on(dev);
return 0;
}
static int cvm_oct_fill_hw_skbuff(int pool, int size, int elements)
{
int freed = elements;
- while (freed) {
+ while (freed) {
struct sk_buff *skb = dev_alloc_skb(size + 256);
+
if (unlikely(skb == NULL))
break;
skb_reserve(skb, 256 - (((unsigned long)skb->data) & 0x7f));
if (elements < 0)
pr_warn("Freeing of pool %u had too many skbuffs (%d)\n",
- pool, elements);
+ pool, elements);
else if (elements > 0)
pr_warn("Freeing of pool %u is missing %d skbuffs\n",
- pool, elements);
+ pool, elements);
}
/**
memory = kmalloc(size + 256, GFP_ATOMIC);
if (unlikely(memory == NULL)) {
pr_warn("Unable to allocate %u bytes for FPA pool %d\n",
- elements * size, pool);
+ elements * size, pool);
break;
}
fpa = (char *)(((unsigned long)memory + 256) & ~0x7fUL);
{
char *memory;
char *fpa;
+
do {
fpa = cvmx_fpa_alloc(pool);
if (fpa) {
int cvm_oct_mem_fill_fpa(int pool, int size, int elements)
{
int freed;
+
if (USE_SKBUFFS_IN_HW && pool == CVMX_FPA_PACKET_POOL)
freed = cvm_oct_fill_hw_skbuff(pool, size, elements);
else
#include "ethernet-defines.h"
#include "octeon-ethernet.h"
#include "ethernet-util.h"
+#include "ethernet-mdio.h"
#include <asm/octeon/cvmx-helper.h>
int interface = INTERFACE(priv->port);
int index = INDEX(priv->port);
cvmx_helper_link_info_t link_info;
+ int rv;
+
+ rv = cvm_oct_phy_setup_device(dev);
+ if (rv)
+ return rv;
gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
gmx_cfg.s.en = 1;
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
if (!octeon_is_simulation()) {
- link_info = cvmx_helper_link_get(priv->port);
- if (!link_info.s.link_up)
- netif_carrier_off(dev);
+ if (priv->phydev) {
+ int r = phy_read_status(priv->phydev);
+ if (r == 0 && priv->phydev->link == 0)
+ netif_carrier_off(dev);
+ cvm_oct_adjust_link(dev);
+ } else {
+ link_info = cvmx_helper_link_get(priv->port);
+ if (!link_info.s.link_up)
+ netif_carrier_off(dev);
+ priv->poll = cvm_oct_rgmii_poll;
+ }
}
return 0;
gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
gmx_cfg.s.en = 0;
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
- return 0;
+ return cvm_oct_common_stop(dev);
}
static void cvm_oct_rgmii_immediate_poll(struct work_struct *work)
gmx_rx_int_en.s.phy_spd = 1;
cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface),
gmx_rx_int_en.u64);
- priv->poll = cvm_oct_rgmii_poll;
}
}
* This file may also be available under a different license from Cavium.
* Contact Cavium Networks for more information
**********************************************************************/
+#include <linux/phy.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/ratelimit.h>
#include "ethernet-defines.h"
#include "octeon-ethernet.h"
#include "ethernet-util.h"
+#include "ethernet-mdio.h"
#include <asm/octeon/cvmx-helper.h>
#include <asm/octeon/cvmx-gmxx-defs.h>
-int cvm_oct_sgmii_open(struct net_device *dev)
-{
- union cvmx_gmxx_prtx_cfg gmx_cfg;
- struct octeon_ethernet *priv = netdev_priv(dev);
- int interface = INTERFACE(priv->port);
- int index = INDEX(priv->port);
- cvmx_helper_link_info_t link_info;
-
- gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
- gmx_cfg.s.en = 1;
- cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-
- if (!octeon_is_simulation()) {
- link_info = cvmx_helper_link_get(priv->port);
- if (!link_info.s.link_up)
- netif_carrier_off(dev);
- }
-
- return 0;
-}
-
-int cvm_oct_sgmii_stop(struct net_device *dev)
-{
- union cvmx_gmxx_prtx_cfg gmx_cfg;
- struct octeon_ethernet *priv = netdev_priv(dev);
- int interface = INTERFACE(priv->port);
- int index = INDEX(priv->port);
-
- gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
- gmx_cfg.s.en = 0;
- cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
- return 0;
-}
-
static void cvm_oct_sgmii_poll(struct net_device *dev)
{
struct octeon_ethernet *priv = netdev_priv(dev);
}
}
-int cvm_oct_sgmii_init(struct net_device *dev)
+int cvm_oct_sgmii_open(struct net_device *dev)
{
+ union cvmx_gmxx_prtx_cfg gmx_cfg;
struct octeon_ethernet *priv = netdev_priv(dev);
+ int interface = INTERFACE(priv->port);
+ int index = INDEX(priv->port);
+ cvmx_helper_link_info_t link_info;
+ int rv;
+
+ rv = cvm_oct_phy_setup_device(dev);
+ if (rv)
+ return rv;
+
+ gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
+ gmx_cfg.s.en = 1;
+ cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
+
+ if (octeon_is_simulation())
+ return 0;
+
+ if (priv->phydev) {
+ int r = phy_read_status(priv->phydev);
+ if (r == 0 && priv->phydev->link == 0)
+ netif_carrier_off(dev);
+ cvm_oct_adjust_link(dev);
+ } else {
+ link_info = cvmx_helper_link_get(priv->port);
+ if (!link_info.s.link_up)
+ netif_carrier_off(dev);
+ priv->poll = cvm_oct_sgmii_poll;
+ cvm_oct_sgmii_poll(dev);
+ }
+ return 0;
+}
+
+int cvm_oct_sgmii_stop(struct net_device *dev)
+{
+ union cvmx_gmxx_prtx_cfg gmx_cfg;
+ struct octeon_ethernet *priv = netdev_priv(dev);
+ int interface = INTERFACE(priv->port);
+ int index = INDEX(priv->port);
+
+ gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
+ gmx_cfg.s.en = 0;
+ cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
+ return cvm_oct_common_stop(dev);
+}
+
+int cvm_oct_sgmii_init(struct net_device *dev)
+{
cvm_oct_common_init(dev);
dev->netdev_ops->ndo_stop(dev);
- if (!octeon_is_simulation() && priv->phydev == NULL)
- priv->poll = cvm_oct_sgmii_poll;
/* FIXME: Need autoneg logic */
return 0;
* This file may also be available under a different license from Cavium.
* Contact Cavium Networks for more information
**********************************************************************/
+#include <linux/phy.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/ratelimit.h>
#include "ethernet-defines.h"
#include "octeon-ethernet.h"
#include "ethernet-util.h"
+#include "ethernet-mdio.h"
#include <asm/octeon/cvmx-helper.h>
#include <asm/octeon/cvmx-gmxx-defs.h>
-int cvm_oct_xaui_open(struct net_device *dev)
-{
- union cvmx_gmxx_prtx_cfg gmx_cfg;
- struct octeon_ethernet *priv = netdev_priv(dev);
- int interface = INTERFACE(priv->port);
- int index = INDEX(priv->port);
- cvmx_helper_link_info_t link_info;
-
- gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
- gmx_cfg.s.en = 1;
- cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
-
- if (!octeon_is_simulation()) {
- link_info = cvmx_helper_link_get(priv->port);
- if (!link_info.s.link_up)
- netif_carrier_off(dev);
- }
- return 0;
-}
-
-int cvm_oct_xaui_stop(struct net_device *dev)
-{
- union cvmx_gmxx_prtx_cfg gmx_cfg;
- struct octeon_ethernet *priv = netdev_priv(dev);
- int interface = INTERFACE(priv->port);
- int index = INDEX(priv->port);
-
- gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
- gmx_cfg.s.en = 0;
- cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
- return 0;
-}
-
static void cvm_oct_xaui_poll(struct net_device *dev)
{
struct octeon_ethernet *priv = netdev_priv(dev);
}
}
+int cvm_oct_xaui_open(struct net_device *dev)
+{
+ union cvmx_gmxx_prtx_cfg gmx_cfg;
+ struct octeon_ethernet *priv = netdev_priv(dev);
+ int interface = INTERFACE(priv->port);
+ int index = INDEX(priv->port);
+ cvmx_helper_link_info_t link_info;
+ int rv;
+
+ rv = cvm_oct_phy_setup_device(dev);
+ if (rv)
+ return rv;
+
+ gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
+ gmx_cfg.s.en = 1;
+ cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
+
+ if (octeon_is_simulation())
+ return 0;
+
+ if (priv->phydev) {
+ int r = phy_read_status(priv->phydev);
+ if (r == 0 && priv->phydev->link == 0)
+ netif_carrier_off(dev);
+ cvm_oct_adjust_link(dev);
+ } else {
+ link_info = cvmx_helper_link_get(priv->port);
+ if (!link_info.s.link_up)
+ netif_carrier_off(dev);
+ priv->poll = cvm_oct_xaui_poll;
+ cvm_oct_xaui_poll(dev);
+ }
+ return 0;
+}
+
+int cvm_oct_xaui_stop(struct net_device *dev)
+{
+ union cvmx_gmxx_prtx_cfg gmx_cfg;
+ struct octeon_ethernet *priv = netdev_priv(dev);
+ int interface = INTERFACE(priv->port);
+ int index = INDEX(priv->port);
+
+ gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
+ gmx_cfg.s.en = 0;
+ cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
+ return cvm_oct_common_stop(dev);
+}
+
int cvm_oct_xaui_init(struct net_device *dev)
{
struct octeon_ethernet *priv = netdev_priv(dev);
dev->features |= NETIF_F_LLTX;
dev->ethtool_ops = &cvm_oct_ethtool_ops;
- cvm_oct_phy_setup_device(dev);
cvm_oct_set_mac_filter(dev);
dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
/* Initialize the device private structure. */
priv = netdev_priv(dev);
+ priv->netdev = dev;
priv->of_node = cvm_oct_node_for_port(pip, interface,
port_index);
int queue;
/* Hardware fetch and add to count outstanding tx buffers */
int fau;
+ /* My netdev. */
+ struct net_device *netdev;
/*
* Type of port. This is one of the enums in
* cvmx_helper_interface_mode_t
extern int cvm_oct_common_init(struct net_device *dev);
extern void cvm_oct_common_uninit(struct net_device *dev);
+void cvm_oct_adjust_link(struct net_device *dev);
+int cvm_oct_common_stop(struct net_device *dev);
extern int always_use_pow;
extern int pow_send_group;
r8188eu-y := \
core/rtw_ap.o \
- core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_debug.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
- core/rtw_io.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
- hal/HalPhyRf.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
- hal/rtl8188e_sreset.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#define _RTW_BR_EXT_C_
-
-#include <linux/if_arp.h>
-#include <net/ip.h>
-#include <net/ipx.h>
-#include <linux/atalk.h>
-#include <linux/udp.h>
-#include <linux/if_pppox.h>
-
-#include <drv_types.h>
-#include "rtw_br_ext.h"
-#include <usb_osintf.h>
-#include <recv_osdep.h>
-
-#ifndef csum_ipv6_magic
-#include <net/ip6_checksum.h>
-#endif
-
-#include <linux/ipv6.h>
-#include <linux/icmpv6.h>
-#include <net/ndisc.h>
-#include <net/checksum.h>
-
-#define NAT25_IPV4 01
-#define NAT25_IPV6 02
-#define NAT25_IPX 03
-#define NAT25_APPLE 04
-#define NAT25_PPPOE 05
-
-#define RTL_RELAY_TAG_LEN (ETH_ALEN)
-#define TAG_HDR_LEN 4
-
-#define MAGIC_CODE 0x8186
-#define MAGIC_CODE_LEN 2
-#define WAIT_TIME_PPPOE 5 /* waiting time for pppoe server in sec */
-
-/*-----------------------------------------------------------------
- How database records network address:
- 0 1 2 3 4 5 6 7 8 9 10
- |----|----|----|----|----|----|----|----|----|----|----|
- IPv4 |type| | IP addr |
- IPX |type| Net addr | Node addr |
- IPX |type| Net addr |Sckt addr|
- Apple |type| Network |node|
- PPPoE |type| SID | AC MAC |
------------------------------------------------------------------*/
-
-
-/* Find a tag in pppoe frame and return the pointer */
-static inline unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type)
-{
- unsigned char *cur_ptr, *start_ptr;
- unsigned short tagLen, tagType;
-
- start_ptr = cur_ptr = (unsigned char *)ph->tag;
- while ((cur_ptr - start_ptr) < ntohs(ph->length)) {
- /* prevent un-alignment access */
- tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]);
- tagLen = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]);
- if (tagType == type)
- return cur_ptr;
- cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen;
- }
- return NULL;
-}
-
-
-static inline int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag)
-{
- struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN);
- int data_len;
-
- data_len = be16_to_cpu(tag->tag_len) + TAG_HDR_LEN;
- if (skb_tailroom(skb) < data_len) {
- _DEBUG_ERR("skb_tailroom() failed in add SID tag!\n");
- return -1;
- }
-
- skb_put(skb, data_len);
- /* have a room for new tag */
- memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length));
- ph->length = htons(ntohs(ph->length) + data_len);
- memcpy((unsigned char *)ph->tag, tag, data_len);
- return data_len;
-}
-
-static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len)
-{
- int tail_len;
- unsigned long end, tail;
-
- if ((src+len) > skb_tail_pointer(skb) || skb->len < len)
- return -1;
-
- tail = (unsigned long)skb_tail_pointer(skb);
- end = (unsigned long)src+len;
- if (tail < end)
- return -1;
-
- tail_len = (int)(tail-end);
- if (tail_len > 0)
- memmove(src, src+len, tail_len);
-
- skb_trim(skb, skb->len-len);
- return 0;
-}
-
-static inline unsigned long __nat25_timeout(struct adapter *priv)
-{
- unsigned long timeout;
-
- timeout = jiffies - NAT25_AGEING_TIME*HZ;
-
- return timeout;
-}
-
-
-static inline int __nat25_has_expired(struct adapter *priv,
- struct nat25_network_db_entry *fdb)
-{
- if (time_before_eq(fdb->ageing_timer, __nat25_timeout(priv)))
- return 1;
-
- return 0;
-}
-
-
-static inline void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr,
- unsigned int *ipAddr)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_IPV4;
- memcpy(networkAddr+7, (unsigned char *)ipAddr, 4);
-}
-
-
-static inline void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr,
- __be32 *ipxNetAddr, unsigned char *ipxNodeAddr)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_IPX;
- memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
- memcpy(networkAddr+5, ipxNodeAddr, 6);
-}
-
-
-static inline void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr,
- __be32 *ipxNetAddr, __be16 *ipxSocketAddr)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_IPX;
- memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
- memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2);
-}
-
-
-static inline void __nat25_generate_apple_network_addr(unsigned char *networkAddr,
- __be16 *network, unsigned char *node)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_APPLE;
- memcpy(networkAddr+1, (unsigned char *)network, 2);
- networkAddr[3] = *node;
-}
-
-static inline void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr,
- unsigned char *ac_mac, __be16 *sid)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_PPPOE;
- memcpy(networkAddr+1, (unsigned char *)sid, 2);
- memcpy(networkAddr+3, (unsigned char *)ac_mac, 6);
-}
-
-static void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr,
- __be32 *ipAddr)
-{
- memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
-
- networkAddr[0] = NAT25_IPV6;
- memcpy(networkAddr+1, (unsigned char *)ipAddr, 16);
-}
-
-static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b)
-{
- while (len > 0) {
- if (*data == tag && *(data+1) == len8b && len >= len8b*8)
- return data+2;
-
- len -= (*(data+1))*8;
- data += (*(data+1))*8;
- }
- return NULL;
-}
-
-static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac)
-{
- struct icmp6hdr *icmphdr = (struct icmp6hdr *)data;
- unsigned char *mac;
-
- if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) {
- if (len >= 8) {
- mac = scan_tlv(&data[8], len-8, 1, 1);
- if (mac) {
- _DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
- replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
- memcpy(mac, replace_mac, 6);
- return 1;
- }
- }
- } else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) {
- if (len >= 16) {
- mac = scan_tlv(&data[16], len-16, 1, 1);
- if (mac) {
- _DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
- replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
- memcpy(mac, replace_mac, 6);
- return 1;
- }
- }
- } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) {
- if (len >= 24) {
- mac = scan_tlv(&data[24], len-24, 1, 1);
- if (mac) {
- _DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
- replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
- memcpy(mac, replace_mac, 6);
- return 1;
- }
- }
- } else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) {
- if (len >= 24) {
- mac = scan_tlv(&data[24], len-24, 2, 1);
- if (mac) {
- _DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
- replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
- memcpy(mac, replace_mac, 6);
- return 1;
- }
- }
- } else if (icmphdr->icmp6_type == NDISC_REDIRECT) {
- if (len >= 40) {
- mac = scan_tlv(&data[40], len-40, 2, 1);
- if (mac) {
- _DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
- replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
- memcpy(mac, replace_mac, 6);
- return 1;
- }
- }
- }
- return 0;
-}
-
-static inline int __nat25_network_hash(unsigned char *networkAddr)
-{
- if (networkAddr[0] == NAT25_IPV4) {
- unsigned long x;
-
- x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10];
-
- return x & (NAT25_HASH_SIZE - 1);
- } else if (networkAddr[0] == NAT25_IPX) {
- unsigned long x;
-
- x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^
- networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10];
-
- return x & (NAT25_HASH_SIZE - 1);
- } else if (networkAddr[0] == NAT25_APPLE) {
- unsigned long x;
-
- x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3];
-
- return x & (NAT25_HASH_SIZE - 1);
- } else if (networkAddr[0] == NAT25_PPPOE) {
- unsigned long x;
-
- x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8];
-
- return x & (NAT25_HASH_SIZE - 1);
- } else if (networkAddr[0] == NAT25_IPV6) {
- unsigned long x;
-
- x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^
- networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^
- networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^
- networkAddr[16];
-
- return x & (NAT25_HASH_SIZE - 1);
- } else {
- unsigned long x = 0;
- int i;
-
- for (i = 0; i < MAX_NETWORK_ADDR_LEN; i++)
- x ^= networkAddr[i];
-
- return x & (NAT25_HASH_SIZE - 1);
- }
-}
-
-static inline void __network_hash_link(struct adapter *priv,
- struct nat25_network_db_entry *ent, int hash)
-{
- /* Caller must spin_lock_bh already! */
- ent->next_hash = priv->nethash[hash];
- if (ent->next_hash != NULL)
- ent->next_hash->pprev_hash = &ent->next_hash;
- priv->nethash[hash] = ent;
- ent->pprev_hash = &priv->nethash[hash];
-}
-
-static inline void __network_hash_unlink(struct nat25_network_db_entry *ent)
-{
- /* Caller must spin_lock_bh already! */
- *(ent->pprev_hash) = ent->next_hash;
- if (ent->next_hash != NULL)
- ent->next_hash->pprev_hash = ent->pprev_hash;
- ent->next_hash = NULL;
- ent->pprev_hash = NULL;
-}
-
-static int __nat25_db_network_lookup_and_replace(struct adapter *priv,
- struct sk_buff *skb, unsigned char *networkAddr)
-{
- struct nat25_network_db_entry *db;
- spin_lock_bh(&priv->br_ext_lock);
-
- db = priv->nethash[__nat25_network_hash(networkAddr)];
- while (db != NULL) {
- if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
- if (!__nat25_has_expired(priv, db)) {
- /* replace the destination mac address */
- memcpy(skb->data, db->macAddr, ETH_ALEN);
- atomic_inc(&db->use_count);
-
- DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
- "%02x%02x%02x%02x%02x%02x\n",
- db->macAddr[0],
- db->macAddr[1],
- db->macAddr[2],
- db->macAddr[3],
- db->macAddr[4],
- db->macAddr[5],
- db->networkAddr[0],
- db->networkAddr[1],
- db->networkAddr[2],
- db->networkAddr[3],
- db->networkAddr[4],
- db->networkAddr[5],
- db->networkAddr[6],
- db->networkAddr[7],
- db->networkAddr[8],
- db->networkAddr[9],
- db->networkAddr[10],
- db->networkAddr[11],
- db->networkAddr[12],
- db->networkAddr[13],
- db->networkAddr[14],
- db->networkAddr[15],
- db->networkAddr[16]);
- }
- spin_unlock_bh(&priv->br_ext_lock);
- return 1;
- }
- db = db->next_hash;
- }
- spin_unlock_bh(&priv->br_ext_lock);
- return 0;
-}
-
-static void __nat25_db_network_insert(struct adapter *priv,
- unsigned char *macAddr, unsigned char *networkAddr)
-{
- struct nat25_network_db_entry *db;
- int hash;
-
- spin_lock_bh(&priv->br_ext_lock);
- hash = __nat25_network_hash(networkAddr);
- db = priv->nethash[hash];
- while (db != NULL) {
- if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
- ether_addr_copy(db->macAddr, macAddr);
- db->ageing_timer = jiffies;
- spin_unlock_bh(&priv->br_ext_lock);
- return;
- }
- db = db->next_hash;
- }
- db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db));
- if (db == NULL) {
- spin_unlock_bh(&priv->br_ext_lock);
- return;
- }
- memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN);
- ether_addr_copy(db->macAddr, macAddr);
- atomic_set(&db->use_count, 1);
- db->ageing_timer = jiffies;
-
- __network_hash_link(priv, db, hash);
-
- spin_unlock_bh(&priv->br_ext_lock);
-}
-
-static void __nat25_db_print(struct adapter *priv)
-{
-}
-
-/*
- * NAT2.5 interface
- */
-
-void nat25_db_cleanup(struct adapter *priv)
-{
- int i;
-
- spin_lock_bh(&priv->br_ext_lock);
-
- for (i = 0; i < NAT25_HASH_SIZE; i++) {
- struct nat25_network_db_entry *f;
- f = priv->nethash[i];
- while (f != NULL) {
- struct nat25_network_db_entry *g;
-
- g = f->next_hash;
- if (priv->scdb_entry == f) {
- memset(priv->scdb_mac, 0, ETH_ALEN);
- memset(priv->scdb_ip, 0, 4);
- priv->scdb_entry = NULL;
- }
- __network_hash_unlink(f);
- kfree(f);
- f = g;
- }
- }
- spin_unlock_bh(&priv->br_ext_lock);
-}
-
-void nat25_db_expire(struct adapter *priv)
-{
- int i;
- spin_lock_bh(&priv->br_ext_lock);
-
- for (i = 0; i < NAT25_HASH_SIZE; i++) {
- struct nat25_network_db_entry *f;
- f = priv->nethash[i];
-
- while (f != NULL) {
- struct nat25_network_db_entry *g;
- g = f->next_hash;
-
- if (__nat25_has_expired(priv, f)) {
- if (atomic_dec_and_test(&f->use_count)) {
- if (priv->scdb_entry == f) {
- memset(priv->scdb_mac, 0, ETH_ALEN);
- memset(priv->scdb_ip, 0, 4);
- priv->scdb_entry = NULL;
- }
- __network_hash_unlink(f);
- kfree(f);
- }
- }
- f = g;
- }
- }
- spin_unlock_bh(&priv->br_ext_lock);
-}
-
-int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
-{
- unsigned short protocol;
- unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
- unsigned int tmp;
-
- if (skb == NULL)
- return -1;
-
- if ((method <= NAT25_MIN) || (method >= NAT25_MAX))
- return -1;
-
- protocol = be16_to_cpu(*((__be16 *)(skb->data + 2 * ETH_ALEN)));
-
- /*---------------------------------------------------*/
- /* Handle IP frame */
- /*---------------------------------------------------*/
- if (protocol == ETH_P_IP) {
- struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN);
-
- if (((unsigned char *)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) {
- DEBUG_WARN("NAT25: malformed IP packet !\n");
- return -1;
- }
-
- switch (method) {
- case NAT25_CHECK:
- return -1;
- case NAT25_INSERT:
- /* some multicast with source IP is all zero, maybe other case is illegal */
- /* in class A, B, C, host address is all zero or all one is illegal */
- if (iph->saddr == 0)
- return 0;
- tmp = be32_to_cpu(iph->saddr);
- DEBUG_INFO("NAT25: Insert IP, SA =%08x, DA =%08x\n", tmp, iph->daddr);
- __nat25_generate_ipv4_network_addr(networkAddr, &tmp);
- /* record source IP address and , source mac address into db */
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
-
- __nat25_db_print(priv);
- return 0;
- case NAT25_LOOKUP:
- DEBUG_INFO("NAT25: Lookup IP, SA =%08x, DA =%08x\n", iph->saddr, iph->daddr);
- tmp = be32_to_cpu(iph->daddr);
- __nat25_generate_ipv4_network_addr(networkAddr, &tmp);
-
- if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
- if (*((unsigned char *)&iph->daddr + 3) == 0xff) {
- /* L2 is unicast but L3 is broadcast, make L2 bacome broadcast */
- DEBUG_INFO("NAT25: Set DA as broadcast\n");
- memset(skb->data, 0xff, ETH_ALEN);
- } else {
- /* forward unknown IP packet to upper TCP/IP */
- DEBUG_INFO("NAT25: Replace DA with BR's MAC\n");
- if ((*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0) {
- netdev_info(skb->dev,
- "Re-init netdev_br_init() due to br_mac == 0!\n");
- netdev_br_init(priv->pnetdev);
- }
- memcpy(skb->data, priv->br_mac, ETH_ALEN);
- }
- }
- return 0;
- default:
- return -1;
- }
- } else if (protocol == ETH_P_ARP) {
- /*---------------------------------------------------*/
- /* Handle ARP frame */
- /*---------------------------------------------------*/
- struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN);
- unsigned char *arp_ptr = (unsigned char *)(arp + 1);
- unsigned int *sender, *target;
-
- if (arp->ar_pro != __constant_htons(ETH_P_IP)) {
- DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", be16_to_cpu(arp->ar_pro));
- return -1;
- }
-
- switch (method) {
- case NAT25_CHECK:
- return 0; /* skb_copy for all ARP frame */
- case NAT25_INSERT:
- DEBUG_INFO("NAT25: Insert ARP, MAC =%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
- arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
-
- /* change to ARP sender mac address to wlan STA address */
- memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN);
- arp_ptr += arp->ar_hln;
- sender = (unsigned int *)arp_ptr;
- __nat25_generate_ipv4_network_addr(networkAddr, sender);
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
- __nat25_db_print(priv);
- return 0;
- case NAT25_LOOKUP:
- DEBUG_INFO("NAT25: Lookup ARP\n");
-
- arp_ptr += arp->ar_hln;
- sender = (unsigned int *)arp_ptr;
- arp_ptr += (arp->ar_hln + arp->ar_pln);
- target = (unsigned int *)arp_ptr;
- __nat25_generate_ipv4_network_addr(networkAddr, target);
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
- /* change to ARP target mac address to Lookup result */
- arp_ptr = (unsigned char *)(arp + 1);
- arp_ptr += (arp->ar_hln + arp->ar_pln);
- memcpy(arp_ptr, skb->data, ETH_ALEN);
- return 0;
- default:
- return -1;
- }
- } else if ((protocol == ETH_P_IPX) ||
- (protocol <= ETH_FRAME_LEN)) {
- /*---------------------------------------------------*/
- /* Handle IPX and Apple Talk frame */
- /*---------------------------------------------------*/
- unsigned char ipx_header[2] = {0xFF, 0xFF};
- struct ipxhdr *ipx = NULL;
- struct elapaarp *ea = NULL;
- struct ddpehdr *ddp = NULL;
- unsigned char *framePtr = skb->data + ETH_HLEN;
-
- if (protocol == ETH_P_IPX) {
- DEBUG_INFO("NAT25: Protocol = IPX (Ethernet II)\n");
- ipx = (struct ipxhdr *)framePtr;
- } else if (protocol <= ETH_FRAME_LEN) {
- if (!memcmp(ipx_header, framePtr, 2)) {
- DEBUG_INFO("NAT25: Protocol = IPX (Ethernet 802.3)\n");
- ipx = (struct ipxhdr *)framePtr;
- } else {
- unsigned char ipx_8022_type = 0xE0;
- unsigned char snap_8022_type = 0xAA;
-
- if (*framePtr == snap_8022_type) {
- unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; /* IPX SNAP ID */
- unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; /* Apple Talk AARP SNAP ID */
- unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; /* Apple Talk DDP SNAP ID */
-
- framePtr += 3; /* eliminate the 802.2 header */
-
- if (!memcmp(ipx_snap_id, framePtr, 5)) {
- framePtr += 5; /* eliminate the SNAP header */
-
- DEBUG_INFO("NAT25: Protocol = IPX (Ethernet SNAP)\n");
- ipx = (struct ipxhdr *)framePtr;
- } else if (!memcmp(aarp_snap_id, framePtr, 5)) {
- framePtr += 5; /* eliminate the SNAP header */
-
- ea = (struct elapaarp *)framePtr;
- } else if (!memcmp(ddp_snap_id, framePtr, 5)) {
- framePtr += 5; /* eliminate the SNAP header */
-
- ddp = (struct ddpehdr *)framePtr;
- } else {
- DEBUG_WARN("NAT25: Protocol = Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0],
- framePtr[1], framePtr[2], framePtr[3], framePtr[4]);
- return -1;
- }
- } else if (*framePtr == ipx_8022_type) {
- framePtr += 3; /* eliminate the 802.2 header */
-
- if (!memcmp(ipx_header, framePtr, 2)) {
- DEBUG_INFO("NAT25: Protocol = IPX (Ethernet 802.2)\n");
- ipx = (struct ipxhdr *)framePtr;
- } else {
- return -1;
- }
- } else {
- return -1;
- }
- }
- } else {
- return -1;
- }
-
- /* IPX */
- if (ipx != NULL) {
- switch (method) {
- case NAT25_CHECK:
- if (!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
- DEBUG_INFO("NAT25: Check IPX skb_copy\n");
- return 0;
- case NAT25_INSERT:
- DEBUG_INFO("NAT25: Insert IPX, Dest =%08x,%02x%02x%02x%02x%02x%02x,%04x Source =%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
- ipx->ipx_dest.net,
- ipx->ipx_dest.node[0],
- ipx->ipx_dest.node[1],
- ipx->ipx_dest.node[2],
- ipx->ipx_dest.node[3],
- ipx->ipx_dest.node[4],
- ipx->ipx_dest.node[5],
- ipx->ipx_dest.sock,
- ipx->ipx_source.net,
- ipx->ipx_source.node[0],
- ipx->ipx_source.node[1],
- ipx->ipx_source.node[2],
- ipx->ipx_source.node[3],
- ipx->ipx_source.node[4],
- ipx->ipx_source.node[5],
- ipx->ipx_source.sock);
-
- if (!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) {
- DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n");
-
- __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock);
-
- /* change IPX source node addr to wlan STA address */
- memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN);
- } else {
- __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node);
- }
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
- __nat25_db_print(priv);
- return 0;
- case NAT25_LOOKUP:
- if (!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) {
- DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
-
- __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock);
-
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
-
- /* replace IPX destination node addr with Lookup destination MAC addr */
- memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN);
- } else {
- __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node);
-
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
- }
- return 0;
- default:
- return -1;
- }
- } else if (ea != NULL) {
- /* Sanity check fields. */
- if (ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) {
- DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n");
- return -1;
- }
-
- switch (method) {
- case NAT25_CHECK:
- return 0;
- case NAT25_INSERT:
- /* change to AARP source mac address to wlan STA address */
- memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN);
-
- DEBUG_INFO("NAT25: Insert AARP, Source =%d,%d Destination =%d,%d\n",
- ea->pa_src_net,
- ea->pa_src_node,
- ea->pa_dst_net,
- ea->pa_dst_node);
-
- __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node);
-
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
-
- __nat25_db_print(priv);
- return 0;
- case NAT25_LOOKUP:
- DEBUG_INFO("NAT25: Lookup AARP, Source =%d,%d Destination =%d,%d\n",
- ea->pa_src_net,
- ea->pa_src_node,
- ea->pa_dst_net,
- ea->pa_dst_node);
-
- __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node);
-
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
-
- /* change to AARP destination mac address to Lookup result */
- memcpy(ea->hw_dst, skb->data, ETH_ALEN);
- return 0;
- default:
- return -1;
- }
- } else if (ddp != NULL) {
- switch (method) {
- case NAT25_CHECK:
- return -1;
- case NAT25_INSERT:
- DEBUG_INFO("NAT25: Insert DDP, Source =%d,%d Destination =%d,%d\n",
- ddp->deh_snet,
- ddp->deh_snode,
- ddp->deh_dnet,
- ddp->deh_dnode);
-
- __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode);
-
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
-
- __nat25_db_print(priv);
- return 0;
- case NAT25_LOOKUP:
- DEBUG_INFO("NAT25: Lookup DDP, Source =%d,%d Destination =%d,%d\n",
- ddp->deh_snet,
- ddp->deh_snode,
- ddp->deh_dnet,
- ddp->deh_dnode);
- __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode);
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
- return 0;
- default:
- return -1;
- }
- }
-
- return -1;
- } else if ((protocol == ETH_P_PPP_DISC) ||
- (protocol == ETH_P_PPP_SES)) {
- /*---------------------------------------------------*/
- /* Handle PPPoE frame */
- /*---------------------------------------------------*/
- struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN);
- __be16 *pMagic;
-
- switch (method) {
- case NAT25_CHECK:
- if (ph->sid == 0)
- return 0;
- return 1;
- case NAT25_INSERT:
- if (ph->sid == 0) { /* Discovery phase according to tag */
- if (ph->code == PADI_CODE || ph->code == PADR_CODE) {
- if (priv->ethBrExtInfo.addPPPoETag) {
- struct pppoe_tag *tag, *pOldTag;
- unsigned char tag_buf[40];
- int old_tag_len = 0;
-
- tag = (struct pppoe_tag *)tag_buf;
- pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
- if (pOldTag) { /* if SID existed, copy old value and delete it */
- old_tag_len = ntohs(pOldTag->tag_len);
- if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) {
- DEBUG_ERR("SID tag length too long!\n");
- return -1;
- }
-
- memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN,
- pOldTag->tag_data, old_tag_len);
-
- if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) {
- DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n");
- return -1;
- }
- ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len);
- }
-
- tag->tag_type = PTT_RELAY_SID;
- tag->tag_len = htons(MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN+old_tag_len);
-
- /* insert the magic_code+client mac in relay tag */
- pMagic = (__be16 *)tag->tag_data;
- *pMagic = htons(MAGIC_CODE);
- memcpy(tag->tag_data+MAGIC_CODE_LEN, skb->data+ETH_ALEN, ETH_ALEN);
-
- /* Add relay tag */
- if (__nat25_add_pppoe_tag(skb, tag) < 0)
- return -1;
-
- DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
- (ph->code == PADI_CODE ? "PADI" : "PADR"));
- } else { /* not add relay tag */
- if (priv->pppoe_connection_in_progress &&
- memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) {
- DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n");
- return -2;
- }
-
- if (priv->pppoe_connection_in_progress == 0)
- memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN);
-
- priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE;
- }
- } else {
- return -1;
- }
- } else { /* session phase */
- DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
-
- __nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid));
-
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
-
- __nat25_db_print(priv);
-
- if (!priv->ethBrExtInfo.addPPPoETag &&
- priv->pppoe_connection_in_progress &&
- !memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN))
- priv->pppoe_connection_in_progress = 0;
- }
- return 0;
- case NAT25_LOOKUP:
- if (ph->code == PADO_CODE || ph->code == PADS_CODE) {
- if (priv->ethBrExtInfo.addPPPoETag) {
- struct pppoe_tag *tag;
- unsigned char *ptr;
- unsigned short tagType, tagLen;
- int offset = 0;
-
- ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
- if (ptr == NULL) {
- DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n");
- return -1;
- }
-
- tag = (struct pppoe_tag *)ptr;
- tagType = (unsigned short)((ptr[0] << 8) + ptr[1]);
- tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]);
-
- if ((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) {
- DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen);
- return -1;
- }
-
- pMagic = (__be16 *)tag->tag_data;
- if (ntohs(*pMagic) != MAGIC_CODE) {
- DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n",
- (ph->code == PADO_CODE ? "PADO" : "PADS"));
- return -1;
- }
-
- memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN);
-
- if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN)
- offset = TAG_HDR_LEN;
-
- if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) {
- DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n");
- return -1;
- }
- ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset));
- if (offset > 0)
- tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN);
-
- DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
- (ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name);
- } else { /* not add relay tag */
- if (!priv->pppoe_connection_in_progress) {
- DEBUG_ERR("Discard PPPoE packet due to no connection in progress!\n");
- return -1;
- }
- memcpy(skb->data, priv->pppoe_addr, ETH_ALEN);
- priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE;
- }
- } else {
- if (ph->sid != 0) {
- DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
- __nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid));
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
- __nat25_db_print(priv);
- } else {
- return -1;
- }
- }
- return 0;
- default:
- return -1;
- }
- } else if (protocol == 0x888e) {
- /*---------------------------------------------------*/
- /* Handle EAP frame */
- /*---------------------------------------------------*/
- switch (method) {
- case NAT25_CHECK:
- return -1;
- case NAT25_INSERT:
- return 0;
- case NAT25_LOOKUP:
- return 0;
- default:
- return -1;
- }
- } else if ((protocol == 0xe2ae) || (protocol == 0xe2af)) {
- /*---------------------------------------------------*/
- /* Handle C-Media proprietary frame */
- /*---------------------------------------------------*/
- switch (method) {
- case NAT25_CHECK:
- return -1;
- case NAT25_INSERT:
- return 0;
- case NAT25_LOOKUP:
- return 0;
- default:
- return -1;
- }
- } else if (protocol == ETH_P_IPV6) {
- /*------------------------------------------------*/
- /* Handle IPV6 frame */
- /*------------------------------------------------*/
- struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
-
- if (sizeof(*iph) >= (skb->len - ETH_HLEN)) {
- DEBUG_WARN("NAT25: malformed IPv6 packet !\n");
- return -1;
- }
-
- switch (method) {
- case NAT25_CHECK:
- if (skb->data[0] & 1)
- return 0;
- return -1;
- case NAT25_INSERT:
- DEBUG_INFO("NAT25: Insert IP, SA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
- " DA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
- iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3],
- iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7],
- iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3],
- iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]);
-
- if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) {
- __nat25_generate_ipv6_network_addr(networkAddr, (__be32 *)&iph->saddr);
- __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
- __nat25_db_print(priv);
-
- if (iph->nexthdr == IPPROTO_ICMPV6 &&
- skb->len > (ETH_HLEN + sizeof(*iph) + 4)) {
- if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph),
- skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) {
- struct icmp6hdr *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph));
- hdr->icmp6_cksum = 0;
- hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr,
- be16_to_cpu(iph->payload_len),
- IPPROTO_ICMPV6,
- csum_partial((__u8 *)hdr,
- be16_to_cpu(iph->payload_len), 0));
- }
- }
- }
- return 0;
- case NAT25_LOOKUP:
- DEBUG_INFO("NAT25: Lookup IP, SA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x, DA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
- iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3],
- iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7],
- iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3],
- iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]);
- __nat25_generate_ipv6_network_addr(networkAddr, (__be32 *)&iph->daddr);
- __nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
- return 0;
- default:
- return -1;
- }
- }
- return -1;
-}
-
-int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb)
-{
- if (!(skb->data[0] & 1)) {
- int is_vlan_tag = 0, i, retval = 0;
- unsigned short vlan_hdr = 0;
- unsigned short protocol;
-
- protocol = be16_to_cpu(*((__be16 *)(skb->data + 2 * ETH_ALEN)));
- if (protocol == ETH_P_8021Q) {
- is_vlan_tag = 1;
- vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2));
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2));
- skb_pull(skb, 4);
- }
-
- if (!priv->ethBrExtInfo.nat25_disable) {
- spin_lock_bh(&priv->br_ext_lock);
- /*
- * This function look up the destination network address from
- * the NAT2.5 database. Return value = -1 means that the
- * corresponding network protocol is NOT support.
- */
- if (!priv->ethBrExtInfo.nat25sc_disable &&
- (be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_IP) &&
- !memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) {
- memcpy(skb->data, priv->scdb_mac, ETH_ALEN);
-
- spin_unlock_bh(&priv->br_ext_lock);
- } else {
- spin_unlock_bh(&priv->br_ext_lock);
-
- retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
- }
- } else {
- if (((be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_IP) &&
- !memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) ||
- ((be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_ARP) &&
- !memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) {
- /* for traffic to upper TCP/IP */
- retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
- }
- }
-
- if (is_vlan_tag) {
- skb_push(skb, 4);
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
- *((__be16 *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q);
- *((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr;
- }
-
- if (retval == -1) {
- /* DEBUG_ERR("NAT25: Lookup fail!\n"); */
- return -1;
- }
- }
-
- return 0;
-}
-
-#define SERVER_PORT 67
-#define CLIENT_PORT 68
-#define DHCP_MAGIC 0x63825363
-#define BROADCAST_FLAG 0x8000
-
-struct dhcpMessage {
- u_int8_t op;
- u_int8_t htype;
- u_int8_t hlen;
- u_int8_t hops;
- __be32 xid;
- __be16 secs;
- __be16 flags;
- __be32 ciaddr;
- __be32 yiaddr;
- __be32 siaddr;
- __be32 giaddr;
- u_int8_t chaddr[16];
- u_int8_t sname[64];
- u_int8_t file[128];
- __be32 cookie;
- u_int8_t options[308]; /* 312 - cookie */
-};
-
-void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
-{
- if (skb == NULL)
- return;
-
- if (!priv->ethBrExtInfo.dhcp_bcst_disable) {
- __be16 protocol = *((__be16 *)(skb->data + 2 * ETH_ALEN));
-
- if (protocol == __constant_htons(ETH_P_IP)) { /* IP */
- struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN);
-
- if (iph->protocol == IPPROTO_UDP) { /* UDP */
- struct udphdr *udph = (struct udphdr *)((size_t)iph + (iph->ihl << 2));
-
- if ((udph->source == __constant_htons(CLIENT_PORT)) &&
- (udph->dest == __constant_htons(SERVER_PORT))) { /* DHCP request */
- struct dhcpMessage *dhcph =
- (struct dhcpMessage *)((size_t)udph + sizeof(struct udphdr));
- u32 cookie = be32_to_cpu((__be32)dhcph->cookie);
-
- if (cookie == DHCP_MAGIC) { /* match magic word */
- if (!(dhcph->flags & htons(BROADCAST_FLAG))) {
- /* if not broadcast */
- register int sum = 0;
-
- DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
- /* or BROADCAST flag */
- dhcph->flags |= htons(BROADCAST_FLAG);
- /* recalculate checksum */
- sum = ~(udph->check) & 0xffff;
- sum += be16_to_cpu(dhcph->flags);
- while (sum >> 16)
- sum = (sum & 0xffff) + (sum >> 16);
- udph->check = ~sum;
- }
- }
- }
- }
- }
- }
-}
-
-
-void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
- unsigned char *ipAddr)
-{
- unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
- struct nat25_network_db_entry *db;
- int hash;
-
- __nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr);
- hash = __nat25_network_hash(networkAddr);
- db = priv->nethash[hash];
- while (db != NULL) {
- if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN))
- return (void *)db;
-
- db = db->next_hash;
- }
-
- return NULL;
-}
#include <recv_osdep.h>
#include <cmd_osdep.h>
#include <mlme_osdep.h>
-#include <rtw_br_ext.h>
#include <rtw_mlme_ext.h>
/*
expire_timeout_chk(padapter);
#endif
- rtw_hal_sreset_xmit_status_check(padapter);
-
linked_status_chk(padapter);
traffic_status_watchdog(padapter);
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ***Error: disconnect_cmd_callback Fail ***\n."));
return;
- } else /* clear bridge database */
- nat25_db_cleanup(padapter);
+ }
/* free cmd */
rtw_free_cmd_obj(pcmd);
#define _RTW_DEBUG_C_
#include <rtw_debug.h>
-#include <rtw_version.h>
+#include <usb_ops_linux.h>
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
}
switch (len) {
case 1:
- rtw_write8(padapter, addr, (u8)val);
+ usb_write8(padapter, addr, (u8)val);
break;
case 2:
- rtw_write16(padapter, addr, (u16)val);
+ usb_write16(padapter, addr, (u16)val);
break;
case 4:
- rtw_write32(padapter, addr, val);
+ usb_write32(padapter, addr, val);
break;
default:
DBG_88E("error write length =%d", len);
switch (proc_get_read_len) {
case 1:
- len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
+ len += snprintf(page + len, count - len, "usb_read8(0x%x)=0x%x\n", proc_get_read_addr, usb_read8(padapter, proc_get_read_addr));
break;
case 2:
- len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
+ len += snprintf(page + len, count - len, "usb_read16(0x%x)=0x%x\n", proc_get_read_addr, usb_read16(padapter, proc_get_read_addr));
break;
case 4:
- len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
+ len += snprintf(page + len, count - len, "usb_read32(0x%x)=0x%x\n", proc_get_read_addr, usb_read32(padapter, proc_get_read_addr));
break;
default:
len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
for (i = 0x0; i < 0x300; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
for (i = 0x300; i < 0x600; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
for (i = 0x600; i < 0x800; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
for (i = 0x800; i < 0xB00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
for (i = 0xB00; i < 0xE00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
for (i = 0xE00; i < 0x1000; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
- len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
+ len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_efuse.h>
+#include <usb_ops_linux.h>
+#include <rtl8188e_hal.h>
+#include <rtw_iol.h>
-
-
-/*------------------------Define local variable------------------------------*/
-u8 fakeEfuseBank;
-u32 fakeEfuseUsedBytes;
-u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE] = {0};
-u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN] = {0};
-u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN] = {0};
-
-u32 BTEfuseUsedBytes;
-u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
-u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
-u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
-
-u32 fakeBTEfuseUsedBytes;
-u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
-u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
-u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
-/*------------------------Define local variable------------------------------*/
-
-/* */
#define REG_EFUSE_CTRL 0x0030
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
-/* */
-
-bool
-Efuse_Read1ByteFromFakeContent(
- struct adapter *pAdapter,
- u16 Offset,
- u8 *Value);
-bool
-Efuse_Read1ByteFromFakeContent(
- struct adapter *pAdapter,
- u16 Offset,
- u8 *Value)
-{
- if (Offset >= EFUSE_MAX_HW_SIZE)
- return false;
- if (fakeEfuseBank == 0)
- *Value = fakeEfuseContent[Offset];
- else
- *Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset];
- return true;
-}
-static bool
-Efuse_Write1ByteToFakeContent(
- struct adapter *pAdapter,
- u16 Offset,
- u8 Value)
-{
- if (Offset >= EFUSE_MAX_HW_SIZE)
- return false;
- if (fakeEfuseBank == 0)
- fakeEfuseContent[Offset] = Value;
- else
- fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value;
- return true;
-}
+enum{
+ VOLTAGE_V25 = 0x03,
+ LDOE25_SHIFT = 28 ,
+ };
-/*-----------------------------------------------------------------------------
+/*
* Function: Efuse_PowerSwitch
*
* Overview: When we want to enable write operation, we should change to
* pwr on state. When we stop write, we should switch to 500k mode
* and disable LDO 2.5V.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/17/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-void
-Efuse_PowerSwitch(
+ */
+
+void Efuse_PowerSwitch(
struct adapter *pAdapter,
- u8 write,
+ u8 bWrite,
u8 PwrState)
{
- pAdapter->HalFunc.EfusePowerSwitch(pAdapter, write, PwrState);
+ u8 tempval;
+ u16 tmpV16;
+
+ if (PwrState) {
+ usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
+
+ /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
+ tmpV16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL);
+ if (!(tmpV16 & PWC_EV12V)) {
+ tmpV16 |= PWC_EV12V;
+ usb_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
+ }
+ /* Reset: 0x0000h[28], default valid */
+ tmpV16 = usb_read16(pAdapter, REG_SYS_FUNC_EN);
+ if (!(tmpV16 & FEN_ELDR)) {
+ tmpV16 |= FEN_ELDR;
+ usb_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16);
+ }
+
+ /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
+ tmpV16 = usb_read16(pAdapter, REG_SYS_CLKR);
+ if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
+ tmpV16 |= (LOADER_CLK_EN | ANA8M);
+ usb_write16(pAdapter, REG_SYS_CLKR, tmpV16);
+ }
+
+ if (bWrite) {
+ /* Enable LDO 2.5V before read/write action */
+ tempval = usb_read8(pAdapter, EFUSE_TEST+3);
+ tempval &= 0x0F;
+ tempval |= (VOLTAGE_V25 << 4);
+ usb_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
+ }
+ } else {
+ usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
+
+ if (bWrite) {
+ /* Disable LDO 2.5V after read/write action */
+ tempval = usb_read8(pAdapter, EFUSE_TEST+3);
+ usb_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
+ }
+ }
}
-/*-----------------------------------------------------------------------------
- * Function: efuse_GetCurrentSize
- *
- * Overview: Get current efuse size!!!
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/16/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-u16
-Efuse_GetCurrentSize(
- struct adapter *pAdapter,
- u8 efuseType,
- bool pseudo)
+static void
+efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
{
- u16 ret = 0;
+ u8 *efuseTbl = NULL;
+ u8 rtemp8;
+ u16 eFuse_Addr = 0;
+ u8 offset, wren;
+ u16 i, j;
+ u16 **eFuseWord = NULL;
+ u16 efuse_utilized = 0;
+ u8 u1temp = 0;
+
+ efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E);
+ if (efuseTbl == NULL) {
+ DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
+ goto exit;
+ }
- ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, pseudo);
+ eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
+ if (eFuseWord == NULL) {
+ DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
+ goto exit;
+ }
- return ret;
+ /* 0. Refresh efuse init map as all oxFF. */
+ for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
+ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+ eFuseWord[i][j] = 0xFFFF;
+
+ /* */
+ /* 1. Read the first byte to check if efuse is empty!!! */
+ /* */
+ /* */
+ rtemp8 = *(phymap+eFuse_Addr);
+ if (rtemp8 != 0xFF) {
+ efuse_utilized++;
+ eFuse_Addr++;
+ } else {
+ DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8);
+ goto exit;
+ }
+
+ /* */
+ /* 2. Read real efuse content. Filter PG header and every section data. */
+ /* */
+ while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
+ /* Check PG header for section num. */
+ if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */
+ u1temp = ((rtemp8 & 0xE0) >> 5);
+ rtemp8 = *(phymap+eFuse_Addr);
+ if ((rtemp8 & 0x0F) == 0x0F) {
+ eFuse_Addr++;
+ rtemp8 = *(phymap+eFuse_Addr);
+
+ if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
+ eFuse_Addr++;
+ continue;
+ } else {
+ offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
+ wren = (rtemp8 & 0x0F);
+ eFuse_Addr++;
+ }
+ } else {
+ offset = ((rtemp8 >> 4) & 0x0f);
+ wren = (rtemp8 & 0x0f);
+ }
+
+ if (offset < EFUSE_MAX_SECTION_88E) {
+ /* Get word enable value from PG header */
+ for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
+ /* Check word enable condition in the section */
+ if (!(wren & 0x01)) {
+ rtemp8 = *(phymap+eFuse_Addr);
+ eFuse_Addr++;
+ efuse_utilized++;
+ eFuseWord[offset][i] = (rtemp8 & 0xff);
+ if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
+ break;
+ rtemp8 = *(phymap+eFuse_Addr);
+ eFuse_Addr++;
+ efuse_utilized++;
+ eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
+
+ if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
+ break;
+ }
+ wren >>= 1;
+ }
+ }
+ /* Read next PG header */
+ rtemp8 = *(phymap+eFuse_Addr);
+
+ if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
+ efuse_utilized++;
+ eFuse_Addr++;
+ }
+ }
+
+ /* */
+ /* 3. Collect 16 sections and 4 word unit into Efuse map. */
+ /* */
+ for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
+ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
+ efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff);
+ efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff);
+ }
+ }
+
+ /* */
+ /* 4. Copy from Efuse map to output pointer memory!!! */
+ /* */
+ for (i = 0; i < _size_byte; i++)
+ pbuf[i] = efuseTbl[_offset+i];
+
+ /* */
+ /* 5. Calculate Efuse utilization. */
+ /* */
+
+exit:
+ kfree(efuseTbl);
+
+ if (eFuseWord)
+ rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
}
-/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */
-u8
-Efuse_CalculateWordCnts(u8 word_en)
+static void efuse_read_phymap_from_txpktbuf(
+ struct adapter *adapter,
+ int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */
+ u8 *content, /* buffer to store efuse physical map */
+ u16 *size /* for efuse content: the max byte to read. will update to byte read */
+ )
{
- u8 word_cnts = 0;
- if (!(word_en & BIT(0)))
- word_cnts++; /* 0 : write enable */
- if (!(word_en & BIT(1)))
- word_cnts++;
- if (!(word_en & BIT(2)))
- word_cnts++;
- if (!(word_en & BIT(3)))
- word_cnts++;
- return word_cnts;
+ u16 dbg_addr = 0;
+ u32 start = 0, passing_time = 0;
+ u8 reg_0x143 = 0;
+ u32 lo32 = 0, hi32 = 0;
+ u16 len = 0, count = 0;
+ int i = 0;
+ u16 limit = *size;
+
+ u8 *pos = content;
+
+ if (bcnhead < 0) /* if not valid */
+ bcnhead = usb_read8(adapter, REG_TDECTRL+1);
+
+ DBG_88E("%s bcnhead:%d\n", __func__, bcnhead);
+
+ usb_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
+
+ dbg_addr = bcnhead*128/8; /* 8-bytes addressing */
+
+ while (1) {
+ usb_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i);
+
+ usb_write8(adapter, REG_TXPKTBUF_DBG, 0);
+ start = jiffies;
+ while (!(reg_0x143 = usb_read8(adapter, REG_TXPKTBUF_DBG)) &&
+ (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
+ DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, usb_read8(adapter, 0x106));
+ msleep(1);
+ }
+
+ lo32 = usb_read32(adapter, REG_PKTBUF_DBG_DATA_L);
+ hi32 = usb_read32(adapter, REG_PKTBUF_DBG_DATA_H);
+
+ if (i == 0) {
+ u8 lenc[2];
+ u16 lenbak, aaabak;
+ u16 aaa;
+ lenc[0] = usb_read8(adapter, REG_PKTBUF_DBG_DATA_L);
+ lenc[1] = usb_read8(adapter, REG_PKTBUF_DBG_DATA_L+1);
+
+ aaabak = le16_to_cpup((__le16 *)lenc);
+ lenbak = le16_to_cpu(*((__le16 *)lenc));
+ aaa = le16_to_cpup((__le16 *)&lo32);
+ len = le16_to_cpu(*((__le16 *)&lo32));
+
+ limit = (len-2 < limit) ? len-2 : limit;
+
+ DBG_88E("%s len:%u, lenbak:%u, aaa:%u, aaabak:%u\n", __func__, len, lenbak, aaa, aaabak);
+
+ memcpy(pos, ((u8 *)&lo32)+2, (limit >= count+2) ? 2 : limit-count);
+ count += (limit >= count+2) ? 2 : limit-count;
+ pos = content+count;
+
+ } else {
+ memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count);
+ count += (limit >= count+4) ? 4 : limit-count;
+ pos = content+count;
+ }
+
+ if (limit > count && len-2 > count) {
+ memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count);
+ count += (limit >= count+4) ? 4 : limit-count;
+ pos = content+count;
+ }
+
+ if (limit <= count || len-2 <= count)
+ break;
+ i++;
+ }
+ usb_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
+ DBG_88E("%s read count:%u\n", __func__, count);
+ *size = count;
}
-/*
- * Description:
- * Execute E-Fuse read byte operation.
- * Referred from SD1 Richard.
- * Assumption:
- * 1. Boot from E-Fuse and successfully auto-load.
- * 2. PASSIVE_LEVEL (USB interface)
- * Created by Roger, 2008.10.21.
- */
-void
-ReadEFuseByte(
- struct adapter *Adapter,
- u16 _offset,
- u8 *pbuf,
- bool pseudo)
-{
- u32 value32;
- u8 readbyte;
- u16 retry;
-
- if (pseudo) {
- Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf);
- return;
+static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
+{
+ s32 status = _FAIL;
+ u8 physical_map[512];
+ u16 size = 512;
+
+ usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
+ _rtw_memset(physical_map, 0xFF, 512);
+ usb_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
+ status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
+ if (status == _SUCCESS)
+ efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
+ efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
+ return status;
+}
+
+void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf)
+{
+
+ if (rtw_IOL_applied(Adapter)) {
+ rtw_hal_power_on(Adapter);
+ iol_mode_enable(Adapter, 1);
+ iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
+ iol_mode_enable(Adapter, 0);
}
+ return;
+}
- /* Write Address */
- rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));
- readbyte = rtw_read8(Adapter, EFUSE_CTRL+2);
- rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
-
- /* Write bit 32 0 */
- readbyte = rtw_read8(Adapter, EFUSE_CTRL+3);
- rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));
-
- /* Check bit 32 read-ready */
- retry = 0;
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
- while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) {
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
- retry++;
+/* Do not support BT */
+void EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
+{
+ switch (type) {
+ case TYPE_EFUSE_MAX_SECTION:
+ {
+ u8 *pMax_section;
+ pMax_section = (u8 *)pOut;
+ *pMax_section = EFUSE_MAX_SECTION_88E;
+ }
+ break;
+ case TYPE_EFUSE_REAL_CONTENT_LEN:
+ {
+ u16 *pu2Tmp;
+ pu2Tmp = (u16 *)pOut;
+ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
+ }
+ break;
+ case TYPE_EFUSE_CONTENT_LEN_BANK:
+ {
+ u16 *pu2Tmp;
+ pu2Tmp = (u16 *)pOut;
+ *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
+ }
+ break;
+ case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
+ {
+ u16 *pu2Tmp;
+ pu2Tmp = (u16 *)pOut;
+ *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
+ }
+ break;
+ case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
+ {
+ u16 *pu2Tmp;
+ pu2Tmp = (u16 *)pOut;
+ *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
+ }
+ break;
+ case TYPE_EFUSE_MAP_LEN:
+ {
+ u16 *pu2Tmp;
+ pu2Tmp = (u16 *)pOut;
+ *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
+ }
+ break;
+ case TYPE_EFUSE_PROTECT_BYTES_BANK:
+ {
+ u8 *pu1Tmp;
+ pu1Tmp = (u8 *)pOut;
+ *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
+ }
+ break;
+ default:
+ {
+ u8 *pu1Tmp;
+ pu1Tmp = (u8 *)pOut;
+ *pu1Tmp = 0;
+ }
+ break;
}
+}
- /* 20100205 Joseph: Add delay suggested by SD1 Victor. */
- /* This fix the problem that Efuse read error in high temperature condition. */
- /* Designer says that there shall be some delay after ready bit is set, or the */
- /* result will always stay on last data we read. */
- udelay(50);
- value32 = rtw_read32(Adapter, EFUSE_CTRL);
-
- *pbuf = (u8)(value32 & 0xff);
-}
-
-/* Description:
- * 1. Execute E-Fuse read byte operation according as map offset and
- * save to E-Fuse table.
- * 2. Referred from SD1 Richard.
- * Assumption:
- * 1. Boot from E-Fuse and successfully auto-load.
- * 2. PASSIVE_LEVEL (USB interface)
- * Created by Roger, 2008.10.21.
- * 2008/12/12 MH
- * 1. Reorganize code flow and reserve bytes. and add description.
- * 2. Add efuse utilization collect.
- * 2008/12/22 MH
- * Read Efuse must check if we write section 1 data again!!!
- * Sec1 write addr must be after sec5.
- */
+u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data)
+{
+ u16 tmpaddr = 0;
+ u16 start_addr = efuse_addr;
+ u8 badworden = 0x0F;
+ u8 tmpdata[8];
+
+ _rtw_memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE);
+
+ if (!(word_en&BIT0)) {
+ tmpaddr = start_addr;
+ efuse_OneByteWrite(pAdapter, start_addr++, data[0]);
+ efuse_OneByteWrite(pAdapter, start_addr++, data[1]);
+
+ efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0]);
+ efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[1]);
+ if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
+ badworden &= (~BIT0);
+ }
+ if (!(word_en&BIT1)) {
+ tmpaddr = start_addr;
+ efuse_OneByteWrite(pAdapter, start_addr++, data[2]);
+ efuse_OneByteWrite(pAdapter, start_addr++, data[3]);
+
+ efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2]);
+ efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[3]);
+ if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
+ badworden &= (~BIT1);
+ }
+ if (!(word_en&BIT2)) {
+ tmpaddr = start_addr;
+ efuse_OneByteWrite(pAdapter, start_addr++, data[4]);
+ efuse_OneByteWrite(pAdapter, start_addr++, data[5]);
+
+ efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4]);
+ efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[5]);
+ if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
+ badworden &= (~BIT2);
+ }
+ if (!(word_en&BIT3)) {
+ tmpaddr = start_addr;
+ efuse_OneByteWrite(pAdapter, start_addr++, data[6]);
+ efuse_OneByteWrite(pAdapter, start_addr++, data[7]);
+
+ efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6]);
+ efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[7]);
+ if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
+ badworden &= (~BIT3);
+ }
+ return badworden;
+}
-static void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool pseudo)
+u16 Efuse_GetCurrentSize(struct adapter *pAdapter)
{
- Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, pseudo);
+ int bContinual = true;
+ u16 efuse_addr = 0;
+ u8 hoffset = 0, hworden = 0;
+ u8 efuse_data, word_cnts = 0;
+
+ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+
+ while (bContinual &&
+ efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) &&
+ AVAILABLE_EFUSE_ADDR(efuse_addr)) {
+ if (efuse_data != 0xFF) {
+ if ((efuse_data&0x1F) == 0x0F) { /* extended header */
+ hoffset = efuse_data;
+ efuse_addr++;
+ efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data);
+ if ((efuse_data & 0x0F) == 0x0F) {
+ efuse_addr++;
+ continue;
+ } else {
+ hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+ hworden = efuse_data & 0x0F;
+ }
+ } else {
+ hoffset = (efuse_data>>4) & 0x0F;
+ hworden = efuse_data & 0x0F;
+ }
+ word_cnts = Efuse_CalculateWordCnts(hworden);
+ /* read next header */
+ efuse_addr = efuse_addr + (word_cnts*2)+1;
+ } else {
+ bContinual = false;
+ }
+ }
+
+ rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
+
+ return efuse_addr;
}
-void EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool pseudo
- )
+int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data)
{
- pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, pseudo);
+ u8 ReadState = PG_STATE_HEADER;
+ int bContinual = true;
+ int bDataEmpty = true;
+ u8 efuse_data, word_cnts = 0;
+ u16 efuse_addr = 0;
+ u8 hoffset = 0, hworden = 0;
+ u8 tmpidx = 0;
+ u8 tmpdata[8];
+ u8 max_section = 0;
+ u8 tmp_header = 0;
+
+ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section);
+
+ if (data == NULL)
+ return false;
+ if (offset > max_section)
+ return false;
+
+ _rtw_memset((void *)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+ _rtw_memset((void *)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+
+ /* <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
+ /* Skip dummy parts to prevent unexpected data read from Efuse. */
+ /* By pass right now. 2009.02.19. */
+ while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) {
+ /* Header Read ------------- */
+ if (ReadState & PG_STATE_HEADER) {
+ if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) && (efuse_data != 0xFF)) {
+ if (EXT_HEADER(efuse_data)) {
+ tmp_header = efuse_data;
+ efuse_addr++;
+ efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data);
+ if (!ALL_WORDS_DISABLED(efuse_data)) {
+ hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+ hworden = efuse_data & 0x0F;
+ } else {
+ DBG_88E("Error, All words disabled\n");
+ efuse_addr++;
+ continue;
+ }
+ } else {
+ hoffset = (efuse_data>>4) & 0x0F;
+ hworden = efuse_data & 0x0F;
+ }
+ word_cnts = Efuse_CalculateWordCnts(hworden);
+ bDataEmpty = true;
+
+ if (hoffset == offset) {
+ for (tmpidx = 0; tmpidx < word_cnts*2; tmpidx++) {
+ if (efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx, &efuse_data)) {
+ tmpdata[tmpidx] = efuse_data;
+ if (efuse_data != 0xff)
+ bDataEmpty = false;
+ }
+ }
+ if (bDataEmpty == false) {
+ ReadState = PG_STATE_DATA;
+ } else {/* read next header */
+ efuse_addr = efuse_addr + (word_cnts*2)+1;
+ ReadState = PG_STATE_HEADER;
+ }
+ } else {/* read next header */
+ efuse_addr = efuse_addr + (word_cnts*2)+1;
+ ReadState = PG_STATE_HEADER;
+ }
+ } else {
+ bContinual = false;
+ }
+ } else if (ReadState & PG_STATE_DATA) {
+ /* Data section Read ------------- */
+ efuse_WordEnableDataRead(hworden, tmpdata, data);
+ efuse_addr = efuse_addr + (word_cnts*2)+1;
+ ReadState = PG_STATE_HEADER;
+ }
+
+ }
+
+ if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) &&
+ (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff))
+ return false;
+ else
+ return true;
}
-/*-----------------------------------------------------------------------------
- * Function: EFUSE_Read1Byte
- *
- * Overview: Copy from WMAC fot EFUSE read 1 byte.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 09/23/2008 MHC Copy from WMAC.
- *
- *---------------------------------------------------------------------------*/
-u8 EFUSE_Read1Byte(struct adapter *Adapter, u16 Address)
-{
- u8 data;
- u8 Bytetemp = {0x00};
- u8 temp = {0x00};
- u32 k = 0;
- u16 contentLen = 0;
-
- EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&contentLen, false);
-
- if (Address < contentLen) { /* E-fuse 512Byte */
- /* Write E-fuse Register address bit0~7 */
- temp = Address & 0xFF;
- rtw_write8(Adapter, EFUSE_CTRL+1, temp);
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
- /* Write E-fuse Register address bit8~9 */
- temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
- rtw_write8(Adapter, EFUSE_CTRL+2, temp);
-
- /* Write 0x30[31]= 0 */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
- temp = Bytetemp & 0x7F;
- rtw_write8(Adapter, EFUSE_CTRL+3, temp);
-
- /* Wait Write-ready (0x30[31]= 1) */
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
- while (!(Bytetemp & 0x80)) {
- Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
- k++;
- if (k == 1000) {
- k = 0;
+static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr)
+{
+ u8 originaldata[8], badworden = 0;
+ u16 efuse_addr = *pAddr;
+ u32 PgWriteSuccess = 0;
+
+ _rtw_memset((void *)originaldata, 0xff, 8);
+
+ if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata)) {
+ /* check if data exist */
+ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata);
+
+ if (badworden != 0xf) { /* write fail */
+ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata);
+
+ if (!PgWriteSuccess)
+ return false;
+ else
+ efuse_addr = Efuse_GetCurrentSize(pAdapter);
+ } else {
+ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
+ }
+ } else {
+ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
+ }
+ *pAddr = efuse_addr;
+ return true;
+}
+
+static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt)
+{
+ bool bRet = false;
+ u16 efuse_addr = *pAddr, efuse_max_available_len = 0;
+ u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
+ u8 repeatcnt = 0;
+
+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len);
+
+ while (efuse_addr < efuse_max_available_len) {
+ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
+
+ while (tmp_header == 0xFF) {
+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+ return false;
+
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
+ }
+
+ /* to write ext_header */
+ if (tmp_header == pg_header) {
+ efuse_addr++;
+ pg_header_temp = pg_header;
+ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
+
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
+
+ while (tmp_header == 0xFF) {
+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+ return false;
+
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
+ }
+
+ if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */
+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
+ return false;
+ } else {
+ efuse_addr++;
+ continue;
+ }
+ } else if (pg_header != tmp_header) { /* offset PG fail */
+ struct pgpkt fixPkt;
+ fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
+ fixPkt.word_en = tmp_header & 0x0F;
+ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+ if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr))
+ return false;
+ } else {
+ bRet = true;
break;
}
+ } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */
+ efuse_addr += 2;
+ continue;
}
- data = rtw_read8(Adapter, EFUSE_CTRL);
- return data;
- } else {
- return 0xFF;
}
-} /* EFUSE_Read1Byte */
+ *pAddr = efuse_addr;
+ return bRet;
+}
-/* 11/16/2008 MH Read one byte from real Efuse. */
-u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data, bool pseudo)
+static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt)
{
- u8 tmpidx = 0;
- u8 result;
+ bool bRet = false;
+ u8 pg_header = 0, tmp_header = 0;
+ u16 efuse_addr = *pAddr;
+ u8 repeatcnt = 0;
+
+ pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
+
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
- if (pseudo) {
- result = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
- return result;
+ while (tmp_header == 0xFF) {
+ if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
+ return false;
+ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
+ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
}
- /* -----------------e-fuse reg ctrl --------------------------------- */
- /* address */
- rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr & 0xff));
- rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) & 0x03)) |
- (rtw_read8(pAdapter, EFUSE_CTRL+2) & 0xFC));
- rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
+ if (pg_header == tmp_header) {
+ bRet = true;
+ } else {
+ struct pgpkt fixPkt;
+ fixPkt.offset = (tmp_header>>4) & 0x0F;
+ fixPkt.word_en = tmp_header & 0x0F;
+ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
+ if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr))
+ return false;
+ }
- while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
- tmpidx++;
- if (tmpidx < 100) {
- *data = rtw_read8(pAdapter, EFUSE_CTRL);
- result = true;
+ *pAddr = efuse_addr;
+ return bRet;
+}
+
+static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt)
+{
+ u16 efuse_addr = *pAddr;
+ u8 badworden = 0;
+ u32 PgWriteSuccess = 0;
+
+ badworden = 0x0f;
+ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data);
+ if (badworden == 0x0F) {
+ /* write ok */
+ return true;
} else {
- *data = 0xff;
- result = false;
+ /* reorganize other pg packet */
+ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data);
+ if (!PgWriteSuccess)
+ return false;
+ else
+ return true;
}
- return result;
}
-/* 11/16/2008 MH Write one byte to reald Efuse. */
-u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data, bool pseudo)
+static bool
+hal_EfusePgPacketWriteHeader(
+ struct adapter *pAdapter,
+ u8 efuseType,
+ u16 *pAddr,
+ struct pgpkt *pTargetPkt)
{
- u8 tmpidx = 0;
- u8 result;
+ bool bRet = false;
+
+ if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
+ bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt);
+ else
+ bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt);
+
+ return bRet;
+}
+
+static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
+ u8 *pWden)
+{
+ u8 match_word_en = 0x0F; /* default all words are disabled */
+
+ /* check if the same words are enabled both target and current PG packet */
+ if (((pTargetPkt->word_en & BIT0) == 0) &&
+ ((pCurPkt->word_en & BIT0) == 0))
+ match_word_en &= ~BIT0; /* enable word 0 */
+ if (((pTargetPkt->word_en & BIT1) == 0) &&
+ ((pCurPkt->word_en & BIT1) == 0))
+ match_word_en &= ~BIT1; /* enable word 1 */
+ if (((pTargetPkt->word_en & BIT2) == 0) &&
+ ((pCurPkt->word_en & BIT2) == 0))
+ match_word_en &= ~BIT2; /* enable word 2 */
+ if (((pTargetPkt->word_en & BIT3) == 0) &&
+ ((pCurPkt->word_en & BIT3) == 0))
+ match_word_en &= ~BIT3; /* enable word 3 */
+
+ *pWden = match_word_en;
+
+ if (match_word_en != 0xf)
+ return true;
+ else
+ return false;
+}
+
+static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr)
+{
+ bool bRet = false;
+ u8 i, efuse_data;
- if (pseudo) {
- result = Efuse_Write1ByteToFakeContent(pAdapter, addr, data);
- return result;
+ for (i = 0; i < (word_cnts*2); i++) {
+ if (efuse_OneByteRead(pAdapter, (startAddr+i), &efuse_data) && (efuse_data != 0xFF))
+ bRet = true;
}
+ return bRet;
+}
- /* -----------------e-fuse reg ctrl --------------------------------- */
- /* address */
- rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
- rtw_write8(pAdapter, EFUSE_CTRL+2,
- (rtw_read8(pAdapter, EFUSE_CTRL+2) & 0xFC) |
- (u8)((addr>>8) & 0x03));
- rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */
+static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt)
+{
+ bool bRet = false;
+ u8 i, efuse_data = 0, cur_header = 0;
+ u8 matched_wden = 0, badworden = 0;
+ u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
+ struct pgpkt curPkt;
- rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len);
+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max);
- while ((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
- tmpidx++;
+ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
+ startAddr %= EFUSE_REAL_CONTENT_LEN;
- if (tmpidx < 100)
- result = true;
- else
- result = false;
+ while (1) {
+ if (startAddr >= efuse_max_available_len) {
+ bRet = false;
+ break;
+ }
- return result;
+ if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data) && (efuse_data != 0xFF)) {
+ if (EXT_HEADER(efuse_data)) {
+ cur_header = efuse_data;
+ startAddr++;
+ efuse_OneByteRead(pAdapter, startAddr, &efuse_data);
+ if (ALL_WORDS_DISABLED(efuse_data)) {
+ bRet = false;
+ break;
+ } else {
+ curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
+ curPkt.word_en = efuse_data & 0x0F;
+ }
+ } else {
+ cur_header = efuse_data;
+ curPkt.offset = (cur_header>>4) & 0x0F;
+ curPkt.word_en = cur_header & 0x0F;
+ }
+
+ curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
+ /* if same header is found but no data followed */
+ /* write some part of data followed by the header. */
+ if ((curPkt.offset == pTargetPkt->offset) &&
+ (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1)) &&
+ wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
+ /* Here to write partial data */
+ badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data);
+ if (badworden != 0x0F) {
+ u32 PgWriteSuccess = 0;
+ /* if write fail on some words, write these bad words again */
+
+ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data);
+
+ if (!PgWriteSuccess) {
+ bRet = false; /* write fail, return */
+ break;
+ }
+ }
+ /* partial write ok, update the target packet for later use */
+ for (i = 0; i < 4; i++) {
+ if ((matched_wden & (0x1<<i)) == 0) /* this word has been written */
+ pTargetPkt->word_en |= (0x1<<i); /* disable the word */
+ }
+ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+ }
+ /* read from next header */
+ startAddr = startAddr + (curPkt.word_cnts*2) + 1;
+ } else {
+ /* not used header, 0xff */
+ *pAddr = startAddr;
+ bRet = true;
+ break;
+ }
+ }
+ return bRet;
}
-int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool pseudo)
+static bool
+hal_EfusePgCheckAvailableAddr(
+ struct adapter *pAdapter,
+ u8 efuseType
+ )
{
- int ret = 0;
+ u16 efuse_max_available_len = 0;
- ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, pseudo);
+ /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */
+ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len);
- return ret;
+ if (Efuse_GetCurrentSize(pAdapter) >= efuse_max_available_len)
+ return false;
+ return true;
}
-int Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
+static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt)
{
- int ret;
+ _rtw_memset((void *)pTargetPkt->data, 0xFF, sizeof(u8)*8);
+ pTargetPkt->offset = offset;
+ pTargetPkt->word_en = word_en;
+ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
+ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
+}
- ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, pseudo);
+bool Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData)
+{
+ struct pgpkt targetPkt;
+ u16 startAddr = 0;
+ u8 efuseType = EFUSE_WIFI;
- return ret;
+ if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType))
+ return false;
+
+ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
+
+ if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt))
+ return false;
+
+ if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt))
+ return false;
+
+ if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt))
+ return false;
+
+ return true;
}
+u8 Efuse_CalculateWordCnts(u8 word_en)
+{
+ u8 word_cnts = 0;
+ if (!(word_en & BIT(0)))
+ word_cnts++; /* 0 : write enable */
+ if (!(word_en & BIT(1)))
+ word_cnts++;
+ if (!(word_en & BIT(2)))
+ word_cnts++;
+ if (!(word_en & BIT(3)))
+ word_cnts++;
+ return word_cnts;
+}
-static int Efuse_PgPacketWrite_BT(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
+u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data)
{
- int ret;
+ u8 tmpidx = 0;
+ u8 result;
- ret = pAdapter->HalFunc.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, pseudo);
+ usb_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr & 0xff));
+ usb_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) & 0x03)) |
+ (usb_read8(pAdapter, EFUSE_CTRL+2) & 0xFC));
- return ret;
+ usb_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
+
+ while (!(0x80 & usb_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
+ tmpidx++;
+ if (tmpidx < 100) {
+ *data = usb_read8(pAdapter, EFUSE_CTRL);
+ result = true;
+ } else {
+ *data = 0xff;
+ result = false;
+ }
+ return result;
}
-/*-----------------------------------------------------------------------------
- * Function: efuse_WordEnableDataRead
- *
- * Overview: Read allowed word in current efuse section data.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/16/2008 MHC Create Version 0.
- * 11/21/2008 MHC Fix Write bug when we only enable late word.
- *
- *---------------------------------------------------------------------------*/
+u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data)
+{
+ u8 tmpidx = 0;
+ u8 result;
+
+ usb_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
+ usb_write8(pAdapter, EFUSE_CTRL+2,
+ (usb_read8(pAdapter, EFUSE_CTRL+2) & 0xFC) |
+ (u8)((addr>>8) & 0x03));
+ usb_write8(pAdapter, EFUSE_CTRL, data);/* data */
+
+ usb_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
+
+ while ((0x80 & usb_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
+ tmpidx++;
+
+ if (tmpidx < 100)
+ result = true;
+ else
+ result = false;
+
+ return result;
+}
+
+/*
+ * Overview: Read allowed word in current efuse section data.
+ */
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata)
{
if (!(word_en&BIT(0))) {
}
}
-u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool pseudo)
-{
- u8 ret = 0;
-
- ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, pseudo);
-
- return ret;
-}
-
static u8 efuse_read8(struct adapter *padapter, u16 address, u8 *value)
{
- return efuse_OneByteRead(padapter, address, value, false);
+ return efuse_OneByteRead(padapter, address, value);
}
static u8 efuse_write8(struct adapter *padapter, u16 address, u8 *value)
{
- return efuse_OneByteWrite(padapter, address, *value, false);
+ return efuse_OneByteWrite(padapter, address, *value);
}
/*
u8 res = _FAIL;
u8 (*rw8)(struct adapter *, u16, u8*);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len, false);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if (start_addr > real_content_len)
return _FAIL;
return res;
}
-/* */
+
u16 efuse_GetMaxSize(struct adapter *padapter)
{
u16 max_size;
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size);
return max_size;
}
-/* */
+
u8 efuse_GetCurrentSize(struct adapter *padapter, u16 *size)
{
Efuse_PowerSwitch(padapter, false, true);
- *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, false);
+ *size = Efuse_GetCurrentSize(padapter);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
-/* */
+
u8 rtw_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u16 mapLen = 0;
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen);
if ((addr + cnts) > mapLen)
return _FAIL;
Efuse_PowerSwitch(padapter, false, true);
- efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, false);
+ efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
-u8 rtw_BT_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
-{
- u16 mapLen = 0;
-
- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
-
- if ((addr + cnts) > mapLen)
- return _FAIL;
-
- Efuse_PowerSwitch(padapter, false, true);
-
- efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, false);
-
- Efuse_PowerSwitch(padapter, false, false);
-
- return _SUCCESS;
-}
-/* */
u8 rtw_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u8 offset, word_en;
u8 ret = _SUCCESS;
u16 mapLen = 0;
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen);
if ((addr + cnts) > mapLen)
return _FAIL;
}
if (word_en != 0xF) {
- ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, false);
+ ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata);
DBG_88E("offset=%x\n", offset);
DBG_88E("word_en=%x\n", word_en);
return ret;
}
-/* */
-u8 rtw_BT_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
-{
- u8 offset, word_en;
- u8 *map;
- u8 newdata[PGPKT_DATA_SIZE + 1];
- s32 i, idx;
- u8 ret = _SUCCESS;
- u16 mapLen = 0;
-
- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
-
- if ((addr + cnts) > mapLen)
- return _FAIL;
-
- map = rtw_zmalloc(mapLen);
- if (map == NULL)
- return _FAIL;
-
- ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map);
- if (ret == _FAIL)
- goto exit;
-
- Efuse_PowerSwitch(padapter, true, true);
-
- offset = (addr >> 3);
- word_en = 0xF;
- _rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE + 1);
- i = addr & 0x7; /* index of one package */
- idx = 0; /* data index */
-
- if (i & 0x1) {
- /* odd start */
- if (data[idx] != map[addr+idx]) {
- word_en &= ~BIT(i >> 1);
- newdata[i-1] = map[addr+idx-1];
- newdata[i] = data[idx];
- }
- i++;
- idx++;
- }
- do {
- for (; i < PGPKT_DATA_SIZE; i += 2) {
- if (cnts == idx)
- break;
- if ((cnts - idx) == 1) {
- if (data[idx] != map[addr+idx]) {
- word_en &= ~BIT(i >> 1);
- newdata[i] = data[idx];
- newdata[i+1] = map[addr+idx+1];
- }
- idx++;
- break;
- } else {
- if ((data[idx] != map[addr+idx]) ||
- (data[idx+1] != map[addr+idx+1])) {
- word_en &= ~BIT(i >> 1);
- newdata[i] = data[idx];
- newdata[i+1] = data[idx + 1];
- }
- idx += 2;
- }
- if (idx == cnts)
- break;
- }
-
- if (word_en != 0xF) {
- DBG_88E("%s: offset=%#X\n", __func__, offset);
- DBG_88E("%s: word_en=%#X\n", __func__, word_en);
- DBG_88E("%s: data=", __func__);
- for (i = 0; i < PGPKT_DATA_SIZE; i++)
- DBG_88E("0x%02X ", newdata[i]);
- DBG_88E("\n");
-
- ret = Efuse_PgPacketWrite_BT(padapter, offset, word_en, newdata, false);
- if (ret == _FAIL)
- break;
- }
-
- if (idx == cnts)
- break;
-
- offset++;
- i = 0;
- word_en = 0xF;
- _rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE);
- } while (1);
-
- Efuse_PowerSwitch(padapter, true, false);
-
-exit:
-
- kfree(map);
-
- return ret;
-}
-
-/*-----------------------------------------------------------------------------
- * Function: efuse_ShadowRead1Byte
- * efuse_ShadowRead2Byte
- * efuse_ShadowRead4Byte
- *
- * Overview: Read from efuse init map by one/two/four bytes !!!!!
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/12/2008 MHC Create Version 0.
+/*
+ * Function: efuse_ShadowRead1Byte
+ * efuse_ShadowRead2Byte
+ * efuse_ShadowRead4Byte
*
- *---------------------------------------------------------------------------*/
+ * Overview: Read from efuse init map by one/two/four bytes !!!!!
+ */
static void
efuse_ShadowRead1Byte(
struct adapter *pAdapter,
*Value = pEEPROM->efuse_eeprom_data[Offset];
-} /* EFUSE_ShadowRead1Byte */
+}
-/* Read Two Bytes */
static void
efuse_ShadowRead2Byte(
struct adapter *pAdapter,
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
-} /* EFUSE_ShadowRead2Byte */
+}
-/* Read Four Bytes */
static void
efuse_ShadowRead4Byte(
struct adapter *pAdapter,
*Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16;
*Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24;
-} /* efuse_ShadowRead4Byte */
+}
-/*-----------------------------------------------------------------------------
- * Function: Efuse_ReadAllMap
- *
+/*
* Overview: Read All Efuse content
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/11/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse, bool pseudo)
+ */
+static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse)
{
u16 mapLen = 0;
Efuse_PowerSwitch(pAdapter, false, true);
- EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen);
- efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, pseudo);
+ efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse);
Efuse_PowerSwitch(pAdapter, false, false);
}
-/*-----------------------------------------------------------------------------
- * Function: EFUSE_ShadowMapUpdate
- *
+/*
* Overview: Transfer current EFUSE content to shadow init and modify map.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/13/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
+ */
void EFUSE_ShadowMapUpdate(
struct adapter *pAdapter,
- u8 efuseType,
- bool pseudo)
+ u8 efuseType)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
u16 mapLen = 0;
- EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
+ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen);
if (pEEPROM->bautoload_fail_flag)
_rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen);
else
- Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, pseudo);
-} /* EFUSE_ShadowMapUpdate */
+ Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data);
+}
-/*-----------------------------------------------------------------------------
- * Function: EFUSE_ShadowRead
- *
+/*
* Overview: Read from efuse init map !!!!!
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/12/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
+ */
void EFUSE_ShadowRead(struct adapter *pAdapter, u8 Type, u16 Offset, u32 *Value)
{
if (Type == 1)
efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
else if (Type == 4)
efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
-
-} /* EFUSE_ShadowRead */
+}
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-/*
-
-The purpose of rtw_io.c
-
-a. provides the API
-
-b. provides the protocol engine
-
-c. provides the software interface between caller and the hardware interface
-
-
-Compiler Flag Option:
-
-USB:
- a. USE_ASYNC_IRP: Both sync/async operations are provided.
-
-Only sync read/rtw_write_mem operations are provided.
-
-jackson@realtek.com.tw
-
-*/
-
-#define _RTW_IO_C_
-#include <osdep_service.h>
-#include <drv_types.h>
-#include <rtw_io.h>
-#include <osdep_intf.h>
-#include <usb_ops.h>
-
-#define rtw_le16_to_cpu(val) le16_to_cpu(val)
-#define rtw_le32_to_cpu(val) le32_to_cpu(val)
-#define rtw_cpu_to_le16(val) cpu_to_le16(val)
-#define rtw_cpu_to_le32(val) cpu_to_le32(val)
-
-
-u8 _rtw_read8(struct adapter *adapter, u32 addr)
-{
- u8 r_val;
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
-
- _read8 = pintfhdl->io_ops._read8;
- r_val = _read8(pintfhdl, addr);
- return r_val;
-}
-
-u16 _rtw_read16(struct adapter *adapter, u32 addr)
-{
- u16 r_val;
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
- _read16 = pintfhdl->io_ops._read16;
-
- r_val = _read16(pintfhdl, addr);
- return r_val;
-}
-
-u32 _rtw_read32(struct adapter *adapter, u32 addr)
-{
- u32 r_val;
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
- _read32 = pintfhdl->io_ops._read32;
-
- r_val = _read32(pintfhdl, addr);
- return r_val;
-}
-
-int _rtw_write8(struct adapter *adapter, u32 addr, u8 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
- int ret;
- _write8 = pintfhdl->io_ops._write8;
-
- ret = _write8(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-
-int _rtw_write16(struct adapter *adapter, u32 addr, u16 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
- int ret;
- _write16 = pintfhdl->io_ops._write16;
-
- ret = _write16(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-int _rtw_write32(struct adapter *adapter, u32 addr, u32 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
- int ret;
- _write32 = pintfhdl->io_ops._write32;
-
- ret = _write32(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-
-int _rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *pdata)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
- int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
- int ret;
- _writeN = pintfhdl->io_ops._writeN;
-
- ret = _writeN(pintfhdl, addr, length, pdata);
-
- return RTW_STATUS_CODE(ret);
-}
-int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
- int ret;
- _write8_async = pintfhdl->io_ops._write8_async;
-
- ret = _write8_async(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-
-int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
- int ret;
-
- _write16_async = pintfhdl->io_ops._write16_async;
- ret = _write16_async(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-
-int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val)
-{
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
- int ret;
-
- _write32_async = pintfhdl->io_ops._write32_async;
- ret = _write32_async(pintfhdl, addr, val);
-
- return RTW_STATUS_CODE(ret);
-}
-
-void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
-{
- void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
-
- if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
- RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
- ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
- adapter->bDriverStopped, adapter->bSurpriseRemoved));
- return;
- }
- _read_mem = pintfhdl->io_ops._read_mem;
- _read_mem(pintfhdl, addr, cnt, pmem);
-}
-
-void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
-{
- void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
-
-
- _write_mem = pintfhdl->io_ops._write_mem;
-
- _write_mem(pintfhdl, addr, cnt, pmem);
-
-}
-
-void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
-{
- u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
-
-
- if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
- RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
- ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
- adapter->bDriverStopped, adapter->bSurpriseRemoved));
- return;
- }
-
- _read_port = pintfhdl->io_ops._read_port;
-
- _read_port(pintfhdl, addr, cnt, pmem);
-
-}
-
-void _rtw_read_port_cancel(struct adapter *adapter)
-{
- void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
-
- _read_port_cancel = pintfhdl->io_ops._read_port_cancel;
-
- if (_read_port_cancel)
- _read_port_cancel(pintfhdl);
-}
-
-u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
-{
- u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
- u32 ret = _SUCCESS;
-
-
- _write_port = pintfhdl->io_ops._write_port;
-
- ret = _write_port(pintfhdl, addr, cnt, pmem);
-
-
- return ret;
-}
-
-u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
-{
- int ret = _SUCCESS;
- struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
- struct submit_ctx sctx;
-
- rtw_sctx_init(&sctx, timeout_ms);
- pxmitbuf->sctx = &sctx;
-
- ret = _rtw_write_port(adapter, addr, cnt, pmem);
-
- if (ret == _SUCCESS)
- ret = rtw_sctx_wait(&sctx);
-
- return ret;
-}
-
-void _rtw_write_port_cancel(struct adapter *adapter)
-{
- void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
- struct io_priv *pio_priv = &adapter->iopriv;
- struct intf_hdl *pintfhdl = &(pio_priv->intf);
-
- _write_port_cancel = pintfhdl->io_ops._write_port_cancel;
-
- if (_write_port_cancel)
- _write_port_cancel(pintfhdl);
-}
-
-int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
-{
- struct io_priv *piopriv = &padapter->iopriv;
- struct intf_hdl *pintf = &piopriv->intf;
-
- if (set_intf_ops == NULL)
- return _FAIL;
-
- piopriv->padapter = padapter;
- pintf->padapter = padapter;
- pintf->pintf_dev = adapter_to_dvobj(padapter);
-
- set_intf_ops(&pintf->io_ops);
-
- return _SUCCESS;
-}
rtw_os_xmit_schedule(adapter);
pmlmeext = &adapter->mlmeextpriv;
- if (pmlmeext->sitesurvey_res.bss_cnt == 0)
- rtw_hal_sreset_reset(adapter);
}
void rtw_dummy_event_callback(struct adapter *adapter , u8 *pbuf)
void rtw_dynamic_check_timer_handlder(struct adapter *adapter)
{
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct registry_priv *pregistrypriv = &adapter->registrypriv;
if (!adapter)
rtw_auto_scan_handler(adapter);
}
}
-
- rcu_read_lock();
-
- if (rcu_dereference(adapter->pnetdev->rx_handler_data) &&
- (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == true)) {
- /* expire NAT2.5 entry */
- nat25_db_expire(adapter);
-
- if (adapter->pppoe_connection_in_progress > 0)
- adapter->pppoe_connection_in_progress--;
-
- /* due to rtw_dynamic_check_timer_handlder() is called every 2 seconds */
- if (adapter->pppoe_connection_in_progress > 0)
- adapter->pppoe_connection_in_progress--;
- }
-
- rcu_read_unlock();
}
#define RTW_SCAN_RESULT_EXPIRE 2000
if (padapter->bRxRSSIDisplay)
_linked_rx_signal_strehgth_display(padapter);
- rtw_hal_sreset_linked_status_check(padapter);
-
if (is_client_associated_to_ap(padapter)) {
/* linked infrastructure client mode */
#define _RTW_MP_C_
#include <drv_types.h>
-
+#include <usb_ops_linux.h>
#include "rtl8188e_hal.h"
#include <linux/vmalloc.h>
switch (sz) {
case 1:
- val = rtw_read8(padapter, addr);
+ val = usb_read8(padapter, addr);
break;
case 2:
- val = rtw_read16(padapter, addr);
+ val = usb_read16(padapter, addr);
break;
case 4:
- val = rtw_read32(padapter, addr);
+ val = usb_read32(padapter, addr);
break;
default:
val = 0xffffffff;
{
switch (sz) {
case 1:
- rtw_write8(padapter, addr, (u8)val);
+ usb_write8(padapter, addr, (u8)val);
break;
case 2:
- rtw_write16(padapter, addr, (u16)val);
+ usb_write16(padapter, addr, (u16)val);
break;
case 4:
- rtw_write32(padapter, addr, val);
+ usb_write32(padapter, addr, val);
break;
default:
break;
/* */
/* Don't accept any packets */
- rtw_write32(pAdapter, REG_RCR, 0);
+ usb_write32(pAdapter, REG_RCR, 0);
PHY_IQCalibrate(pAdapter, false);
dm_CheckTXPowerTracking(&pHalData->odmpriv); /* trigger thermal meter */
pMptCtx->backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
/* set ant to wifi side in mp mode */
- rtw_write16(pAdapter, 0x870, 0x300);
- rtw_write16(pAdapter, 0x860, 0x110);
+ usb_write16(pAdapter, 0x870, 0x300);
+ usb_write16(pAdapter, 0x860, 0x110);
if (pAdapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
/* 3 1. disable firmware dynamic mechanism */
/* disable Power Training, Rate Adaptive */
- v8 = rtw_read8(padapter, REG_BCN_CTRL);
+ v8 = usb_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
- rtw_write8(padapter, REG_BCN_CTRL, v8);
+ usb_write8(padapter, REG_BCN_CTRL, v8);
/* 3 2. disable driver dynamic mechanism */
/* disable Dynamic Initial Gain */
if (res == _SUCCESS) {
/* set MSR to WIFI_FW_ADHOC_STATE */
- val8 = rtw_read8(padapter, MSR) & 0xFC; /* 0x0102 */
+ val8 = usb_read8(padapter, MSR) & 0xFC; /* 0x0102 */
val8 |= WIFI_FW_ADHOC_STATE;
- rtw_write8(padapter, MSR, val8); /* Link in ad hoc network */
+ usb_write8(padapter, MSR, val8); /* Link in ad hoc network */
}
return res;
}
pHalData->ReceiveConfig |= ACRC32;
- rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
+ usb_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
/* Accept all data frames */
- rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF);
+ usb_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF);
} else {
- rtw_write32(pAdapter, REG_RCR, 0);
+ usb_write32(pAdapter, REG_RCR, 0);
}
}
phyrx_set = 0;
phyrx_set |= _RXERR_RPT_SEL(i); /* select */
phyrx_set |= RXERR_RPT_RST; /* set counter to zero */
- rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
+ usb_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
}
}
u32 phyrx_set = 0, count = 0;
phyrx_set = _RXERR_RPT_SEL(selbit & 0xF);
- rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
+ usb_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
/* Read packet count */
- count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
+ count = usb_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
return count;
}
int psd_val;
- psd_val = rtw_read32(pAdapter, 0x808);
+ psd_val = usb_read32(pAdapter, 0x808);
psd_val &= 0xFFBFFC00;
psd_val |= point;
- rtw_write32(pAdapter, 0x808, psd_val);
+ usb_write32(pAdapter, 0x808, psd_val);
mdelay(1);
psd_val |= 0x00400000;
- rtw_write32(pAdapter, 0x808, psd_val);
+ usb_write32(pAdapter, 0x808, psd_val);
mdelay(1);
- psd_val = rtw_read32(pAdapter, 0x8B4);
+ psd_val = usb_read32(pAdapter, 0x8B4);
psd_val &= 0x0000FFFF;
#include <osdep_service.h>
#include <drv_types.h>
#include <mlme_osdep.h>
-
+#include <usb_ops_linux.h>
/* include <rtw_mp.h> */
#include <rtw_mp_ioctl.h>
switch (width) {
case 1:
- RegRWStruct->value = rtw_read8(Adapter, offset);
+ RegRWStruct->value = usb_read8(Adapter, offset);
break;
case 2:
- RegRWStruct->value = rtw_read16(Adapter, offset);
+ RegRWStruct->value = usb_read16(Adapter, offset);
break;
default:
width = 4;
- RegRWStruct->value = rtw_read32(Adapter, offset);
+ RegRWStruct->value = usb_read32(Adapter, offset);
break;
}
RT_TRACE(_module_mp_, _drv_notice_,
status = NDIS_STATUS_NOT_ACCEPTED;
break;
}
- rtw_write8(padapter, offset, (u8)value);
+ usb_write8(padapter, offset, (u8)value);
break;
case 2:
if (value > 0xFFFF) {
status = NDIS_STATUS_NOT_ACCEPTED;
break;
}
- rtw_write16(padapter, offset, (u16)value);
+ usb_write16(padapter, offset, (u16)value);
break;
case 4:
- rtw_write32(padapter, offset, value);
+ usb_write32(padapter, offset, value);
break;
default:
status = NDIS_STATUS_NOT_ACCEPTED;
("+rtl8188eu_oid_rt_pro_read_efuse_hd: buf_len=%d addr=%d cnts=%d\n",
poid_par_priv->information_buf_len, addr, cnts));
- EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr + cnts) > max_available_size) {
RT_TRACE(_module_mp_, _drv_err_, ("!rtl8188eu_oid_rt_pro_read_efuse_hdl: parameter error!\n"));
("+rtl8188eu_oid_rt_pro_write_efuse_hdl: buf_len=%d addr=0x%04x cnts=%d\n",
poid_par_priv->information_buf_len, addr, cnts));
- EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr + cnts) > max_available_size) {
RT_TRACE(_module_mp_, _drv_err_, ("!rtl8188eu_oid_rt_pro_write_efuse_hdl: parameter error"));
ppgpkt->offset));
Efuse_PowerSwitch(Adapter, false, true);
- if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, false) == true)
+ if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data) == true)
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
else
status = NDIS_STATUS_FAILURE;
ppgpkt->offset, ppgpkt->word_en));
Efuse_PowerSwitch(Adapter, true, true);
- if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, false) == true)
+ if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data) == true)
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
else
status = NDIS_STATUS_FAILURE;
RT_TRACE(_module_mp_, _drv_notice_, ("+rtl8188eu_oid_rt_pro_efuse_map_hdl\n"));
- EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&maplen, false);
+ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&maplen);
*poid_par_priv->bytes_rw = 0;
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
+#include <usb_ops_linux.h>
#include <linux/usb.h>
+#include <usb_osintf.h>
+
+static int rtw_hw_suspend(struct adapter *padapter)
+{
+ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+ struct net_device *pnetdev = padapter->pnetdev;
+
+
+ if ((!padapter->bup) || (padapter->bDriverStopped) ||
+ (padapter->bSurpriseRemoved)) {
+ DBG_88E("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n",
+ padapter->bup, padapter->bDriverStopped,
+ padapter->bSurpriseRemoved);
+ goto error_exit;
+ }
+
+ /* system suspend */
+ LeaveAllPowerSaveMode(padapter);
+
+ DBG_88E("==> rtw_hw_suspend\n");
+ _enter_pwrlock(&pwrpriv->lock);
+ pwrpriv->bips_processing = true;
+ /* s1. */
+ if (pnetdev) {
+ netif_carrier_off(pnetdev);
+ netif_tx_stop_all_queues(pnetdev);
+ }
+
+ /* s2. */
+ rtw_disassoc_cmd(padapter, 500, false);
+
+ /* s2-2. indicate disconnect to os */
+ {
+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+ if (check_fwstate(pmlmepriv, _FW_LINKED)) {
+ _clr_fwstate_(pmlmepriv, _FW_LINKED);
+
+ rtw_led_control(padapter, LED_CTL_NO_LINK);
+
+ rtw_os_indicate_disconnect(padapter);
+
+ /* donnot enqueue cmd */
+ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0);
+ }
+ }
+ /* s2-3. */
+ rtw_free_assoc_resources(padapter, 1);
+
+ /* s2-4. */
+ rtw_free_network_queue(padapter, true);
+ rtw_ips_dev_unload(padapter);
+ pwrpriv->rf_pwrstate = rf_off;
+ pwrpriv->bips_processing = false;
+
+ _exit_pwrlock(&pwrpriv->lock);
+
+ return 0;
+
+error_exit:
+ DBG_88E("%s, failed\n", __func__);
+ return -1;
+}
+
+static int rtw_hw_resume(struct adapter *padapter)
+{
+ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
+ struct net_device *pnetdev = padapter->pnetdev;
+
+
+ /* system resume */
+ DBG_88E("==> rtw_hw_resume\n");
+ _enter_pwrlock(&pwrpriv->lock);
+ pwrpriv->bips_processing = true;
+ rtw_reset_drv_sw(padapter);
+
+ if (pm_netdev_open(pnetdev, false) != 0) {
+ _exit_pwrlock(&pwrpriv->lock);
+ goto error_exit;
+ }
+
+ netif_device_attach(pnetdev);
+ netif_carrier_on(pnetdev);
+
+ if (!netif_queue_stopped(pnetdev))
+ netif_start_queue(pnetdev);
+ else
+ netif_wake_queue(pnetdev);
+
+ pwrpriv->bkeepfwalive = false;
+ pwrpriv->brfoffbyhw = false;
+
+ pwrpriv->rf_pwrstate = rf_on;
+ pwrpriv->bips_processing = false;
+
+ _exit_pwrlock(&pwrpriv->lock);
+
+
+ return 0;
+error_exit:
+ DBG_88E("%s, Open net dev failed\n", __func__);
+ return -1;
+}
void ips_enter(struct adapter *padapter)
{
}
}
- DBG_88E("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
+ DBG_88E("==> ips_leave.....LED(0x%08x)...\n", usb_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
{
- struct adapter *buddy = adapter->pbuddy_adapter;
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
#endif
goto exit;
- /* consider buddy, if exist */
- if (buddy) {
- struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv);
- #ifdef CONFIG_88EU_P2P
- struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo);
- #endif
-
- if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
- check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
- check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ||
- check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ||
-#if defined(CONFIG_88EU_P2P)
- !rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE))
-#else
- 0)
-#endif
- goto exit;
- }
ret = true;
exit:
if (rfpwrstate == rf_off) {
pwrpriv->change_rfpwrstate = rf_off;
pwrpriv->brfoffbyhw = true;
- padapter->bCardDisableWOHSM = true;
rtw_hw_suspend(padapter);
} else {
pwrpriv->change_rfpwrstate = rf_on;
******************************************************************************/
#include <rtw_sreset.h>
+#include <usb_ops_linux.h>
void sreset_init_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
- mutex_init(&psrtpriv->silentreset_mutex);
- psrtpriv->silent_reset_inprogress = false;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
- psrtpriv->last_tx_time = 0;
- psrtpriv->last_tx_complete_time = 0;
-}
-void sreset_reset_value(struct adapter *padapter)
-{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
- struct sreset_priv *psrtpriv = &pHalData->srestpriv;
-
- psrtpriv->silent_reset_inprogress = false;
- psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
- psrtpriv->last_tx_time = 0;
- psrtpriv->last_tx_complete_time = 0;
}
u8 sreset_get_wifi_status(struct adapter *padapter)
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
- if (psrtpriv->silent_reset_inprogress)
- return status;
- val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
+ val32 = usb_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) {
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) {
phwxmit->accnt = 0;
}
-static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
-{
- struct sk_buff *skb = *pskb;
- int res, is_vlan_tag = 0, i, do_nat25 = 1;
- unsigned short vlan_hdr = 0;
- void *br_port = NULL;
-
- rcu_read_lock();
- br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
- rcu_read_unlock();
- spin_lock_bh(&padapter->br_ext_lock);
- if (!(skb->data[0] & 1) && br_port &&
- memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
- *((__be16 *)(skb->data+MACADDRLEN*2)) != __constant_htons(ETH_P_8021Q) &&
- *((__be16 *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP) &&
- !memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) {
- memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
- padapter->scdb_entry->ageing_timer = jiffies;
- spin_unlock_bh(&padapter->br_ext_lock);
- } else {
- if (*((__be16 *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) {
- is_vlan_tag = 1;
- vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2));
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2));
- skb_pull(skb, 4);
- }
- if (!memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
- (*((__be16 *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)))
- memcpy(padapter->br_ip, skb->data+WLAN_ETHHDR_LEN+12, 4);
-
- if (*((__be16 *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)) {
- if (memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN)) {
- padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter,
- skb->data+MACADDRLEN, skb->data+WLAN_ETHHDR_LEN+12);
- if (padapter->scdb_entry) {
- memcpy(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN);
- memcpy(padapter->scdb_ip, skb->data+WLAN_ETHHDR_LEN+12, 4);
- padapter->scdb_entry->ageing_timer = jiffies;
- do_nat25 = 0;
- }
- } else {
- if (padapter->scdb_entry) {
- padapter->scdb_entry->ageing_timer = jiffies;
- do_nat25 = 0;
- } else {
- memset(padapter->scdb_mac, 0, MACADDRLEN);
- memset(padapter->scdb_ip, 0, 4);
- }
- }
- }
- spin_unlock_bh(&padapter->br_ext_lock);
- if (do_nat25) {
- if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) {
- struct sk_buff *newskb;
-
- if (is_vlan_tag) {
- skb_push(skb, 4);
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
- *((__be16 *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q);
- *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr;
- }
-
- newskb = skb_copy(skb, GFP_ATOMIC);
- if (newskb == NULL) {
- DEBUG_ERR("TX DROP: skb_copy fail!\n");
- return -1;
- }
- dev_kfree_skb_any(skb);
-
- *pskb = skb = newskb;
- if (is_vlan_tag) {
- vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2));
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2));
- skb_pull(skb, 4);
- }
- }
-
- if (skb_is_nonlinear(skb))
- DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __func__);
-
- res = skb_linearize(skb);
- if (res < 0) {
- DEBUG_ERR("TX DROP: skb_linearize fail!\n");
- return -1;
- }
-
- res = nat25_db_handle(padapter, skb, NAT25_INSERT);
- if (res < 0) {
- if (res == -2) {
- DEBUG_ERR("TX DROP: nat25_db_handle fail!\n");
- return -1;
- }
- return 0;
- }
- }
-
- memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
-
- dhcp_flag_bcast(padapter, skb);
-
- if (is_vlan_tag) {
- skb_push(skb, 4);
- for (i = 0; i < 6; i++)
- *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
- *((__be16 *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q);
- *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr;
- }
- }
-
- /* check if SA is equal to our MAC */
- if (memcmp(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) {
- DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n",
- skb->data[6], skb->data[7], skb->data[8], skb->data[9], skb->data[10], skb->data[11]);
- return -1;
- }
- return 0;
-}
-
u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe)
{
u32 addr;
{
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct xmit_frame *pxmitframe = NULL;
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- void *br_port = NULL;
s32 res;
pxmitframe = rtw_alloc_xmitframe(pxmitpriv);
return -1;
}
- rcu_read_lock();
- br_port = rcu_dereference(padapter->pnetdev->rx_handler_data);
- rcu_read_unlock();
-
- if (br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE)) {
- res = rtw_br_client_tx(padapter, ppkt);
- if (res == -1) {
- rtw_free_xmitframe(pxmitpriv, pxmitframe);
- return -1;
- }
- }
-
res = update_attrib(padapter, *ppkt, &pxmitframe->attrib);
if (res == _FAIL) {
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
break;
case 12:
- MaskFromReg = rtw_read32(adapt, REG_ARFR0);
+ MaskFromReg = usb_read32(adapt, REG_ARFR0);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 13:
- MaskFromReg = rtw_read32(adapt, REG_ARFR1);
+ MaskFromReg = usb_read32(adapt, REG_ARFR1);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 14:
- MaskFromReg = rtw_read32(adapt, REG_ARFR2);
+ MaskFromReg = usb_read32(adapt, REG_ARFR2);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 15:
- MaskFromReg = rtw_read32(adapt, REG_ARFR3);
+ MaskFromReg = usb_read32(adapt, REG_ARFR3);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
default:
{
struct adapter *adapt = dm_odm->Adapter;
- rtw_write16(adapt, REG_TX_RPT_TIME, minRptTime);
+ usb_write16(adapt, REG_TX_RPT_TIME, minRptTime);
}
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
- #include "odm_precomp.h"
-
-/* 3============================================================ */
-/* 3 IQ Calibration */
-/* 3============================================================ */
-
-void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm)
-{
-}
-
-u8 ODM_GetRightChnlPlaceforIQK(u8 chnl)
-{
- u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
- 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
- 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
- 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
- 155, 157, 159, 161, 163, 165
- };
- u8 place = chnl;
-
- if (chnl > 14) {
- for (place = 14; place < sizeof(channel_all); place++) {
- if (channel_all[place] == chnl)
- return place-13;
- }
- }
- return 0;
-}
-
-/******************************************************************************
+/*
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ */
#include "odm_precomp.h"
-/*---------------------------Define Local Constant---------------------------*/
/* 2010/04/25 MH Define the max tx power tracking tx agc power. */
#define ODM_TXPWRTRACK_MAX_IDX_88E 6
-/*---------------------------Define Local Constant---------------------------*/
-/* 3============================================================ */
+u8 ODM_GetRightChnlPlaceforIQK(u8 chnl)
+{
+ u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+ 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
+ 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
+ 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
+ 155, 157, 159, 161, 163, 165
+ };
+ u8 place = chnl;
+
+ if (chnl > 14) {
+ for (place = 14; place < sizeof(channel_all); place++) {
+ if (channel_all[place] == chnl)
+ return place-13;
+ }
+ }
+ return 0;
+}
+
/* 3 Tx Power Tracking */
-/* 3============================================================ */
-/*-----------------------------------------------------------------------------
+/*
* Function: ODM_TxPwrTrackAdjust88E()
*
* Overview: 88E we can not write 0xc80/c94/c4c/ 0xa2x. Instead of write TX agc.
* No matter OFDM & CCK use the same method.
*
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
* Revised History:
* When Who Remark
* 04/23/2012 MHC Create Version 0.
* 04/23/2012 MHC Adjust TX agc directly not throughput BB digital.
*
- *---------------------------------------------------------------------------*/
+ */
void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u8 Type,/* 0 = OFDM, 1 = CCK */
u8 *pDirection, /* 1 = +(increase) 2 = -(decrease) */
u32 *pOutWriteVal /* Tx tracking CCK/OFDM BB swing index adjust */
*pOutWriteVal = pwr_value | (pwr_value<<8) | (pwr_value<<16) | (pwr_value<<24);
} /* ODM_TxPwrTrackAdjust88E */
-/*-----------------------------------------------------------------------------
+/*
* Function: odm_TxPwrTrackSetPwr88E()
*
* Overview: 88E change all channel tx power accordign to flag.
* OFDM & CCK are all different.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 04/23/2012 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
+ */
static void odm_TxPwrTrackSetPwr88E(struct odm_dm_struct *dm_odm)
{
if (dm_odm->BbSwingFlagOfdm || dm_odm->BbSwingFlagCck) {
}
} /* odm_TxPwrTrackSetPwr88E */
-/* 091212 chiyokolin */
void
odm_TXPowerTrackingCallback_ThermalMeter_8188E(
struct adapter *Adapter
}
if (delta_IQK >= 8) { /* Delta temperature is equal to or larger than 20 centigrade. */
- ODM_ResetIQKResult(dm_odm);
-
dm_odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue;
PHY_IQCalibrate_8188E(Adapter, false);
}
/* 1 7. IQK */
#define MAX_TOLERANCE 5
-#define IQK_DELAY_TIME 1 /* ms */
static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB)
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n"));
for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) {
- MACBackup[i] = rtw_read8(adapt, MACReg[i]);
+ MACBackup[i] = usb_read8(adapt, MACReg[i]);
}
- MACBackup[i] = rtw_read32(adapt, MACReg[i]);
+ MACBackup[i] = usb_read32(adapt, MACReg[i]);
}
static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n"));
for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) {
- rtw_write8(adapt, MACReg[i], (u8)MACBackup[i]);
+ usb_write8(adapt, MACReg[i], (u8)MACBackup[i]);
}
- rtw_write32(adapt, MACReg[i], MACBackup[i]);
+ usb_write32(adapt, MACReg[i], MACBackup[i]);
}
void
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n"));
- rtw_write8(adapt, MACReg[i], 0x3F);
+ usb_write8(adapt, MACReg[i], 0x3F);
for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) {
- rtw_write8(adapt, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
+ usb_write8(adapt, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
}
- rtw_write8(adapt, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
+ usb_write8(adapt, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
}
void
u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
/* Check continuous TX and Packet TX */
- tmpreg = rtw_read8(adapt, 0xd03);
+ tmpreg = usb_read8(adapt, 0xd03);
if ((tmpreg&0x70) != 0) /* Deal with contisuous TX case */
- rtw_write8(adapt, 0xd03, tmpreg&0x8F); /* disable all continuous TX */
+ usb_write8(adapt, 0xd03, tmpreg&0x8F); /* disable all continuous TX */
else /* Deal with Packet TX case */
- rtw_write8(adapt, REG_TXPAUSE, 0xFF); /* block all queues */
+ usb_write8(adapt, REG_TXPAUSE, 0xFF); /* block all queues */
if ((tmpreg&0x70) != 0) {
/* 1. Read original RF mode */
if ((tmpreg&0x70) != 0) {
/* Deal with continuous TX case */
/* Path-A */
- rtw_write8(adapt, 0xd03, tmpreg);
+ usb_write8(adapt, 0xd03, tmpreg);
PHY_SetRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
/* Path-B */
PHY_SetRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
} else {
/* Deal with Packet TX case */
- rtw_write8(adapt, REG_TXPAUSE, 0x00);
+ usb_write8(adapt, REG_TXPAUSE, 0x00);
}
}
{
if (!adapt->hw_init_completed) {
u8 u1btmp;
- u1btmp = rtw_read8(adapt, REG_LEDCFG2) | BIT7;
- rtw_write8(adapt, REG_LEDCFG2, u1btmp);
+ u1btmp = usb_read8(adapt, REG_LEDCFG2) | BIT7;
+ usb_write8(adapt, REG_LEDCFG2, u1btmp);
PHY_SetBBReg(adapt, rFPGA0_XAB_RFParameter, BIT13, 0x01);
}
--*/
#include <HalPwrSeqCmd.h>
+#include <usb_ops_linux.h>
/* Description: */
/* This routine deals with the Power Configuration CMDs parsing
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* Read the value from system register */
- value = rtw_read8(padapter, offset);
+ value = usb_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
/* Write the value back to system register */
- rtw_write8(padapter, offset, value);
+ usb_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
- value = rtw_read8(padapter, offset);
+ value = usb_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
void c2h_evt_clear(struct adapter *adapter)
{
- rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
+ usb_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
if (buf == NULL)
goto exit;
- trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
+ trigger = usb_read8(adapter, REG_C2HEVT_CLEAR);
if (trigger == C2H_EVT_HOST_CLOSE)
goto exit; /* Not ready */
_rtw_memset(c2h_evt, 0, 16);
- *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
- *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
+ *buf = usb_read8(adapter, REG_C2HEVT_MSG_NORMAL);
+ *(buf+1) = usb_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
&c2h_evt , sizeof(c2h_evt));
/* Read the content */
for (i = 0; i < c2h_evt->plen; i++)
- c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL +
+ c2h_evt->payload[i] = usb_read8(adapter, REG_C2HEVT_MSG_NORMAL +
sizeof(*c2h_evt) + i);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_,
adapt->HalFunc.sreset_init_value(adapt);
}
-void rtw_hal_sreset_reset(struct adapter *adapt)
-{
- if (adapt->HalFunc.silentreset)
- adapt->HalFunc.silentreset(adapt);
-}
-
-void rtw_hal_sreset_reset_value(struct adapter *adapt)
-{
- if (adapt->HalFunc.sreset_reset_value)
- adapt->HalFunc.sreset_reset_value(adapt);
-}
-
-void rtw_hal_sreset_xmit_status_check(struct adapter *adapt)
-{
- if (adapt->HalFunc.sreset_xmit_status_check)
- adapt->HalFunc.sreset_xmit_status_check(adapt);
-}
-
-void rtw_hal_sreset_linked_status_check(struct adapter *adapt)
-{
- if (adapt->HalFunc.sreset_linked_status_check)
- adapt->HalFunc.sreset_linked_status_check(adapt);
-}
-
u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt)
{
u8 status = 0;
struct adapter *adapt = pDM_Odm->Adapter;
if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */
- rtw_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
+ usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
}
pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
Adapter->recvpriv.bIsAnyNonBEPkts = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_VO_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_VI_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_BE_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_BK_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM)));
} /* ODM_InitEdcaTurbo */
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
else
edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
- rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
+ usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
}
/* Turn Off EDCA turbo here. */
/* Restore original EDCA according to the declaration of AP. */
if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {
- rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
+ usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
}
}
{
struct adapter *adapt = pDM_Odm->Adapter;
- rtw_write8(adapt, Addr, Data);
+ usb_write8(adapt, Addr, Data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
}
u8 valid;
do {
- valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
+ valid = usb_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid)
read_down = true;
} while ((!read_down) && (retry_cnts--));
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) {
- rtw_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
+ usb_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
}
}
/* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) {
- rtw_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
+ usb_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
}
bcmd_down = true;
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
- rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
+ usb_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* Set REG_CR bit 8. DMA beacon by SW. */
haldata->RegCR_1 |= BIT0;
- rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
+ usb_write8(adapt, REG_CR+1, haldata->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(4));
+ usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
+ usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(4));
if (haldata->RegFwHwTxQCtrl&BIT6) {
DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
}
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
+ usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
haldata->RegFwHwTxQCtrl &= (~BIT6);
/* Clear beacon valid check bit. */
/* */
/* Enable Bcn */
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(3));
- rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
+ usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(3));
+ usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
/* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */
if (bSendBeacon) {
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
+ usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
haldata->RegFwHwTxQCtrl |= BIT6;
}
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
haldata->RegCR_1 &= (~BIT0);
- rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
+ usb_write8(adapt, REG_CR+1, haldata->RegCR_1);
}
}
/* update CTWindow value. */
if (pwdinfo->ctwindow > 0) {
p2p_ps_offload->CTWindow_En = 1;
- rtw_write8(adapt, REG_P2P_CTWIN, pwdinfo->ctwindow);
+ usb_write8(adapt, REG_P2P_CTWIN, pwdinfo->ctwindow);
}
/* hw only support 2 set of NoA */
for (i = 0; i < pwdinfo->noa_num; i++) {
/* To control the register setting for which NOA */
- rtw_write8(adapt, REG_NOA_DESC_SEL, (i << 4));
+ usb_write8(adapt, REG_NOA_DESC_SEL, (i << 4));
if (i == 0)
p2p_ps_offload->NoA0_En = 1;
else
p2p_ps_offload->NoA1_En = 1;
/* config P2P NoA Descriptor Register */
- rtw_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
- rtw_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
- rtw_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
- rtw_write8(adapt, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
+ usb_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
+ usb_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
+ usb_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
+ usb_write8(adapt, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
}
if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
/* rst p2p circuit */
- rtw_write8(adapt, REG_DUAL_TSF_RST, BIT(4));
+ usb_write8(adapt, REG_DUAL_TSF_RST, BIT(4));
p2p_ps_offload->Offload_En = 1;
{
u8 tmp1byte;
- tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
+ tmp1byte = usb_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
- rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
+ usb_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
/* */
#include <usb_ops.h>
-static void iol_mode_enable(struct adapter *padapter, u8 enable)
+void iol_mode_enable(struct adapter *padapter, u8 enable)
{
u8 reg_0xf0 = 0;
if (enable) {
/* Enable initial offload */
- reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
- rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
+ reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
+ usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
if (!padapter->bFWReady) {
DBG_88E("bFWReady == false call reset 8051...\n");
} else {
/* disable initial offload */
- reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
- rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
+ reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
+ usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
}
}
-static s32 iol_execute(struct adapter *padapter, u8 control)
+s32 iol_execute(struct adapter *padapter, u8 control)
{
s32 status = _FAIL;
u8 reg_0x88 = 0;
u32 start = 0, passing_time = 0;
control = control&0x0f;
- reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
- rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
+ reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
+ usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
start = jiffies;
- while ((reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control &&
+ while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
(passing_time = rtw_get_passing_time_ms(start)) < 1000) {
;
}
- reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
+ reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
if (reg_0x88 & control<<4)
status = _FAIL;
{
s32 rst = _SUCCESS;
iol_mode_enable(padapter, 1);
- rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
+ usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
rst = iol_execute(padapter, CMD_INIT_LLT);
iol_mode_enable(padapter, 0);
return rst;
}
-static void
-efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
-{
- u8 *efuseTbl = NULL;
- u8 rtemp8;
- u16 eFuse_Addr = 0;
- u8 offset, wren;
- u16 i, j;
- u16 **eFuseWord = NULL;
- u16 efuse_utilized = 0;
- u8 u1temp = 0;
-
- efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E);
- if (efuseTbl == NULL) {
- DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
- goto exit;
- }
-
- eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
- if (eFuseWord == NULL) {
- DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
- goto exit;
- }
-
- /* 0. Refresh efuse init map as all oxFF. */
- for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
- for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
- eFuseWord[i][j] = 0xFFFF;
-
- /* */
- /* 1. Read the first byte to check if efuse is empty!!! */
- /* */
- /* */
- rtemp8 = *(phymap+eFuse_Addr);
- if (rtemp8 != 0xFF) {
- efuse_utilized++;
- eFuse_Addr++;
- } else {
- DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8);
- goto exit;
- }
-
- /* */
- /* 2. Read real efuse content. Filter PG header and every section data. */
- /* */
- while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
- /* Check PG header for section num. */
- if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */
- u1temp = ((rtemp8 & 0xE0) >> 5);
- rtemp8 = *(phymap+eFuse_Addr);
- if ((rtemp8 & 0x0F) == 0x0F) {
- eFuse_Addr++;
- rtemp8 = *(phymap+eFuse_Addr);
-
- if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
- eFuse_Addr++;
- continue;
- } else {
- offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
- wren = (rtemp8 & 0x0F);
- eFuse_Addr++;
- }
- } else {
- offset = ((rtemp8 >> 4) & 0x0f);
- wren = (rtemp8 & 0x0f);
- }
-
- if (offset < EFUSE_MAX_SECTION_88E) {
- /* Get word enable value from PG header */
- for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
- /* Check word enable condition in the section */
- if (!(wren & 0x01)) {
- rtemp8 = *(phymap+eFuse_Addr);
- eFuse_Addr++;
- efuse_utilized++;
- eFuseWord[offset][i] = (rtemp8 & 0xff);
- if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
- break;
- rtemp8 = *(phymap+eFuse_Addr);
- eFuse_Addr++;
- efuse_utilized++;
- eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
-
- if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
- break;
- }
- wren >>= 1;
- }
- }
- /* Read next PG header */
- rtemp8 = *(phymap+eFuse_Addr);
-
- if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
- efuse_utilized++;
- eFuse_Addr++;
- }
- }
-
- /* */
- /* 3. Collect 16 sections and 4 word unit into Efuse map. */
- /* */
- for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
- for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
- efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff);
- efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff);
- }
- }
-
- /* */
- /* 4. Copy from Efuse map to output pointer memory!!! */
- /* */
- for (i = 0; i < _size_byte; i++)
- pbuf[i] = efuseTbl[_offset+i];
-
- /* */
- /* 5. Calculate Efuse utilization. */
- /* */
-
-exit:
- kfree(efuseTbl);
-
- if (eFuseWord)
- rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
-}
-
-static void efuse_read_phymap_from_txpktbuf(
- struct adapter *adapter,
- int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */
- u8 *content, /* buffer to store efuse physical map */
- u16 *size /* for efuse content: the max byte to read. will update to byte read */
- )
-{
- u16 dbg_addr = 0;
- u32 start = 0, passing_time = 0;
- u8 reg_0x143 = 0;
- u32 lo32 = 0, hi32 = 0;
- u16 len = 0, count = 0;
- int i = 0;
- u16 limit = *size;
-
- u8 *pos = content;
-
- if (bcnhead < 0) /* if not valid */
- bcnhead = rtw_read8(adapter, REG_TDECTRL+1);
-
- DBG_88E("%s bcnhead:%d\n", __func__, bcnhead);
-
- rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
-
- dbg_addr = bcnhead*128/8; /* 8-bytes addressing */
-
- while (1) {
- rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i);
-
- rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
- start = jiffies;
- while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) &&
- (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
- DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, rtw_read8(adapter, 0x106));
- msleep(1);
- }
-
- lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L);
- hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H);
-
- if (i == 0) {
- u8 lenc[2];
- u16 lenbak, aaabak;
- u16 aaa;
- lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L);
- lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1);
-
- aaabak = le16_to_cpup((__le16 *)lenc);
- lenbak = le16_to_cpu(*((__le16 *)lenc));
- aaa = le16_to_cpup((__le16 *)&lo32);
- len = le16_to_cpu(*((__le16 *)&lo32));
-
- limit = (len-2 < limit) ? len-2 : limit;
-
- DBG_88E("%s len:%u, lenbak:%u, aaa:%u, aaabak:%u\n", __func__, len, lenbak, aaa, aaabak);
-
- memcpy(pos, ((u8 *)&lo32)+2, (limit >= count+2) ? 2 : limit-count);
- count += (limit >= count+2) ? 2 : limit-count;
- pos = content+count;
-
- } else {
- memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count);
- count += (limit >= count+4) ? 4 : limit-count;
- pos = content+count;
- }
-
- if (limit > count && len-2 > count) {
- memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count);
- count += (limit >= count+4) ? 4 : limit-count;
- pos = content+count;
- }
-
- if (limit <= count || len-2 <= count)
- break;
- i++;
- }
- rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
- DBG_88E("%s read count:%u\n", __func__, count);
- *size = count;
-}
-
-static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
-{
- s32 status = _FAIL;
- u8 physical_map[512];
- u16 size = 512;
-
- rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
- _rtw_memset(physical_map, 0xFF, 512);
- rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
- status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
- if (status == _SUCCESS)
- efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
- efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
- return status;
-}
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
{
{
s32 rst = _SUCCESS;
- rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy);
+ usb_write8(padapter, REG_TDECTRL+1, iocfg_bndy);
rst = iol_execute(padapter, CMD_IOCONFIG);
return rst;
}
iol_mode_enable(adapter, 0);
exit:
/* restore BCN_HEAD */
- rtw_write8(adapter, REG_TDECTRL+1, 0);
+ usb_write8(adapter, REG_TDECTRL+1, 0);
return ret;
}
u8 *pbuf = vzalloc(data_len+10);
DBG_88E("###### %s ######\n", __func__);
- rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
+ usb_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
if (pbuf) {
for (addr = 0; addr < data_cnts; addr++) {
- rtw_write32(Adapter, 0x140, addr);
+ usb_write32(Adapter, 0x140, addr);
msleep(1);
loop = 0;
do {
- rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL)&BIT24);
+ rstatus = (reg_140 = usb_read32(Adapter, REG_PKTBUF_DBG_CTRL)&BIT24);
if (rstatus) {
- fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L);
+ fifo_data = usb_read32(Adapter, REG_PKTBUF_DBG_DATA_L);
memcpy(pbuf+(addr*8), &fifo_data, 4);
- fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H);
+ fifo_data = usb_read32(Adapter, REG_PKTBUF_DBG_DATA_H);
memcpy(pbuf+(addr*8+4), &fifo_data, 4);
}
msleep(1);
if (enable) {
/* MCU firmware download enable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
- rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
+ tmp = usb_read8(padapter, REG_MCUFWDL);
+ usb_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
- tmp = rtw_read8(padapter, REG_MCUFWDL+2);
- rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7);
+ tmp = usb_read8(padapter, REG_MCUFWDL+2);
+ usb_write8(padapter, REG_MCUFWDL+2, tmp&0xf7);
} else {
/* MCU firmware download disable. */
- tmp = rtw_read8(padapter, REG_MCUFWDL);
- rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe);
+ tmp = usb_read8(padapter, REG_MCUFWDL);
+ usb_write8(padapter, REG_MCUFWDL, tmp&0xfe);
/* Reserved for fw extension. */
- rtw_write8(padapter, REG_MCUFWDL+1, 0x00);
+ usb_write8(padapter, REG_MCUFWDL+1, 0x00);
}
}
}
for (i = 0; i < blockCount_p1; i++) {
- ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
+ ret = usb_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
if (ret == _FAIL)
goto exit;
}
}
for (i = 0; i < blockCount_p2; i++) {
- ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2));
+ ret = usb_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2));
if (ret == _FAIL)
goto exit;
(buffSize-offset), blockSize_p3, blockCount_p3));
for (i = 0; i < blockCount_p3; i++) {
- ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
+ ret = usb_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
if (ret == _FAIL)
goto exit;
u8 value8;
u8 u8Page = (u8)(page & 0x07);
- value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page;
- rtw_write8(padapter, REG_MCUFWDL+2, value8);
+ value8 = (usb_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page;
+ usb_write8(padapter, REG_MCUFWDL+2, value8);
return _BlockWrite(padapter, buffer, size);
}
{
u8 u1bTmp;
- u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
- rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2));
+ u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
+ usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2));
+ usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2));
DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
}
/* polling CheckSum report */
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = usb_read32(padapter, REG_MCUFWDL);
if (value32 & FWDL_ChkSum_rpt)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
}
DBG_88E("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, value32);
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = usb_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
- rtw_write32(padapter, REG_MCUFWDL, value32);
+ usb_write32(padapter, REG_MCUFWDL, value32);
_8051Reset88E(padapter);
/* polling for FW ready */
counter = 0;
do {
- value32 = rtw_read32(padapter, REG_MCUFWDL);
+ value32 = usb_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32);
return _SUCCESS;
/* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
- if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
- rtw_write8(padapter, REG_MCUFWDL, 0x00);
+ if (usb_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
+ usb_write8(padapter, REG_MCUFWDL, 0x00);
_8051Reset88E(padapter);
}
fwdl_start_time = jiffies;
while (1) {
/* reset the FWDL chksum */
- rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
+ usb_write8(padapter, REG_MCUFWDL, usb_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
padapter->HalData = NULL;
}
-/* */
-/* Efuse related code */
-/* */
-enum{
- VOLTAGE_V25 = 0x03,
- LDOE25_SHIFT = 28 ,
- };
-
-static bool
-hal_EfusePgPacketWrite2ByteHeader(
- struct adapter *pAdapter,
- u8 efuseType,
- u16 *pAddr,
- struct pgpkt *pTargetPkt,
- bool bPseudoTest);
-static bool
-hal_EfusePgPacketWrite1ByteHeader(
- struct adapter *pAdapter,
- u8 efuseType,
- u16 *pAddr,
- struct pgpkt *pTargetPkt,
- bool bPseudoTest);
-static bool
-hal_EfusePgPacketWriteData(
- struct adapter *pAdapter,
- u8 efuseType,
- u16 *pAddr,
- struct pgpkt *pTargetPkt,
- bool bPseudoTest);
-
-static void
-hal_EfusePowerSwitch_RTL8188E(
- struct adapter *pAdapter,
- u8 bWrite,
- u8 PwrState)
-{
- u8 tempval;
- u16 tmpV16;
-
- if (PwrState) {
- rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
-
- /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
- if (!(tmpV16 & PWC_EV12V)) {
- tmpV16 |= PWC_EV12V;
- rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
- }
- /* Reset: 0x0000h[28], default valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN);
- if (!(tmpV16 & FEN_ELDR)) {
- tmpV16 |= FEN_ELDR;
- rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16);
- }
-
- /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
- tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR);
- if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
- tmpV16 |= (LOADER_CLK_EN | ANA8M);
- rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16);
- }
-
- if (bWrite) {
- /* Enable LDO 2.5V before read/write action */
- tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
- tempval &= 0x0F;
- tempval |= (VOLTAGE_V25 << 4);
- rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80));
- }
- } else {
- rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
-
- if (bWrite) {
- /* Disable LDO 2.5V after read/write action */
- tempval = rtw_read8(pAdapter, EFUSE_TEST+3);
- rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F));
- }
- }
-}
-
-static void
-rtl8188e_EfusePowerSwitch(
- struct adapter *pAdapter,
- u8 bWrite,
- u8 PwrState)
-{
- hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState);
-}
-
-
-static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
- u16 _offset,
- u16 _size_byte,
- u8 *pbuf,
- bool bPseudoTest
- )
-{
- u8 *efuseTbl = NULL;
- u8 rtemp8[1];
- u16 eFuse_Addr = 0;
- u8 offset, wren;
- u16 i, j;
- u16 **eFuseWord = NULL;
- u16 efuse_utilized = 0;
- u8 u1temp = 0;
-
- /* */
- /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
- /* */
- if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) {/* total E-Fuse table is 512bytes */
- DBG_88E("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte);
- goto exit;
- }
-
- efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E);
- if (efuseTbl == NULL) {
- DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
- goto exit;
- }
-
- eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
- if (eFuseWord == NULL) {
- DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
- goto exit;
- }
-
- /* 0. Refresh efuse init map as all oxFF. */
- for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
- for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
- eFuseWord[i][j] = 0xFFFF;
-
- /* */
- /* 1. Read the first byte to check if efuse is empty!!! */
- /* */
- /* */
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
- if (*rtemp8 != 0xFF) {
- efuse_utilized++;
- eFuse_Addr++;
- } else {
- DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, *rtemp8);
- goto exit;
- }
-
- /* */
- /* 2. Read real efuse content. Filter PG header and every section data. */
- /* */
- while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
- /* Check PG header for section num. */
- if ((*rtemp8 & 0x1F) == 0x0F) { /* extended header */
- u1temp = ((*rtemp8 & 0xE0) >> 5);
-
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
-
- if ((*rtemp8 & 0x0F) == 0x0F) {
- eFuse_Addr++;
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
-
- if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
- eFuse_Addr++;
- continue;
- } else {
- offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
- wren = (*rtemp8 & 0x0F);
- eFuse_Addr++;
- }
- } else {
- offset = ((*rtemp8 >> 4) & 0x0f);
- wren = (*rtemp8 & 0x0f);
- }
-
- if (offset < EFUSE_MAX_SECTION_88E) {
- /* Get word enable value from PG header */
-
- for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
- /* Check word enable condition in the section */
- if (!(wren & 0x01)) {
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
- eFuse_Addr++;
- efuse_utilized++;
- eFuseWord[offset][i] = (*rtemp8 & 0xff);
- if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
- break;
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
- eFuse_Addr++;
- efuse_utilized++;
- eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
- if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
- break;
- }
- wren >>= 1;
- }
- }
-
- /* Read next PG header */
- ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
-
- if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
- efuse_utilized++;
- eFuse_Addr++;
- }
- }
-
- /* 3. Collect 16 sections and 4 word unit into Efuse map. */
- for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
- for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
- efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff);
- efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff);
- }
- }
-
- /* 4. Copy from Efuse map to output pointer memory!!! */
- for (i = 0; i < _size_byte; i++)
- pbuf[i] = efuseTbl[_offset+i];
-
- /* 5. Calculate Efuse utilization. */
- rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
-
-exit:
- kfree(efuseTbl);
-
- if (eFuseWord)
- rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
-}
-
-static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
-{
- if (!bPseudoTest) {
- int ret = _FAIL;
- if (rtw_IOL_applied(Adapter)) {
- rtw_hal_power_on(Adapter);
-
- iol_mode_enable(Adapter, 1);
- ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
- iol_mode_enable(Adapter, 0);
-
- if (_SUCCESS == ret)
- goto exit;
- }
- }
- Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
-
-exit:
- return;
-}
-
-static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
-{
- Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
-}
-
-static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
- u16 _offset, u16 _size_byte, u8 *pbuf,
- bool bPseudoTest)
-{
- if (bPseudoTest)
- ReadEFuse_Pseudo (Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
- else
- ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
-}
-
-/* Do not support BT */
-static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
-{
- switch (type) {
- case TYPE_EFUSE_MAX_SECTION:
- {
- u8 *pMax_section;
- pMax_section = (u8 *)pOut;
- *pMax_section = EFUSE_MAX_SECTION_88E;
- }
- break;
- case TYPE_EFUSE_REAL_CONTENT_LEN:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
- }
- break;
- case TYPE_EFUSE_CONTENT_LEN_BANK:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
- }
- break;
- case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- case TYPE_EFUSE_MAP_LEN:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
- }
- break;
- case TYPE_EFUSE_PROTECT_BYTES_BANK:
- {
- u8 *pu1Tmp;
- pu1Tmp = (u8 *)pOut;
- *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- default:
- {
- u8 *pu1Tmp;
- pu1Tmp = (u8 *)pOut;
- *pu1Tmp = 0;
- }
- break;
- }
-}
-
-static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
-{
- switch (type) {
- case TYPE_EFUSE_MAX_SECTION:
- {
- u8 *pMax_section;
- pMax_section = (u8 *)pOut;
- *pMax_section = EFUSE_MAX_SECTION_88E;
- }
- break;
- case TYPE_EFUSE_REAL_CONTENT_LEN:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
- }
- break;
- case TYPE_EFUSE_CONTENT_LEN_BANK:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
- }
- break;
- case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- case TYPE_EFUSE_MAP_LEN:
- {
- u16 *pu2Tmp;
- pu2Tmp = (u16 *)pOut;
- *pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
- }
- break;
- case TYPE_EFUSE_PROTECT_BYTES_BANK:
- {
- u8 *pu1Tmp;
- pu1Tmp = (u8 *)pOut;
- *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
- }
- break;
- default:
- {
- u8 *pu1Tmp;
- pu1Tmp = (u8 *)pOut;
- *pu1Tmp = 0;
- }
- break;
- }
-}
-
-static void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest)
-{
- if (bPseudoTest)
- Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut);
- else
- Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut);
-}
-
-static u8 Hal_EfuseWordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
-{
- u16 tmpaddr = 0;
- u16 start_addr = efuse_addr;
- u8 badworden = 0x0F;
- u8 tmpdata[8];
-
- _rtw_memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE);
-
- if (!(word_en&BIT0)) {
- tmpaddr = start_addr;
- efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest);
- efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest);
-
- efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest);
- efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[1], bPseudoTest);
- if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
- badworden &= (~BIT0);
- }
- if (!(word_en&BIT1)) {
- tmpaddr = start_addr;
- efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest);
- efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest);
-
- efuse_OneByteRead(pAdapter, tmpaddr , &tmpdata[2], bPseudoTest);
- efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[3], bPseudoTest);
- if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
- badworden &= (~BIT1);
- }
- if (!(word_en&BIT2)) {
- tmpaddr = start_addr;
- efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest);
- efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest);
-
- efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest);
- efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[5], bPseudoTest);
- if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
- badworden &= (~BIT2);
- }
- if (!(word_en&BIT3)) {
- tmpaddr = start_addr;
- efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest);
- efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest);
-
- efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest);
- efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[7], bPseudoTest);
- if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
- badworden &= (~BIT3);
- }
- return badworden;
-}
-
-static u8 Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
-{
- u8 ret;
-
- ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
- return ret;
-}
-
-static u8 rtl8188e_Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
-{
- u8 ret = 0;
-
- if (bPseudoTest)
- ret = Hal_EfuseWordEnableDataWrite_Pseudo (pAdapter, efuse_addr, word_en, data, bPseudoTest);
- else
- ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
- return ret;
-}
-
-static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoTest)
-{
- int bContinual = true;
- u16 efuse_addr = 0;
- u8 hoffset = 0, hworden = 0;
- u8 efuse_data, word_cnts = 0;
-
- if (bPseudoTest)
- efuse_addr = (u16)(fakeEfuseUsedBytes);
- else
- rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
-
- while (bContinual &&
- efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) &&
- AVAILABLE_EFUSE_ADDR(efuse_addr)) {
- if (efuse_data != 0xFF) {
- if ((efuse_data&0x1F) == 0x0F) { /* extended header */
- hoffset = efuse_data;
- efuse_addr++;
- efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
- if ((efuse_data & 0x0F) == 0x0F) {
- efuse_addr++;
- continue;
- } else {
- hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
- hworden = efuse_data & 0x0F;
- }
- } else {
- hoffset = (efuse_data>>4) & 0x0F;
- hworden = efuse_data & 0x0F;
- }
- word_cnts = Efuse_CalculateWordCnts(hworden);
- /* read next header */
- efuse_addr = efuse_addr + (word_cnts*2)+1;
- } else {
- bContinual = false;
- }
- }
-
- if (bPseudoTest)
- fakeEfuseUsedBytes = efuse_addr;
- else
- rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
-
- return efuse_addr;
-}
-
-static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudoTest)
-{
- u16 ret = 0;
-
- ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
- return ret;
-}
-
-static u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest)
-{
- u16 ret = 0;
-
- if (bPseudoTest)
- ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
- else
- ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
- return ret;
-}
-
-static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
-{
- u8 ReadState = PG_STATE_HEADER;
- int bContinual = true;
- int bDataEmpty = true;
- u8 efuse_data, word_cnts = 0;
- u16 efuse_addr = 0;
- u8 hoffset = 0, hworden = 0;
- u8 tmpidx = 0;
- u8 tmpdata[8];
- u8 max_section = 0;
- u8 tmp_header = 0;
-
- EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
-
- if (data == NULL)
- return false;
- if (offset > max_section)
- return false;
-
- _rtw_memset((void *)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
- _rtw_memset((void *)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
-
- /* <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
- /* Skip dummy parts to prevent unexpected data read from Efuse. */
- /* By pass right now. 2009.02.19. */
- while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) {
- /* Header Read ------------- */
- if (ReadState & PG_STATE_HEADER) {
- if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
- if (EXT_HEADER(efuse_data)) {
- tmp_header = efuse_data;
- efuse_addr++;
- efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
- if (!ALL_WORDS_DISABLED(efuse_data)) {
- hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
- hworden = efuse_data & 0x0F;
- } else {
- DBG_88E("Error, All words disabled\n");
- efuse_addr++;
- continue;
- }
- } else {
- hoffset = (efuse_data>>4) & 0x0F;
- hworden = efuse_data & 0x0F;
- }
- word_cnts = Efuse_CalculateWordCnts(hworden);
- bDataEmpty = true;
-
- if (hoffset == offset) {
- for (tmpidx = 0; tmpidx < word_cnts*2; tmpidx++) {
- if (efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx, &efuse_data, bPseudoTest)) {
- tmpdata[tmpidx] = efuse_data;
- if (efuse_data != 0xff)
- bDataEmpty = false;
- }
- }
- if (bDataEmpty == false) {
- ReadState = PG_STATE_DATA;
- } else {/* read next header */
- efuse_addr = efuse_addr + (word_cnts*2)+1;
- ReadState = PG_STATE_HEADER;
- }
- } else {/* read next header */
- efuse_addr = efuse_addr + (word_cnts*2)+1;
- ReadState = PG_STATE_HEADER;
- }
- } else {
- bContinual = false;
- }
- } else if (ReadState & PG_STATE_DATA) {
- /* Data section Read ------------- */
- efuse_WordEnableDataRead(hworden, tmpdata, data);
- efuse_addr = efuse_addr + (word_cnts*2)+1;
- ReadState = PG_STATE_HEADER;
- }
-
- }
-
- if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) &&
- (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff))
- return false;
- else
- return true;
-}
-
-static int Hal_EfusePgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
-{
- int ret;
-
- ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
- return ret;
-}
-
-static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
-{
- int ret;
-
- ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
- return ret;
-}
-
-static int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
-{
- int ret;
-
- if (bPseudoTest)
- ret = Hal_EfusePgPacketRead_Pseudo (pAdapter, offset, data, bPseudoTest);
- else
- ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
- return ret;
-}
-
-static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr, bool bPseudoTest)
-{
- u8 originaldata[8], badworden = 0;
- u16 efuse_addr = *pAddr;
- u32 PgWriteSuccess = 0;
-
- _rtw_memset((void *)originaldata, 0xff, 8);
-
- if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) {
- /* check if data exist */
- badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest);
-
- if (badworden != 0xf) { /* write fail */
- PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
-
- if (!PgWriteSuccess)
- return false;
- else
- efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
- } else {
- efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
- }
- } else {
- efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1;
- }
- *pAddr = efuse_addr;
- return true;
-}
-
-static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
-{
- bool bRet = false;
- u16 efuse_addr = *pAddr, efuse_max_available_len = 0;
- u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
- u8 repeatcnt = 0;
-
- EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
-
- while (efuse_addr < efuse_max_available_len) {
- pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
-
- while (tmp_header == 0xFF) {
- if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
- return false;
-
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
- }
-
- /* to write ext_header */
- if (tmp_header == pg_header) {
- efuse_addr++;
- pg_header_temp = pg_header;
- pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
-
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
-
- while (tmp_header == 0xFF) {
- if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
- return false;
-
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
- }
-
- if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */
- if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
- return false;
- } else {
- efuse_addr++;
- continue;
- }
- } else if (pg_header != tmp_header) { /* offset PG fail */
- struct pgpkt fixPkt;
- fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
- fixPkt.word_en = tmp_header & 0x0F;
- fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
- if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
- return false;
- } else {
- bRet = true;
- break;
- }
- } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */
- efuse_addr += 2;
- continue;
- }
- }
-
- *pAddr = efuse_addr;
- return bRet;
-}
-
-static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
-{
- bool bRet = false;
- u8 pg_header = 0, tmp_header = 0;
- u16 efuse_addr = *pAddr;
- u8 repeatcnt = 0;
-
- pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
-
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
-
- while (tmp_header == 0xFF) {
- if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
- return false;
- efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
- efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
- }
-
- if (pg_header == tmp_header) {
- bRet = true;
- } else {
- struct pgpkt fixPkt;
- fixPkt.offset = (tmp_header>>4) & 0x0F;
- fixPkt.word_en = tmp_header & 0x0F;
- fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
- if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
- return false;
- }
-
- *pAddr = efuse_addr;
- return bRet;
-}
-
-static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
-{
- u16 efuse_addr = *pAddr;
- u8 badworden = 0;
- u32 PgWriteSuccess = 0;
-
- badworden = 0x0f;
- badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
- if (badworden == 0x0F) {
- /* write ok */
- return true;
- } else {
- /* reorganize other pg packet */
- PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
- if (!PgWriteSuccess)
- return false;
- else
- return true;
- }
-}
-
-static bool
-hal_EfusePgPacketWriteHeader(
- struct adapter *pAdapter,
- u8 efuseType,
- u16 *pAddr,
- struct pgpkt *pTargetPkt,
- bool bPseudoTest)
-{
- bool bRet = false;
-
- if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
- bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
- else
- bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
-
- return bRet;
-}
-
-static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
- u8 *pWden)
-{
- u8 match_word_en = 0x0F; /* default all words are disabled */
-
- /* check if the same words are enabled both target and current PG packet */
- if (((pTargetPkt->word_en & BIT0) == 0) &&
- ((pCurPkt->word_en & BIT0) == 0))
- match_word_en &= ~BIT0; /* enable word 0 */
- if (((pTargetPkt->word_en & BIT1) == 0) &&
- ((pCurPkt->word_en & BIT1) == 0))
- match_word_en &= ~BIT1; /* enable word 1 */
- if (((pTargetPkt->word_en & BIT2) == 0) &&
- ((pCurPkt->word_en & BIT2) == 0))
- match_word_en &= ~BIT2; /* enable word 2 */
- if (((pTargetPkt->word_en & BIT3) == 0) &&
- ((pCurPkt->word_en & BIT3) == 0))
- match_word_en &= ~BIT3; /* enable word 3 */
-
- *pWden = match_word_en;
-
- if (match_word_en != 0xf)
- return true;
- else
- return false;
-}
-
-static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr, bool bPseudoTest)
-{
- bool bRet = false;
- u8 i, efuse_data;
-
- for (i = 0; i < (word_cnts*2); i++) {
- if (efuse_OneByteRead(pAdapter, (startAddr+i), &efuse_data, bPseudoTest) && (efuse_data != 0xFF))
- bRet = true;
- }
- return bRet;
-}
-
-static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
-{
- bool bRet = false;
- u8 i, efuse_data = 0, cur_header = 0;
- u8 matched_wden = 0, badworden = 0;
- u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
- struct pgpkt curPkt;
-
- EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
- EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest);
-
- if (efuseType == EFUSE_WIFI) {
- if (bPseudoTest) {
- startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
- } else {
- rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
- startAddr %= EFUSE_REAL_CONTENT_LEN;
- }
- } else {
- if (bPseudoTest)
- startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
- else
- startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN);
- }
-
- while (1) {
- if (startAddr >= efuse_max_available_len) {
- bRet = false;
- break;
- }
-
- if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
- if (EXT_HEADER(efuse_data)) {
- cur_header = efuse_data;
- startAddr++;
- efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
- if (ALL_WORDS_DISABLED(efuse_data)) {
- bRet = false;
- break;
- } else {
- curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
- curPkt.word_en = efuse_data & 0x0F;
- }
- } else {
- cur_header = efuse_data;
- curPkt.offset = (cur_header>>4) & 0x0F;
- curPkt.word_en = cur_header & 0x0F;
- }
-
- curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
- /* if same header is found but no data followed */
- /* write some part of data followed by the header. */
- if ((curPkt.offset == pTargetPkt->offset) &&
- (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) &&
- wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
- /* Here to write partial data */
- badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest);
- if (badworden != 0x0F) {
- u32 PgWriteSuccess = 0;
- /* if write fail on some words, write these bad words again */
-
- PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
-
- if (!PgWriteSuccess) {
- bRet = false; /* write fail, return */
- break;
- }
- }
- /* partial write ok, update the target packet for later use */
- for (i = 0; i < 4; i++) {
- if ((matched_wden & (0x1<<i)) == 0) /* this word has been written */
- pTargetPkt->word_en |= (0x1<<i); /* disable the word */
- }
- pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
- }
- /* read from next header */
- startAddr = startAddr + (curPkt.word_cnts*2) + 1;
- } else {
- /* not used header, 0xff */
- *pAddr = startAddr;
- bRet = true;
- break;
- }
- }
- return bRet;
-}
-
-static bool
-hal_EfusePgCheckAvailableAddr(
- struct adapter *pAdapter,
- u8 efuseType,
- bool bPseudoTest
- )
-{
- u16 efuse_max_available_len = 0;
-
- /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */
- EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false);
-
- if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
- return false;
- return true;
-}
-
-static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt)
-{
- _rtw_memset((void *)pTargetPkt->data, 0xFF, sizeof(u8)*8);
- pTargetPkt->offset = offset;
- pTargetPkt->word_en = word_en;
- efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
- pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
-}
-
-static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest)
-{
- struct pgpkt targetPkt;
- u16 startAddr = 0;
- u8 efuseType = EFUSE_WIFI;
-
- if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
- return false;
-
- hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
-
- if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
-
- if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
-
- if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
- return false;
-
- return true;
-}
-
-static int Hal_EfusePgPacketWrite_Pseudo(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
-{
- int ret;
-
- ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
- return ret;
-}
-
-static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
-{
- int ret = 0;
- ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
-
- return ret;
-}
-
-static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
-{
- int ret;
-
- if (bPseudoTest)
- ret = Hal_EfusePgPacketWrite_Pseudo (pAdapter, offset, word_en, data, bPseudoTest);
- else
- ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
- return ret;
-}
-
static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter)
{
u32 value32;
pHalData = GET_HAL_DATA(padapter);
- value32 = rtw_read32(padapter, REG_SYS_CFG);
+ value32 = usb_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8188E;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
}
}
-void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter)
-{
- memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
-}
-
void rtl8188e_start_thread(struct adapter *padapter)
{
}
{
if (enable) {
DBG_88E("Enable notch filter\n");
- rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
+ usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT1);
} else {
DBG_88E("Disable notch filter\n");
- rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
+ usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1);
}
}
void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg;
pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg;
- /* Efuse related function */
- pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch;
- pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse;
- pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition;
- pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize;
- pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead;
- pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite;
- pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite;
-
pHalFunc->sreset_init_value = &sreset_init_value;
- pHalFunc->sreset_reset_value = &sreset_reset_value;
- pHalFunc->silentreset = &rtl8188e_silentreset_for_specific_platform;
- pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check;
- pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check;
pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar;
u8 size = 0;
u32 cr;
- cr = rtw_read16(padapter, REG_9346CR);
+ cr = usb_read16(padapter, REG_9346CR);
/* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */
size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
u16 LLTReg = REG_LLT_INIT;
- rtw_write32(padapter, LLTReg, value);
+ usb_write32(padapter, LLTReg, value);
/* polling */
do {
- value = rtw_read32(padapter, LLTReg);
+ value = usb_read32(padapter, LLTReg);
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
break;
if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
if (!is_boot_from_eeprom(padapter)) {
/* Read EFUSE real map to shadow. */
- EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
}
} else {/* autoload fail */
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
/* update to default value 0xFF */
if (!is_boot_from_eeprom(padapter))
- EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
+ EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
}
}
pHalData->RegBcnCtrlVal |= SetBits;
pHalData->RegBcnCtrlVal &= ~ClearBits;
- rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
+ usb_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
}
CCK_index = 32;
/* Adjust CCK according to gain index */
if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
- rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
- rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
- rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
- rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
- rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
- rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
- rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
- rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
+ usb_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
+ usb_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
+ usb_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
+ usb_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
+ usb_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
+ usb_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
+ usb_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
+ usb_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
} else {
- rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
- rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
- rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
- rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
- rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
- rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
- rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
- rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
+ usb_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
+ usb_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
+ usb_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
+ usb_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
+ usb_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
+ usb_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
+ usb_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
+ usb_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
}
}
}
{
u32 ReturnValue = 0, OriginalValue, BitShift;
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ OriginalValue = usb_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift;
return ReturnValue;
u32 OriginalValue, BitShift;
if (BitMask != bMaskDWord) { /* if not "double word" write */
- OriginalValue = rtw_read32(Adapter, RegAddr);
+ OriginalValue = usb_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
}
- rtw_write32(Adapter, RegAddr, Data);
+ usb_write32(Adapter, RegAddr, Data);
}
rtStatus = _FAIL;
/* 2010.07.13 AMPDU aggregation number B */
- rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
+ usb_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
return rtStatus;
}
/* Enable BB and RF */
- RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
- rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
+ RegVal = usb_read16(Adapter, REG_SYS_FUNC_EN);
+ usb_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
/* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */
- rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
+ usb_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
- rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
+ usb_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
/* Config BB and AGC */
rtStatus = phy_BB8188E_Config_ParaFile(Adapter);
/* 3<1>Set MAC register */
/* 3 */
- regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
- regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
+ regBwOpMode = usb_read8(Adapter, REG_BWOPMODE);
+ regRRSR_RSC = usb_read8(Adapter, REG_RRSR+2);
switch (pHalData->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
regBwOpMode |= BW_OPMODE_20MHZ;
/* 2007/02/07 Mark by Emily because we have not verify whether this register works */
- rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+ usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
break;
case HT_CHANNEL_WIDTH_40:
regBwOpMode &= ~BW_OPMODE_20MHZ;
/* 2007/02/07 Mark by Emily because we have not verify whether this register works */
- rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
+ usb_write8(Adapter, REG_BWOPMODE, regBwOpMode);
regRRSR_RSC = (regRRSR_RSC&0x90) | (pHalData->nCur40MhzPrimeSC<<5);
- rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
+ usb_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
break;
default:
break;
writeVal = (writeVal > 8) ? (writeVal-8) : 0;
else
writeVal = (writeVal > 6) ? (writeVal-6) : 0;
- rtw_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
+ usb_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
}
}
}
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#define _RTL8188E_SRESET_C_
-
-#include <rtl8188e_sreset.h>
-#include <rtl8188e_hal.h>
-
-void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter)
-{
-}
-
-void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
-{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
- struct sreset_priv *psrtpriv = &pHalData->srestpriv;
-
- unsigned long current_time;
- struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
- unsigned int diff_time;
- u32 txdma_status;
-
- txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
- if (txdma_status != 0x00) {
- DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
- rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
- rtl8188e_silentreset_for_specific_platform(padapter);
- }
- /* total xmit irp = 4 */
- current_time = jiffies;
- if (0 == pxmitpriv->free_xmitbuf_cnt) {
- diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
-
- if (diff_time > 2000) {
- if (psrtpriv->last_tx_complete_time == 0) {
- psrtpriv->last_tx_complete_time = current_time;
- } else {
- diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
- if (diff_time > 4000) {
- DBG_88E("%s tx hang\n", __func__);
- rtl8188e_silentreset_for_specific_platform(padapter);
- }
- }
- }
- }
-}
-
-void rtl8188e_sreset_linked_status_check(struct adapter *padapter)
-{
- u32 rx_dma_status = 0;
- u8 fw_status = 0;
- rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
- if (rx_dma_status != 0x00) {
- DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status);
- rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
- }
- fw_status = rtw_read8(padapter, REG_FMETHR);
- if (fw_status != 0x00) {
- if (fw_status == 1)
- DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status);
- else if (fw_status == 2)
- DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status);
- }
-}
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include <rtl8188e_led.h>
+#include <usb_ops_linux.h>
/* LED object. */
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);
- rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
+ LedCfg = usb_read8(padapter, REG_LEDCFG2);
+ usb_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
pLed->bLedOn = true;
}
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
- LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
+ LedCfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */
if (pHalData->bLedOpenDrain) {
/* Open-drain arrangement for controlling the LED) */
LedCfg &= 0x90; /* Set to software control. */
- rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
- LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
+ usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
+ LedCfg = usb_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
- rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
+ usb_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else {
- rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
+ usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
exit:
pLed->bLedOn = false;
}
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
- inner_ret = rtw_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf);
+ inner_ret = usb_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf);
rtw_count_tx_stats(adapt, pxmitframe, sz);
/* 3 4. write xmit buffer to USB FIFO */
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
- rtw_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf);
+ usb_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf);
/* 3 5. update statisitc */
pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
- rtw_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
+ usb_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
- value16 = rtw_read16(adapt, REG_CR);
+ value16 = usb_read16(adapt, REG_CR);
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
| PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
/* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
- rtw_write16(adapt, REG_CR, value16);
+ usb_write16(adapt, REG_CR, value16);
haldata->bMacPwrCtrlOn = true;
return _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
/* HISR write one to clear */
- rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
+ usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
/* HIMR - */
imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
- rtw_write32(Adapter, REG_HIMR_88E, imr);
+ usb_write32(Adapter, REG_HIMR_88E, imr);
haldata->IntrMask[0] = imr;
imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
- rtw_write32(Adapter, REG_HIMRE_88E, imr_ex);
+ usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
haldata->IntrMask[1] = imr_ex;
/* REG_USB_SPECIAL_OPTION - BIT(4) */
/* 0; Use interrupt endpoint to upload interrupt pkt */
/* 1; Use bulk endpoint to upload interrupt pkt, */
- usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+ usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
if (!adapter_to_dvobj(Adapter)->ishighspeed)
usb_opt = usb_opt & (~INT_BULK_SEL);
else
usb_opt = usb_opt | (INT_BULK_SEL);
- rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
+ usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
}
static void _InitQueueReservedPage(struct adapter *Adapter)
if (haldata->OutEpQueueSel & TX_SELE_NQ)
numNQ = 0x1C;
value8 = (u8)_NPQ(numNQ);
- rtw_write8(Adapter, REG_RQPN_NPQ, value8);
+ usb_write8(Adapter, REG_RQPN_NPQ, value8);
numPubQ = 0xA8 - numHQ - numLQ - numNQ;
/* TX DMA */
value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
- rtw_write32(Adapter, REG_RQPN, value32);
+ usb_write32(Adapter, REG_RQPN, value32);
} else {
- rtw_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
- rtw_write16(Adapter, REG_RQPN_NPQ, 0x0d);
- rtw_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
+ usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
+ usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
+ usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
}
}
static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
{
- rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
- rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
- rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
- rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
- rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
+ usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
+ usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
+ usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
+ usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
+ usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
}
static void _InitPageBoundary(struct adapter *Adapter)
/* */
u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
- rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
+ usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
}
static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
u16 hiQ)
{
- u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
+ u16 value16 = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
_TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
- rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
+ usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
}
static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
{
u32 value32;
- value32 = rtw_read32(Adapter, REG_CR);
+ value32 = usb_read32(Adapter, REG_CR);
/* TODO: use the other function to set network type */
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
- rtw_write32(Adapter, REG_CR, value32);
+ usb_write32(Adapter, REG_CR, value32);
}
static void _InitTransferPageSize(struct adapter *Adapter)
u8 value8;
value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
- rtw_write8(Adapter, REG_PBP, value8);
+ usb_write8(Adapter, REG_PBP, value8);
}
static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
{
- rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
+ usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
}
static void _InitWMACSetting(struct adapter *Adapter)
RCR_APP_MIC | RCR_APP_PHYSTS;
/* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
- rtw_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
+ usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
/* Accept all multicast address */
- rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
- rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
+ usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
+ usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
}
static void _InitAdaptiveCtrl(struct adapter *Adapter)
u32 value32;
/* Response Rate Set */
- value32 = rtw_read32(Adapter, REG_RRSR);
+ value32 = usb_read32(Adapter, REG_RRSR);
value32 &= ~RATE_BITMAP_ALL;
value32 |= RATE_RRSR_CCK_ONLY_1M;
- rtw_write32(Adapter, REG_RRSR, value32);
+ usb_write32(Adapter, REG_RRSR, value32);
/* CF-END Threshold */
/* SIFS (used in NAV) */
value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
- rtw_write16(Adapter, REG_SPEC_SIFS, value16);
+ usb_write16(Adapter, REG_SPEC_SIFS, value16);
/* Retry Limit */
value16 = _LRL(0x30) | _SRL(0x30);
- rtw_write16(Adapter, REG_RL, value16);
+ usb_write16(Adapter, REG_RL, value16);
}
static void _InitEDCA(struct adapter *Adapter)
{
/* Set Spec SIFS (used in NAV) */
- rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a);
- rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
+ usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
+ usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
/* Set SIFS for CCK */
- rtw_write16(Adapter, REG_SIFS_CTX, 0x100a);
+ usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
/* Set SIFS for OFDM */
- rtw_write16(Adapter, REG_SIFS_TRX, 0x100a);
+ usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
/* TXOP */
- rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
- rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
- rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
- rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
+ usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
+ usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
+ usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
+ usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
}
static void _InitRDGSetting(struct adapter *Adapter)
{
- rtw_write8(Adapter, REG_RD_CTRL, 0xFF);
- rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
- rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
+ usb_write8(Adapter, REG_RD_CTRL, 0xFF);
+ usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
+ usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
}
static void _InitRxSetting(struct adapter *Adapter)
{
- rtw_write32(Adapter, REG_MACID, 0x87654321);
- rtw_write32(Adapter, 0x0700, 0x87654321);
+ usb_write32(Adapter, REG_MACID, 0x87654321);
+ usb_write32(Adapter, 0x0700, 0x87654321);
}
static void _InitRetryFunction(struct adapter *Adapter)
{
u8 value8;
- value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
+ value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
value8 |= EN_AMPDU_RTY_NEW;
- rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
+ usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
/* Set ACK timeout */
- rtw_write8(Adapter, REG_ACKTO, 0x40);
+ usb_write8(Adapter, REG_ACKTO, 0x40);
}
/*-----------------------------------------------------------------------------
haldata->UsbTxAggMode = false;
if (haldata->UsbTxAggMode) {
- value32 = rtw_read32(Adapter, REG_TDECTRL);
+ value32 = usb_read32(Adapter, REG_TDECTRL);
value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
- rtw_write32(Adapter, REG_TDECTRL, value32);
+ usb_write32(Adapter, REG_TDECTRL, value32);
}
} /* usb_AggSettingTxUpdate */
u8 valueDMA;
u8 valueUSB;
- valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL);
- valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION);
+ valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
+ valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
break;
}
- rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
- rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
+ usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
+ usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
- rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
- rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
+ usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
+ usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
break;
case USB_RX_AGG_USB:
- rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
- rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
+ usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
+ usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
break;
case USB_RX_AGG_MIX:
- rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
- rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
- rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
- rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
+ usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
+ usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
+ usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
+ usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
break;
case USB_RX_AGG_DISABLE:
default:
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
- rtw_write16(Adapter, REG_BCN_CTRL, 0x1010);
+ usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
/* TODO: Remove these magic number */
- rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
- rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */
- rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */
+ usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
+ usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */
+ usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */
/* Suggested by designer timchen. Change beacon AIFS to the largest number */
/* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
- rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
+ usb_write16(Adapter, REG_BCNTCFG, 0x660F);
- haldata->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL);
- haldata->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE);
- haldata->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
- haldata->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2);
- haldata->RegCR_1 = rtw_read8(Adapter, REG_CR+1);
+ haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
+ haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
+ haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
+ haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
+ haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
}
static void _BeaconFunctionEnable(struct adapter *Adapter,
bool Enable, bool Linked)
{
- rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
+ usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
- rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F);
+ usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
}
/* Set CCK and OFDM Block "ON" */
return;
DBG_88E("==> %s ....\n", __func__);
- rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23);
+ usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0)|BIT23);
PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
enum rt_rf_power_state rfpowerstate = rf_off;
if (adapt->pwrctrlpriv.bHWPowerdown) {
- val8 = rtw_read8(adapt, REG_HSISR);
+ val8 = usb_read8(adapt, REG_HSISR);
DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8);
rfpowerstate = (val8 & BIT7) ? rf_off : rf_on;
} else { /* rf on/off */
- rtw_write8(adapt, REG_MAC_PINMUX_CFG, rtw_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3));
- val8 = rtw_read8(adapt, REG_GPIO_IO_SEL);
+ usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3));
+ val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
DBG_88E("GPIO_IN=%02x\n", val8);
rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;
}
/* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
/* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
/* Enable MACTXEN/MACRXEN block */
- value16 = rtw_read16(Adapter, REG_CR);
+ value16 = usb_read16(Adapter, REG_CR);
value16 |= (MACTXEN | MACRXEN);
- rtw_write8(Adapter, REG_CR, value16);
+ usb_write8(Adapter, REG_CR, value16);
if (haldata->bRDGEnable)
_InitRDGSetting(Adapter);
/* Enable TX Report */
/* Enable Tx Report Timer */
- value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
- rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0));
+ value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
+ usb_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0));
/* Set MAX RPT MACID */
- rtw_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
+ usb_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
/* Tx RPT Timer. Unit: 32us */
- rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
+ usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
- rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
+ usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
- rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
- rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
+ usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
+ usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
/* Keep RfRegChnlVal for later use. */
haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
/* Disable BAR, suggested by Scott */
/* 2010.04.09 add by hpfan */
/* */
- rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
+ usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
/* HW SEQ CTRL */
/* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
- rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
+ usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
if (pregistrypriv->wifi_spec)
- rtw_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
+ usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
/* Nav limit , suggest by scott */
- rtw_write8(Adapter, 0x652, 0x0);
+ usb_write8(Adapter, 0x652, 0x0);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
rtl8188e_InitHalDm(Adapter);
pwrctrlpriv->rf_pwrstate = rf_on;
/* enable Tx report. */
- rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F);
+ usb_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F);
/* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
- rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
+ usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
/* tynli_test_tx_report. */
- rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
+ usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
/* enable tx DMA to drop the redundate data of packet */
- rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
+ usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
/* 2010/08/26 MH Merge from 8192CE. */
/* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
/* _InitPABias(Adapter); */
- rtw_write8(Adapter, REG_USB_HRPWM, 0);
+ usb_write8(Adapter, REG_USB_HRPWM, 0);
/* ack for xmit mgmt frames. */
- rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
+ usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
exit:
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
/* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
- val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL);
- rtw_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1));
+ val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
+ usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1));
/* stop rx */
- rtw_write8(Adapter, REG_CR, 0x0);
+ usb_write8(Adapter, REG_CR, 0x0);
/* Run LPS WL RFOFF flow */
HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW);
/* 2. 0x1F[7:0] = 0 turn off RF */
- val8 = rtw_read8(Adapter, REG_MCUFWDL);
+ val8 = usb_read8(Adapter, REG_MCUFWDL);
if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
/* Reset MCU 0x2[10]=0. */
- val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
+ val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
- rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
+ usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
}
/* reset MCU ready status */
- rtw_write8(Adapter, REG_MCUFWDL, 0);
+ usb_write8(Adapter, REG_MCUFWDL, 0);
/* YJ,add,111212 */
/* Disable 32k */
- val8 = rtw_read8(Adapter, REG_32K_CTRL);
- rtw_write8(Adapter, REG_32K_CTRL, val8&(~BIT0));
+ val8 = usb_read8(Adapter, REG_32K_CTRL);
+ usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT0));
/* Card disable power action flow */
HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW);
/* Reset MCU IO Wrapper */
- val8 = rtw_read8(Adapter, REG_RSV_CTRL+1);
- rtw_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3)));
- val8 = rtw_read8(Adapter, REG_RSV_CTRL+1);
- rtw_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3);
+ val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
+ usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3)));
+ val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
+ usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3);
/* YJ,test add, 111207. For Power Consumption. */
- val8 = rtw_read8(Adapter, GPIO_IN);
- rtw_write8(Adapter, GPIO_OUT, val8);
- rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
-
- val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL);
- rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
- val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL+1);
- rtw_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
- rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
+ val8 = usb_read8(Adapter, GPIO_IN);
+ usb_write8(Adapter, GPIO_OUT, val8);
+ usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
+
+ val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
+ usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
+ val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
+ usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
+ usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
haldata->bMacPwrCtrlOn = false;
Adapter->bFWReady = false;
}
/* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
/* Enable register area 0x0-0xc. */
- rtw_write8(adapt, REG_RSV_CTRL, 0x0);
- rtw_write16(adapt, REG_APS_FSMCO, 0x8812);
+ usb_write8(adapt, REG_RSV_CTRL, 0x0);
+ usb_write16(adapt, REG_APS_FSMCO, 0x8812);
}
static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
DBG_88E("==> %s\n", __func__);
- rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
- rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
+ usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
+ usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
if (Adapter->pwrctrlpriv.bkeepfwalive) {
u8 i;
struct recv_buf *precvbuf;
uint status;
- struct intf_hdl *pintfhdl = &Adapter->iopriv.intf;
struct recv_priv *precvpriv = &(Adapter->recvpriv);
- u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
-
-
- _read_port = pintfhdl->io_ops._read_port;
status = _SUCCESS;
/* issue Rx irp to receive data */
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
- if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
+ if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
status = _FAIL;
goto exit;
{
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
- rtw_read_port_cancel(Adapter);
+ usb_read_port_cancel(Adapter);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
u8 eeValue;
/* check system boot selection */
- eeValue = rtw_read8(Adapter, REG_9346CR);
+ eeValue = usb_read8(Adapter, REG_9346CR);
eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
haldata->rf_chip = RF_6052;
}
-static int _ReadAdapterInfo8188EU(struct adapter *Adapter)
+static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
{
u32 start = jiffies;
_ReadPROMContent(Adapter);
MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
-
- return _SUCCESS;
-}
-
-static void ReadAdapterInfo8188EU(struct adapter *Adapter)
-{
- /* Read EEPROM size before call any EEPROM function */
- Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter);
-
- _ReadAdapterInfo8188EU(Adapter);
}
#define GPIO_DEBUG_PORT_NUM 0
/* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
/* which should be read from register to a global variable. */
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6);
+ usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6);
haldata->RegFwHwTxQCtrl |= BIT6;
- rtw_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
+ usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
haldata->RegReg542 |= BIT0;
- rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
+ usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
}
static void StopTxBeacon(struct adapter *adapt)
/* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
/* which should be read from register to a global variable. */
- rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6));
+ usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6));
haldata->RegFwHwTxQCtrl &= (~BIT6);
- rtw_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
+ usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
haldata->RegReg542 &= ~(BIT0);
- rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
+ usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
/* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
}
u8 mode = *((u8 *)val);
/* disable Port0 TSF update */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
/* set net_type */
- val8 = rtw_read8(Adapter, MSR)&0x0c;
+ val8 = usb_read8(Adapter, MSR)&0x0c;
val8 |= mode;
- rtw_write8(Adapter, MSR, val8);
+ usb_write8(Adapter, MSR, val8);
DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
StopTxBeacon(Adapter);
- rtw_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
+ usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
} else if ((mode == _HW_STATE_ADHOC_)) {
ResumeTxBeacon(Adapter);
- rtw_write8(Adapter, REG_BCN_CTRL, 0x1a);
+ usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
} else if (mode == _HW_STATE_AP_) {
ResumeTxBeacon(Adapter);
- rtw_write8(Adapter, REG_BCN_CTRL, 0x12);
+ usb_write8(Adapter, REG_BCN_CTRL, 0x12);
/* Set RCR */
- rtw_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
+ usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
/* enable to rx data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
/* enable to rx ps-poll */
- rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400);
+ usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
/* Beacon Control related register for first time */
- rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
+ usb_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
- rtw_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
- rtw_write16(Adapter, REG_BCNTCFG, 0x00);
- rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
- rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
+ usb_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
+ usb_write16(Adapter, REG_BCNTCFG, 0x00);
+ usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
+ usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
/* reset TSF */
- rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
+ usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
/* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
- rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
+ usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
/* enable BCN0 Function for if1 */
/* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
- rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
+ usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
/* dis BCN1 ATIM WND if if2 is station */
- rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
+ usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
}
}
reg_macid = REG_MACID;
for (idx = 0; idx < 6; idx++)
- rtw_write8(Adapter, (reg_macid+idx), val[idx]);
+ usb_write8(Adapter, (reg_macid+idx), val[idx]);
}
static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
reg_bssid = REG_BSSID;
for (idx = 0; idx < 6; idx++)
- rtw_write8(Adapter, (reg_bssid+idx), val[idx]);
+ usb_write8(Adapter, (reg_bssid+idx), val[idx]);
}
static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
bcn_ctrl_reg = REG_BCN_CTRL;
if (*((u8 *)val))
- rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
+ usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
else
- rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
+ usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
}
static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
u8 val8;
- val8 = rtw_read8(Adapter, MSR)&0x0c;
+ val8 = usb_read8(Adapter, MSR)&0x0c;
val8 |= *((u8 *)val);
- rtw_write8(Adapter, MSR, val8);
+ usb_write8(Adapter, MSR, val8);
}
break;
case HW_VAR_MEDIA_STATUS1:
{
u8 val8;
- val8 = rtw_read8(Adapter, MSR) & 0x03;
+ val8 = usb_read8(Adapter, MSR) & 0x03;
val8 |= *((u8 *)val) << 2;
- rtw_write8(Adapter, MSR, val8);
+ usb_write8(Adapter, MSR, val8);
}
break;
case HW_VAR_SET_OPMODE:
BrateCfg |= 0x01; /* default enable 1M ACK rate */
/* Set RRSR rate table. */
- rtw_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
- rtw_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
- rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0);
+ usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
+ usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
+ usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
/* Set RTS initial rate */
while (BrateCfg > 0x1) {
RateIndex++;
}
/* Ziv - Check */
- rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
+ usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
}
break;
case HW_VAR_TXPAUSE:
- rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
+ usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
break;
case HW_VAR_BCN_FUNC:
hw_var_set_bcn_func(Adapter, variable, val);
StopTxBeacon(Adapter);
/* disable related TSF function */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
- rtw_write32(Adapter, REG_TSFTR, tsf);
- rtw_write32(Adapter, REG_TSFTR+4, tsf>>32);
+ usb_write32(Adapter, REG_TSFTR, tsf);
+ usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
/* enable related TSF function */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(3));
if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
ResumeTxBeacon(Adapter);
break;
case HW_VAR_CHECK_BSSID:
if (*((u8 *)val)) {
- rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+ usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
} else {
u32 val32;
- val32 = rtw_read32(Adapter, REG_RCR);
+ val32 = usb_read32(Adapter, REG_RCR);
val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
- rtw_write32(Adapter, REG_RCR, val32);
+ usb_write32(Adapter, REG_RCR, val32);
}
break;
case HW_VAR_MLME_DISCONNECT:
/* Set RCR to not to receive data frame when NO LINK state */
/* reject all data frames */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
/* reset TSF */
- rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
+ usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
/* disable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
break;
case HW_VAR_MLME_SITESURVEY:
if (*((u8 *)val)) { /* under sitesurvey */
/* config RCR to receive different BSSID & not to receive data frame */
- u32 v = rtw_read32(Adapter, REG_RCR);
+ u32 v = usb_read32(Adapter, REG_RCR);
v &= ~(RCR_CBSSID_BCN);
- rtw_write32(Adapter, REG_RCR, v);
+ usb_write32(Adapter, REG_RCR, v);
/* reject all data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
/* disable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
} else { /* sitesurvey done */
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
if ((is_client_associated_to_ap(Adapter)) ||
((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
/* enable to rx data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
/* enable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
} else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
/* enable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
}
if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
- rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+ usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
} else {
if (Adapter->in_cta_test) {
- u32 v = rtw_read32(Adapter, REG_RCR);
+ u32 v = usb_read32(Adapter, REG_RCR);
v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
- rtw_write32(Adapter, REG_RCR, v);
+ usb_write32(Adapter, REG_RCR, v);
} else {
- rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
+ usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
}
}
}
if (type == 0) { /* prepare to join */
/* enable to rx data frame.Accept all data frame */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
if (Adapter->in_cta_test) {
- u32 v = rtw_read32(Adapter, REG_RCR);
+ u32 v = usb_read32(Adapter, REG_RCR);
v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
- rtw_write32(Adapter, REG_RCR, v);
+ usb_write32(Adapter, REG_RCR, v);
} else {
- rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
+ usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
}
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
RetryLimit = 0x7;
} else if (type == 1) {
/* joinbss_event call back when join res < 0 */
- rtw_write16(Adapter, REG_RXFLTMAP2, 0x00);
+ usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
} else if (type == 2) {
/* sta add event call back */
/* enable update TSF */
- rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
+ usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
RetryLimit = 0x7;
}
- rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+ usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
}
break;
case HW_VAR_BEACON_INTERVAL:
- rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
+ usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
break;
case HW_VAR_SLOT_TIME:
{
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
- rtw_write8(Adapter, REG_SLOT, val[0]);
+ usb_write8(Adapter, REG_SLOT, val[0]);
if (pmlmeinfo->WMM_enable == 0) {
if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
/* <Roger_EXP> Temporary removed, 2008.06.20. */
- rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
- rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
+ usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
+ usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
+ usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
+ usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
}
}
break;
case HW_VAR_RESP_SIFS:
/* RESP_SIFS for CCK */
- rtw_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */
- rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
+ usb_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */
+ usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
/* RESP_SIFS for OFDM */
- rtw_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
- rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
+ usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
+ usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
break;
case HW_VAR_ACK_PREAMBLE:
{
if (bShortPreamble)
regTmp |= 0x80;
- rtw_write8(Adapter, REG_RRSR+2, regTmp);
+ usb_write8(Adapter, REG_RRSR+2, regTmp);
}
break;
case HW_VAR_SEC_CFG:
- rtw_write8(Adapter, REG_SECCFG, *((u8 *)val));
+ usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
break;
case HW_VAR_DM_FLAG:
podmpriv->SupportAbility = *((u8 *)val);
ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
/* write content 0 is equall to mark invalid */
- rtw_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
- rtw_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
+ usb_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
+ usb_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
}
}
break;
case HW_VAR_CAM_INVALID_ALL:
- rtw_write32(Adapter, RWCAM, BIT(31)|BIT(30));
+ usb_write32(Adapter, RWCAM, BIT(31)|BIT(30));
break;
case HW_VAR_CAM_WRITE:
{
u32 cmd;
u32 *cam_val = (u32 *)val;
- rtw_write32(Adapter, WCAMI, cam_val[0]);
+ usb_write32(Adapter, WCAMI, cam_val[0]);
cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
- rtw_write32(Adapter, RWCAM, cmd);
+ usb_write32(Adapter, RWCAM, cmd);
}
break;
case HW_VAR_AC_PARAM_VO:
- rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
+ usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_VI:
- rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
+ usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_BE:
haldata->AcParam_BE = ((u32 *)(val))[0];
- rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
+ usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_AC_PARAM_BK:
- rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
+ usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
break;
case HW_VAR_ACM_CTRL:
{
u8 acm_ctrl = *((u8 *)val);
- u8 AcmCtrl = rtw_read8(Adapter, REG_ACMHWCTRL);
+ u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
if (acm_ctrl > 1)
AcmCtrl = AcmCtrl | 0x1;
AcmCtrl &= (~AcmHw_BeqEn);
DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
- rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
+ usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
}
break;
case HW_VAR_AMPDU_MIN_SPACE:
}
if (MinSpacingToSet < SecMinSpace)
MinSpacingToSet = SecMinSpace;
- rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
+ usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
}
}
break;
if ((pRegToSet[index] & 0x0f) > FactorToSet)
pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
- rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
+ usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
}
}
}
u8 threshold = *((u8 *)val);
if (threshold == 0)
threshold = haldata->UsbRxAggPageCount;
- rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
+ usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
}
break;
case HW_VAR_SET_RPWM:
u8 trycnt = 100;
/* pause tx */
- rtw_write8(Adapter, REG_TXPAUSE, 0xff);
+ usb_write8(Adapter, REG_TXPAUSE, 0xff);
/* keep sn */
- Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter, REG_NQOS_SEQ);
+ Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
if (!pwrpriv->bkeepfwalive) {
/* RX DMA stop */
- rtw_write32(Adapter, REG_RXPKT_NUM, (rtw_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
+ usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
do {
- if (!(rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
+ if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
break;
} while (trycnt--);
if (trycnt == 0)
DBG_88E("Stop RX DMA failed......\n");
/* RQPN Load 0 */
- rtw_write16(Adapter, REG_RQPN_NPQ, 0x0);
- rtw_write32(Adapter, REG_RQPN, 0x80000000);
+ usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
+ usb_write32(Adapter, REG_RQPN, 0x80000000);
mdelay(10);
}
}
{
u8 maxMacid = *val;
DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
- rtw_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
+ usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
}
break;
case HW_VAR_H2C_MEDIA_STATUS_RPT:
break;
case HW_VAR_BCN_VALID:
/* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
- rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0);
+ usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT0);
break;
default:
break;
case HW_VAR_BASIC_RATE:
*((u16 *)(val)) = haldata->BasicRateSet;
case HW_VAR_TXPAUSE:
- val[0] = rtw_read8(Adapter, REG_TXPAUSE);
+ val[0] = usb_read8(Adapter, REG_TXPAUSE);
break;
case HW_VAR_BCN_VALID:
/* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
- val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2)) ? true : false;
+ val[0] = (BIT0 & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
break;
case HW_VAR_DM_FLAG:
val[0] = podmpriv->SupportAbility;
val[0] = true;
} else {
u32 valRCR;
- valRCR = rtw_read32(Adapter, REG_RCR);
+ valRCR = usb_read32(Adapter, REG_RCR);
valRCR &= 0x00070000;
if (valRCR)
val[0] = false;
*val = haldata->bMacPwrCtrlOn;
break;
case HW_VAR_CHK_HI_QUEUE_EMPTY:
- *val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
+ *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
break;
default:
break;
} else if (dm_func == 6) {/* turn on all dynamic func */
if (!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) {
struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
- pDigTable->CurIGValue = rtw_read8(Adapter, 0xc50);
+ pDigTable->CurIGValue = usb_read8(Adapter, 0xc50);
}
podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
DBG_88E("==> Turn on all dynamic function...\n");
/* reset TSF, enable update TSF, correcting TSF On Beacon */
/* BCN interval */
- rtw_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
- rtw_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */
+ usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
+ usb_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */
_InitBeaconParameters(adapt);
- rtw_write8(adapt, REG_SLOT, 0x09);
+ usb_write8(adapt, REG_SLOT, 0x09);
- value32 = rtw_read32(adapt, REG_TCR);
+ value32 = usb_read32(adapt, REG_TCR);
value32 &= ~TSFRST;
- rtw_write32(adapt, REG_TCR, value32);
+ usb_write32(adapt, REG_TCR, value32);
value32 |= TSFRST;
- rtw_write32(adapt, REG_TCR, value32);
+ usb_write32(adapt, REG_TCR, value32);
/* NOTE: Fix test chip's bug (about contention windows's randomness) */
- rtw_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
- rtw_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
+ usb_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
+ usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
_BeaconFunctionEnable(adapt, true, true);
ResumeTxBeacon(adapt);
- rtw_write8(adapt, bcn_ctrl_reg, rtw_read8(adapt, bcn_ctrl_reg)|BIT(1));
+ usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg)|BIT(1));
}
static void rtl8188eu_init_default_value(struct adapter *adapt)
adapt->HalData = rtw_zmalloc(sizeof(struct hal_data_8188e));
if (adapt->HalData == NULL)
DBG_88E("cant not alloc memory for HAL DATA\n");
- adapt->hal_data_sz = sizeof(struct hal_data_8188e);
halfunc->hal_power_on = rtl8188eu_InitPowerOn;
halfunc->hal_init = &rtl8188eu_hal_init;
halfunc->init_default_value = &rtl8188eu_init_default_value;
halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
- halfunc->read_adapter_info = &ReadAdapterInfo8188EU;
+ halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
halfunc->SetHwRegHandler = &SetHwReg8188EU;
halfunc->GetHwRegHandler = &GetHwReg8188EU;
#include <recv_osdep.h>
#include <rtl8188e_hal.h>
-static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
+static int usbctrl_vendorreq(struct adapter *adapt, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
{
- struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
unsigned int pipe;
return status;
}
-static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
+u8 usb_read8(struct adapter *adapter, u32 addr)
{
u8 request;
u8 requesttype;
wvalue = (u16)(addr&0x0000ffff);
len = 1;
- usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return data;
}
-static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
+u16 usb_read16(struct adapter *adapter, u32 addr)
{
u8 request;
u8 requesttype;
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 2;
- usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return (u16)(le32_to_cpu(data)&0xffff);
}
-static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
+u32 usb_read32(struct adapter *adapter, u32 addr)
{
u8 request;
u8 requesttype;
wvalue = (u16)(addr&0x0000ffff);
len = 4;
- usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return le32_to_cpu(data);
}
-static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+int usb_write8(struct adapter *adapter, u32 addr, u8 val)
{
u8 request;
u8 requesttype;
wvalue = (u16)(addr&0x0000ffff);
len = 1;
data = val;
- ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return ret;
}
-static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+int usb_write16(struct adapter *adapter, u32 addr, u16 val)
{
u8 request;
u8 requesttype;
data = cpu_to_le32(val & 0x0000ffff);
- ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return ret;
}
-static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+int usb_write32(struct adapter *adapter, u32 addr, u32 val)
{
u8 request;
u8 requesttype;
len = 4;
data = cpu_to_le32(val);
- ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
+ ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
return ret;
}
-static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
+int usb_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata)
{
u8 request;
u8 requesttype;
len = length;
memcpy(buf, pdata, len);
- ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype);
+ ret = usbctrl_vendorreq(adapter, request, wvalue, index, buf, len, requesttype);
- return ret;
+ return RTW_STATUS_CODE(ret);
}
static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf)
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
precvbuf->reuse = true;
- rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+ usb_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__);
} else {
rtw_reset_continual_urb_error(adapter_to_dvobj(adapt));
precvbuf->pskb = NULL;
precvbuf->reuse = false;
- rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+ usb_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status));
haldata->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;
}
precvbuf->reuse = true;
- rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
+ usb_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
break;
case -EINPROGRESS:
DBG_88E("ERROR: URB IS IN PROGRESS!\n");
}
}
-static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
+u32 usb_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *rmem)
{
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
- struct adapter *adapter = pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
}
}
-void rtl8188eu_set_intf_ops(struct _io_ops *pops)
-{
- _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));
- pops->_read8 = &usb_read8;
- pops->_read16 = &usb_read16;
- pops->_read32 = &usb_read32;
- pops->_read_mem = &usb_read_mem;
- pops->_read_port = &usb_read_port;
- pops->_write8 = &usb_write8;
- pops->_write16 = &usb_write16;
- pops->_write32 = &usb_write32;
- pops->_writeN = &usb_writeN;
- pops->_write_mem = &usb_write_mem;
- pops->_write_port = &usb_write_port;
- pops->_read_port_cancel = &usb_read_port_cancel;
- pops->_write_port_cancel = &usb_write_port_cancel;
-}
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-/* */
-/* File Name: Hal8188EReg.h */
-/* */
-/* Description: */
-/* */
-/* This file is for RTL8188E register definition. */
-/* */
-/* */
-/* */
-#ifndef __HAL_8188E_REG_H__
-#define __HAL_8188E_REG_H__
-
-/* */
-/* Register Definition */
-/* */
-#define TRX_ANTDIV_PATH 0x860
-#define RX_ANTDIV_PATH 0xb2c
-#define ODM_R_A_AGC_CORE1_8188E 0xc50
-
-
-/* */
-/* Bitmap Definition */
-/* */
-#define BIT_FA_RESET_8188E BIT0
-
-
-#endif
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
- #ifndef __HAL_PHY_RF_H__
- #define __HAL_PHY_RF_H__
-
-#define ODM_TARGET_CHNL_NUM_2G_5G 59
-
-void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm);
-
-u8 ODM_GetRightChnlPlaceforIQK(u8 chnl);
-
-#endif /* #ifndef __HAL_PHY_RF_H__ */
#define IQK_DELAY_TIME_88E 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
-
+#define ODM_TARGET_CHNL_NUM_2G_5G 59
void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *pDM_Odm,
u8 Type, /* 0 = OFDM, 1 = CCK */
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
-#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_p2p.h>
#include <rtw_ap.h>
#include <rtw_mp.h>
-#include <rtw_br_ext.h>
-
-enum _NIC_VERSION {
- RTL8711_NIC,
- RTL8712_NIC,
- RTL8713_NIC,
- RTL8716_NIC
-};
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
-struct specific_device_id {
- u32 flags;
- u16 idVendor;
- u16 idProduct;
-};
-
struct registry_priv {
u8 chip_version;
u8 rfintfs;
struct dvobj_priv {
struct adapter *if1;
- struct adapter *if2;
struct rt_firmware firmware;
/* For 92D, DMDP have 2 interface. */
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
- u8 irq_alloc;
-
/*-------- below is for USB INTERFACE --------*/
u8 nr_endpoint;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; /* endpoint number */
- int RegUsbSS;
- struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
- u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
return &dvobj->pusbintf->dev;
};
-enum _IFACE_TYPE {
- IFACE_PORT0, /* mapping to port0 for C/D series chips */
- IFACE_PORT1, /* mapping to port1 for C/D series chip */
- MAX_IFACE_PORT,
-};
-
-enum _ADAPTER_TYPE {
- PRIMARY_ADAPTER,
- SECONDARY_ADAPTER,
- MAX_ADAPTER,
-};
-
-enum driver_state {
- DRIVER_NORMAL = 0,
- DRIVER_DISAPPEAR = 1,
- DRIVER_REPLACE_DONGLE = 2,
-};
-
struct adapter {
- int DriverState;/* for disable driver using module, use dongle toi
- * replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
- int bDongle;/* build-in module or external dongle */
u16 chip_type;
struct dvobj_priv *dvobj;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct evt_priv evtpriv;
- struct io_priv iopriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
struct wifidirect_info wdinfo;
void *HalData;
- u32 hal_data_sz;
struct hal_ops HalFunc;
s32 bDriverStopped;
s32 bSurpriseRemoved;
- s32 bCardDisableWOHSM;
-
- u32 IsrContent;
- u32 ImrContent;
- u8 EepromAddressSize;
u8 hw_init_completed;
- u8 bDriverIsGoingToUnload;
- u8 init_adpt_in_progress;
- u8 bHaltInProgress;
void *cmdThread;
void *evtThread;
- void *xmitThread;
- void *recvThread;
void (*intf_start)(struct adapter *adapter);
void (*intf_stop)(struct adapter *adapter);
struct net_device *pnetdev;
int net_closed;
u8 bFWReady;
- u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
* upper application reads it. */
u8 bShowGetP2PState;
#endif
- struct adapter *pbuddy_adapter;
- struct mutex *hw_init_mutex;
+ struct mutex hw_init_mutex;
spinlock_t br_ext_lock;
- struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
- int pppoe_connection_in_progress;
- unsigned char pppoe_addr[MACADDRLEN];
- unsigned char scdb_mac[MACADDRLEN];
- unsigned char scdb_ip[4];
- struct nat25_network_db_entry *scdb_entry;
- unsigned char br_mac[MACADDRLEN];
- unsigned char br_ip[4];
- struct br_ext_info ethBrExtInfo;
u8 fix_rate;
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
- void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite,
- u8 PwrState);
- void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset,
- u16 _size_byte, u8 *pbuf, bool bPseudoTest);
- void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType,
- u8 type, void *pOut, bool bPseudoTest);
- u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType,
- bool bPseudoTest);
- int (*Efuse_PgPacketRead)(struct adapter *adapter, u8 offset,
- u8 *data, bool bPseudoTest);
- int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset,
- u8 word_en, u8 *data, bool bPseudoTest);
- u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter,
- u16 efuse_addr, u8 word_en,
- u8 *data, bool bPseudoTest);
- bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset,
- u8 word_en, u8 *data, bool test);
-
void (*sreset_init_value)(struct adapter *padapter);
- void (*sreset_reset_value)(struct adapter *padapter);
- void (*silentreset)(struct adapter *padapter);
- void (*sreset_xmit_status_check)(struct adapter *padapter);
- void (*sreset_linked_status_check) (struct adapter *padapter);
u8 (*sreset_get_wifi_status)(struct adapter *padapter);
int (*IOL_exec_cmds_sync)(struct adapter *padapter,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
-void rtw_hal_sreset_reset(struct adapter *padapter);
-void rtw_hal_sreset_reset_value(struct adapter *padapter);
-void rtw_hal_sreset_xmit_status_check(struct adapter *padapter);
-void rtw_hal_sreset_linked_status_check(struct adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(struct adapter *padapter);
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
+#include <usb_ops_linux.h>
/* 2 OutSrc Header Files */
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
-#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */
#include "Hal8188ERateAdaptive.h"/* for RA,Power training */
#include "rtl8188e_hal.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
#include "HalHWImg8188E_BB.h"
-#include "Hal8188EReg.h"
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
#include <osdep_service.h>
#include <drv_types.h>
-struct intf_priv {
- u8 *intf_dev;
- u32 max_iosz; /* USB2.0: 128, USB1.1: 64, SDIO:64 */
- u32 max_xmitsz; /* USB2.0: unlimited, SDIO:512 */
- u32 max_recvsz; /* USB2.0: unlimited, SDIO:512 */
-
- u8 *io_rwmem;
- u8 *allocated_io_rwmem;
- u32 io_wsz; /* unit: 4bytes */
- u32 io_rsz;/* unit: 4bytes */
- u8 intf_status;
-
- void (*_bus_io)(u8 *priv);
-
-/*
-Under Sync. IRP (SDIO/USB)
-A protection mechanism is necessary for the io_rwmem(read/write protocol)
-
-Under Async. IRP (SDIO/USB)
-The protection mechanism is through the pending queue.
-*/
- struct mutex ioctl_mutex;
- /* when in USB, IO is through interrupt in/out endpoints */
- struct usb_device *udev;
- struct urb *piorw_urb;
- u8 io_irp_cnt;
- u8 bio_irp_pending;
- struct semaphore io_retevt;
- struct timer_list io_timer;
- u8 bio_irp_timeout;
- u8 bio_timer_cancel;
-};
-
u8 rtw_init_drv_sw(struct adapter *padapter);
u8 rtw_free_drv_sw(struct adapter *padapter);
u8 rtw_reset_drv_sw(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
-int rtw_hw_suspend(struct adapter *padapter);
-int rtw_hw_resume(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */
void rtw_os_read_port(struct adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
-int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb);
int _netdev_open(struct net_device *pnetdev);
int netdev_open(struct net_device *pnetdev);
int netdev_close(struct net_device *pnetdev);
#include "rtl8188e_xmit.h"
#include "rtl8188e_cmd.h"
#include "Hal8188EPwrSeq.h"
-#include "rtl8188e_sreset.h"
#include "rtw_efuse.h"
-
+#include "rtw_sreset.h"
#include "odm_precomp.h"
/* Fw Array */
/* register */
void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
-void rtl8188e_clone_haldata(struct adapter *dst, struct adapter *src);
void rtl8188e_start_thread(struct adapter *padapter);
void rtl8188e_stop_thread(struct adapter *padapter);
void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int len);
+s32 iol_execute(struct adapter *padapter, u8 control);
+void iol_mode_enable(struct adapter *padapter, u8 enable);
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#ifndef _RTL8188E_SRESET_H_
-#define _RTL8188E_SRESET_H_
-
-#include <osdep_service.h>
-#include <drv_types.h>
-#include <rtw_sreset.h>
-
-void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter);
-void rtl8188e_sreset_xmit_status_check(struct adapter *padapter);
-void rtl8188e_sreset_linked_status_check(struct adapter *padapter);
-
-#endif
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#ifndef _RTW_BR_EXT_H_
-#define _RTW_BR_EXT_H_
-
-#define MACADDRLEN 6
-#define _DEBUG_ERR DBG_88E
-#define _DEBUG_INFO DBG_88E
-#define DEBUG_WARN DBG_88E
-#define DEBUG_INFO DBG_88E
-#define DEBUG_ERR DBG_88E
-#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr)
-
-#define NAT25_HASH_BITS 4
-#define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS)
-#define NAT25_AGEING_TIME 300
-
-#define MAX_NETWORK_ADDR_LEN 17
-
-struct nat25_network_db_entry {
- struct nat25_network_db_entry *next_hash;
- struct nat25_network_db_entry **pprev_hash;
- atomic_t use_count;
- unsigned char macAddr[6];
- unsigned long ageing_timer;
- unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
-};
-
-enum NAT25_METHOD {
- NAT25_MIN,
- NAT25_CHECK,
- NAT25_INSERT,
- NAT25_LOOKUP,
- NAT25_PARSE,
- NAT25_MAX
-};
-
-struct br_ext_info {
- unsigned int nat25_disable;
- unsigned int macclone_enable;
- unsigned int dhcp_bcst_disable;
- int addPPPoETag; /* 1: Add PPPoE relay-SID, 0: disable */
- unsigned char nat25_dmzMac[MACADDRLEN];
- unsigned int nat25sc_disable;
-};
-
-void nat25_db_cleanup(struct adapter *priv);
-
-#endif /* _RTW_BR_EXT_H_ */
#include <osdep_service.h>
#include <drv_types.h>
-
+#define DRIVERVERSION "v4.1.4_6773.20130222"
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
};
-/*------------------------Export global variable----------------------------*/
-extern u8 fakeEfuseBank;
-extern u32 fakeEfuseUsedBytes;
-extern u8 fakeEfuseContent[];
-extern u8 fakeEfuseInitMap[];
-extern u8 fakeEfuseModifiedMap[];
-
-extern u32 BTEfuseUsedBytes;
-extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
-extern u8 BTEfuseInitMap[];
-extern u8 BTEfuseModifiedMap[];
-
-extern u32 fakeBTEfuseUsedBytes;
-extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
-extern u8 fakeBTEfuseInitMap[];
-extern u8 fakeBTEfuseModifiedMap[];
-/*------------------------Export global variable----------------------------*/
-
u8 efuse_GetCurrentSize(struct adapter *adapter, u16 *size);
u16 efuse_GetMaxSize(struct adapter *adapter);
u8 rtw_efuse_access(struct adapter *adapter, u8 read, u16 start_addr,
u16 cnts, u8 *data);
u8 rtw_efuse_map_read(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_write(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
-u8 rtw_BT_efuse_map_read(struct adapter *adapter, u16 addr,
- u16 cnts, u8 *data);
-u8 rtw_BT_efuse_map_write(struct adapter *adapter, u16 addr,
- u16 cnts, u8 *data);
-u16 Efuse_GetCurrentSize(struct adapter *adapter, u8 efusetype, bool test);
+u16 Efuse_GetCurrentSize(struct adapter *adapter);
u8 Efuse_CalculateWordCnts(u8 word_en);
-void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf, bool test);
void EFUSE_GetEfuseDefinition(struct adapter *adapt, u8 type, u8 type1,
- void *out, bool bPseudoTest);
-u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data, bool test);
-u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data, bool test);
+ void *out);
+u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data);
+u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data);
+void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset,
+ u16 _size_byte, u8 *pbuf);
void Efuse_PowerSwitch(struct adapter *adapt, u8 bWrite, u8 PwrState);
-int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data, bool test);
-int Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data,
- bool test);
+int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data);
+bool Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data);
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr,
- u8 word_en, u8 *data, bool test);
+ u8 word_en, u8 *data);
-u8 EFUSE_Read1Byte(struct adapter *adapter, u16 address);
-void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype, bool test);
+void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype);
void EFUSE_ShadowRead(struct adapter *adapt, u8 type, u16 offset, u32 *val);
#endif
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-#ifndef _RTW_IO_H_
-#define _RTW_IO_H_
-
-#include <osdep_service.h>
-#include <osdep_intf.h>
-
-#include <asm/byteorder.h>
-#include <linux/semaphore.h>
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <linux/atomic.h>
-
-#include <linux/usb.h>
-#include <linux/usb/ch9.h>
-
-#define rtw_usb_buffer_alloc(dev, size, dma) \
- usb_alloc_coherent((dev), (size), (in_interrupt() ? \
- GFP_ATOMIC : GFP_KERNEL), (dma))
-#define rtw_usb_buffer_free(dev, size, addr, dma) \
- usb_free_coherent((dev), (size), (addr), (dma))
-
-#define NUM_IOREQ 8
-
-#define MAX_PROT_SZ (64-16)
-
-#define _IOREADY 0
-#define _IO_WAIT_COMPLETE 1
-#define _IO_WAIT_RSP 2
-
-/* IO COMMAND TYPE */
-#define _IOSZ_MASK_ (0x7F)
-#define _IO_WRITE_ BIT(7)
-#define _IO_FIXED_ BIT(8)
-#define _IO_BURST_ BIT(9)
-#define _IO_BYTE_ BIT(10)
-#define _IO_HW_ BIT(11)
-#define _IO_WORD_ BIT(12)
-#define _IO_SYNC_ BIT(13)
-#define _IO_CMDMASK_ (0x1F80)
-
-/*
- For prompt mode accessing, caller shall free io_req
- Otherwise, io_handler will free io_req
-*/
-
-/* IO STATUS TYPE */
-#define _IO_ERR_ BIT(2)
-#define _IO_SUCCESS_ BIT(1)
-#define _IO_DONE_ BIT(0)
-
-#define IO_RD32 (_IO_SYNC_ | _IO_WORD_)
-#define IO_RD16 (_IO_SYNC_ | _IO_HW_)
-#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_)
-
-#define IO_RD32_ASYNC (_IO_WORD_)
-#define IO_RD16_ASYNC (_IO_HW_)
-#define IO_RD8_ASYNC (_IO_BYTE_)
-
-#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
-#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
-#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
-
-#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_)
-#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_)
-#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_)
-
-/*
- Only Sync. burst accessing is provided.
-*/
-
-#define IO_WR_BURST(x) \
- (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
-#define IO_RD_BURST(x) \
- (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
-
-/* below is for the intf_option bit defition... */
-
-#define _INTF_ASYNC_ BIT(0) /* support async io */
-
-struct intf_priv;
-struct intf_hdl;
-
-struct _io_ops {
- u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
- u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
- u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
- int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
- int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
- int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
- int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length,
- u8 *pdata);
- int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
- int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
- int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
- void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
- u8 *pmem);
- void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
- u8 *pmem);
- u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
- u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
- u8 *pmem);
- u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
- u8 *pmem);
- u32 (*_write_scsi)(struct intf_hdl *pintfhdl, u32 cnt, u8 *pmem);
- void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
- void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
-};
-
-struct io_req {
- struct list_head list;
- u32 addr;
- u32 val;
- u32 command;
- u32 status;
- u8 *pbuf;
- struct semaphore sema;
-
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req, u8 *cnxt);
- u8 *cnxt;
-};
-
-struct intf_hdl {
- struct adapter *padapter;
- struct dvobj_priv *pintf_dev;
- struct _io_ops io_ops;
-};
-
-struct reg_protocol_rd {
-#ifdef __LITTLE_ENDIAN
- /* DW1 */
- u32 NumOfTrans:4;
- u32 Reserved1:4;
- u32 Reserved2:24;
- /* DW2 */
- u32 ByteCount:7;
- u32 WriteEnable:1; /* 0:read, 1:write */
- u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
- u32 BurstMode:1;
- u32 Byte1Access:1;
- u32 Byte2Access:1;
- u32 Byte4Access:1;
- u32 Reserved3:3;
- u32 Reserved4:16;
- /* DW3 */
- u32 BusAddress;
- /* DW4 */
- /* u32 Value; */
-#else
-/* DW1 */
- u32 Reserved1:4;
- u32 NumOfTrans:4;
- u32 Reserved2:24;
- /* DW2 */
- u32 WriteEnable:1;
- u32 ByteCount:7;
- u32 Reserved3:3;
- u32 Byte4Access:1;
-
- u32 Byte2Access:1;
- u32 Byte1Access:1;
- u32 BurstMode:1;
- u32 FixOrContinuous:1;
- u32 Reserved4:16;
- /* DW3 */
- u32 BusAddress;
-
- /* DW4 */
-#endif
-};
-
-struct reg_protocol_wt {
-#ifdef __LITTLE_ENDIAN
- /* DW1 */
- u32 NumOfTrans:4;
- u32 Reserved1:4;
- u32 Reserved2:24;
- /* DW2 */
- u32 ByteCount:7;
- u32 WriteEnable:1; /* 0:read, 1:write */
- u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
- u32 BurstMode:1;
- u32 Byte1Access:1;
- u32 Byte2Access:1;
- u32 Byte4Access:1;
- u32 Reserved3:3;
- u32 Reserved4:16;
- /* DW3 */
- u32 BusAddress;
- /* DW4 */
- u32 Value;
-#else
- /* DW1 */
- u32 Reserved1:4;
- u32 NumOfTrans:4;
- u32 Reserved2:24;
- /* DW2 */
- u32 WriteEnable:1;
- u32 ByteCount:7;
- u32 Reserved3:3;
- u32 Byte4Access:1;
- u32 Byte2Access:1;
- u32 Byte1Access:1;
- u32 BurstMode:1;
- u32 FixOrContinuous:1;
- u32 Reserved4:16;
- /* DW3 */
- u32 BusAddress;
- /* DW4 */
- u32 Value;
-#endif
-};
-
-/*
-Below is the data structure used by _io_handler
-*/
-
-struct io_priv {
- struct adapter *padapter;
- struct intf_hdl intf;
-};
-
-u8 _rtw_read8(struct adapter *adapter, u32 addr);
-u16 _rtw_read16(struct adapter *adapter, u32 addr);
-u32 _rtw_read32(struct adapter *adapter, u32 addr);
-void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-void _rtw_read_port_cancel(struct adapter *adapter);
-
-int _rtw_write8(struct adapter *adapter, u32 addr, u8 val);
-int _rtw_write16(struct adapter *adapter, u32 addr, u16 val);
-int _rtw_write32(struct adapter *adapter, u32 addr, u32 val);
-int _rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata);
-
-int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val);
-int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val);
-int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val);
-
-void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt,
- u8 *pmem, int timeout_ms);
-void _rtw_write_port_cancel(struct adapter *adapter);
-
-#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
-#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
-#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
-#define rtw_read_mem(adapter, addr, cnt, mem) \
- _rtw_read_mem((adapter), (addr), (cnt), (mem))
-#define rtw_read_port(adapter, addr, cnt, mem) \
- _rtw_read_port((adapter), (addr), (cnt), (mem))
-#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
-
-#define rtw_write8(adapter, addr, val) \
- _rtw_write8((adapter), (addr), (val))
-#define rtw_write16(adapter, addr, val) \
- _rtw_write16((adapter), (addr), (val))
-#define rtw_write32(adapter, addr, val) \
- _rtw_write32((adapter), (addr), (val))
-#define rtw_writeN(adapter, addr, length, data) \
- _rtw_writeN((adapter), (addr), (length), (data))
-#define rtw_write8_async(adapter, addr, val) \
- _rtw_write8_async((adapter), (addr), (val))
-#define rtw_write16_async(adapter, addr, val) \
- _rtw_write16_async((adapter), (addr), (val))
-#define rtw_write32_async(adapter, addr, val) \
- _rtw_write32_async((adapter), (addr), (val))
-#define rtw_write_mem(adapter, addr, cnt, mem) \
- _rtw_write_mem((adapter), (addr), (cnt), (mem))
-#define rtw_write_port(adapter, addr, cnt, mem) \
- _rtw_write_port((adapter), (addr), (cnt), (mem))
-#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) \
- _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
-#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
-
-void rtw_write_scsi(struct adapter *adapter, u32 cnt, u8 *pmem);
-
-/* ioreq */
-void ioreq_read8(struct adapter *adapter, u32 addr, u8 *pval);
-void ioreq_read16(struct adapter *adapter, u32 addr, u16 *pval);
-void ioreq_read32(struct adapter *adapter, u32 addr, u32 *pval);
-void ioreq_write8(struct adapter *adapter, u32 addr, u8 val);
-void ioreq_write16(struct adapter *adapter, u32 addr, u16 val);
-void ioreq_write32(struct adapter *adapter, u32 addr, u32 val);
-
-uint async_read8(struct adapter *adapter, u32 addr, u8 *pbuff,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-uint async_read16(struct adapter *adapter, u32 addr, u8 *pbuff,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-uint async_read32(struct adapter *adapter, u32 addr, u8 *pbuff,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-
-void async_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-void async_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-
-void async_write8(struct adapter *adapter, u32 addr, u8 val,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-void async_write16(struct adapter *adapter, u32 addr, u16 val,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-void async_write32(struct adapter *adapter, u32 addr, u32 val,
- void (*_async_io_callback)(struct adapter *padater,
- struct io_req *pio_req,
- u8 *cnxt), u8 *cnxt);
-
-void async_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-void async_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
-
-int rtw_init_io_priv(struct adapter *padapter,
- void (*set_intf_ops)(struct _io_ops *pops));
-
-void dev_power_down(struct adapter *Adapter, u8 bpwrup);
-
-#endif /* _RTL8711_IO_H_ */
#include <drv_types.h>
struct sreset_priv {
- struct mutex silentreset_mutex;
- u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
- unsigned long last_tx_time;
- unsigned long last_tx_complete_time;
};
#include <rtl8188e_hal.h>
#define WIFI_IF_NOT_EXIST BIT6
void sreset_init_value(struct adapter *padapter);
-void sreset_reset_value(struct adapter *padapter);
u8 sreset_get_wifi_status(struct adapter *padapter);
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status);
+++ /dev/null
-#define DRIVERVERSION "v4.1.4_6773.20130222"
#include <usb_ops_linux.h>
void rtl8188eu_set_hw_type(struct adapter *padapter);
-void rtl8188eu_set_intf_ops(struct _io_ops *pops);
-#define usb_set_intf_ops rtl8188eu_set_intf_ops
/*
* Increase and check if the continual_urb_error of this @param dvobjprivei
unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr);
-void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
-void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
+u8 usb_read8(struct adapter *adapter, u32 addr);
+u16 usb_read16(struct adapter *adapter, u32 addr);
+u32 usb_read32(struct adapter *adapter, u32 addr);
-void usb_read_port_cancel(struct intf_hdl *pintfhdl);
+u32 usb_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+void usb_read_port_cancel(struct adapter *adapter);
-u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
-void usb_write_port_cancel(struct intf_hdl *pintfhdl);
+int usb_write8(struct adapter *adapter, u32 addr, u8 val);
+int usb_write16(struct adapter *adapter, u32 addr, u16 val);
+int usb_write32(struct adapter *adapter, u32 addr, u32 val);
+int usb_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata);
+
+u32 usb_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
+void usb_write_port_cancel(struct adapter *adapter);
#endif
#include <osdep_service.h>
#include <drv_types.h>
-#include <usb_vendor_req.h>
extern char *rtw_initmac;
extern int rtw_mc2u_disable;
#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3)
-u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, enum bt_usb_request brequest,
- enum rt_usb_wvalue wvalue, u8 windex, void *data,
- u8 datalen, u8 isdirectionin);
int pm_netdev_open(struct net_device *pnetdev, u8 bnormal);
-void netdev_br_init(struct net_device *netdev);
void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb);
void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
unsigned char *ipAddr);
-void nat25_db_expire(struct adapter *priv);
-int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method);
int rtw_resume_process(struct adapter *padapter);
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#ifndef _USB_VENDOR_REQUEST_H_
-#define _USB_VENDOR_REQUEST_H_
-
-/* 4 Set/Get Register related wIndex/Data */
-#define RT_USB_RESET_MASK_OFF 0
-#define RT_USB_RESET_MASK_ON 1
-#define RT_USB_SLEEP_MASK_OFF 0
-#define RT_USB_SLEEP_MASK_ON 1
-#define RT_USB_LDO_ON 1
-#define RT_USB_LDO_OFF 0
-
-/* 4 Set/Get SYSCLK related wValue or Data */
-#define RT_USB_SYSCLK_32KHZ 0
-#define RT_USB_SYSCLK_40MHZ 1
-#define RT_USB_SYSCLK_60MHZ 2
-
-
-enum bt_usb_request {
- RT_USB_SET_REGISTER = 1,
- RT_USB_SET_SYSCLK = 2,
- RT_USB_GET_SYSCLK = 3,
- RT_USB_GET_REGISTER = 4
-};
-
-enum rt_usb_wvalue {
- RT_USB_RESET_MASK = 1,
- RT_USB_SLEEP_MASK = 2,
- RT_USB_USB_HRCPWM = 3,
- RT_USB_LDO = 4,
- RT_USB_BOOT_TYPE = 5
-};
-
-#endif
#include <rtw_ioctl_set.h>
#include <rtw_mp_ioctl.h>
#include <usb_ops.h>
-#include <rtw_version.h>
#include <rtl8188e_hal.h>
#include <rtw_mp.h>
switch (bytes) {
case 1:
- data32 = rtw_read8(padapter, addr);
+ data32 = usb_read8(padapter, addr);
sprintf(extra, "0x%02X", data32);
break;
case 2:
- data32 = rtw_read16(padapter, addr);
+ data32 = usb_read16(padapter, addr);
sprintf(extra, "0x%04X", data32);
break;
case 4:
- data32 = rtw_read32(padapter, addr);
+ data32 = usb_read32(padapter, addr);
sprintf(extra, "0x%08X", data32);
break;
default:
switch (bytes) {
case 1:
- rtw_write8(padapter, addr, (u8)data32);
+ usb_write8(padapter, addr, (u8)data32);
DBG_88E(KERN_INFO "%s: addr = 0x%08X data = 0x%02X\n", __func__, addr, (u8)data32);
break;
case 2:
- rtw_write16(padapter, addr, (u16)data32);
+ usb_write16(padapter, addr, (u16)data32);
DBG_88E(KERN_INFO "%s: addr = 0x%08X data = 0x%04X\n", __func__, addr, (u16)data32);
break;
case 4:
- rtw_write32(padapter, addr, data32);
+ usb_write32(padapter, addr, data32);
DBG_88E(KERN_INFO "%s: addr = 0x%08X data = 0x%08X\n", __func__, addr, data32);
break;
default:
RegRWStruct = (struct mp_rw_reg *)pdata;
switch (RegRWStruct->width) {
case 1:
- RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset);
+ RegRWStruct->value = usb_read8(padapter, RegRWStruct->offset);
break;
case 2:
- RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset);
+ RegRWStruct->value = usb_read16(padapter, RegRWStruct->offset);
break;
case 4:
- RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset);
+ RegRWStruct->value = usb_read32(padapter, RegRWStruct->offset);
break;
default:
break;
RegRWStruct = (struct mp_rw_reg *)pdata;
switch (RegRWStruct->width) {
case 1:
- rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value);
+ usb_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value);
break;
case 2:
- rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value);
+ usb_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value);
break;
case 4:
- rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value);
+ usb_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value);
break;
default:
break;
padapter->in_cta_test = 0;
if (padapter->in_cta_test) {
- u32 v = rtw_read32(padapter, REG_RCR);
+ u32 v = usb_read32(padapter, REG_RCR);
v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
- rtw_write32(padapter, REG_RCR, v);
+ usb_write32(padapter, REG_RCR, v);
DBG_88E("enable RCR_ADF\n");
} else {
- u32 v = rtw_read32(padapter, REG_RCR);
+ u32 v = usb_read32(padapter, REG_RCR);
v |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;/* RCR_ADF */
- rtw_write32(padapter, REG_RCR, v);
+ usb_write32(padapter, REG_RCR, v);
DBG_88E("disable RCR_ADF\n");
}
return ret;
for (i = 0x0; i < 0x300; i += 4) {
if (j%4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+ pr_info(" 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
pr_info("\n");
}
for (i = 0x400; i < 0x800; i += 4) {
if (j%4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+ pr_info(" 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
pr_info("\n");
}
if (j%4 == 1)
pr_info("0x%02x", i);
- pr_info(" 0x%08x ", rtw_read32(padapter, i));
+ pr_info(" 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
pr_info("\n");
}
case 0x70:/* read_reg */
switch (minor_cmd) {
case 1:
- DBG_88E("rtw_read8(0x%x) = 0x%02x\n", arg, rtw_read8(padapter, arg));
+ DBG_88E("usb_read8(0x%x) = 0x%02x\n", arg, usb_read8(padapter, arg));
break;
case 2:
- DBG_88E("rtw_read16(0x%x) = 0x%04x\n", arg, rtw_read16(padapter, arg));
+ DBG_88E("usb_read16(0x%x) = 0x%04x\n", arg, usb_read16(padapter, arg));
break;
case 4:
- DBG_88E("rtw_read32(0x%x) = 0x%08x\n", arg, rtw_read32(padapter, arg));
+ DBG_88E("usb_read32(0x%x) = 0x%08x\n", arg, usb_read32(padapter, arg));
break;
}
break;
case 0x71:/* write_reg */
switch (minor_cmd) {
case 1:
- rtw_write8(padapter, arg, extra_arg);
- DBG_88E("rtw_write8(0x%x) = 0x%02x\n", arg, rtw_read8(padapter, arg));
+ usb_write8(padapter, arg, extra_arg);
+ DBG_88E("usb_write8(0x%x) = 0x%02x\n", arg, usb_read8(padapter, arg));
break;
case 2:
- rtw_write16(padapter, arg, extra_arg);
- DBG_88E("rtw_write16(0x%x) = 0x%04x\n", arg, rtw_read16(padapter, arg));
+ usb_write16(padapter, arg, extra_arg);
+ DBG_88E("usb_write16(0x%x) = 0x%04x\n", arg, usb_read16(padapter, arg));
break;
case 4:
- rtw_write32(padapter, arg, extra_arg);
- DBG_88E("rtw_write32(0x%x) = 0x%08x\n", arg, rtw_read32(padapter, arg));
+ usb_write32(padapter, arg, extra_arg);
+ DBG_88E("usb_write32(0x%x) = 0x%08x\n", arg, usb_read32(padapter, arg));
break;
}
break;
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
- final = rtw_read8(padapter, reg);
+ final = usb_read8(padapter, reg);
if (start_value+write_num-1 == final)
DBG_88E("continuous IOL_CMD_WB_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
else
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
- final = rtw_read16(padapter, reg);
+ final = usb_read16(padapter, reg);
if (start_value+write_num-1 == final)
DBG_88E("continuous IOL_CMD_WW_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
else
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
- final = rtw_read32(padapter, reg);
+ final = usb_read32(padapter, reg);
if (start_value+write_num-1 == final)
DBG_88E("continuous IOL_CMD_WD_REG to 0x%x %u times Success, start:%u, final:%u\n",
reg, write_num, start_value, final);
value = value | 0x10;
write_value = value | (value << 5);
- rtw_write16(padapter, 0x6d9, write_value);
+ usb_write16(padapter, 0x6d9, write_value);
}
break;
case 0x7a:
}
break;
case 0x0f:
- if (extra_arg == 0) {
- DBG_88E("###### silent reset test.......#####\n");
- rtw_hal_sreset_reset(padapter);
- }
break;
case 0x15:
{
break;
case 0xfd:
- rtw_write8(padapter, 0xc50, arg);
- DBG_88E("wr(0xc50) = 0x%x\n", rtw_read8(padapter, 0xc50));
- rtw_write8(padapter, 0xc58, arg);
- DBG_88E("wr(0xc58) = 0x%x\n", rtw_read8(padapter, 0xc58));
+ usb_write8(padapter, 0xc50, arg);
+ DBG_88E("wr(0xc50) = 0x%x\n", usb_read8(padapter, 0xc50));
+ usb_write8(padapter, 0xc58, arg);
+ DBG_88E("wr(0xc58) = 0x%x\n", usb_read8(padapter, 0xc58));
break;
case 0xfe:
- DBG_88E("rd(0xc50) = 0x%x\n", rtw_read8(padapter, 0xc50));
- DBG_88E("rd(0xc58) = 0x%x\n", rtw_read8(padapter, 0xc58));
+ DBG_88E("rd(0xc50) = 0x%x\n", usb_read8(padapter, 0xc50));
+ DBG_88E("rd(0xc58) = 0x%x\n", usb_read8(padapter, 0xc58));
break;
case 0xff:
- DBG_88E("dbg(0x210) = 0x%x\n", rtw_read32(padapter, 0x210));
- DBG_88E("dbg(0x608) = 0x%x\n", rtw_read32(padapter, 0x608));
- DBG_88E("dbg(0x280) = 0x%x\n", rtw_read32(padapter, 0x280));
- DBG_88E("dbg(0x284) = 0x%x\n", rtw_read32(padapter, 0x284));
- DBG_88E("dbg(0x288) = 0x%x\n", rtw_read32(padapter, 0x288));
+ DBG_88E("dbg(0x210) = 0x%x\n", usb_read32(padapter, 0x210));
+ DBG_88E("dbg(0x608) = 0x%x\n", usb_read32(padapter, 0x608));
+ DBG_88E("dbg(0x280) = 0x%x\n", usb_read32(padapter, 0x280));
+ DBG_88E("dbg(0x284) = 0x%x\n", usb_read32(padapter, 0x284));
+ DBG_88E("dbg(0x288) = 0x%x\n", usb_read32(padapter, 0x288));
- DBG_88E("dbg(0x664) = 0x%x\n", rtw_read32(padapter, 0x664));
+ DBG_88E("dbg(0x664) = 0x%x\n", usb_read32(padapter, 0x664));
DBG_88E("\n");
- DBG_88E("dbg(0x430) = 0x%x\n", rtw_read32(padapter, 0x430));
- DBG_88E("dbg(0x438) = 0x%x\n", rtw_read32(padapter, 0x438));
+ DBG_88E("dbg(0x430) = 0x%x\n", usb_read32(padapter, 0x430));
+ DBG_88E("dbg(0x438) = 0x%x\n", usb_read32(padapter, 0x438));
- DBG_88E("dbg(0x440) = 0x%x\n", rtw_read32(padapter, 0x440));
+ DBG_88E("dbg(0x440) = 0x%x\n", usb_read32(padapter, 0x440));
- DBG_88E("dbg(0x458) = 0x%x\n", rtw_read32(padapter, 0x458));
+ DBG_88E("dbg(0x458) = 0x%x\n", usb_read32(padapter, 0x458));
- DBG_88E("dbg(0x484) = 0x%x\n", rtw_read32(padapter, 0x484));
- DBG_88E("dbg(0x488) = 0x%x\n", rtw_read32(padapter, 0x488));
+ DBG_88E("dbg(0x484) = 0x%x\n", usb_read32(padapter, 0x484));
+ DBG_88E("dbg(0x488) = 0x%x\n", usb_read32(padapter, 0x488));
- DBG_88E("dbg(0x444) = 0x%x\n", rtw_read32(padapter, 0x444));
- DBG_88E("dbg(0x448) = 0x%x\n", rtw_read32(padapter, 0x448));
- DBG_88E("dbg(0x44c) = 0x%x\n", rtw_read32(padapter, 0x44c));
- DBG_88E("dbg(0x450) = 0x%x\n", rtw_read32(padapter, 0x450));
+ DBG_88E("dbg(0x444) = 0x%x\n", usb_read32(padapter, 0x444));
+ DBG_88E("dbg(0x448) = 0x%x\n", usb_read32(padapter, 0x448));
+ DBG_88E("dbg(0x44c) = 0x%x\n", usb_read32(padapter, 0x44c));
+ DBG_88E("dbg(0x450) = 0x%x\n", usb_read32(padapter, 0x450));
break;
}
break;
}
DBG_88E("%s: cnts =%d\n", __func__, cnts);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr + cnts) > max_available_size) {
DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EINVAL;
} else if (strcmp(tmp[0], "mac") == 0) {
cnts = 6;
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr + cnts) > max_available_size) {
DBG_88E("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
} else if (strcmp(tmp[0], "vidpid") == 0) {
cnts = 4;
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr + cnts) > max_available_size) {
DBG_88E("%s: addr(0x%02x)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
efuse_GetCurrentSize(padapter, &raw_cursize);
raw_maxsize = efuse_GetMaxSize(padapter);
sprintf(extra, "[available raw size] = %d bytes", raw_maxsize-raw_cursize);
- } else if (strcmp(tmp[0], "btfmap") == 0) {
- mapLen = EFUSE_BT_MAX_MAP_LEN;
- if (rtw_BT_efuse_map_read(padapter, 0, mapLen, pEfuseHal->BTEfuseInitMap) == _FAIL) {
- DBG_88E("%s: rtw_BT_efuse_map_read Fail!!\n", __func__);
- err = -EFAULT;
- goto exit;
- }
-
- sprintf(extra, "\n");
- for (i = 0; i < 512; i += 16) {
- /* set 512 because the iwpriv's extra size have limit 0x7FF */
- sprintf(extra, "%s0x%03x\t", extra, i);
- for (j = 0; j < 8; j++)
- sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]);
- sprintf(extra, "%s\t", extra);
- for (; j < 16; j++)
- sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]);
- sprintf(extra, "%s\n", extra);
- }
- } else if (strcmp(tmp[0], "btbmap") == 0) {
- mapLen = EFUSE_BT_MAX_MAP_LEN;
- if (rtw_BT_efuse_map_read(padapter, 0, mapLen, pEfuseHal->BTEfuseInitMap) == _FAIL) {
- DBG_88E("%s: rtw_BT_efuse_map_read Fail!!\n", __func__);
- err = -EFAULT;
- goto exit;
- }
-
- sprintf(extra, "\n");
- for (i = 512; i < 1024; i += 16) {
- sprintf(extra, "%s0x%03x\t", extra, i);
- for (j = 0; j < 8; j++)
- sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]);
- sprintf(extra, "%s\t", extra);
- for (; j < 16; j++)
- sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i+j]);
- sprintf(extra, "%s\n", extra);
- }
- } else if (strcmp(tmp[0], "btrmap") == 0) {
- if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
- err = -EINVAL;
- goto exit;
- }
-
- /* rmap addr cnts */
- addr = simple_strtoul(tmp[1], &ptmp, 16);
- DBG_88E("%s: addr = 0x%X\n", __func__, addr);
-
- cnts = simple_strtoul(tmp[2], &ptmp, 10);
- if (cnts == 0) {
- DBG_88E("%s: btrmap Fail!! cnts error!\n", __func__);
- err = -EINVAL;
- goto exit;
- }
- DBG_88E("%s: cnts =%d\n", __func__, cnts);
-
- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
- if ((addr + cnts) > max_available_size) {
- DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
- err = -EFAULT;
- goto exit;
- }
-
- if (rtw_BT_efuse_map_read(padapter, addr, cnts, data) == _FAIL) {
- DBG_88E("%s: rtw_BT_efuse_map_read error!!\n", __func__);
- err = -EFAULT;
- goto exit;
- }
-
- *extra = 0;
- for (i = 0; i < cnts; i++)
- sprintf(extra, "%s 0x%02X ", extra, data[i]);
} else if (strcmp(tmp[0], "btffake") == 0) {
sprintf(extra, "\n");
for (i = 0; i < 512; i += 16) {
for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2)
setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]);
/* Change to check TYPE_EFUSE_MAP_LEN, because 8188E raw 256, logic map over 256. */
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_size);
if ((addr+cnts) > max_available_size) {
DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2)
setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]);
/* Change to check TYPE_EFUSE_MAP_LEN, because 8188E raw 256, logic map over 256. */
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&max_available_size);
if ((addr+cnts) > max_available_size) {
DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2)
setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk + 1]);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr+cnts) > max_available_size) {
DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2)
setdata[jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if ((addr+cnts) > max_available_size) {
DBG_88E("%s: addr(0x%X)+cnts(%d) parameter error!\n", __func__, addr, cnts);
err = -EFAULT;
goto exit;
}
- if (rtw_BT_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) {
- DBG_88E("%s: rtw_BT_efuse_map_write error!!\n", __func__);
- err = -EFAULT;
- goto exit;
- }
} else if (strcmp(tmp[0], "btwfake") == 0) {
if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
err = -EINVAL;
for (jj = 0, kk = 0; jj < cnts; jj++, kk += 2)
pEfuseHal->fakeBTEfuseModifiedMap[addr+jj] = key_2char2num(tmp[2][kk], tmp[2][kk + 1]);
- } else if (strcmp(tmp[0], "btdumpfake") == 0) {
- if (rtw_BT_efuse_map_read(padapter, 0, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _SUCCESS) {
- DBG_88E("%s: BT read all map success\n", __func__);
- } else {
- DBG_88E("%s: BT read all map Fail!\n", __func__);
- err = -EFAULT;
- }
} else if (strcmp(tmp[0], "wldumpfake") == 0) {
if (rtw_efuse_map_read(padapter, 0, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeEfuseModifiedMap) == _SUCCESS) {
DBG_88E("%s: BT read all map success\n", __func__);
} else if (strcmp(tmp[0], "btfk2map") == 0) {
memcpy(pEfuseHal->BTEfuseModifiedMap, pEfuseHal->fakeBTEfuseModifiedMap, EFUSE_BT_MAX_MAP_LEN);
- EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if (max_available_size < 1) {
err = -EFAULT;
goto exit;
}
- if (rtw_BT_efuse_map_write(padapter, 0x00, EFUSE_BT_MAX_MAP_LEN, pEfuseHal->fakeBTEfuseModifiedMap) == _FAIL) {
- DBG_88E("%s: rtw_BT_efuse_map_write error!\n", __func__);
- err = -EFAULT;
- goto exit;
- }
} else if (strcmp(tmp[0], "wlfk2map") == 0) {
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if (max_available_size < 1) {
err = -EFAULT;
goto exit;
ret = -EINVAL;
break;
}
- rtw_write8(padapter, addr, data);
+ usb_write8(padapter, addr, data);
break;
case 'w':
/* 2 bytes */
ret = -EINVAL;
break;
}
- rtw_write16(padapter, addr, data);
+ usb_write16(padapter, addr, data);
break;
case 'd':
/* 4 bytes */
- rtw_write32(padapter, addr, data);
+ usb_write32(padapter, addr, data);
break;
default:
ret = -EINVAL;
switch (width) {
case 'b':
/* 1 byte */
- sprintf(extra, "%d\n", rtw_read8(padapter, addr));
+ sprintf(extra, "%d\n", usb_read8(padapter, addr));
wrqu->length = strlen(extra);
break;
case 'w':
/* 2 bytes */
- sprintf(data, "%04x\n", rtw_read16(padapter, addr));
+ sprintf(data, "%04x\n", usb_read16(padapter, addr));
for (i = 0; i <= strlen(data); i++) {
if (i%2 == 0) {
tmp[j] = ' ';
break;
case 'd':
/* 4 bytes */
- sprintf(data, "%08x", rtw_read32(padapter, addr));
+ sprintf(data, "%08x", usb_read32(padapter, addr));
/* add read data format blank */
for (i = 0; i <= strlen(data); i++) {
if (i%2 == 0) {
OFDM_FA = read_bbreg(padapter, 0xda4, 0x0000FFFF);
OFDM_FA = read_bbreg(padapter, 0xda4, 0xFFFF0000);
OFDM_FA = read_bbreg(padapter, 0xda8, 0x0000FFFF);
- CCK_FA = (rtw_read8(padapter, 0xa5b)<<8) | (rtw_read8(padapter, 0xa5c));
+ CCK_FA = (usb_read8(padapter, 0xa5b)<<8) | (usb_read8(padapter, 0xa5c));
sprintf(extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d", cckok+ofdmok+htok, cckcrc+ofdmcrc+htcrc, OFDM_FA+CCK_FA);
}
Hal_GetThermalMeter(padapter, &val);
if (bwrite == 0) {
- EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
+ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size);
if (2 > max_available_size) {
DBG_88E("no available efuse!\n");
return -EFAULT;
for (i = 0x0; i < 0x300; i += 4) {
if (j%4 == 1)
DBG_88E("0x%02x", i);
- DBG_88E(" 0x%08x ", rtw_read32(padapter, i));
+ DBG_88E(" 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
DBG_88E("\n");
}
for (i = 0x400; i < 0x1000; i += 4) {
if (j%4 == 1)
DBG_88E("0x%02x", i);
- DBG_88E(" 0x%08x ", rtw_read32(padapter, i));
+ DBG_88E(" 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
DBG_88E("\n");
}
#define _OS_INTFS_C_
#include <osdep_service.h>
+#include <osdep_intf.h>
#include <drv_types.h>
#include <xmit_osdep.h>
#include <recv_osdep.h>
#include <hal_intf.h>
#include <rtw_ioctl.h>
-#include <rtw_version.h>
#include <usb_osintf.h>
#include <usb_hal.h>
-#include <rtw_br_ext.h>
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
MODULE_AUTHOR("Realtek Semiconductor Corp.");
MODULE_VERSION(DRIVERVERSION);
-#define CONFIG_BR_EXT_BRNAME "br0"
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
/* module param defaults */
pmlmepriv->LinkDetectInfo.bBusyTraffic = false;
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
-
- rtw_hal_sreset_reset_value(padapter);
+ rtw_hal_sreset_init(padapter);
pwrctrlpriv->pwr_state_check_cnts = 0;
/* mlmeextpriv */
padapter->rereg_nd_name_priv.old_pnetdev = NULL;
}
- /* clear pbuddystruct adapter to avoid access wrong pointer. */
- if (padapter->pbuddy_adapter != NULL)
- padapter->pbuddy_adapter->pbuddy_adapter = NULL;
+ mutex_destroy(&padapter->hw_init_mutex);
RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-rtw_free_drv_sw\n"));
return _SUCCESS;
}
-void netdev_br_init(struct net_device *netdev)
-{
- struct adapter *adapter = (struct adapter *)rtw_netdev_priv(netdev);
-
- rcu_read_lock();
-
- if (rcu_dereference(adapter->pnetdev->rx_handler_data)) {
- struct net_device *br_netdev;
- struct net *devnet = NULL;
-
- devnet = dev_net(netdev);
- br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME);
- if (br_netdev) {
- memcpy(adapter->br_mac, br_netdev->dev_addr, ETH_ALEN);
- dev_put(br_netdev);
- } else {
- pr_info("%s()-%d: dev_get_by_name(%s) failed!",
- __func__, __LINE__, CONFIG_BR_EXT_BRNAME);
- }
- }
- adapter->ethBrExtInfo.addPPPoETag = 1;
-
- rcu_read_unlock();
-}
-
int _netdev_open(struct net_device *pnetdev)
{
uint status;
if (!padapter->bup) {
padapter->bDriverStopped = false;
padapter->bSurpriseRemoved = false;
- padapter->bCardDisableWOHSM = false;
status = rtw_hal_init(padapter);
if (status == _FAIL) {
else
netif_tx_wake_all_queues(pnetdev);
- netdev_br_init(pnetdev);
-
netdev_open_normal_process:
RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-88eu_drv - dev_open\n"));
DBG_88E("-88eu_drv - drv_open, bup =%d\n", padapter->bup);
int ret;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(pnetdev);
- _enter_critical_mutex(padapter->hw_init_mutex, NULL);
+ _enter_critical_mutex(&padapter->hw_init_mutex, NULL);
ret = _netdev_open(pnetdev);
- mutex_unlock(padapter->hw_init_mutex);
+ mutex_unlock(&padapter->hw_init_mutex);
return ret;
}
padapter->bDriverStopped = false;
padapter->bSurpriseRemoved = false;
- padapter->bCardDisableWOHSM = false;
status = rtw_hal_init(padapter);
if (status == _FAIL) {
u32 start_time = jiffies;
DBG_88E("===> rtw_ips_pwr_down...................\n");
- padapter->bCardDisableWOHSM = true;
padapter->net_closed = true;
rtw_led_control(padapter, LED_CTL_POWER_OFF);
rtw_ips_dev_unload(padapter);
- padapter->bCardDisableWOHSM = false;
DBG_88E("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time));
}
rtw_led_control(padapter, LED_CTL_POWER_OFF);
}
- nat25_db_cleanup(padapter);
-
#ifdef CONFIG_88EU_P2P
rtw_p2p_enable(padapter, P2P_ROLE_DISABLE);
#endif /* CONFIG_88EU_P2P */
#define _OSDEP_SERVICE_C_
#include <osdep_service.h>
+#include <osdep_intf.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <linux/vmalloc.h>
dev_kfree_skb_any(precvbuf->pskb);
precvbuf->pskb = NULL;
precvbuf->reuse = false;
- rtw_read_port(padapter, precvpriv->ff_hwaddr, 0,
+ usb_read_port(padapter, precvpriv->ff_hwaddr, 0,
(unsigned char *)precvbuf);
}
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <hal_intf.h>
-#include <rtw_version.h>
#include <linux/usb.h>
#include <linux/vmalloc.h>
#include <osdep_intf.h>
-#include <usb_vendor_req.h>
#include <usb_ops.h>
#include <usb_osintf.h>
#include <usb_hal.h>
int ui_pid[3] = {0, 0, 0};
-static int rtw_suspend(struct usb_interface *intf, pm_message_t message);
-static int rtw_resume(struct usb_interface *intf);
-
-
-static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *pdid);
-static void rtw_dev_remove(struct usb_interface *pusb_intf);
-
-
#define USB_VENDER_ID_REALTEK 0x0bda
/* DID_USB_v916_20130116 */
MODULE_DEVICE_TABLE(usb, rtw_usb_id_tbl);
-struct rtw_usb_drv {
- struct usb_driver usbdrv;
- int drv_registered;
- struct mutex hw_init_mutex;
-};
-
-static struct rtw_usb_drv rtl8188e_usb_drv = {
- .usbdrv.name = "r8188eu",
- .usbdrv.probe = rtw_drv_init,
- .usbdrv.disconnect = rtw_dev_remove,
- .usbdrv.id_table = rtw_usb_id_tbl,
- .usbdrv.suspend = rtw_suspend,
- .usbdrv.resume = rtw_resume,
- .usbdrv.reset_resume = rtw_resume,
-};
-
-static struct rtw_usb_drv *usb_drv = &rtl8188e_usb_drv;
-
-static u8 rtw_init_intf_priv(struct dvobj_priv *dvobj)
-{
- u8 rst = _SUCCESS;
-
- mutex_init(&dvobj->usb_vendor_req_mutex);
-
- dvobj->usb_alloc_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE);
- if (dvobj->usb_alloc_vendor_req_buf == NULL) {
- DBG_88E("alloc usb_vendor_req_buf failed...\n");
- rst = _FAIL;
- goto exit;
- }
- dvobj->usb_vendor_req_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(dvobj->usb_alloc_vendor_req_buf), ALIGNMENT_UNIT);
-exit:
- return rst;
-}
-
-static u8 rtw_deinit_intf_priv(struct dvobj_priv *dvobj)
-{
- u8 rst = _SUCCESS;
-
- kfree(dvobj->usb_alloc_vendor_req_buf);
- mutex_destroy(&dvobj->usb_vendor_req_mutex);
- return rst;
-}
-
static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf)
{
int i;
else
pdvobjpriv->ishighspeed = false;
- if (rtw_init_intf_priv(pdvobjpriv) == _FAIL)
+ mutex_init(&pdvobjpriv->usb_vendor_req_mutex);
+ pdvobjpriv->usb_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE);
+
+ if (!pdvobjpriv->usb_vendor_req_buf)
goto free_dvobj;
- sema_init(&(pdvobjpriv->usb_suspend_sema), 0);
rtw_reset_continual_urb_error(pdvobjpriv);
usb_get_dev(pusbd);
usb_reset_device(interface_to_usbdev(usb_intf));
}
}
- rtw_deinit_intf_priv(dvobj);
+
+ kfree(dvobj->usb_vendor_req_buf);
+ mutex_destroy(&dvobj->usb_vendor_req_mutex);
kfree(dvobj);
}
rtw_hal_inirp_deinit(padapter);
/* cancel out irp */
- rtw_write_port_cancel(padapter);
+ usb_write_port_cancel(padapter);
/* todo:cancel other irps */
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("-rtw_dev_unload\n"));
}
-int rtw_hw_suspend(struct adapter *padapter)
-{
- struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
- struct net_device *pnetdev = padapter->pnetdev;
-
-
- if ((!padapter->bup) || (padapter->bDriverStopped) ||
- (padapter->bSurpriseRemoved)) {
- DBG_88E("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n",
- padapter->bup, padapter->bDriverStopped,
- padapter->bSurpriseRemoved);
- goto error_exit;
- }
-
- /* system suspend */
- LeaveAllPowerSaveMode(padapter);
-
- DBG_88E("==> rtw_hw_suspend\n");
- _enter_pwrlock(&pwrpriv->lock);
- pwrpriv->bips_processing = true;
- /* s1. */
- if (pnetdev) {
- netif_carrier_off(pnetdev);
- netif_tx_stop_all_queues(pnetdev);
- }
-
- /* s2. */
- rtw_disassoc_cmd(padapter, 500, false);
-
- /* s2-2. indicate disconnect to os */
- {
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
- if (check_fwstate(pmlmepriv, _FW_LINKED)) {
- _clr_fwstate_(pmlmepriv, _FW_LINKED);
-
- rtw_led_control(padapter, LED_CTL_NO_LINK);
-
- rtw_os_indicate_disconnect(padapter);
-
- /* donnot enqueue cmd */
- rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0);
- }
- }
- /* s2-3. */
- rtw_free_assoc_resources(padapter, 1);
-
- /* s2-4. */
- rtw_free_network_queue(padapter, true);
- rtw_ips_dev_unload(padapter);
- pwrpriv->rf_pwrstate = rf_off;
- pwrpriv->bips_processing = false;
-
- _exit_pwrlock(&pwrpriv->lock);
-
- return 0;
-
-error_exit:
- DBG_88E("%s, failed\n", __func__);
- return -1;
-}
-
-int rtw_hw_resume(struct adapter *padapter)
-{
- struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
- struct net_device *pnetdev = padapter->pnetdev;
-
-
- /* system resume */
- DBG_88E("==> rtw_hw_resume\n");
- _enter_pwrlock(&pwrpriv->lock);
- pwrpriv->bips_processing = true;
- rtw_reset_drv_sw(padapter);
-
- if (pm_netdev_open(pnetdev, false) != 0) {
- _exit_pwrlock(&pwrpriv->lock);
- goto error_exit;
- }
-
- netif_device_attach(pnetdev);
- netif_carrier_on(pnetdev);
-
- if (!netif_queue_stopped(pnetdev))
- netif_start_queue(pnetdev);
- else
- netif_wake_queue(pnetdev);
-
- pwrpriv->bkeepfwalive = false;
- pwrpriv->brfoffbyhw = false;
-
- pwrpriv->rf_pwrstate = rf_on;
- pwrpriv->bips_processing = false;
-
- _exit_pwrlock(&pwrpriv->lock);
-
-
- return 0;
-error_exit:
- DBG_88E("%s, Open net dev failed\n", __func__);
- return -1;
-}
-
static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message)
{
struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf);
{
struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf);
struct adapter *padapter = dvobj->if1;
- struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
- int ret = 0;
- if (pwrpriv->bInternalAutoSuspend)
- ret = rtw_resume_process(padapter);
- else
- ret = rtw_resume_process(padapter);
- return ret;
+ return rtw_resume_process(padapter);
}
int rtw_resume_process(struct adapter *padapter)
dvobj->if1 = padapter;
padapter->bDriverStopped = true;
- padapter->hw_init_mutex = &usb_drv->hw_init_mutex;
+ mutex_init(&padapter->hw_init_mutex);
padapter->chip_type = RTL8188E;
pnetdev = rtw_init_netdev(padapter);
padapter->intf_start = &usb_intf_start;
padapter->intf_stop = &usb_intf_stop;
- /* step init_io_priv */
- rtw_init_io_priv(padapter, usb_set_intf_ops);
-
/* step read_chip_version */
rtw_hal_read_chip_version(padapter);
free_mlme_ap_info(if1);
#endif
- if (if1->DriverState != DRIVER_DISAPPEAR) {
- if (pnetdev) {
- /* will call netdev_close() */
- unregister_netdev(pnetdev);
- rtw_proc_remove_one(pnetdev);
- }
+ if (pnetdev) {
+ /* will call netdev_close() */
+ unregister_netdev(pnetdev);
+ rtw_proc_remove_one(pnetdev);
}
rtw_cancel_all_timer(if1);
DBG_88E("+rtw_dev_remove\n");
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+dev_remove()\n"));
- if (usb_drv->drv_registered)
+ if (!pusb_intf->unregistering)
padapter->bSurpriseRemoved = true;
rtw_pm_set_ips(padapter, IPS_NONE);
return;
}
-static int __init rtw_drv_entry(void)
-{
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_entry\n"));
-
- DBG_88E(DRV_NAME " driver version=%s\n", DRIVERVERSION);
-
- mutex_init(&usb_drv->hw_init_mutex);
-
- usb_drv->drv_registered = true;
- return usb_register(&usb_drv->usbdrv);
-}
-
-static void __exit rtw_drv_halt(void)
-{
- RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_halt\n"));
- DBG_88E("+rtw_drv_halt\n");
-
- usb_drv->drv_registered = false;
- usb_deregister(&usb_drv->usbdrv);
-
- mutex_destroy(&usb_drv->hw_init_mutex);
- DBG_88E("-rtw_drv_halt\n");
-}
+static struct usb_driver rtl8188e_usb_drv = {
+ .name = "r8188eu",
+ .probe = rtw_drv_init,
+ .disconnect = rtw_dev_remove,
+ .id_table = rtw_usb_id_tbl,
+ .suspend = rtw_suspend,
+ .resume = rtw_resume,
+ .reset_resume = rtw_resume,
+};
-module_init(rtw_drv_entry);
-module_exit(rtw_drv_halt);
+module_usb_driver(rtl8188e_usb_drv)
return pipe;
}
-void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
-{
-}
-
-void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
-{
-}
-
-void usb_read_port_cancel(struct intf_hdl *pintfhdl)
+void usb_read_port_cancel(struct adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
- struct adapter *padapter = pintfhdl->padapter;
precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;
DBG_88E("%s\n", __func__);
struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context;
struct adapter *padapter = pxmitbuf->padapter;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
- struct hal_data_8188e *haldata;
-
switch (pxmitbuf->flags) {
case VO_QUEUE_INX:
}
}
- haldata = GET_HAL_DATA(padapter);
- haldata->srestpriv.last_tx_complete_time = jiffies;
-
check_completion:
rtw_sctx_done_err(&pxmitbuf->sctx,
purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR :
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
-u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem)
+u32 usb_write_port(struct adapter *padapter, u32 addr, u32 cnt, u8 *wmem)
{
unsigned long irqL;
unsigned int pipe;
int status;
u32 ret = _FAIL;
struct urb *purb = NULL;
- struct adapter *padapter = (struct adapter *)pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem;
pxmitbuf);/* context is pxmitbuf */
status = usb_submit_urb(purb, GFP_ATOMIC);
- if (!status) {
- struct hal_data_8188e *haldata = GET_HAL_DATA(padapter);
-
- haldata->srestpriv.last_tx_time = jiffies;
- } else {
+ if (status) {
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR);
DBG_88E("usb_write_port, status =%d\n", status);
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port(): usb_submit_urb, status =%x\n", status));
return ret;
}
-void usb_write_port_cancel(struct intf_hdl *pintfhdl)
+void usb_write_port_cancel(struct adapter *padapter)
{
int i, j;
- struct adapter *padapter = pintfhdl->padapter;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf;
DBG_88E("%s\n", __func__);
pTriple = (struct chnl_txpow_triple *)(pCoutryIe + 3);
for (i = 0; i < NumTriples; i++) {
if (MaxChnlNum >= pTriple->FirstChnl) {
- printk(KERN_INFO "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
+ netdev_info(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
return;
}
if (MAX_CHANNEL_NUMBER < (pTriple->FirstChnl +
pTriple->NumChnls)) {
- printk(KERN_INFO "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
+ netdev_info(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
return;
}
u8 MaxTxPwrInDbm = 255;
if (MAX_CHANNEL_NUMBER < Channel) {
- printk(KERN_INFO "DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
+ netdev_info(dev->dev, "DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
return MaxTxPwrInDbm;
}
if (pDot11dInfo->channel_map[Channel])
}
if (MAX_CHANNEL_NUMBER < channel) {
- printk(KERN_ERR "%s(): Invalid Channel\n", __func__);
+ netdev_err(dev->dev, "%s(): Invalid Channel\n", __func__);
return default_chn;
}
select EEPROM_93CX6
select CRYPTO
select FW_LOADER
- default N
---help---
This is the driver for Realtek RTL8192EE 802.11 PCIe
wireless network adapters.
rtl92e_easy_concurrent_retrytimer_callback, (unsigned long)hw);
/* <2> work queue */
rtlpriv->works.hw = hw;
- rtlpriv->works.rtl_wq = alloc_workqueue(rtlpriv->cfg->name, 0, 0);
+ rtlpriv->works.rtl_wq = alloc_workqueue("%s", 0, 0, rtlpriv->cfg->name);
INIT_DELAYED_WORK(&rtlpriv->works.watchdog_wq,
(void *)rtl92e_watchdog_wq_callback);
INIT_DELAYED_WORK(&rtlpriv->works.ips_nic_off_wq,
} else {
sw_mechanism1(btcoexist, true, false, false, false);
sw_mechanism2(btcoexist, false, false, false, 0x18);
- };
+ }
} else {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
#define CL_SPRINTF snprintf
-#define CL_PRINTF printk
+#define CL_PRINTF(buf) printk("%s", buf)
#define BTC_PRINT(dbgtype, dbgflag, printstr, ...) \
do { \
return ((struct ieee80211_device *)netdev_priv(dev))->priv;
}
-extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
+static inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
{
/* Single white space is for Linksys APs */
if (essid_len == 1 && essid[0] == ' ')
return 1;
}
-extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
+static inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
{
/*
* It is possible for both access points and our device to support
return 0;
}
-extern inline int ieee80211_get_hdrlen(u16 fc)
+static inline int ieee80211_get_hdrlen(u16 fc)
{
int hdrlen = IEEE80211_3ADDR_LEN;
extern const long ieee80211_wlan_frequencies[];
-extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
+static inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
{
ieee->scans++;
}
-extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
+static inline int ieee80211_get_scans(struct ieee80211_device *ieee)
{
return ieee->scans;
}
hdr = (struct ieee80211_hdr_4addr *) skb->data;
hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
-#ifdef CONFIG_IEEE80211_CRYPT_TKIP
if (ieee->tkip_countermeasures &&
strcmp(crypt->ops->name, "TKIP") == 0) {
if (net_ratelimit()) {
}
return -1;
}
-#endif
atomic_inc(&crypt->refcnt);
res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
printk("=========>%s(), crypt is null\n", __func__);
return -1;
}
-#ifdef CONFIG_IEEE80211_CRYPT_TKIP
- struct ieee80211_hdr *header;
if (ieee->tkip_countermeasures &&
crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
- header = (struct ieee80211_hdr *) frag->data;
if (net_ratelimit()) {
+ struct ieee80211_hdr_3addrqos *header;
+
+ header = (struct ieee80211_hdr_3addrqos *)frag->data;
printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
"TX packet to %pM\n",
ieee->dev->name, header->addr1);
}
return -1;
}
-#endif
+
/* To encrypt, frame format is:
* IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
} CHANNEL_LIST, *PCHANNEL_LIST;
static CHANNEL_LIST ChannelPlan[] = {
- {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
- {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
- {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
- {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, //FCC
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, //IC
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, //ETSI
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, //Spain. Change to ETSI.
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, //France. Change to ETSI.
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, //MKK //MKK
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22},//MKK1
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, //Israel.
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, // For 11a , TELEC
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, //MIC
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
};
static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv *priv)
static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540};
inline u16 rtl8192_rate2rate(short rate)
{
- if (rate > 11) return 0;
+ if (rate > 11)
+ return 0;
return rtl_rate[rate];
}
tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
- if (tcb_desc->bAMPDUEnable) {//AMPDU enabled
+ if (tcb_desc->bAMPDUEnable) { /* AMPDU enabled */
tx_fwinfo->AllowAggregation = 1;
/* DWORD 1 */
tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
static void rtl8192_tx_isr(struct urb *tx_urb)
{
struct sk_buff *skb = (struct sk_buff *)tx_urb->context;
- struct net_device *dev = NULL;
+ struct net_device *dev = (struct net_device *)(skb->cb);
struct r8192_priv *priv = NULL;
cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
u8 queue_index = tcb_desc->queue_index;
- memcpy(&dev, (struct net_device *)(skb->cb), sizeof(struct net_device *));
priv = ieee80211_priv(dev);
if (tcb_desc->queue_index != TXCMD_QUEUE) {
for (i = 0; i < net->rates_len; i++) {
basic_rate = net->rates[i]&0x7f;
switch (basic_rate) {
- case MGN_1M: *rate_config |= RRSR_1M; break;
- case MGN_2M: *rate_config |= RRSR_2M; break;
- case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
- case MGN_11M: *rate_config |= RRSR_11M; break;
- case MGN_6M: *rate_config |= RRSR_6M; break;
- case MGN_9M: *rate_config |= RRSR_9M; break;
- case MGN_12M: *rate_config |= RRSR_12M; break;
- case MGN_18M: *rate_config |= RRSR_18M; break;
- case MGN_24M: *rate_config |= RRSR_24M; break;
- case MGN_36M: *rate_config |= RRSR_36M; break;
- case MGN_48M: *rate_config |= RRSR_48M; break;
- case MGN_54M: *rate_config |= RRSR_54M; break;
+ case MGN_1M:
+ *rate_config |= RRSR_1M;
+ break;
+ case MGN_2M:
+ *rate_config |= RRSR_2M;
+ break;
+ case MGN_5_5M:
+ *rate_config |= RRSR_5_5M;
+ break;
+ case MGN_11M:
+ *rate_config |= RRSR_11M;
+ break;
+ case MGN_6M:
+ *rate_config |= RRSR_6M;
+ break;
+ case MGN_9M:
+ *rate_config |= RRSR_9M;
+ break;
+ case MGN_12M:
+ *rate_config |= RRSR_12M;
+ break;
+ case MGN_18M:
+ *rate_config |= RRSR_18M;
+ break;
+ case MGN_24M:
+ *rate_config |= RRSR_24M;
+ break;
+ case MGN_36M:
+ *rate_config |= RRSR_36M;
+ break;
+ case MGN_48M:
+ *rate_config |= RRSR_48M;
+ break;
+ case MGN_54M:
+ *rate_config |= RRSR_54M;
+ break;
}
}
for (i = 0; i < net->rates_ex_len; i++) {
basic_rate = net->rates_ex[i]&0x7f;
switch (basic_rate) {
- case MGN_1M: *rate_config |= RRSR_1M; break;
- case MGN_2M: *rate_config |= RRSR_2M; break;
- case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
- case MGN_11M: *rate_config |= RRSR_11M; break;
- case MGN_6M: *rate_config |= RRSR_6M; break;
- case MGN_9M: *rate_config |= RRSR_9M; break;
- case MGN_12M: *rate_config |= RRSR_12M; break;
- case MGN_18M: *rate_config |= RRSR_18M; break;
- case MGN_24M: *rate_config |= RRSR_24M; break;
- case MGN_36M: *rate_config |= RRSR_36M; break;
- case MGN_48M: *rate_config |= RRSR_48M; break;
- case MGN_54M: *rate_config |= RRSR_54M; break;
+ case MGN_1M:
+ *rate_config |= RRSR_1M;
+ break;
+ case MGN_2M:
+ *rate_config |= RRSR_2M;
+ break;
+ case MGN_5_5M:
+ *rate_config |= RRSR_5_5M;
+ break;
+ case MGN_11M:
+ *rate_config |= RRSR_11M;
+ break;
+ case MGN_6M:
+ *rate_config |= RRSR_6M;
+ break;
+ case MGN_9M:
+ *rate_config |= RRSR_9M;
+ break;
+ case MGN_12M:
+ *rate_config |= RRSR_12M;
+ break;
+ case MGN_18M:
+ *rate_config |= RRSR_18M;
+ break;
+ case MGN_24M:
+ *rate_config |= RRSR_24M;
+ break;
+ case MGN_36M:
+ *rate_config |= RRSR_36M;
+ break;
+ case MGN_48M:
+ *rate_config |= RRSR_48M;
+ break;
+ case MGN_54M:
+ *rate_config |= RRSR_54M;
+ break;
}
}
}
if (net->mode & (IEEE_G|IEEE_N_24G)) {
u8 slot_time = 0;
- if ((cap & WLAN_CAPABILITY_SHORT_SLOT) && (!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime)) //short slot time
+ if ((cap & WLAN_CAPABILITY_SHORT_SLOT) && (!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime)) /* short slot time */
slot_time = SHORT_SLOT_TIME;
else //long slot time
slot_time = NON_SHORT_SLOT_TIME;
net = &priv->ieee80211->current_network;
rtl8192_config_rate(dev, &rate_config);
- priv->basic_rate = rate_config &= 0x15f;
+ priv->basic_rate = rate_config & 0x15f;
write_nic_dword(dev, BSSIDR, ((u32 *)net->bssid)[0]);
write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]);
{
if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
return 1;
- else return 0;
+ else
+ return 0;
}
u16 N_DBPSOfRate(u16 DataRate);
u16 Ceiling;
if (rtl8192_IsWirelessBMode(DataRate)) {
- if (bManagementFrame || !bShortPreamble || DataRate == 10) // long preamble
+ if (bManagementFrame || !bShortPreamble || DataRate == 10) /* long preamble */
FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
else // Short preamble
FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
- if ((FrameLength*8 % (DataRate/10)) != 0) //Get the Ceilling
+ if ((FrameLength*8 % (DataRate/10)) != 0) /* Get the Ceilling */
FrameTime++;
} else { //802.11g DSSS-OFDM PLCP length field calculation.
N_DBPS = N_DBPSOfRate(DataRate);
u8 ret = DESC90_RATE1M;
switch (rate) {
- case MGN_1M: ret = DESC90_RATE1M; break;
- case MGN_2M: ret = DESC90_RATE2M; break;
- case MGN_5_5M: ret = DESC90_RATE5_5M; break;
- case MGN_11M: ret = DESC90_RATE11M; break;
- case MGN_6M: ret = DESC90_RATE6M; break;
- case MGN_9M: ret = DESC90_RATE9M; break;
- case MGN_12M: ret = DESC90_RATE12M; break;
- case MGN_18M: ret = DESC90_RATE18M; break;
- case MGN_24M: ret = DESC90_RATE24M; break;
- case MGN_36M: ret = DESC90_RATE36M; break;
- case MGN_48M: ret = DESC90_RATE48M; break;
- case MGN_54M: ret = DESC90_RATE54M; break;
-
- // HT rate since here
- case MGN_MCS0: ret = DESC90_RATEMCS0; break;
- case MGN_MCS1: ret = DESC90_RATEMCS1; break;
- case MGN_MCS2: ret = DESC90_RATEMCS2; break;
- case MGN_MCS3: ret = DESC90_RATEMCS3; break;
- case MGN_MCS4: ret = DESC90_RATEMCS4; break;
- case MGN_MCS5: ret = DESC90_RATEMCS5; break;
- case MGN_MCS6: ret = DESC90_RATEMCS6; break;
- case MGN_MCS7: ret = DESC90_RATEMCS7; break;
- case MGN_MCS8: ret = DESC90_RATEMCS8; break;
- case MGN_MCS9: ret = DESC90_RATEMCS9; break;
- case MGN_MCS10: ret = DESC90_RATEMCS10; break;
- case MGN_MCS11: ret = DESC90_RATEMCS11; break;
- case MGN_MCS12: ret = DESC90_RATEMCS12; break;
- case MGN_MCS13: ret = DESC90_RATEMCS13; break;
- case MGN_MCS14: ret = DESC90_RATEMCS14; break;
- case MGN_MCS15: ret = DESC90_RATEMCS15; break;
- case (0x80|0x20): ret = DESC90_RATEMCS32; break;
-
- default: break;
+ case MGN_1M:
+ ret = DESC90_RATE1M;
+ break;
+ case MGN_2M:
+ ret = DESC90_RATE2M;
+ break;
+ case MGN_5_5M:
+ ret = DESC90_RATE5_5M;
+ break;
+ case MGN_11M:
+ ret = DESC90_RATE11M;
+ break;
+ case MGN_6M:
+ ret = DESC90_RATE6M;
+ break;
+ case MGN_9M:
+ ret = DESC90_RATE9M;
+ break;
+ case MGN_12M:
+ ret = DESC90_RATE12M;
+ break;
+ case MGN_18M:
+ ret = DESC90_RATE18M;
+ break;
+ case MGN_24M:
+ ret = DESC90_RATE24M;
+ break;
+ case MGN_36M:
+ ret = DESC90_RATE36M;
+ break;
+ case MGN_48M:
+ ret = DESC90_RATE48M;
+ break;
+ case MGN_54M:
+ ret = DESC90_RATE54M;
+ break;
+
+ // HT rate since here
+ case MGN_MCS0:
+ ret = DESC90_RATEMCS0;
+ break;
+ case MGN_MCS1:
+ ret = DESC90_RATEMCS1;
+ break;
+ case MGN_MCS2:
+ ret = DESC90_RATEMCS2;
+ break;
+ case MGN_MCS3:
+ ret = DESC90_RATEMCS3;
+ break;
+ case MGN_MCS4:
+ ret = DESC90_RATEMCS4;
+ break;
+ case MGN_MCS5:
+ ret = DESC90_RATEMCS5;
+ break;
+ case MGN_MCS6:
+ ret = DESC90_RATEMCS6;
+ break;
+ case MGN_MCS7:
+ ret = DESC90_RATEMCS7;
+ break;
+ case MGN_MCS8:
+ ret = DESC90_RATEMCS8;
+ break;
+ case MGN_MCS9:
+ ret = DESC90_RATEMCS9;
+ break;
+ case MGN_MCS10:
+ ret = DESC90_RATEMCS10;
+ break;
+ case MGN_MCS11:
+ ret = DESC90_RATEMCS11;
+ break;
+ case MGN_MCS12:
+ ret = DESC90_RATEMCS12;
+ break;
+ case MGN_MCS13:
+ ret = DESC90_RATEMCS13;
+ break;
+ case MGN_MCS14:
+ ret = DESC90_RATEMCS14;
+ break;
+ case MGN_MCS15:
+ ret = DESC90_RATEMCS15;
+ break;
+ case (0x80|0x20):
+ ret = DESC90_RATEMCS32;
+ break;
+
+ default:
+ break;
}
return ret;
}
tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
- if (tcb_desc->bAMPDUEnable) {//AMPDU enabled
+ if (tcb_desc->bAMPDUEnable) { /* AMPDU enabled */
tx_fwinfo->AllowAggregation = 1;
/* DWORD 1 */
tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
break;
case IEEE_N_24G:
case IEEE_N_5G:
- if (ieee->pHTInfo->PeerMimoPs == 0) {//MIMO_PS_STATIC
+ if (ieee->pHTInfo->PeerMimoPs == 0) { /* MIMO_PS_STATIC */
ratr_value &= 0x0007F007;
} else {
if (priv->rf_type == RF_1T2R)
else
priv->EEPROM_Def_Ver = 1;
RT_TRACE(COMP_EPROM, "EEPROM_DEF_VER:%d\n", priv->EEPROM_Def_Ver);
- if (priv->EEPROM_Def_Ver == 0) { //old eeprom definition
+ if (priv->EEPROM_Def_Ver == 0) { /* old eeprom definition */
int i;
if (bLoad_From_EEPOM)
priv->EEPROMTxPowerLevelCCK = (eprom_read(dev, (EEPROM_TxPwIndex_CCK>>1))&0xff) >> 8;
//
#ifdef TO_DO_LIST
if (Adapter->ResetProgress == RESET_TYPE_NORESET) {
- if (pMgntInfo->RegRfOff == TRUE) { // User disable RF via registry.
+ if (pMgntInfo->RegRfOff == TRUE) { /* User disable RF via registry. */
RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RegRfOff ----------\n"));
MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
// Those actions will be discard in MgntActSet_RF_State because of the same state
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
- } else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS) { // H/W or S/W RF OFF before sleep.
+ } else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS) { /* H/W or S/W RF OFF before sleep. */
RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RfOffReason(%d) ----------\n", pMgntInfo->RfOffReason));
MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
} else {
}
if ((priv->force_reset) || (priv->ResetProgress == RESET_TYPE_NORESET &&
(priv->bForcedSilentReset ||
- (!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_SILENT)))) { // This is control by OID set in Pomelo
+ (!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_SILENT)))) { /* This is control by OID set in Pomelo */
RT_TRACE(COMP_RESET, "%s():priv->force_reset is %d,priv->ResetProgress is %d, priv->bForcedSilentReset is %d,priv->bDisableNormalResetCheck is %d,ResetType is %d\n", __func__, priv->force_reset, priv->ResetProgress, priv->bForcedSilentReset, priv->bDisableNormalResetCheck, ResetType);
rtl819x_ifsilentreset(dev);
}
{
struct r8192_priv *priv = ieee80211_priv(dev);
- if (priv->up == 1) return -1;
+ if (priv->up == 1)
+ return -1;
return _rtl8192_up(dev);
}
struct r8192_priv *priv = ieee80211_priv(dev);
int i;
- if (priv->up == 0) return -1;
+ if (priv->up == 0)
+ return -1;
priv->up = 0;
priv->ieee80211->ieee_up = 0;
{
struct r8192_priv *priv = ieee80211_priv(dev);
int reset_status = 0;
- if (priv->up == 0) return;
+ if (priv->up == 0)
+ return;
priv->up = 0;
rtl8192_cancel_deferred_work(priv);
if (!bIsHT) {
switch (rate) {
- case DESC90_RATE1M: ret_rate = MGN_1M; break;
- case DESC90_RATE2M: ret_rate = MGN_2M; break;
- case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
- case DESC90_RATE11M: ret_rate = MGN_11M; break;
- case DESC90_RATE6M: ret_rate = MGN_6M; break;
- case DESC90_RATE9M: ret_rate = MGN_9M; break;
- case DESC90_RATE12M: ret_rate = MGN_12M; break;
- case DESC90_RATE18M: ret_rate = MGN_18M; break;
- case DESC90_RATE24M: ret_rate = MGN_24M; break;
- case DESC90_RATE36M: ret_rate = MGN_36M; break;
- case DESC90_RATE48M: ret_rate = MGN_48M; break;
- case DESC90_RATE54M: ret_rate = MGN_54M; break;
+ case DESC90_RATE1M:
+ ret_rate = MGN_1M;
+ break;
+ case DESC90_RATE2M:
+ ret_rate = MGN_2M;
+ break;
+ case DESC90_RATE5_5M:
+ ret_rate = MGN_5_5M;
+ break;
+ case DESC90_RATE11M:
+ ret_rate = MGN_11M;
+ break;
+ case DESC90_RATE6M:
+ ret_rate = MGN_6M;
+ break;
+ case DESC90_RATE9M:
+ ret_rate = MGN_9M;
+ break;
+ case DESC90_RATE12M:
+ ret_rate = MGN_12M;
+ break;
+ case DESC90_RATE18M:
+ ret_rate = MGN_18M;
+ break;
+ case DESC90_RATE24M:
+ ret_rate = MGN_24M;
+ break;
+ case DESC90_RATE36M:
+ ret_rate = MGN_36M;
+ break;
+ case DESC90_RATE48M:
+ ret_rate = MGN_48M;
+ break;
+ case DESC90_RATE54M:
+ ret_rate = MGN_54M;
+ break;
- default:
- ret_rate = 0xff;
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
- break;
+ default:
+ ret_rate = 0xff;
+ RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
+ break;
}
} else {
switch (rate) {
- case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
- case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
- case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
- case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
- case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
- case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
- case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
- case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
- case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
- case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
- case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
- case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
- case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
- case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
- case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
- case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
- case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
+ case DESC90_RATEMCS0:
+ ret_rate = MGN_MCS0;
+ break;
+ case DESC90_RATEMCS1:
+ ret_rate = MGN_MCS1;
+ break;
+ case DESC90_RATEMCS2:
+ ret_rate = MGN_MCS2;
+ break;
+ case DESC90_RATEMCS3:
+ ret_rate = MGN_MCS3;
+ break;
+ case DESC90_RATEMCS4:
+ ret_rate = MGN_MCS4;
+ break;
+ case DESC90_RATEMCS5:
+ ret_rate = MGN_MCS5;
+ break;
+ case DESC90_RATEMCS6:
+ ret_rate = MGN_MCS6;
+ break;
+ case DESC90_RATEMCS7:
+ ret_rate = MGN_MCS7;
+ break;
+ case DESC90_RATEMCS8:
+ ret_rate = MGN_MCS8;
+ break;
+ case DESC90_RATEMCS9:
+ ret_rate = MGN_MCS9;
+ break;
+ case DESC90_RATEMCS10:
+ ret_rate = MGN_MCS10;
+ break;
+ case DESC90_RATEMCS11:
+ ret_rate = MGN_MCS11;
+ break;
+ case DESC90_RATEMCS12:
+ ret_rate = MGN_MCS12;
+ break;
+ case DESC90_RATEMCS13:
+ ret_rate = MGN_MCS13;
+ break;
+ case DESC90_RATEMCS14:
+ ret_rate = MGN_MCS14;
+ break;
+ case DESC90_RATEMCS15:
+ ret_rate = MGN_MCS15;
+ break;
+ case DESC90_RATEMCS32:
+ ret_rate = (0x80|0x20);
+ break;
- default:
- ret_rate = 0xff;
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
- break;
+ default:
+ ret_rate = 0xff;
+ RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
+ break;
}
}
if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA) {
- if (priv->undecorated_smoothed_pwdb < 0) // initialize
+ if (priv->undecorated_smoothed_pwdb < 0) /* initialize */
priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb) {
priv->undecorated_smoothed_pwdb =
// <2> Showed on UI for engineering
if (pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA) {
- for (nspatial_stream = 0; nspatial_stream < 2; nspatial_stream++) { // 2 spatial stream
+ for (nspatial_stream = 0; nspatial_stream < 2; nspatial_stream++) { /* 2 spatial stream */
if (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1) {
- if (priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
+ if (priv->stats.rx_evm_percentage[nspatial_stream] == 0) /* initialize */
priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
priv->stats.rx_evm_percentage[nspatial_stream] =
((priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
rx_evmX /= 2; //dbm
evm = rtl819x_evm_dbtopercentage(rx_evmX);
- if (i == 0) // Fill value in RFD, Get the first spatial stream only
+ if (i == 0) /* Fill value in RFD, Get the first spatial stream only */
pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
}
/* record rx statistics for debug */
rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
- if (pdrvinfo->BW) //40M channel
+ if (pdrvinfo->BW) /* 40M channel */
priv->stats.received_bwtype[1+prxsc->rxsc]++;
else //20M channel
priv->stats.received_bwtype[0]++;
//
// CCK rate
//
- case MGN_1M: rateIndex = 0; break;
- case MGN_2M: rateIndex = 1; break;
- case MGN_5_5M: rateIndex = 2; break;
- case MGN_11M: rateIndex = 3; break;
+ case MGN_1M:
+ rateIndex = 0;
+ break;
+ case MGN_2M:
+ rateIndex = 1;
+ break;
+ case MGN_5_5M:
+ rateIndex = 2;
+ break;
+ case MGN_11M:
+ rateIndex = 3;
+ break;
//
// Legacy OFDM rate
//
- case MGN_6M: rateIndex = 4; break;
- case MGN_9M: rateIndex = 5; break;
- case MGN_12M: rateIndex = 6; break;
- case MGN_18M: rateIndex = 7; break;
- case MGN_24M: rateIndex = 8; break;
- case MGN_36M: rateIndex = 9; break;
- case MGN_48M: rateIndex = 10; break;
- case MGN_54M: rateIndex = 11; break;
+ case MGN_6M:
+ rateIndex = 4;
+ break;
+ case MGN_9M:
+ rateIndex = 5;
+ break;
+ case MGN_12M:
+ rateIndex = 6;
+ break;
+ case MGN_18M:
+ rateIndex = 7;
+ break;
+ case MGN_24M:
+ rateIndex = 8;
+ break;
+ case MGN_36M:
+ rateIndex = 9;
+ break;
+ case MGN_48M:
+ rateIndex = 10;
+ break;
+ case MGN_54M:
+ rateIndex = 11;
+ break;
//
// 11n High throughput rate
//
- case MGN_MCS0: rateIndex = 12; break;
- case MGN_MCS1: rateIndex = 13; break;
- case MGN_MCS2: rateIndex = 14; break;
- case MGN_MCS3: rateIndex = 15; break;
- case MGN_MCS4: rateIndex = 16; break;
- case MGN_MCS5: rateIndex = 17; break;
- case MGN_MCS6: rateIndex = 18; break;
- case MGN_MCS7: rateIndex = 19; break;
- case MGN_MCS8: rateIndex = 20; break;
- case MGN_MCS9: rateIndex = 21; break;
- case MGN_MCS10: rateIndex = 22; break;
- case MGN_MCS11: rateIndex = 23; break;
- case MGN_MCS12: rateIndex = 24; break;
- case MGN_MCS13: rateIndex = 25; break;
- case MGN_MCS14: rateIndex = 26; break;
- case MGN_MCS15: rateIndex = 27; break;
- default: rateIndex = 28; break;
+ case MGN_MCS0:
+ rateIndex = 12;
+ break;
+ case MGN_MCS1:
+ rateIndex = 13;
+ break;
+ case MGN_MCS2:
+ rateIndex = 14;
+ break;
+ case MGN_MCS3:
+ rateIndex = 15;
+ break;
+ case MGN_MCS4:
+ rateIndex = 16;
+ break;
+ case MGN_MCS5:
+ rateIndex = 17;
+ break;
+ case MGN_MCS6:
+ rateIndex = 18;
+ break;
+ case MGN_MCS7:
+ rateIndex = 19;
+ break;
+ case MGN_MCS8:
+ rateIndex = 20;
+ break;
+ case MGN_MCS9:
+ rateIndex = 21;
+ break;
+ case MGN_MCS10:
+ rateIndex = 22;
+ break;
+ case MGN_MCS11:
+ rateIndex = 23;
+ break;
+ case MGN_MCS12:
+ rateIndex = 24;
+ break;
+ case MGN_MCS13:
+ rateIndex = 25;
+ break;
+ case MGN_MCS14:
+ rateIndex = 26;
+ break;
+ case MGN_MCS15:
+ rateIndex = 27;
+ break;
+ default:
+ rateIndex = 28;
+ break;
}
priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
priv->stats.received_rate_histogram[0][rateIndex]++; //total
ieee->hwsec_active = 1;
- if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep) { //add hwsec_support flag to totol control hw_sec on/off
+ if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep) { /* add hwsec_support flag to totol control hw_sec on/off */
ieee->hwsec_active = 0;
SECR_value &= ~SCR_RxDecEnable;
}
TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
TargetCommand |= BIT31|BIT16;
- if (i == 0) { //MAC|Config
+ if (i == 0) { /* MAC|Config */
TargetContent = (u32)(*(MacAddr+0)) << 16|
(u32)(*(MacAddr+1)) << 24|
(u32)usConfig;
write_nic_dword(dev, WCAMI, TargetContent);
write_nic_dword(dev, RWCAM, TargetCommand);
- } else if (i == 1) { //MAC
+ } else if (i == 1) { /* MAC */
TargetContent = (u32)(*(MacAddr+2)) |
(u32)(*(MacAddr+3)) << 8|
(u32)(*(MacAddr+4)) << 16|
priv->crcmon ? "accepted" : "rejected");
if (prev != priv->crcmon && priv->up) {
- //rtl8180_down(dev);
- //rtl8180_up(dev);
+ /* rtl8180_down(dev); */
+ /* rtl8180_up(dev); */
}
up(&priv->wx_sem);
/* ~5 Mb/s real (802.11b) */
range->throughput = 5 * 1000 * 1000;
- // TODO: Not used in 802.11b?
-// range->min_nwid; /* Minimal NWID we are able to set */
- // TODO: Not used in 802.11b?
-// range->max_nwid; /* Maximal NWID we are able to set */
+ /* TODO: Not used in 802.11b? */
+ /* range->min_nwid; */ /* Minimal NWID we are able to set */
+ /* TODO: Not used in 802.11b? */
+ /* range->max_nwid; */ /* Maximal NWID we are able to set */
/* Old Frequency (backward compat - moved lower ) */
-// range->old_num_channels;
-// range->old_num_frequency;
-// range->old_freq[6]; /* Filler to keep "version" at the same offset */
+ /* range->old_num_channels; */
+ /* range->old_num_frequency; */
+ /* range->old_freq[6]; */ /* Filler to keep "version" at the same offset */
if (priv->rf_set_sens != NULL)
range->sensitivity = priv->max_sens; /* signal level threshold range */
range->we_version_compiled = WIRELESS_EXT;
range->we_version_source = 16;
-// range->retry_capa; /* What retry options are supported */
-// range->retry_flags; /* How to decode max/min retry limit */
-// range->r_time_flags; /* How to decode max/min retry life */
-// range->min_retry; /* Minimal number of retries */
-// range->max_retry; /* Maximal number of retries */
-// range->min_r_time; /* Minimal retry lifetime */
-// range->max_r_time; /* Maximal retry lifetime */
+ /* range->retry_capa; */ /* What retry options are supported */
+ /* range->retry_flags; */ /* How to decode max/min retry limit */
+ /* range->r_time_flags; */ /* How to decode max/min retry life */
+ /* range->min_retry; */ /* Minimal number of retries */
+ /* range->max_retry; */ /* Maximal number of retries */
+ /* range->min_r_time; */ /* Minimal retry lifetime */
+ /* range->max_r_time; */ /* Maximal retry lifetime */
for (i = 0, val = 0; i < 14; i++) {
- // Include only legal frequencies for some countries
+ /* Include only legal frequencies for some countries */
if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
range->freq[val].i = i + 1;
range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
range->freq[val].e = 1;
val++;
} else {
- // FIXME: do we need to set anything for channels
- // we don't use ?
+ /* FIXME: do we need to set anything for channels */
+ /* we don't use ? */
}
if (val == IW_MAX_FREQUENCIES)
if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
struct iw_scan_req *req = (struct iw_scan_req *)b;
if (req->essid_len) {
- //printk("==**&*&*&**===>scan set ssid:%s\n", req->essid);
ieee->current_network.ssid_len = req->essid_len;
memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
- //printk("=====>network ssid:%s\n", ieee->current_network.ssid);
}
}
int ret;
struct r8192_priv *priv = ieee80211_priv(dev);
-// struct sockaddr *temp = (struct sockaddr *)awrq;
+ /* struct sockaddr *temp = (struct sockaddr *)awrq; */
down(&priv->wx_sem);
ret = ieee80211_wx_set_wap(priv->ieee80211, info, awrq, extra);
struct r8192_priv *priv = ieee80211_priv(dev);
struct ieee80211_device *ieee = priv->ieee80211;
int ret;
-
- //u32 TargetContent;
u32 hwkey[4] = {0, 0, 0, 0};
u8 mask = 0xff;
u32 key_idx = 0;
- //u8 broadcast_addr[6] ={ 0xff,0xff,0xff,0xff,0xff,0xff};
u8 zero_addr[4][6] = { {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
{0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
{0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
- //sometimes, the length is zero while we do not type key value
+ /* sometimes, the length is zero while we do not type key value */
if (wrqu->encoding.length != 0) {
for (i = 0; i < 4; i++) {
EnableHWSecurityConfig8192(dev);
setKey(dev,
- key_idx, //EntryNo
- key_idx, //KeyIndex
- KEY_TYPE_WEP40, //KeyType
+ key_idx, /* EntryNo */
+ key_idx, /* KeyIndex */
+ KEY_TYPE_WEP40, /* KeyType */
zero_addr[key_idx],
- 0, //DefaultKey
- hwkey); //KeyContent
+ 0, /* DefaultKey */
+ hwkey); /* KeyContent */
}
EnableHWSecurityConfig8192(dev);
setKey(dev,
- key_idx, //EntryNo
- key_idx, //KeyIndex
- KEY_TYPE_WEP104, //KeyType
+ key_idx, /* EntryNo */
+ key_idx, /* KeyIndex */
+ KEY_TYPE_WEP104, /* KeyType */
zero_addr[key_idx],
- 0, //DefaultKey
- hwkey); //KeyContent
+ 0, /* DefaultKey */
+ hwkey); /* KeyContent */
} else {
printk("wrong type in WEP, not WEP40 and WEP104\n");
*/
rtl8192_commit(dev);
- /*
- if(priv->up){
- rtl8180_rtx_disable(dev);
- rtl8180_rx_enable(dev);
- rtl8180_tx_enable(dev);
-
- }
- */
exit:
up(&priv->wx_sem);
wrqu->retry.flags = IW_RETRY_LIMIT | IW_RETRY_MIN;
wrqu->retry.value = priv->retry_data;
}
- //printk("returning %d",wrqu->retry.value);
return 0;
short err = 0;
down(&priv->wx_sem);
- //DMESG("attempt to set sensivity to %ddb",wrqu->sens.value);
if (priv->rf_set_sens == NULL) {
err = -1; /* we have not this support for this radio */
goto exit;
return err;
}
-//hw security need to reorganized.
+/* hw security need to reorganized. */
static int r8192_wx_set_enc_ext(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
int ret = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
struct ieee80211_device *ieee = priv->ieee80211;
- //printk("===>%s()\n", __func__);
down(&priv->wx_sem);
struct iw_point *encoding = &wrqu->encoding;
u8 idx = 0, alg = 0, group = 0;
if ((encoding->flags & IW_ENCODE_DISABLED) || ext->alg == IW_ENCODE_ALG_NONE)
- //none is not allowed to use hwsec WB 2008.07.01
+ /* none is not allowed to use hwsec WB 2008.07.01 */
goto end_hw_sec;
- // as IW_ENCODE_ALG_CCMP is defined to be 3 and KEY_TYPE_CCMP is defined to 4;
+ /* as IW_ENCODE_ALG_CCMP is defined to be 3 and KEY_TYPE_CCMP is defined to 4; */
alg = (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg;
idx = encoding->flags & IW_ENCODE_INDEX;
if (idx)
ieee->pairwise_key_type = alg;
EnableHWSecurityConfig8192(dev);
}
- memcpy((u8 *)key, ext->key, 16); //we only get 16 bytes key.why? WB 2008.7.1
+ memcpy((u8 *)key, ext->key, 16); /* we only get 16 bytes key.why? WB 2008.7.1 */
if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode != 2)) {
setKey(dev,
- idx,//EntryNo
- idx, //KeyIndex
- alg, //KeyType
- zero, //MacAddr
- 0, //DefaultKey
- key); //KeyContent
+ idx, /* EntryNao */
+ idx, /* KeyIndex */
+ alg, /* KeyType */
+ zero, /* MacAddr */
+ 0, /* DefaultKey */
+ key); /* KeyContent */
} else if (group) {
ieee->group_key_type = alg;
setKey(dev,
- idx,//EntryNo
- idx, //KeyIndex
- alg, //KeyType
- broadcast_addr, //MacAddr
- 0, //DefaultKey
- key); //KeyContent
- } else {//pairwise key
+ idx, /* EntryNo */
+ idx, /* KeyIndex */
+ alg, /* KeyType */
+ broadcast_addr, /* MacAddr */
+ 0, /* DefaultKey */
+ key); /* KeyContent */
+ } else { /* pairwise key */
setKey(dev,
- 4,//EntryNo
- idx, //KeyIndex
- alg, //KeyType
- (u8 *)ieee->ap_mac_addr, //MacAddr
- 0, //DefaultKey
- key); //KeyContent
+ 4, /* EntryNo */
+ idx, /* KeyIndex */
+ alg, /* KeyType */
+ (u8 *)ieee->ap_mac_addr,/* MacAddr */
+ 0, /* DefaultKey */
+ key); /* KeyContent */
}
union iwreq_data *data, char *extra)
{
int ret = 0;
- //printk("====>%s()\n", __func__);
struct r8192_priv *priv = ieee80211_priv(dev);
down(&priv->wx_sem);
ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra);
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- //printk("====>%s()\n", __func__);
int ret = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
struct iw_request_info *info,
union iwreq_data *data, char *extra)
{
- //printk("====>%s(), len:%d\n", __func__, data->length);
int ret = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
down(&priv->wx_sem);
ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length);
up(&priv->wx_sem);
- //printk("<======%s(), ret:%d\n", __func__, ret);
return ret;
r8192_wx_get_power, /* SIOCGIWPOWER */
NULL, /*---hole---*/
NULL, /*---hole---*/
- r8192_wx_set_gen_ie,//NULL, /* SIOCSIWGENIE */
+ r8192_wx_set_gen_ie, /* NULL, */ /* SIOCSIWGENIE */
NULL, /* SIOCSIWGENIE */
- r8192_wx_set_auth,//NULL, /* SIOCSIWAUTH */
- NULL,//r8192_wx_get_auth,//NULL, /* SIOCSIWAUTH */
+ r8192_wx_set_auth,/* NULL, */ /* SIOCSIWAUTH */
+ NULL,/* r8192_wx_get_auth, */ /* NULL, */ /* SIOCSIWAUTH */
r8192_wx_set_enc_ext, /* SIOCSIWENCODEEXT */
- NULL,//r8192_wx_get_enc_ext,//NULL, /* SIOCSIWENCODEEXT */
+ NULL,/* r8192_wx_get_enc_ext, *//* NULL, */ /* SIOCSIWENCODEEXT */
NULL, /* SIOCSIWPMKSA */
NULL, /*---hole---*/
static iw_handler r8192_private_handler[] = {
-// r8192_wx_set_monitor, /* SIOCIWFIRSTPRIV */
- r8192_wx_set_crcmon, /*SIOCIWSECONDPRIV*/
-// r8192_wx_set_forceassociate,
-// r8192_wx_set_beaconinterval,
-// r8192_wx_set_monitor_type,
+ r8192_wx_set_crcmon,
r8192_wx_set_scan_type,
r8192_wx_set_rawtx,
- //r8192_wx_null,
r8192_wx_force_reset,
};
tmp_level = (&ieee->current_network)->stats.rssi;
tmp_qual = (&ieee->current_network)->stats.signal;
tmp_noise = (&ieee->current_network)->stats.noise;
- //printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
wstats->qual.level = tmp_level;
wstats->qual.qual = tmp_qual;
wstats->qual.noise = tmp_noise;
- wstats->qual.updated = IW_QUAL_ALL_UPDATED| IW_QUAL_DBM;
+ wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
return wstats;
}
s32 bSurpriseRemoved;
u32 IsrContent;
u32 ImrContent;
- bool fw_found;
u8 EepromAddressSize;
u8 hw_init_completed;
struct task_struct *cmdThread;
struct usb_device *udev = padapter->dvobjpriv.pusbdev;
struct usb_interface *pusb_intf = padapter->pusb_intf;
dev_err(&udev->dev, "r8712u: Firmware request failed\n");
- padapter->fw_found = false;
usb_put_dev(udev);
usb_set_intfdata(pusb_intf, NULL);
return;
}
padapter->fw = firmware;
- padapter->fw_found = true;
/* firmware available - start netdev */
register_netdev(padapter->pnetdev);
}
#define IEEE_G (1<<2)
#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
-extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
+static inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
{
/* Single white space is for Linksys APs */
if (essid_len == 1 && essid[0] == ' ')
return 1;
}
-extern inline int ieee80211_get_hdrlen(u16 fc)
+static inline int ieee80211_get_hdrlen(u16 fc)
{
int hdrlen = 24;
r8712_free_mlme_priv(&padapter->mlmepriv);
r8712_free_io_queue(padapter);
_free_xmit_priv(&padapter->xmitpriv);
- if (padapter->fw_found)
- _r8712_free_sta_priv(&padapter->stapriv);
+ _r8712_free_sta_priv(&padapter->stapriv);
_r8712_free_recv_priv(&padapter->recvpriv);
mp871xdeinit(padapter);
if (pnetdev)
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psurveyPara = kmalloc(sizeof(struct sitesurvey_parm), GFP_ATOMIC);
+ psurveyPara = kmalloc(sizeof(*psurveyPara), GFP_ATOMIC);
if (psurveyPara == NULL) {
kfree((unsigned char *) ph2c);
return _FAIL;
struct setdatarate_parm *pbsetdataratepara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pbsetdataratepara = kmalloc(sizeof(struct setdatarate_parm),
- GFP_ATOMIC);
+ pbsetdataratepara = kmalloc(sizeof(*pbsetdataratepara), GFP_ATOMIC);
if (pbsetdataratepara == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct SetChannelPlan_param *psetchplanpara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetchplanpara = kmalloc(sizeof(struct SetChannelPlan_param),
- GFP_ATOMIC);
+ psetchplanpara = kmalloc(sizeof(*psetchplanpara), GFP_ATOMIC);
if (psetchplanpara == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct setbasicrate_parm *pssetbasicratepara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pssetbasicratepara = kmalloc(sizeof(struct setbasicrate_parm),
- GFP_ATOMIC);
+ pssetbasicratepara = kmalloc(sizeof(*pssetbasicratepara), GFP_ATOMIC);
if (pssetbasicratepara == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct writePTM_parm *pwriteptmparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pwriteptmparm = kmalloc(sizeof(struct writePTM_parm), GFP_ATOMIC);
+ pwriteptmparm = kmalloc(sizeof(*pwriteptmparm), GFP_ATOMIC);
if (pwriteptmparm == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct writePTM_parm *pwriteptmparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pwriteptmparm = kmalloc(sizeof(struct writePTM_parm), GFP_ATOMIC);
+ pwriteptmparm = kmalloc(sizeof(*pwriteptmparm), GFP_ATOMIC);
if (pwriteptmparm == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct writePTM_parm *pwriteptmparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pwriteptmparm = kmalloc(sizeof(struct writePTM_parm), GFP_ATOMIC);
+ pwriteptmparm = kmalloc(sizeof(*pwriteptmparm), GFP_ATOMIC);
if (pwriteptmparm == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct writeRF_parm *pwriterfparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pwriterfparm = kmalloc(sizeof(struct writeRF_parm), GFP_ATOMIC);
+ pwriterfparm = kmalloc(sizeof(*pwriterfparm), GFP_ATOMIC);
if (pwriterfparm == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct readRF_parm *prdrfparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- prdrfparm = kmalloc(sizeof(struct readRF_parm), GFP_ATOMIC);
+ prdrfparm = kmalloc(sizeof(*prdrfparm), GFP_ATOMIC);
if (prdrfparm == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
&padapter->registrypriv.dev_network;
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_START_TO_LINK);
- pcmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pcmd = kmalloc(sizeof(*pcmd), GFP_ATOMIC);
if (pcmd == NULL)
return _FAIL;
_init_listhead(&pcmd->list);
network.InfrastructureMode;
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_START_TO_LINK);
- pcmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pcmd = kmalloc(sizeof(*pcmd), GFP_ATOMIC);
if (pcmd == NULL)
return _FAIL;
t_len = sizeof(u32) + 6 * sizeof(unsigned char) + 2 +
struct disconnect_parm *pdisconnect;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- pdisconnect_cmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pdisconnect_cmd = kmalloc(sizeof(*pdisconnect_cmd), GFP_ATOMIC);
if (pdisconnect_cmd == NULL)
return _FAIL;
- pdisconnect = kmalloc(sizeof(struct disconnect_parm), GFP_ATOMIC);
+ pdisconnect = kmalloc(sizeof(*pdisconnect), GFP_ATOMIC);
if (pdisconnect == NULL) {
kfree((u8 *)pdisconnect_cmd);
return _FAIL;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetop = kmalloc(sizeof(struct setopmode_parm), GFP_ATOMIC);
+ psetop = kmalloc(sizeof(*psetop), GFP_ATOMIC);
if (psetop == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct sta_info *sta = (struct sta_info *)psta;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetstakey_para = kmalloc(sizeof(struct set_stakey_parm), GFP_ATOMIC);
+ psetstakey_para = kmalloc(sizeof(*psetstakey_para), GFP_ATOMIC);
if (psetstakey_para == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
}
- psetstakey_rsp = kmalloc(sizeof(struct set_stakey_rsp), GFP_ATOMIC);
+ psetstakey_rsp = kmalloc(sizeof(*psetstakey_rsp), GFP_ATOMIC);
if (psetstakey_rsp == NULL) {
kfree((u8 *) ph2c);
kfree((u8 *) psetstakey_para);
struct setrfintfs_parm *psetrfintfsparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetrfintfsparm = kmalloc(sizeof(struct setrfintfs_parm), GFP_ATOMIC);
+ psetrfintfsparm = kmalloc(sizeof(*psetrfintfsparm), GFP_ATOMIC);
if (psetrfintfsparm == NULL) {
kfree((unsigned char *) ph2c);
return _FAIL;
struct setratable_parm *psetrttblparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetrttblparm = kmalloc(sizeof(struct setratable_parm), GFP_ATOMIC);
+ psetrttblparm = kmalloc(sizeof(*psetrttblparm), GFP_ATOMIC);
if (psetrttblparm == NULL) {
kfree((unsigned char *)ph2c);
return _FAIL;
struct cmd_obj *ph2c;
struct readTSSI_parm *prdtssiparm;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- prdtssiparm = kmalloc(sizeof(struct readTSSI_parm), GFP_ATOMIC);
+ prdtssiparm = kmalloc(sizeof(*prdtssiparm), GFP_ATOMIC);
if (prdtssiparm == NULL) {
kfree((unsigned char *) ph2c);
return _FAIL;
struct cmd_obj *ph2c;
struct SetMacAddr_param *psetMacAddr_para;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetMacAddr_para = kmalloc(sizeof(struct SetMacAddr_param),
- GFP_ATOMIC);
+ psetMacAddr_para = kmalloc(sizeof(*psetMacAddr_para), GFP_ATOMIC);
if (psetMacAddr_para == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
struct set_assocsta_parm *psetassocsta_para;
struct set_assocsta_rsp *psetassocsta_rsp = NULL;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- psetassocsta_para = kmalloc(sizeof(struct set_assocsta_parm),
- GFP_ATOMIC);
+ psetassocsta_para = kmalloc(sizeof(*psetassocsta_para), GFP_ATOMIC);
if (psetassocsta_para == NULL) {
kfree((u8 *) ph2c);
return _FAIL;
}
- psetassocsta_rsp = kmalloc(sizeof(struct set_assocsta_rsp),
- GFP_ATOMIC);
+ psetassocsta_rsp = kmalloc(sizeof(*psetassocsta_rsp), GFP_ATOMIC);
if (psetassocsta_rsp == NULL) {
kfree((u8 *)ph2c);
kfree((u8 *)psetassocsta_para);
struct cmd_obj *ph2c;
struct addBaReq_parm *paddbareq_parm;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- paddbareq_parm = kmalloc(sizeof(struct addBaReq_parm), GFP_ATOMIC);
+ paddbareq_parm = kmalloc(sizeof(*paddbareq_parm), GFP_ATOMIC);
if (paddbareq_parm == NULL) {
kfree((unsigned char *)ph2c);
return _FAIL;
struct drvint_cmd_parm *pdrvintcmd_param;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- pdrvintcmd_param = kmalloc(sizeof(struct drvint_cmd_parm), GFP_ATOMIC);
+ pdrvintcmd_param = kmalloc(sizeof(*pdrvintcmd_param), GFP_ATOMIC);
if (pdrvintcmd_param == NULL) {
kfree((unsigned char *)ph2c);
return _FAIL;
struct DisconnectCtrlEx_param *param;
struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
- ph2c = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kmalloc(sizeof(*ph2c), GFP_ATOMIC);
if (ph2c == NULL)
return _FAIL;
- param = kzalloc(sizeof(struct DisconnectCtrlEx_param), GFP_ATOMIC);
+ param = kzalloc(sizeof(*param), GFP_ATOMIC);
if (param == NULL) {
kfree((unsigned char *) ph2c);
return _FAIL;
struct io_queue *pio_queue;
struct io_req *pio_req;
- pio_queue = kmalloc(sizeof(struct io_queue), GFP_ATOMIC);
+ pio_queue = kmalloc(sizeof(*pio_queue), GFP_ATOMIC);
if (pio_queue == NULL)
goto alloc_io_queue_fail;
_init_listhead(&pio_queue->free_ioreqs);
RTL8712_RF_2T2R == rf_type)
max_rate = (bw_40MHz) ? ((short_GI) ? 300 :
270) : ((short_GI) ? 144 : 130);
- else if (mcs_rate & 0x0080) /* MCS7 */
- max_rate = (bw_40MHz) ? ((short_GI) ? 150 :
- 135) : ((short_GI) ? 72 : 65);
else /* default MCS7 */
max_rate = (bw_40MHz) ? ((short_GI) ? 150 :
135) : ((short_GI) ? 72 : 65);
max_rate *= 2; /* Mbps/2 */
- wrqu->bitrate.value = max_rate * 500000;
- } else {
- wrqu->bitrate.value = max_rate * 500000;
}
+ wrqu->bitrate.value = max_rate * 500000;
} else
return -ENOLINK;
return 0;
struct cmd_obj *pcmd;
struct setauth_parm *psetauthparm;
- pcmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pcmd = kmalloc(sizeof(*pcmd), GFP_ATOMIC);
if (pcmd == NULL)
return _FAIL;
- psetauthparm = kzalloc(sizeof(struct setauth_parm), GFP_ATOMIC);
+ psetauthparm = kzalloc(sizeof(*psetauthparm), GFP_ATOMIC);
if (psetauthparm == NULL) {
kfree((unsigned char *)pcmd);
return _FAIL;
u8 keylen;
sint ret = _SUCCESS;
- pcmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pcmd = kmalloc(sizeof(*pcmd), GFP_ATOMIC);
if (pcmd == NULL)
return _FAIL;
- psetkeyparm = kzalloc(sizeof(struct setkey_parm), GFP_ATOMIC);
+ psetkeyparm = kzalloc(sizeof(*psetkeyparm), GFP_ATOMIC);
if (psetkeyparm == NULL) {
ret = _FAIL;
goto err_free_cmd;
struct SetChannel_parm *pparm = NULL;
u16 code = GEN_CMD_CODE(_SetChannel);
- pcmd = kmalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ pcmd = kmalloc(sizeof(*pcmd), GFP_ATOMIC);
if (pcmd == NULL)
return;
- pparm = kmalloc(sizeof(struct SetChannel_parm), GFP_ATOMIC);
+ pparm = kmalloc(sizeof(*pparm), GFP_ATOMIC);
if (pparm == NULL) {
kfree(pcmd);
return;
static void r871xu_dev_remove(struct usb_interface *pusb_intf)
{
struct net_device *pnetdev = usb_get_intfdata(pusb_intf);
- struct _adapter *padapter = netdev_priv(pnetdev);
struct usb_device *udev = interface_to_usbdev(pusb_intf);
- usb_set_intfdata(pusb_intf, NULL);
- if (padapter->fw_found)
+ if (pnetdev) {
+ struct _adapter *padapter = netdev_priv(pnetdev);
+
+ usb_set_intfdata(pusb_intf, NULL);
release_firmware(padapter->fw);
- /* never exit with a firmware callback pending */
- wait_for_completion(&padapter->rtl8712_fw_ready);
- if (drvpriv.drv_registered == true)
- padapter->bSurpriseRemoved = true;
- if (pnetdev != NULL) {
- /* will call netdev_close() */
- unregister_netdev(pnetdev);
- }
- flush_scheduled_work();
- udelay(1);
- /*Stop driver mlme relation timer */
- if (padapter->fw_found)
+ /* never exit with a firmware callback pending */
+ wait_for_completion(&padapter->rtl8712_fw_ready);
+ if (drvpriv.drv_registered == true)
+ padapter->bSurpriseRemoved = true;
+ unregister_netdev(pnetdev); /* will call netdev_close() */
+ flush_scheduled_work();
+ udelay(1);
+ /* Stop driver mlme relation timer */
r8712_stop_drv_timers(padapter);
- r871x_dev_unload(padapter);
- r8712_free_drv_sw(padapter);
- usb_set_intfdata(pusb_intf, NULL);
- /* decrease the reference count of the usb device structure
- * when disconnect */
- usb_put_dev(udev);
+ r871x_dev_unload(padapter);
+ r8712_free_drv_sw(padapter);
+
+ /* decrease the reference count of the usb device structure
+ * when disconnect */
+ usb_put_dev(udev);
+ }
/* If we didn't unplug usb dongle and remove/insert module, driver
* fails on sitesurvey for the first time when device is up.
* Reset usb port for sitesurvey fail issue. */
r8723au-y := \
core/rtw_cmd.o \
core/rtw_efuse.o \
- core/rtw_ioctl_set.o \
core/rtw_ieee80211.o \
core/rtw_led.o \
core/rtw_mlme.o \
obj-$(CONFIG_R8723AU) := r8723au.o
-ccflags-y += -Wtype-limits -D__CHECK_ENDIAN__ -I$(src)/include
+ccflags-y += $(call cc-option,-Wtype-limits,)
+ccflags-y += -D__CHECK_ENDIAN__ -I$(src)/include
extern unsigned char WMM_OUI23A[];
extern unsigned char WPS_OUI23A[];
extern unsigned char P2P_OUI23A[];
-extern unsigned char WFD_OUI23A[];
void init_mlme_ap_info23a(struct rtw_adapter *padapter)
{
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
- max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03;
+ max_AMPDU_len = pmlmeinfo->ht_cap.ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_FACTOR;
- min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2;
+ min_MPDU_spacing = (pmlmeinfo->ht_cap.ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_DENSITY) >> 2;
rtl8723a_set_ampdu_min_space(padapter, min_MPDU_spacing);
rtl8723a_set_ampdu_factor(padapter, max_AMPDU_len);
/* Config SM Power Save setting */
- pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2;
+ pmlmeinfo->SM_PS = (le16_to_cpu(pmlmeinfo->ht_cap.cap_info) &
+ IEEE80211_HT_CAP_SM_PS) >> 2;
if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
DBG_8723A("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __func__);
}
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
- struct HT_info_element *pht_info = NULL;
+ struct ieee80211_ht_operation *pht_info = NULL;
int bcn_fixed_size;
- bcn_interval = (u16)pnetwork->BeaconPeriod;
+ bcn_interval = (u16)pnetwork->beacon_interval;
cur_channel = pnetwork->DSConfig;
cur_bwmode = HT_CHANNEL_WIDTH_20;;
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
/* check if there is wps ie, */
/* if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, */
/* and at first time the security ie (RSN/WPA IE) will not include in beacon. */
- if (NULL == rtw_get_wps_ie23a(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL))
+ if (NULL == cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ pnetwork->IEs + _FIXED_IE_LENGTH_,
+ pnetwork->IELength -
+ _FIXED_IE_LENGTH_))
pmlmeext->bstart_bss = true;
/* todo: update wmm, ht cap */
pnetwork->IEs + bcn_fixed_size,
pnetwork->IELength - bcn_fixed_size);
if (p && p[1]) {
- pht_info = (struct HT_info_element *)(p + 2);
+ pht_info = (struct ieee80211_ht_operation *)(p + 2);
- if (pregpriv->cbw40_enable && pht_info->infos[0] & BIT(2)) {
+ if (pregpriv->cbw40_enable && pht_info->ht_param &
+ IEEE80211_HT_PARAM_CHAN_WIDTH_ANY) {
/* switch to the 40M Hz mode */
cur_bwmode = HT_CHANNEL_WIDTH_40;
- switch (pht_info->infos[0] & 0x3) {
- case 1:
+ switch (pht_info->ht_param &
+ IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
/* pmlmeext->cur_ch_offset =
HAL_PRIME_CHNL_OFFSET_LOWER; */
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
break;
- case 3:
+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
break;
default:
update_wireless_mode23a(padapter);
/* udpate capability after cur_wireless_mode updated */
- update_capinfo23a(padapter, rtw_get_capability23a(pnetwork));
+ update_capinfo23a(padapter, pnetwork->capability);
/* let pnetwork_mlmeext == pnetwork_mlme. */
memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
u8 *pHT_caps_ie = NULL;
u8 *pHT_info_ie = NULL;
struct sta_info *psta = NULL;
- __le16 *pbeacon;
u16 cap, ht_cap = false;
uint ie_len = 0;
int group_cipher, pairwise_cipher;
memcpy(pbss_network->MacAddress, myid(&padapter->eeprompriv), ETH_ALEN);
- /* beacon interval */
- /* ie + 8; 8: TimeStamp, 2: Beacon Interval 2:Capability */
- pbeacon = rtw_get_beacon_interval23a_from_ie(ie);
- pbss_network->BeaconPeriod = get_unaligned_le16(pbeacon);
-
/* capability */
cap = get_unaligned_le16(ie);
static void update_bcn_wps_ie(struct rtw_adapter *padapter)
{
- u8 *pwps_ie = NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie = NULL;
- uint wps_ielen = 0, wps_offset, remainder_ielen;
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
- struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
- unsigned char *ie = pnetwork->IEs;
- u32 ielen = pnetwork->IELength;
-
DBG_8723A("%s\n", __func__);
- pwps_ie_src = pmlmepriv->wps_beacon_ie;
- if (pwps_ie_src == NULL)
- return;
-
- pwps_ie = rtw_get_wps_ie23a(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen);
-
- if (pwps_ie == NULL || wps_ielen == 0)
- return;
-
- wps_offset = (uint)(pwps_ie-ie);
-
- premainder_ie = pwps_ie + wps_ielen;
-
- remainder_ielen = ielen - wps_offset - wps_ielen;
-
- if (remainder_ielen > 0) {
- pbackup_remainder_ie = kmalloc(remainder_ielen, GFP_ATOMIC);
- if (pbackup_remainder_ie)
- memcpy(pbackup_remainder_ie, premainder_ie,
- remainder_ielen);
- }
-
- wps_ielen = (uint)pwps_ie_src[1];/* to get ie data len */
- if ((wps_offset+wps_ielen+2+remainder_ielen)<= MAX_IE_SZ)
- {
- memcpy(pwps_ie, pwps_ie_src, wps_ielen+2);
- pwps_ie += (wps_ielen+2);
-
- if (pbackup_remainder_ie)
- memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen);
-
- /* update IELength */
- pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen;
- }
-
- if (pbackup_remainder_ie)
- kfree(pbackup_remainder_ie);
+ return;
}
static void update_bcn_p2p_ie(struct rtw_adapter *padapter)
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv;
- if (pmlmepriv->htpriv.ht_option == true)
+ if (pmlmepriv->htpriv.ht_option)
return 0;
/* if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) */
psta->no_ht_set = 1;
pmlmepriv->num_sta_no_ht++;
}
- if (pmlmepriv->htpriv.ht_option == true) {
+ if (pmlmepriv->htpriv.ht_option) {
DBG_8723A("%s STA " MAC_FMT
" - no HT, num of non-HT stations %d\n",
__func__, MAC_ARG(psta->hwaddr),
psta->htpriv.ht_option = false;
}
- if (pmlmepriv->htpriv.ht_option == false)
+ if (!pmlmepriv->htpriv.ht_option)
psta->htpriv.ht_option = false;
update_sta_info23a_apmode23a(padapter, psta);
for (i = 0; i<NUM_STA; i++)
pstapriv->sta_aid[i] = NULL;
- pmlmepriv->wps_beacon_ie = NULL;
- pmlmepriv->wps_probe_resp_ie = NULL;
- pmlmepriv->wps_assoc_resp_ie = NULL;
-
- pmlmepriv->p2p_beacon_ie = NULL;
- pmlmepriv->p2p_probe_resp_ie = NULL;
-
/* for ACL */
INIT_LIST_HEAD(&pacl_list->acl_node_q.queue);
pacl_list->num = 0;
int rtw_joinbss_cmd23a(struct rtw_adapter *padapter,
struct wlan_network *pnetwork)
{
- u8 *auth;
int res = _SUCCESS;
struct wlan_bssid_ex *psecnetwork;
struct cmd_obj *pcmd;
memcpy(psecnetwork, &pnetwork->network,
get_wlan_bssid_ex_sz(&pnetwork->network));
- auth = &psecuritypriv->authenticator_ie[0];
- psecuritypriv->authenticator_ie[0] =
- (unsigned char)psecnetwork->IELength;
-
- if ((psecnetwork->IELength-12) < (256-1)) {
- memcpy(&psecuritypriv->authenticator_ie[1],
- &psecnetwork->IEs[12], psecnetwork->IELength - 12);
- } else {
- memcpy(&psecuritypriv->authenticator_ie[1],
- &psecnetwork->IEs[12], 256 - 1);
- }
-
psecnetwork->IELength = 0;
/* Added by Albert 2009/02/18 */
/* If the the driver wants to use the bssid to create the
}
}
-u8 *rtw_set_fixed_ie23a(unsigned char *pbuf, unsigned int len,
- unsigned char *source, unsigned int *frlen)
-{
- memcpy((void *)pbuf, (void *)source, len);
- *frlen = *frlen + len;
- return pbuf + len;
-}
-
/* rtw_set_ie23a will update frame length */
u8 *rtw_set_ie23a(u8 *pbuf, int index, uint len, const u8 *source, uint *frlen)
{
inline u8 hal_ch_offset_to_secondary_ch_offset23a(u8 ch_offset)
{
- if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
- return SCN;
- else if (ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
- return SCB;
+ if (ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
+ return IEEE80211_HT_PARAM_CHA_SEC_BELOW;
else if (ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
- return SCA;
+ return IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
- return SCN;
+ return IEEE80211_HT_PARAM_CHA_SEC_NONE;
}
inline u8 *rtw_set_ie23a_secondary_ch_offset(u8 *buf, u32 *buf_len,
/* beacon interval : 2bytes */
/* BCN_INTERVAL; */
- *(u16*)ie = cpu_to_le16(pdev_network->BeaconPeriod);
+ *(u16*)ie = cpu_to_le16(pdev_network->beacon_interval);
sz += 2;
ie += 2;
return sz;
}
-int rtw_get_wpa_cipher_suite23a(const u8 *s)
+static int rtw_get_wpa_cipher_suite(const u8 *s)
{
if (!memcmp(s, WPA_CIPHER_SUITE_NONE23A, WPA_SELECTOR_LEN))
return WPA_CIPHER_NONE;
return 0;
}
-int rtw_get_wpa2_cipher_suite23a(const u8 *s)
+static int rtw_get_wpa2_cipher_suite(const u8 *s)
{
if (!memcmp(s, RSN_CIPHER_SUITE_NONE23A, RSN_SELECTOR_LEN))
return WPA_CIPHER_NONE;
/* group_cipher */
if (left >= WPA_SELECTOR_LEN) {
- *group_cipher = rtw_get_wpa_cipher_suite23a(pos);
+ *group_cipher = rtw_get_wpa_cipher_suite(pos);
pos += WPA_SELECTOR_LEN;
left -= WPA_SELECTOR_LEN;
}
for (i = 0; i < count; i++) {
- *pairwise_cipher |= rtw_get_wpa_cipher_suite23a(pos);
+ *pairwise_cipher |= rtw_get_wpa_cipher_suite(pos);
pos += WPA_SELECTOR_LEN;
left -= WPA_SELECTOR_LEN;
return _FAIL;
}
- if (*rsn_ie != _WPA2_IE_ID_ || *(rsn_ie+1) != (u8)(rsn_ie_len - 2)) {
+ if (*rsn_ie != WLAN_EID_RSN || *(rsn_ie+1) != (u8)(rsn_ie_len - 2)) {
return _FAIL;
}
/* group_cipher */
if (left >= RSN_SELECTOR_LEN) {
- *group_cipher = rtw_get_wpa2_cipher_suite23a(pos);
+ *group_cipher = rtw_get_wpa2_cipher_suite(pos);
pos += RSN_SELECTOR_LEN;
left -= RSN_SELECTOR_LEN;
}
for (i = 0; i < count; i++) {
- *pairwise_cipher |= rtw_get_wpa2_cipher_suite23a(pos);
+ *pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos);
pos += RSN_SELECTOR_LEN;
left -= RSN_SELECTOR_LEN;
return ret;
}
-int rtw_get_sec_ie23a(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len,
- u8 *wpa_ie, u16 *wpa_len)
-{
- u8 authmode, sec_idx, i;
- uint cnt;
-
-
- /* Search required WPA or WPA2 IE and copy to sec_ie[ ] */
-
- cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_);
-
- sec_idx = 0;
-
- while(cnt < in_len) {
- authmode = in_ie[cnt];
-
- if ((authmode == WLAN_EID_VENDOR_SPECIFIC) &&
- !memcmp(&in_ie[cnt+2], RTW_WPA_OUI23A_TYPE, 4)) {
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("\n rtw_get_wpa_ie23a: sec_idx =%d "
- "in_ie[cnt+1]+2 =%d\n",
- sec_idx, in_ie[cnt + 1] + 2));
-
- if (wpa_ie) {
- memcpy(wpa_ie, &in_ie[cnt], in_ie[cnt+1]+2);
-
- for (i = 0; i < (in_ie[cnt + 1] + 2); i = i + 8) {
- RT_TRACE(_module_rtl871x_mlme_c_,
- _drv_info_,
- ("\n %2x,%2x,%2x,%2x,%2x,%2x,"
- "%2x,%2x\n", wpa_ie[i],
- wpa_ie[i + 1], wpa_ie[i + 2],
- wpa_ie[i + 3], wpa_ie[i + 4],
- wpa_ie[i + 5], wpa_ie[i + 6],
- wpa_ie[i + 7]));
- }
- }
-
- *wpa_len = in_ie[cnt + 1] + 2;
- cnt += in_ie[cnt + 1] + 2; /* get next */
- } else {
- if (authmode == _WPA2_IE_ID_) {
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("\n get_rsn_ie: sec_idx =%d in_ie"
- "[cnt+1]+2 =%d\n", sec_idx,
- in_ie[cnt + 1] + 2));
-
- if (rsn_ie) {
- memcpy(rsn_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
-
- for (i = 0; i < (in_ie[cnt + 1] + 2); i = i + 8) {
- RT_TRACE(_module_rtl871x_mlme_c_,
- _drv_info_,
- ("\n %2x,%2x,%2x,%2x,%2x,%2x,"
- "%2x,%2x\n", rsn_ie[i],
- rsn_ie[i + 1], rsn_ie[i + 2],
- rsn_ie[i + 3], rsn_ie[i + 4],
- rsn_ie[i + 5], rsn_ie[i + 6],
- rsn_ie[i + 7]));
- }
- }
-
- *rsn_len = in_ie[cnt + 1] + 2;
- cnt += in_ie[cnt + 1] + 2; /* get next */
- } else {
- cnt += in_ie[cnt + 1] + 2; /* get next */
- }
- }
- }
-
-
-
- return *rsn_len + *wpa_len;
-}
-
-/**
- * rtw_get_wps_ie23a - Search WPS IE from a series of IEs
- * @in_ie: Address of IEs to search
- * @in_len: Length limit from in_ie
- * @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the
- * buf starting from wps_ie
- * @wps_ielen: If not NULL and WPS IE is found, will set to the length of
- * the entire WPS IE
- *
- * Returns: The address of the WPS IE found, or NULL
- */
-u8 *rtw_get_wps_ie23a(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
-{
- uint cnt;
- u8 *wpsie_ptr = NULL;
- u8 eid, wps_oui[4] = {0x0, 0x50, 0xf2, 0x04};
-
- if (wps_ielen)
- *wps_ielen = 0;
-
- if (!in_ie || in_len <= 0)
- return wpsie_ptr;
-
- cnt = 0;
-
- while (cnt < in_len) {
- eid = in_ie[cnt];
-
- if (eid == WLAN_EID_VENDOR_SPECIFIC &&
- !memcmp(&in_ie[cnt+2], wps_oui, 4)) {
- wpsie_ptr = &in_ie[cnt];
-
- if (wps_ie)
- memcpy(wps_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
-
- if (wps_ielen)
- *wps_ielen = in_ie[cnt + 1] + 2;
-
- cnt += in_ie[cnt + 1] + 2;
-
- break;
- } else {
- cnt += in_ie[cnt + 1] + 2; /* goto next */
- }
- }
-
- return wpsie_ptr;
-}
-
/**
* rtw_get_wps_attr23a - Search a specific WPS attribute from a given WPS IE
* @wps_ie: Address of WPS IE to search
*
* Returns: the address of the specific WPS attribute found, or NULL
*/
-u8 *rtw_get_wps_attr23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
- u8 *buf_attr, u32 *len_attr)
+const u8 *rtw_get_wps_attr23a(const u8 *wps_ie, uint wps_ielen,
+ u16 target_attr_id, u8 *buf_attr, u32 *len_attr)
{
- u8 *attr_ptr = NULL;
- u8 * target_attr_ptr = NULL;
+ const u8 *attr_ptr = NULL;
+ const u8 *target_attr_ptr = NULL;
u8 wps_oui[4] = {0x00, 0x50, 0xF2, 0x04};
if (len_attr)
*
* Returns: the address of the specific WPS attribute content found, or NULL
*/
-u8 *rtw_get_wps_attr_content23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
- u8 *buf_content, uint *len_content)
+const u8 *rtw_get_wps_attr_content23a(const u8 *wps_ie, uint wps_ielen,
+ u16 target_attr_id, u8 *buf_content,
+ uint *len_content)
{
- u8 *attr_ptr;
+ const u8 *attr_ptr;
u32 attr_len;
if (len_content)
void rtw_get_bcn_info23a(struct wlan_network *pnetwork)
{
- unsigned short cap;
u8 bencrypt = 0;
- /* u8 wpa_ie[255], rsn_ie[255]; */
- u16 wpa_len = 0, rsn_len = 0;
- struct HT_info_element *pht_info;
- struct ieee80211_ht_cap *pht_cap;
+ int pie_len, ie_offset;
+ u8 *pie;
const u8 *p;
- cap = get_unaligned_le16(
- rtw_get_capability23a_from_ie(pnetwork->network.IEs));
- if (cap & WLAN_CAPABILITY_PRIVACY) {
+ if (pnetwork->network.capability & WLAN_CAPABILITY_PRIVACY) {
bencrypt = 1;
pnetwork->network.Privacy = 1;
} else
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS;
- rtw_get_sec_ie23a(pnetwork->network.IEs, pnetwork->network.IELength,
- NULL, &rsn_len, NULL, &wpa_len);
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: ssid =%s\n", pnetwork->network.Ssid.ssid));
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: wpa_len =%d rsn_len =%d\n",
- wpa_len, rsn_len));
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: ssid =%s\n", pnetwork->network.Ssid.ssid));
- RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: wpa_len =%d rsn_len =%d\n",
- wpa_len, rsn_len));
+ ("%s: ssid =%s\n", __func__, pnetwork->network.Ssid.ssid));
+
+ ie_offset = offsetof(struct ieee80211_mgmt, u.beacon.variable) -
+ offsetof(struct ieee80211_mgmt, u);
+ pie = pnetwork->network.IEs + ie_offset;
+ pie_len = pnetwork->network.IELength - ie_offset;
- if (rsn_len > 0)
+ p = cfg80211_find_ie(WLAN_EID_RSN, pie, pie_len);
+ if (p && p[1]) {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA2;
- else if (wpa_len > 0)
+ } else if (cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPA,
+ pie, pie_len)) {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA;
- else {
+ } else {
if (bencrypt)
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WEP;
}
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: pnetwork->encryp_protocol is %x\n",
+ ("%s: pnetwork->encryp_protocol is %x\n", __func__,
pnetwork->BcnInfo.encryp_protocol));
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
- ("rtw_get_bcn_info23a: pnetwork->encryp_protocol is %x\n",
+ ("%s: pnetwork->encryp_protocol is %x\n", __func__,
pnetwork->BcnInfo.encryp_protocol));
rtw_get_cipher_info(pnetwork);
/* get bwmode and ch_offset */
- /* parsing HT_CAP_IE */
- p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY,
- pnetwork->network.IEs + _FIXED_IE_LENGTH_,
- pnetwork->network.IELength - _FIXED_IE_LENGTH_);
- if (p && p[1] > 0) {
- pht_cap = (struct ieee80211_ht_cap *)(p + 2);
- pnetwork->BcnInfo.ht_cap_info = pht_cap->cap_info;
- } else
- pnetwork->BcnInfo.ht_cap_info = 0;
-
- /* parsing HT_INFO_IE */
- p = cfg80211_find_ie(WLAN_EID_HT_OPERATION,
- pnetwork->network.IEs + _FIXED_IE_LENGTH_,
- pnetwork->network.IELength - _FIXED_IE_LENGTH_);
- if (p && p[1] > 0) {
- pht_info = (struct HT_info_element *)(p + 2);
- pnetwork->BcnInfo.ht_info_infos_0 = pht_info->infos[0];
- } else
- pnetwork->BcnInfo.ht_info_infos_0 = 0;
}
/* show MCS rate, unit: 100Kbps */
u16 rtw_mcs_rate23a(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
- unsigned char * MCS_rate)
+ struct ieee80211_mcs_info *mcs)
{
u16 max_rate = 0;
if (rf_type == RF_1T1R) {
- if (MCS_rate[0] & BIT(7))
+ if (mcs->rx_mask[0] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40)?1500:1350):
((short_GI_20)?722:650);
- else if (MCS_rate[0] & BIT(6))
+ else if (mcs->rx_mask[0] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40)?1350:1215):
((short_GI_20)?650:585);
- else if (MCS_rate[0] & BIT(5))
+ else if (mcs->rx_mask[0] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):
((short_GI_20)?578:520);
- else if (MCS_rate[0] & BIT(4))
+ else if (mcs->rx_mask[0] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):
((short_GI_20)?433:390);
- else if (MCS_rate[0] & BIT(3))
+ else if (mcs->rx_mask[0] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):
((short_GI_20)?289:260);
- else if (MCS_rate[0] & BIT(2))
+ else if (mcs->rx_mask[0] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40)?450:405):
((short_GI_20)?217:195);
- else if (MCS_rate[0] & BIT(1))
+ else if (mcs->rx_mask[0] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):
((short_GI_20)?144:130);
- else if (MCS_rate[0] & BIT(0))
+ else if (mcs->rx_mask[0] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40)?150:135):
((short_GI_20)?72:65);
} else {
- if (MCS_rate[1]) {
- if (MCS_rate[1] & BIT(7))
+ if (mcs->rx_mask[1]) {
+ if (mcs->rx_mask[1] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40)?3000:2700):((short_GI_20)?1444:1300);
- else if (MCS_rate[1] & BIT(6))
+ else if (mcs->rx_mask[1] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40)?2700:2430):((short_GI_20)?1300:1170);
- else if (MCS_rate[1] & BIT(5))
+ else if (mcs->rx_mask[1] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40)?2400:2160):((short_GI_20)?1156:1040);
- else if (MCS_rate[1] & BIT(4))
+ else if (mcs->rx_mask[1] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40)?1800:1620):((short_GI_20)?867:780);
- else if (MCS_rate[1] & BIT(3))
+ else if (mcs->rx_mask[1] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):((short_GI_20)?578:520);
- else if (MCS_rate[1] & BIT(2))
+ else if (mcs->rx_mask[1] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):((short_GI_20)?433:390);
- else if (MCS_rate[1] & BIT(1))
+ else if (mcs->rx_mask[1] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):((short_GI_20)?289:260);
- else if (MCS_rate[1] & BIT(0))
+ else if (mcs->rx_mask[1] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):((short_GI_20)?144:130);
} else {
- if (MCS_rate[0] & BIT(7))
+ if (mcs->rx_mask[0] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40)?1500:1350):((short_GI_20)?722:650);
- else if (MCS_rate[0] & BIT(6))
+ else if (mcs->rx_mask[0] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40)?1350:1215):((short_GI_20)?650:585);
- else if (MCS_rate[0] & BIT(5))
+ else if (mcs->rx_mask[0] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):((short_GI_20)?578:520);
- else if (MCS_rate[0] & BIT(4))
+ else if (mcs->rx_mask[0] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):((short_GI_20)?433:390);
- else if (MCS_rate[0] & BIT(3))
+ else if (mcs->rx_mask[0] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):((short_GI_20)?289:260);
- else if (MCS_rate[0] & BIT(2))
+ else if (mcs->rx_mask[0] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40)?450:405):((short_GI_20)?217:195);
- else if (MCS_rate[0] & BIT(1))
+ else if (mcs->rx_mask[0] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):((short_GI_20)?144:130);
- else if (MCS_rate[0] & BIT(0))
+ else if (mcs->rx_mask[0] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40)?150:135):((short_GI_20)?72:65);
}
}
return max_rate;
}
-
-static const char *_action_public_str23a[] = {
- "ACT_PUB_BSSCOEXIST",
- "ACT_PUB_DSE_ENABLE",
- "ACT_PUB_DSE_DEENABLE",
- "ACT_PUB_DSE_REG_LOCATION",
- "ACT_PUB_EXT_CHL_SWITCH",
- "ACT_PUB_DSE_MSR_REQ",
- "ACT_PUB_DSE_MSR_RPRT",
- "ACT_PUB_MP",
- "ACT_PUB_DSE_PWR_CONSTRAINT",
- "ACT_PUB_VENDOR",
- "ACT_PUB_GAS_INITIAL_REQ",
- "ACT_PUB_GAS_INITIAL_RSP",
- "ACT_PUB_GAS_COMEBACK_REQ",
- "ACT_PUB_GAS_COMEBACK_RSP",
- "ACT_PUB_TDLS_DISCOVERY_RSP",
- "ACT_PUB_LOCATION_TRACK",
- "ACT_PUB_RSVD",
-};
-
-const char *action_public_str23a(u8 action)
-{
- action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action;
- return _action_public_str23a[action];
-}
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- ******************************************************************************/
-#define _RTW_IOCTL_SET_C_
-
-#include <osdep_service.h>
-#include <drv_types.h>
-#include <rtw_ioctl_set.h>
-#include <hal_intf.h>
-
-#include <usb_ops.h>
-#include <linux/ieee80211.h>
-
-int rtw_do_join23a(struct rtw_adapter *padapter)
-{
- struct list_head *plist, *phead;
- u8* pibss = NULL;
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- struct rtw_queue *queue = &pmlmepriv->scanned_queue;
- int ret = _SUCCESS;
-
- spin_lock_bh(&pmlmepriv->scanned_queue.lock);
- phead = get_list_head(queue);
- plist = phead->next;
-
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("\n rtw_do_join23a: phead = %p; plist = %p\n\n\n",
- phead, plist));
-
- pmlmepriv->cur_network.join_res = -2;
-
- set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
-
- pmlmepriv->to_join = true;
-
- if (list_empty(&queue->queue)) {
- spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
- _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
-
- /* when set_ssid/set_bssid for rtw_do_join23a(), but
- scanning queue is empty */
- /* we try to issue sitesurvey firstly */
-
- if (pmlmepriv->LinkDetectInfo.bBusyTraffic == false ||
- padapter->mlmepriv.to_roaming > 0) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("rtw_do_join23a(): site survey if scanned_queue "
- "is empty\n."));
- /* submit site_survey23a_cmd */
- ret = rtw_sitesurvey_cmd23a(padapter,
- &pmlmepriv->assoc_ssid, 1,
- NULL, 0);
- if (ret != _SUCCESS) {
- pmlmepriv->to_join = false;
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("rtw_do_join23a(): site survey return "
- "error\n."));
- }
- } else {
- pmlmepriv->to_join = false;
- ret = _FAIL;
- }
-
- goto exit;
- } else {
- int select_ret;
- spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
- select_ret = rtw_select_and_join_from_scanned_queue23a(pmlmepriv);
- if (select_ret == _SUCCESS) {
- pmlmepriv->to_join = false;
- mod_timer(&pmlmepriv->assoc_timer,
- jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
- } else {
- if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
- struct wlan_bssid_ex *pdev_network;
- /* submit createbss_cmd to change to a
- ADHOC_MASTER */
-
- /* pmlmepriv->lock has been acquired by
- caller... */
- pdev_network =
- &padapter->registrypriv.dev_network;
-
- pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;
-
- pibss = padapter->registrypriv.dev_network.MacAddress;
-
- memcpy(&pdev_network->Ssid,
- &pmlmepriv->assoc_ssid,
- sizeof(struct cfg80211_ssid));
-
- rtw_update_registrypriv_dev_network23a(padapter);
-
- rtw_generate_random_ibss23a(pibss);
-
- if (rtw_createbss_cmd23a(padapter) != _SUCCESS) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_,
- _drv_err_,
- ("***Error =>do_goin: rtw_creat"
- "ebss_cmd status FAIL***\n"));
- ret = false;
- goto exit;
- }
-
- pmlmepriv->to_join = false;
-
- RT_TRACE(_module_rtl871x_ioctl_set_c_,
- _drv_info_,
- ("***Error => rtw_select_and_join_from"
- "_scanned_queue FAIL under STA_Mode"
- "***\n "));
- } else {
- /* can't associate ; reset under-linking */
- _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
-
- /* when set_ssid/set_bssid for rtw_do_join23a(),
- but there are no desired bss in scanning
- queue */
- /* we try to issue sitesurvey firstly */
- if (pmlmepriv->LinkDetectInfo.bBusyTraffic ==
- false || padapter->mlmepriv.to_roaming > 0){
- /* DBG_8723A("rtw_do_join23a() when no "
- "desired bss in scanning queue\n");
- */
- ret = rtw_sitesurvey_cmd23a(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0);
- if (ret != _SUCCESS) {
- pmlmepriv->to_join = false;
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("do_join(): site survey return error\n."));
- }
- } else {
- ret = _FAIL;
- pmlmepriv->to_join = false;
- }
- }
- }
- }
-
-exit:
-
- return ret;
-}
-
-int rtw_set_802_11_ssid23a(struct rtw_adapter* padapter,
- struct cfg80211_ssid *ssid)
-{
- int status = _SUCCESS;
- u32 cur_time = 0;
-
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- struct wlan_network *pnetwork = &pmlmepriv->cur_network;
-
-
-
- DBG_8723A_LEVEL(_drv_always_, "set ssid [%s] fw_state = 0x%08x\n",
- ssid->ssid, get_fwstate(pmlmepriv));
-
- if (padapter->hw_init_completed == false) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("set_ssid: hw_init_completed == false =>exit!!!\n"));
- status = _FAIL;
- goto exit;
- }
-
- spin_lock_bh(&pmlmepriv->lock);
-
- DBG_8723A("Set SSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
- goto handle_tkip_countermeasure;
- else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
- goto release_mlme_lock;
-
- if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
-
- if ((pmlmepriv->assoc_ssid.ssid_len == ssid->ssid_len) &&
- !memcmp(&pmlmepriv->assoc_ssid.ssid, ssid->ssid,
- ssid->ssid_len)) {
- if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("Set SSID is the same ssid, fw_state = 0x%08x\n",
- get_fwstate(pmlmepriv)));
-
- if (rtw_is_same_ibss23a(padapter, pnetwork) == false)
- {
- /* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */
- rtw_disassoc_cmd23a(padapter, 0, true);
-
- if (check_fwstate(pmlmepriv, _FW_LINKED))
- rtw_indicate_disconnect23a(padapter);
-
- rtw_free_assoc_resources23a(padapter, 1);
-
- if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
- _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
- set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
- }
- } else {
- goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
- }
- } else {
- rtw_lps_ctrl_wk_cmd23a(padapter, LPS_CTRL_JOINBSS, 1);
- }
- } else {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("Set SSID not the same ssid\n"));
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("set_ssid =[%s] len = 0x%x\n", ssid->ssid,
- (unsigned int)ssid->ssid_len));
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("assoc_ssid =[%s] len = 0x%x\n",
- pmlmepriv->assoc_ssid.ssid,
- (unsigned int)pmlmepriv->assoc_ssid.ssid_len));
-
- rtw_disassoc_cmd23a(padapter, 0, true);
-
- if (check_fwstate(pmlmepriv, _FW_LINKED))
- rtw_indicate_disconnect23a(padapter);
-
- rtw_free_assoc_resources23a(padapter, 1);
-
- if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
- _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
- set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
- }
- }
- }
-
-handle_tkip_countermeasure:
-
- if (padapter->securitypriv.btkip_countermeasure == true) {
- cur_time = jiffies;
-
- if ((cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ)
- {
- padapter->securitypriv.btkip_countermeasure = false;
- padapter->securitypriv.btkip_countermeasure_time = 0;
- }
- else
- {
- status = _FAIL;
- goto release_mlme_lock;
- }
- }
-
- memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(struct cfg80211_ssid));
- pmlmepriv->assoc_by_bssid = false;
-
- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
- pmlmepriv->to_join = true;
- else
- status = rtw_do_join23a(padapter);
-
-release_mlme_lock:
- spin_unlock_bh(&pmlmepriv->lock);
-
-exit:
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("-rtw_set_802_11_ssid23a: status =%d\n", status));
-
-
-
- return status;
-}
-
-int rtw_set_802_11_bssid23a_list_scan(struct rtw_adapter *padapter,
- struct cfg80211_ssid *pssid,
- int ssid_max_num)
-{
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- int res = _SUCCESS;
-
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("+rtw_set_802_11_bssid23a_list_scan(), fw_state =%x\n",
- get_fwstate(pmlmepriv)));
-
- if (!padapter) {
- res = _FAIL;
- goto exit;
- }
- if (padapter->hw_init_completed == false) {
- res = _FAIL;
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("\n === rtw_set_802_11_bssid23a_list_scan:"
- "hw_init_completed == false ===\n"));
- goto exit;
- }
-
- if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING) ||
- (pmlmepriv->LinkDetectInfo.bBusyTraffic == true)) {
- /* Scan or linking is in progress, do nothing. */
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("rtw_set_802_11_bssid23a_list_scan fail since fw_state "
- "= %x\n", get_fwstate(pmlmepriv)));
-
- if (check_fwstate(pmlmepriv,
- (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n"));
- } else {
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
- ("\n###pmlmepriv->sitesurveyctrl.traffic_"
- "busy == true\n"));
- }
- } else {
- if (rtw_is_scan_deny(padapter)) {
- DBG_8723A("%s(%s): scan deny\n",
- __func__, padapter->pnetdev->name);
- return _SUCCESS;
- }
-
- spin_lock_bh(&pmlmepriv->lock);
-
- res = rtw_sitesurvey_cmd23a(padapter, pssid, ssid_max_num,
- NULL, 0);
-
- spin_unlock_bh(&pmlmepriv->lock);
- }
-exit:
- return res;
-}
-
-int rtw_set_802_11_authentication_mode23a(struct rtw_adapter* padapter,
- enum ndis_802_11_auth_mode authmode)
-{
- struct security_priv *psecuritypriv = &padapter->securitypriv;
- int res;
-
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("set_802_11_auth.mode(): mode =%x\n", authmode));
-
- psecuritypriv->ndisauthtype = authmode;
-
- RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
- ("rtw_set_802_11_authentication_mode23a:"
- "psecuritypriv->ndisauthtype =%d",
- psecuritypriv->ndisauthtype));
-
- if (psecuritypriv->ndisauthtype > 3)
- psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
-
- res = rtw_set_auth23a(padapter, psecuritypriv);
-
- return res;
-}
-
-/*
-* rtw_get_cur_max_rate23a -
-* @adapter: pointer to _adapter structure
-*
-* Return 0 or 100Kbps
-*/
-u16 rtw_get_cur_max_rate23a(struct rtw_adapter *adapter)
-{
- int i = 0;
- const u8 *p;
- u16 rate = 0, max_rate = 0;
- struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
- struct registry_priv *pregistrypriv = &adapter->registrypriv;
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
- struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
- struct ieee80211_ht_cap *pht_capie;
- u8 rf_type = 0;
- u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0;
- u16 mcs_rate = 0;
-
- if (!check_fwstate(pmlmepriv, _FW_LINKED) &&
- !check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))
- return 0;
-
- if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N|WIRELESS_11_5N)) {
- p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY,
- &pcur_bss->IEs[12],
- pcur_bss->IELength - 12);
- if (p && p[1] > 0) {
- pht_capie = (struct ieee80211_ht_cap *)(p + 2);
-
- memcpy(&mcs_rate, &pht_capie->mcs, 2);
-
- /* bw_40MHz = (pht_capie->cap_info&
- IEEE80211_HT_CAP_SUP_WIDTH_20_40) ? 1:0; */
- /* cur_bwmod is updated by beacon, pmlmeinfo is
- updated by association response */
- bw_40MHz = (pmlmeext->cur_bwmode &&
- (IEEE80211_HT_PARAM_CHAN_WIDTH_ANY &
- pmlmeinfo->HT_info.infos[0])) ? 1:0;
-
- /* short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP
- _SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1 : 0; */
- short_GI_20 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_20) ? 1:0;
- short_GI_40 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_40) ? 1:0;
-
- rf_type = rtl8723a_get_rf_type(adapter);
- max_rate = rtw_mcs_rate23a(rf_type, bw_40MHz &
- pregistrypriv->cbw40_enable,
- short_GI_20, short_GI_40,
- pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate
- );
- }
- } else {
- while ((pcur_bss->SupportedRates[i] != 0) &&
- (pcur_bss->SupportedRates[i] != 0xFF)) {
- rate = pcur_bss->SupportedRates[i] & 0x7F;
- if (rate>max_rate)
- max_rate = rate;
- i++;
- }
-
- max_rate = max_rate * 10 / 2;
- }
-
- return max_rate;
-}
#include <linux/ieee80211.h>
#include <wifi.h>
#include <wlan_bssdef.h>
-#include <rtw_ioctl_set.h>
#include <rtw_sreset.h>
+static struct wlan_network *
+rtw_select_candidate_from_queue(struct mlme_priv *pmlmepriv);
+static int rtw_do_join(struct rtw_adapter *padapter);
+
static void rtw_init_mlme_timer(struct rtw_adapter *padapter)
{
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
setup_timer(&pmlmepriv->assoc_timer, rtw23a_join_to_handler,
(unsigned long)padapter);
#ifdef CONFIG_8723AU_AP_MODE
kfree(pmlmepriv->assoc_req);
kfree(pmlmepriv->assoc_rsp);
- rtw_free_mlme_ie_data(&pmlmepriv->wps_beacon_ie,
- &pmlmepriv->wps_beacon_ie_len);
rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_req_ie,
&pmlmepriv->wps_probe_req_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_resp_ie,
- &pmlmepriv->wps_probe_resp_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wps_assoc_resp_ie,
- &pmlmepriv->wps_assoc_resp_ie_len);
-
- rtw_free_mlme_ie_data(&pmlmepriv->p2p_beacon_ie,
- &pmlmepriv->p2p_beacon_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_req_ie,
- &pmlmepriv->p2p_probe_req_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_resp_ie,
- &pmlmepriv->p2p_probe_resp_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie,
- &pmlmepriv->p2p_go_probe_resp_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie,
- &pmlmepriv->p2p_assoc_req_ie_len);
-
- rtw_free_mlme_ie_data(&pmlmepriv->wfd_beacon_ie,
- &pmlmepriv->wfd_beacon_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_req_ie,
- &pmlmepriv->wfd_probe_req_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_resp_ie,
- &pmlmepriv->wfd_probe_resp_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wfd_go_probe_resp_ie,
- &pmlmepriv->wfd_go_probe_resp_ie_len);
- rtw_free_mlme_ie_data(&pmlmepriv->wfd_assoc_req_ie,
- &pmlmepriv->wfd_assoc_req_ie_len);
#endif
}
pmlmepriv->assoc_by_bssid = false;
while (1) {
- do_join_r = rtw_do_join23a(padapter);
+ do_join_r = rtw_do_join(padapter);
if (do_join_r == _SUCCESS)
break;
else {
spin_unlock_bh(&pmlmepriv->lock);
}
-__le16 *rtw_get_capability23a_from_ie(u8 *ie)
-{
- return (__le16 *)(ie + 8 + 2);
-}
-
-u16 rtw_get_capability23a(struct wlan_bssid_ex *bss)
-{
- u16 val;
-
- memcpy(&val, rtw_get_capability23a_from_ie(bss->IEs), 2);
-
- return le16_to_cpu(val);
-}
-
-__le16 *rtw_get_beacon_interval23a_from_ie(u8 *ie)
-{
- return (__le16 *)(ie + 8);
-}
-
static void rtw_free_network_nolock(struct mlme_priv *pmlmepriv,
struct wlan_network *pnetwork)
{
_rtw_free_network23a(pmlmepriv, pnetwork);
}
-int rtw_is_same_ibss23a(struct rtw_adapter *adapter,
- struct wlan_network *pnetwork)
+bool rtw_is_same_ibss23a(struct rtw_adapter *adapter,
+ struct wlan_network *pnetwork)
{
- int ret = true;
+ int ret;
struct security_priv *psecuritypriv = &adapter->securitypriv;
if (psecuritypriv->dot11PrivacyAlgrthm != 0 &&
{
u16 s_cap, d_cap;
- s_cap = get_unaligned_le16(rtw_get_capability23a_from_ie(src->IEs));
- d_cap = get_unaligned_le16(rtw_get_capability23a_from_ie(dst->IEs));
+ s_cap = src->capability;
+ d_cap = dst->capability;
return ((src->Ssid.ssid_len == dst->Ssid.ssid_len) &&
/* (src->DSConfig == dst->DSConfig) && */
ether_addr_equal(src->MacAddress, dst->MacAddress) &&
- ((!memcmp(src->Ssid.ssid, dst->Ssid.ssid, src->Ssid.ssid_len))) &&
- ((s_cap & WLAN_CAPABILITY_IBSS) ==
- (d_cap & WLAN_CAPABILITY_IBSS)) &&
- ((s_cap & WLAN_CAPABILITY_ESS) ==
- (d_cap & WLAN_CAPABILITY_ESS)));
+ !memcmp(src->Ssid.ssid, dst->Ssid.ssid, src->Ssid.ssid_len) &&
+ (s_cap & WLAN_CAPABILITY_IBSS) ==
+ (d_cap & WLAN_CAPABILITY_IBSS) &&
+ (s_cap & WLAN_CAPABILITY_ESS) == (d_cap & WLAN_CAPABILITY_ESS));
}
struct wlan_network *
Caller must hold pmlmepriv->lock first.
*/
-void rtw_update_scanned_network23a(struct rtw_adapter *adapter,
- struct wlan_bssid_ex *target)
+static void rtw_update_scanned_network(struct rtw_adapter *adapter,
+ struct wlan_bssid_ex *target)
{
struct list_head *plist, *phead;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct wlan_bssid_ex *pnetwork)
{
update_current_network(adapter, pnetwork);
- rtw_update_scanned_network23a(adapter, pnetwork);
+ rtw_update_scanned_network(adapter, pnetwork);
}
/* select the desired network based on the capability of the (i)bss. */
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
u32 desired_encmode;
u32 privacy;
-
- /* u8 wps_ie[512]; */
- uint wps_ielen;
-
int bselected = true;
desired_encmode = psecuritypriv->ndisencryptstatus;
privacy = pnetwork->network.Privacy;
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
- if (rtw_get_wps_ie23a(pnetwork->network.IEs + _FIXED_IE_LENGTH_,
- pnetwork->network.IELength -
- _FIXED_IE_LENGTH_, NULL, &wps_ielen))
+ if (cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPA,
+ pnetwork->network.IEs +
+ _FIXED_IE_LENGTH_,
+ pnetwork->network.IELength -
+ _FIXED_IE_LENGTH_))
return true;
else
return false;
bselected = false;
}
- if (desired_encmode != Ndis802_11EncryptionDisabled &&
- privacy == 0) {
+ if (desired_encmode != Ndis802_11EncryptionDisabled && privacy == 0) {
DBG_8723A("desired_encmode: %d, privacy: %d\n",
desired_encmode, privacy);
bselected = false;
{
u32 len;
struct wlan_bssid_ex *pnetwork;
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct survey_event *survey = (struct survey_event *)pbuf;
- pnetwork = (struct wlan_bssid_ex *)pbuf;
+ pnetwork = survey->bss;
RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,
("rtw_survey_event_cb23a, ssid=%s\n", pnetwork->Ssid.ssid));
memcpy(pmlmepriv->cur_network.network.IEs,
pnetwork->IEs, 8);
+ pmlmepriv->cur_network.network.beacon_interval =
+ pnetwork->beacon_interval;
+ pmlmepriv->cur_network.network.capability =
+ pnetwork->capability;
+ pmlmepriv->cur_network.network.tsf = pnetwork->tsf;
spin_lock_bh(&pmlmepriv->scanned_queue.lock);
ibss_wlan = rtw_find_network23a(
&pmlmepriv->scanned_queue,
if (ibss_wlan) {
memcpy(ibss_wlan->network.IEs,
pnetwork->IEs, 8);
+ pmlmepriv->cur_network.network.beacon_interval =
+ ibss_wlan->network.beacon_interval;
+ pmlmepriv->cur_network.network.capability =
+ ibss_wlan->network.capability;
+ pmlmepriv->cur_network.network.tsf =
+ ibss_wlan->network.tsf;
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
goto exit;
}
spin_unlock_bh(&pmlmepriv->lock);
+ kfree(survey->bss);
+ survey->bss = NULL;
+
return;
}
void
rtw_surveydone_event_callback23a(struct rtw_adapter *adapter, const u8 *pbuf)
{
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
- struct wlan_bssid_ex *pdev_network;
- u8 *pibss;
+ int ret;
spin_lock_bh(&pmlmepriv->lock);
rtw_set_signal_stat_timer(&adapter->recvpriv);
if (pmlmepriv->to_join == true) {
+ set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
- if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
- set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
-
- if (rtw_select_and_join_from_scanned_queue23a(
- pmlmepriv) == _SUCCESS) {
- mod_timer(&pmlmepriv->assoc_timer,
- jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
- } else {
- pdev_network = &adapter->registrypriv.dev_network;
- pibss = adapter->registrypriv.dev_network.MacAddress;
-
- _clr_fwstate_(pmlmepriv,
- _FW_UNDER_SURVEY);
-
- RT_TRACE(_module_rtl871x_mlme_c_,
- _drv_err_,
- ("switching to adhoc "
- "master\n"));
-
- memset(&pdev_network->Ssid, 0,
- sizeof(struct cfg80211_ssid));
- memcpy(&pdev_network->Ssid,
- &pmlmepriv->assoc_ssid,
- sizeof(struct cfg80211_ssid));
-
- rtw_update_registrypriv_dev_network23a(
- adapter);
- rtw_generate_random_ibss23a(pibss);
-
- pmlmepriv->fw_state =
- WIFI_ADHOC_MASTER_STATE;
-
- if (rtw_createbss_cmd23a(adapter) !=
- _SUCCESS)
- RT_TRACE(_module_rtl871x_mlme_c_,
- _drv_err_,
- ("Error =>rtw_createbss_cmd23a"
- " status FAIL\n"));
-
- pmlmepriv->to_join = false;
- }
- }
+ ret = rtw_select_and_join_from_scanned_queue23a(
+ pmlmepriv);
+ if (ret != _SUCCESS)
+ rtw_do_join_adhoc(adapter);
} else {
- int ret;
- set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
pmlmepriv->to_join = false;
ret = rtw_select_and_join_from_scanned_queue23a(
pmlmepriv);
- if (ret == _SUCCESS) {
- unsigned long e;
- e = msecs_to_jiffies(MAX_JOIN_TIMEOUT);
- mod_timer(&pmlmepriv->assoc_timer, jiffies + e);
- } else if (ret == 2) {/* there is no need to wait */
- _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
- rtw_indicate_connect23a(adapter);
- } else {
+ if (ret != _SUCCESS) {
DBG_8723A("try_to_join, but select scanning "
"queue fail, to_roaming:%d\n",
adapter->mlmepriv.to_roaming);
phead = get_list_head(scan_queue);
list_for_each_safe(plist, ptemp, phead) {
- list_del_init(plist);
pnetwork = container_of(plist, struct wlan_network, list);
- kfree(pnetwork);
+ pnetwork->fixed = false;
+ _rtw_free_network23a(pmlmepriv, pnetwork);
}
spin_unlock_bh(&scan_queue->lock);
*/
void rtw_indicate_disconnect23a(struct rtw_adapter *padapter)
{
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
("+rtw_indicate_disconnect23a\n"));
memcpy(&cur_network->network.IEs[0], &ptarget_wlan->network.IEs[0],
MAX_IE_SZ);
+ cur_network->network.capability = ptarget_wlan->network.capability;
+ cur_network->network.beacon_interval =
+ ptarget_wlan->network.beacon_interval;
+ cur_network->network.tsf = ptarget_wlan->network.tsf;
cur_network->aid = pnetwork->join_res;
rtw_set_signal_stat_timer(&padapter->recvpriv);
("joinbss event call back received with res=%d\n",
pnetwork->join_res));
- rtw_get_encrypt_decrypt_from_registrypriv23a(adapter);
-
if (pmlmepriv->assoc_ssid.ssid_len == 0) {
RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,
("@@@@@ joinbss event call back for Any SSid\n"));
struct sta_info *psta;
struct wlan_network* pwlan;
struct wlan_bssid_ex *pdev_network;
- u8 *pibss;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct stadel_event *pstadel = (struct stadel_event *)pbuf;
struct sta_priv *pstapriv = &adapter->stapriv;
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
/* re-create ibss */
pdev_network = &adapter->registrypriv.dev_network;
- pibss = adapter->registrypriv.dev_network.MacAddress;
memcpy(pdev_network, &tgt_network->network,
get_wlan_bssid_ex_sz(&tgt_network->network));
- memset(&pdev_network->Ssid, 0,
- sizeof(struct cfg80211_ssid));
- memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid,
- sizeof(struct cfg80211_ssid));
-
- rtw_update_registrypriv_dev_network23a(adapter);
-
- rtw_generate_random_ibss23a(pibss);
-
- if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
- set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
- _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE);
- }
-
- if (rtw_createbss_cmd23a(adapter) != _SUCCESS) {
- RT_TRACE(_module_rtl871x_ioctl_set_c_,
- _drv_err_,
- ("***Error =>stadel_event_callback: "
- "rtw_createbss_cmd23a status "
- "FAIL***\n"));
- }
+ rtw_do_join_adhoc(adapter);
}
}
void rtw23a_join_to_handler (unsigned long data)
{
struct rtw_adapter *adapter = (struct rtw_adapter *)data;
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
int do_join_r;
DBG_8723A("%s, fw_state=%x\n", __func__, get_fwstate(pmlmepriv));
- if (adapter->bDriverStopped ||adapter->bSurpriseRemoved)
+ if (adapter->bDriverStopped || adapter->bSurpriseRemoved)
return;
spin_lock_bh(&pmlmepriv->lock);
if (adapter->mlmepriv.to_roaming != 0) {
/* try another */
DBG_8723A("%s try another roaming\n", __func__);
- do_join_r = rtw_do_join23a(adapter);
+ do_join_r = rtw_do_join(adapter);
if (do_join_r != _SUCCESS) {
DBG_8723A("%s roaming do_join return "
"%d\n", __func__ , do_join_r);
void rtw_scan_timeout_handler23a(unsigned long data)
{
struct rtw_adapter *adapter = (struct rtw_adapter *)data;
- struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
DBG_8723A("%s(%s): fw_state =%x\n", __func__, adapter->pnetdev->name,
get_fwstate(pmlmepriv));
rtw_cfg80211_indicate_scan_done(wdev_to_priv(adapter->rtw_wdev), true);
}
-static void rtw_auto_scan_handler(struct rtw_adapter *padapter)
-{
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
- /* auto site survey per 60sec */
- if (pmlmepriv->scan_interval > 0) {
- pmlmepriv->scan_interval--;
- if (pmlmepriv->scan_interval == 0) {
- DBG_8723A("%s\n", __func__);
- rtw_set_802_11_bssid23a_list_scan(padapter, NULL, 0);
- /* 30*2 sec = 60sec */
- pmlmepriv->scan_interval = SCAN_INTERVAL;
- }
- }
-}
-
void rtw_dynamic_check_timer_handler(unsigned long data)
{
struct rtw_adapter *adapter = (struct rtw_adapter *)data;
- struct registry_priv *pregistrypriv = &adapter->registrypriv;
if (adapter->hw_init_completed == false)
goto out;
rtw_dynamic_chk_wk_cmd23a(adapter);
- if (pregistrypriv->wifi_spec == 1) {
- /* auto site survey */
- rtw_auto_scan_handler(adapter);
- }
out:
mod_timer(&adapter->mlmepriv.dynamic_chk_timer,
jiffies + msecs_to_jiffies(2000));
*/
-int rtw_select_and_join_from_scanned_queue23a(struct mlme_priv *pmlmepriv)
+static int rtw_do_join(struct rtw_adapter *padapter)
{
+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int ret;
- struct list_head *phead, *plist, *ptmp;
- struct rtw_adapter *adapter;
+
+ pmlmepriv->cur_network.join_res = -2;
+
+ set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
+
+ pmlmepriv->to_join = true;
+
+ ret = rtw_select_and_join_from_scanned_queue23a(pmlmepriv);
+ if (ret == _SUCCESS) {
+ pmlmepriv->to_join = false;
+ } else {
+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
+ /* switch to ADHOC_MASTER */
+ ret = rtw_do_join_adhoc(padapter);
+ if (ret != _SUCCESS)
+ goto exit;
+ } else {
+ /* can't associate ; reset under-linking */
+ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+
+ ret = _FAIL;
+ pmlmepriv->to_join = false;
+ }
+ }
+
+exit:
+ return ret;
+}
+
+static struct wlan_network *
+rtw_select_candidate_from_queue(struct mlme_priv *pmlmepriv)
+{
+ struct wlan_network *pnetwork, *candidate = NULL;
struct rtw_queue *queue = &pmlmepriv->scanned_queue;
- struct wlan_network *pnetwork;
- struct wlan_network *candidate = NULL;
+ struct list_head *phead, *plist, *ptmp;
spin_lock_bh(&pmlmepriv->scanned_queue.lock);
phead = get_list_head(queue);
- adapter = pmlmepriv->nic_hdl;
list_for_each_safe(plist, ptmp, phead) {
pnetwork = container_of(plist, struct wlan_network, list);
if (!pnetwork) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
- ("%s return _FAIL:(pnetwork == NULL)\n",
+ ("%s: return _FAIL:(pnetwork == NULL)\n",
__func__));
- ret = _FAIL;
goto exit;
}
rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork);
}
+exit:
+ spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
+ return candidate;
+}
+
+
+int rtw_do_join_adhoc(struct rtw_adapter *adapter)
+{
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct wlan_bssid_ex *pdev_network;
+ u8 *ibss;
+ int ret;
+
+ pdev_network = &adapter->registrypriv.dev_network;
+ ibss = adapter->registrypriv.dev_network.MacAddress;
+
+ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
+
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
+ ("switching to adhoc master\n"));
+
+ memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid,
+ sizeof(struct cfg80211_ssid));
+
+ rtw_update_registrypriv_dev_network23a(adapter);
+ rtw_generate_random_ibss23a(ibss);
+
+ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;
+
+ ret = rtw_createbss_cmd23a(adapter);
+ if (ret != _SUCCESS) {
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
+ ("Error =>rtw_createbss_cmd23a status FAIL\n"));
+ } else {
+ pmlmepriv->to_join = false;
+ }
+
+ return ret;
+}
+
+int rtw_do_join_network(struct rtw_adapter *adapter,
+ struct wlan_network *candidate)
+{
+ int ret;
+
+ /* check for situation of _FW_LINKED */
+ if (check_fwstate(&adapter->mlmepriv, _FW_LINKED)) {
+ DBG_8723A("%s: _FW_LINKED while ask_for_joinbss!\n", __func__);
+
+ rtw_disassoc_cmd23a(adapter, 0, true);
+ rtw_indicate_disconnect23a(adapter);
+ rtw_free_assoc_resources23a(adapter, 0);
+ }
+ set_fwstate(&adapter->mlmepriv, _FW_UNDER_LINKING);
+
+ ret = rtw_joinbss_cmd23a(adapter, candidate);
+
+ if (ret == _SUCCESS)
+ mod_timer(&adapter->mlmepriv.assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
+
+ return ret;
+}
+
+int rtw_select_and_join_from_scanned_queue23a(struct mlme_priv *pmlmepriv)
+{
+ struct rtw_adapter *adapter;
+ struct wlan_network *candidate = NULL;
+ int ret;
+
+ adapter = pmlmepriv->nic_hdl;
+
+ candidate = rtw_select_candidate_from_queue(pmlmepriv);
if (!candidate) {
DBG_8723A("%s: return _FAIL(candidate == NULL)\n", __func__);
ret = _FAIL;
candidate->network.DSConfig);
}
- /* check for situation of _FW_LINKED */
- if (check_fwstate(pmlmepriv, _FW_LINKED)) {
- DBG_8723A("%s: _FW_LINKED while ask_for_joinbss!!!\n",
- __func__);
-
- rtw_disassoc_cmd23a(adapter, 0, true);
- rtw_indicate_disconnect23a(adapter);
- rtw_free_assoc_resources23a(adapter, 0);
- }
- set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
- ret = rtw_joinbss_cmd23a(adapter, candidate);
+ ret = rtw_do_join_network(adapter, candidate);
exit:
- spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
-
return ret;
}
struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
int res = _SUCCESS;
- pcmd = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
+ pcmd = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
if (!pcmd) {
res = _FAIL; /* try again */
goto exit;
authmode = WLAN_EID_VENDOR_SPECIFIC;
if (ndisauthmode == Ndis802_11AuthModeWPA2 ||
ndisauthmode == Ndis802_11AuthModeWPA2PSK)
- authmode = _WPA2_IE_ID_;
+ authmode = WLAN_EID_RSN;
if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) {
memcpy(out_ie + ielength, psecuritypriv->wps_ie,
ielength += psecuritypriv->wps_ie_len;
} else if (authmode == WLAN_EID_VENDOR_SPECIFIC ||
- authmode == _WPA2_IE_ID_) {
+ authmode == WLAN_EID_RSN) {
/* copy RSN or SSN */
memcpy(&out_ie[ielength], &psecuritypriv->supplicant_ie[0],
psecuritypriv->supplicant_ie[1] + 2);
if (iEntry < 0)
return ielength;
else {
- if (authmode == _WPA2_IE_ID_)
+ if (authmode == WLAN_EID_RSN)
ielength = rtw_append_pmkid(adapter, iEntry,
out_ie, ielength);
}
memcpy(&pdev_network->Ssid, &pregistrypriv->ssid,
sizeof(struct cfg80211_ssid));
- pdev_network->BeaconPeriod = 100;
+ pdev_network->beacon_interval = 100;
}
void rtw_update_registrypriv_dev_network23a(struct rtw_adapter* adapter)
/* pdev_network->IELength = cpu_to_le32(sz); */
}
-void rtw_get_encrypt_decrypt_from_registrypriv23a(struct rtw_adapter* adapter)
-{
-
-}
-
/* the fucntion is at passive_level */
void rtw_joinbss_reset23a(struct rtw_adapter *padapter)
{
}
/* the fucntion is >= passive_level */
-unsigned int rtw_restructure_ht_ie23a(struct rtw_adapter *padapter, u8 *in_ie,
- u8 *out_ie, uint in_len, uint *pout_len)
+bool rtw_restructure_ht_ie23a(struct rtw_adapter *padapter, u8 *in_ie,
+ u8 *out_ie, uint in_len, uint *pout_len)
{
u32 out_len;
int max_rx_ampdu_factor;
unsigned char *pframe;
const u8 *p;
struct ieee80211_ht_cap ht_capie;
- unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};
+ u8 WMM_IE[7] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00};
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
if (pmlmepriv->qos_option == 0) {
out_len = *pout_len;
pframe = rtw_set_ie23a(out_ie + out_len,
- WLAN_EID_VENDOR_SPECIFIC,
- _WMM_IE_Length_, WMM_IE, pout_len);
+ WLAN_EID_VENDOR_SPECIFIC,
+ sizeof(WMM_IE), WMM_IE,
+ pout_len);
pmlmepriv->qos_option = 1;
}
p = cfg80211_find_ie(WLAN_EID_HT_OPERATION, in_ie + 12,
in_len -12);
- if (p && (p[1] == sizeof(struct ieee80211_ht_addt_info))) {
+ if (p && (p[1] == sizeof(struct ieee80211_ht_operation))) {
out_len = *pout_len;
pframe = rtw_set_ie23a(out_ie + out_len,
WLAN_EID_HT_OPERATION,
u8 max_ampdu_sz;
const u8 *p;
struct ieee80211_ht_cap *pht_capie;
- struct ieee80211_ht_addt_info *pht_addtinfo;
+ struct ieee80211_ht_operation *pht_addtinfo;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
struct registry_priv *pregistrypriv = &padapter->registrypriv;
ie_len -= bcn_fixed_size;
/* maybe needs check if ap supports rx ampdu. */
- if (phtpriv->ampdu_enable == false &&
- pregistrypriv->ampdu_enable == 1) {
+ if (!phtpriv->ampdu_enable && pregistrypriv->ampdu_enable == 1) {
if (pregistrypriv->wifi_spec == 1)
phtpriv->ampdu_enable = false;
else
p = cfg80211_find_ie(WLAN_EID_HT_OPERATION, pie, ie_len);
if (p && p[1] > 0) {
- pht_addtinfo = (struct ieee80211_ht_addt_info *)(p + 2);
+ pht_addtinfo = (struct ieee80211_ht_operation *)(p + 2);
/* todo: */
}
/* update cur_bwmode & cur_ch_offset */
if (pregistrypriv->cbw40_enable &&
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1) &&
- pmlmeinfo->HT_info.infos[0] & BIT(2)) {
+ pmlmeinfo->ht_cap.cap_info &
+ cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH_20_40) &&
+ pmlmeinfo->HT_info.ht_param & IEEE80211_HT_PARAM_CHAN_WIDTH_ANY) {
int i;
u8 rf_type;
rf_type = rtl8723a_get_rf_type(padapter);
/* update the MCS rates */
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < IEEE80211_HT_MCS_MASK_LEN; i++) {
if (rf_type == RF_1T1R || rf_type == RF_1T2R)
- pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R23A[i];
+ pmlmeinfo->ht_cap.mcs.rx_mask[i] &=
+ MCS_rate_1R23A[i];
else
- pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R23A[i];
+ pmlmeinfo->ht_cap.mcs.rx_mask[i] &=
+ MCS_rate_2R23A[i];
}
/* switch to the 40M Hz mode accoring to the AP */
pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
- switch ((pmlmeinfo->HT_info.infos[0] & 0x3))
- {
- case HT_EXTCHNL_OFFSET_UPPER:
+ switch (pmlmeinfo->HT_info.ht_param &
+ IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
break;
- case HT_EXTCHNL_OFFSET_LOWER:
+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
break;
/* */
/* Config SM Power Save setting */
/* */
- pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info &
- 0x0C) >> 2;
+ pmlmeinfo->SM_PS =
+ (le16_to_cpu(pmlmeinfo->ht_cap.cap_info) &
+ IEEE80211_HT_CAP_SM_PS) >> IEEE80211_HT_CAP_SM_PS_SHIFT;
if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
DBG_8723A("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __func__);
/* */
/* Config current HT Protection mode. */
/* */
- pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3;
+ pmlmeinfo->HT_protection =
+ le16_to_cpu(pmlmeinfo->HT_info.operation_mode) &
+ IEEE80211_HT_OP_MODE_PROTECTION;
}
void rtw_issue_addbareq_cmd23a(struct rtw_adapter *padapter,
phtpriv = &psta->htpriv;
- if (phtpriv->ht_option == true && phtpriv->ampdu_enable == true) {
+ if (phtpriv->ht_option && phtpriv->ampdu_enable) {
issued = (phtpriv->agg_enable_bitmap>>priority)&0x1;
issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1;
static void start_clnt_auth(struct rtw_adapter *padapter);
static void start_clnt_join(struct rtw_adapter *padapter);
static void start_create_ibss(struct rtw_adapter *padapter);
+static struct wlan_bssid_ex *collect_bss_info(struct rtw_adapter *padapter,
+ struct recv_frame *precv_frame);
#ifdef CONFIG_8723AU_AP_MODE
static int OnAuth23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame);
OUI definitions for the vendor specific IE
***************************************************/
unsigned char WMM_OUI23A[] = {0x00, 0x50, 0xf2, 0x02};
-unsigned char WPS_OUI23A[] = {0x00, 0x50, 0xf2, 0x04};
-unsigned char P2P_OUI23A[] = {0x50, 0x6F, 0x9A, 0x09};
-unsigned char WFD_OUI23A[] = {0x50, 0x6F, 0x9A, 0x0A};
+unsigned char WPS_OUI23A[] = {0x00, 0x50, 0xf2, 0x04};
+unsigned char P2P_OUI23A[] = {0x50, 0x6F, 0x9A, 0x09};
+unsigned char WFD_OUI23A[] = {0x50, 0x6F, 0x9A, 0x0A};
-unsigned char WMM_INFO_OUI23A[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01};
-unsigned char WMM_PARA_OUI23A[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
+unsigned char WMM_INFO_OUI23A[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01};
+unsigned char WMM_PARA_OUI23A[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
static unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20};
MCS rate definitions
*********************************************************/
unsigned char MCS_rate_2R23A[16] = {
- 0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+ 0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
unsigned char MCS_rate_1R23A[16] = {
- 0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
+ 0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
/********************************************************
ChannelPlan definitions
*********************************************************/
-static struct rt_channel_plan_2g RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = {
- {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, /* 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 */
- {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, /* 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 */
- {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11}, /* 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 */
- {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, /* 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 */
- {{10, 11, 12, 13}, 4}, /* 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 */
- {{}, 0}, /* 0x05, RT_CHANNEL_DOMAIN_2G_NULL */
+static struct rt_channel_plan_2g RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = {
+ /* 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 */
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
+ /* 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 */
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
+ /* 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 */
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},
+ /* 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 */
+ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
+ /* 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 */
+ {{10, 11, 12, 13}, 4},
+ /* 0x05, RT_CHANNEL_DOMAIN_2G_NULL */
+ {{}, 0},
};
-static struct rt_channel_plan_5g RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = {
- {{}, 0}, /* 0x00, RT_CHANNEL_DOMAIN_5G_NULL */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19}, /* 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24}, /* 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22}, /* 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24}, /* 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 */
- {{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9}, /* 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13}, /* 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12}, /* 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 */
- {{149, 153, 157, 161, 165}, 5}, /* 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 */
- {{36, 40, 44, 48, 52, 56, 60, 64}, 8}, /* 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20}, /* 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20}, /* 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19}, /* 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 */
- {{36, 40, 44, 48, 52, 56, 60, 64}, 8}, /* 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 */
- {{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11}, /* 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 */
- {{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 15}, /* 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 */
- {{56, 60, 64, 149, 153, 157, 161, 165}, 8}, /* 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 */
-
- /* Driver self defined for old channel plan Compatible , Remember to modify if have new channel plan definition ===== */
- {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21}, /* 0x11, RT_CHANNEL_DOMAIN_5G_FCC */
- {{36, 40, 44, 48}, 4}, /* 0x12, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS */
- {{36, 40, 44, 48, 149, 153, 157, 161}, 8}, /* 0x13, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS */
+static struct rt_channel_plan_5g RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = {
+ /* 0x00, RT_CHANNEL_DOMAIN_5G_NULL */
+ {{}, 0},
+ /* 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 128, 132, 136, 140}, 19},
+ /* 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24},
+ /* 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22},
+ /* 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24},
+ /* 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 */
+ {{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9},
+ /* 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13},
+ /* 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12},
+ /* 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 */
+ {{149, 153, 157, 161, 165}, 5},
+ /* 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 */
+ {{36, 40, 44, 48, 52, 56, 60, 64}, 8},
+ /* 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 136, 140, 149, 153, 157, 161, 165}, 20},
+ /* 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 149, 153, 157, 161, 165}, 20},
+ /* 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 120, 124, 128, 132, 136, 140}, 19},
+ /* 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 */
+ {{36, 40, 44, 48, 52, 56, 60, 64}, 8},
+ /* 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 */
+ {{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11},
+ /* 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 */
+ {{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149,
+ 153, 157, 161, 165}, 15},
+ /* 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 */
+ {{56, 60, 64, 149, 153, 157, 161, 165}, 8},
+
+ /* Driver self defined for old channel plan Compatible,
+ Remember to modify if have new channel plan definition ===== */
+ /* 0x11, RT_CHANNEL_DOMAIN_5G_FCC */
+ {{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112,
+ 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21},
+ /* 0x12, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS */
+ {{36, 40, 44, 48}, 4},
+ /* 0x13, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS */
+ {{36, 40, 44, 48, 149, 153, 157, 161}, 8},
};
-static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
+static struct rt_channel_plan_map RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
/* 0x00 ~ 0x1F , Old Define ===== */
{0x02, 0x11}, /* 0x00, RT_CHANNEL_DOMAIN_FCC */
{0x02, 0x0A}, /* 0x01, RT_CHANNEL_DOMAIN_IC */
{0x03, 0x00}, /* 0x41, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G */
};
-static struct rt_channel_plan_map RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x03, 0x02}; /* use the conbination for max channel numbers */
+static struct rt_channel_plan_map RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE =
+{0x03, 0x02}; /* use the conbination for max channel numbers */
static void dummy_event_callback(struct rtw_adapter *adapter, const u8 *pbuf)
{
{0, NULL},
{0, NULL},
{0, &rtw_survey_event_cb23a}, /*8*/
- {sizeof (struct surveydone_event), &rtw_surveydone_event_callback23a}, /*9*/
-
+ {sizeof (struct surveydone_event), &rtw_surveydone_event_callback23a},
{0, &rtw23a_joinbss_event_cb}, /*10*/
{sizeof(struct stassoc_event), &rtw_stassoc_event_callback23a},
{sizeof(struct stadel_event), &rtw_stadel_event_callback23a},
int init_hw_mlme_ext23a(struct rtw_adapter *padapter)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
set_channel_bwmode23a(padapter, pmlmeext->cur_channel,
pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
static void init_mlme_ext_priv23a_value(struct rtw_adapter* padapter)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
unsigned char mixed_datarate[NumRates] = {
_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,
static void init_channel_list(struct rtw_adapter *padapter,
struct rt_channel_info *channel_set,
u8 chanset_size,
- struct p2p_channels *channel_list) {
-
+ struct p2p_channels *channel_list)
+{
struct p2p_oper_class_map op_class[] = {
{ IEEE80211G, 81, 1, 13, 1, BW20 },
{ IEEE80211G, 82, 14, 14, 1, BW20 },
int init_mlme_ext_priv23a(struct rtw_adapter* padapter)
{
- int res = _SUCCESS;
+ int res = _SUCCESS;
struct registry_priv* pregistrypriv = &padapter->registrypriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sk_buff *skb = precv_frame->pkt;
struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *) skb->data;
- u8 *pframe = skb->data;
int pkt_len = skb->len;
struct wlan_bssid_ex *pbss;
int ret = _SUCCESS;
if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) {
/* we should update current network before auth,
or some IE is wrong */
- pbss = (struct wlan_bssid_ex *)
- kmalloc(sizeof(struct wlan_bssid_ex), GFP_ATOMIC);
+ pbss = collect_bss_info(padapter, precv_frame);
if (pbss) {
- if (collect_bss_info23a(padapter, precv_frame, pbss) ==
- _SUCCESS) {
- update_network23a(
- &pmlmepriv->cur_network.network, pbss,
- padapter, true);
- rtw_get_bcn_info23a(&pmlmepriv->cur_network);
- }
+ update_network23a(&pmlmepriv->cur_network.network, pbss,
+ padapter, true);
+ rtw_get_bcn_info23a(&pmlmepriv->cur_network);
kfree(pbss);
}
psta = rtw_get_stainfo23a(pstapriv, mgmt->sa);
if (psta) {
ret = rtw_check_bcn_info23a(padapter, mgmt, pkt_len);
- if (!ret) {
+ if (ret != _SUCCESS) {
DBG_8723A_LEVEL(_drv_always_, "ap has changed, "
"disconnect now\n");
receive_disconnect23a(padapter, pmlmeinfo->network.MacAddress, 65535);
the number of the beacon received */
if ((sta_rx_pkts(psta) & 0xf) == 0) {
/* DBG_8723A("update_bcn_info\n"); */
- update_beacon23a_info(padapter, pframe,
+ update_beacon23a_info(padapter, mgmt,
pkt_len, psta);
}
}
number of the beacon received */
if ((sta_rx_pkts(psta) & 0xf) == 0) {
/* DBG_8723A("update_bcn_info\n"); */
- update_beacon23a_info(padapter, pframe,
+ update_beacon23a_info(padapter, mgmt,
pkt_len, psta);
}
} else {
pstat = &stat;
memset((char *)pstat, '\0', sizeof(stat));
pstat->auth_seq = 2;
- memcpy(pstat->hwaddr, sa, 6);
+ ether_addr_copy(pstat->hwaddr, sa);
issue_auth(padapter, pstat, (unsigned short)status);
"Association Request - possible WPS use\n");
pstat->flags |= WLAN_STA_MAYBE_WPS;
}
-
- /* AP support WPA/RSN, and sta is going to do WPS, but AP
- is not ready */
- /* that the selected registrar of AP is _FLASE */
- if (psecuritypriv->wpa_psk > 0 &&
- pstat->flags & (WLAN_STA_WPS|WLAN_STA_MAYBE_WPS)) {
- if (pmlmepriv->wps_beacon_ie) {
- u8 selected_registrar = 0;
-
- rtw_get_wps_attr_content23a(
- pmlmepriv->wps_beacon_ie,
- pmlmepriv->wps_beacon_ie_len,
- WPS_ATTR_SELECTED_REGISTRAR,
- &selected_registrar, NULL);
-
- if (!selected_registrar) {
- DBG_8723A("selected_registrar is false,"
- "or AP is not ready to do "
- "WPS\n");
-
- status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA;
- goto OnAssocReq23aFail;
- }
- }
- }
} else {
int copy_len;
} else
pstat->flags &= ~WLAN_STA_HT;
- if (pmlmepriv->htpriv.ht_option == false && pstat->flags & WLAN_STA_HT){
+ if (!pmlmepriv->htpriv.ht_option && pstat->flags & WLAN_STA_HT){
status = WLAN_STATUS_UNSPECIFIED_FAILURE;
goto OnAssocReq23aFail;
}
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct sk_buff *skb = precv_frame->pkt;
struct ieee80211_mgmt *pmgmt = (struct ieee80211_mgmt *) skb->data;
- int res, i;
+ int res;
unsigned short status;
- u8 *p;
+ const u8 *p, *pie;
u8 *pframe = skb->data;
int pkt_len = skb->len;
+ int pielen;
DBG_8723A("%s\n", __func__);
/* AID */
res = pmlmeinfo->aid = le16_to_cpu(pmgmt->u.assoc_resp.aid) & 0x3fff;
- /* following are moved to join event callback function */
- /* to handle HT, WMM, rate adaptive, update MAC reg */
- /* for not to handle the synchronous IO in the tasklet */
- for (i = offsetof(struct ieee80211_mgmt, u.assoc_resp.variable);
- i < pkt_len;) {
- p = pframe + i;
-
- switch (p[0])
- {
- case WLAN_EID_VENDOR_SPECIFIC:
- if (!memcmp(p + 2, WMM_PARA_OUI23A, 6))/* WMM */
- WMM_param_handler23a(padapter, p);
- break;
-
- case WLAN_EID_HT_CAPABILITY: /* HT caps */
- HT_caps_handler23a(padapter, p);
- break;
-
- case WLAN_EID_HT_OPERATION: /* HT info */
- HT_info_handler23a(padapter, p);
+ pie = pframe + offsetof(struct ieee80211_mgmt, u.assoc_resp.variable);
+ pielen = pkt_len -
+ offsetof(struct ieee80211_mgmt, u.assoc_resp.variable);
+
+ p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY,
+ pmgmt->u.assoc_resp.variable, pielen);
+ if (p && p[1])
+ HT_caps_handler23a(padapter, p);
+
+ p = cfg80211_find_ie(WLAN_EID_HT_OPERATION,
+ pmgmt->u.assoc_resp.variable, pielen);
+ if (p && p[1])
+ HT_info_handler23a(padapter, p);
+
+ p = cfg80211_find_ie(WLAN_EID_ERP_INFO,
+ pmgmt->u.assoc_resp.variable, pielen);
+ if (p && p[1])
+ ERP_IE_handler23a(padapter, p);
+
+ pie = pframe + offsetof(struct ieee80211_mgmt, u.assoc_resp.variable);
+ while (true) {
+ p = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WMM,
+ pie, pframe + pkt_len - pie);
+ if (!p)
break;
- case WLAN_EID_ERP_INFO:
- ERP_IE_handler23a(padapter, p);
-
- default:
+ pie = p + p[1] + 2;
+ /* if this IE is too short, try the next */
+ if (p[1] <= 4)
+ continue;
+ /* if this IE is WMM params, we found what we wanted */
+ if (p[6] == 1)
break;
- }
-
- i += (p[1] + 2);
}
+ if (p && p[1])
+ WMM_param_handler23a(padapter, p);
+
pmlmeinfo->state &= ~WIFI_FW_ASSOC_STATE;
pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
static int
OnDisassoc23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame)
{
- unsigned short reason;
+ unsigned short reason;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
return _SUCCESS;
}
-static int rtw_action_public_decache(struct recv_frame *recv_frame, s32 token)
-{
- struct rtw_adapter *adapter = recv_frame->adapter;
- struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
- struct sk_buff *skb = recv_frame->pkt;
- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
- u16 seq_ctrl;
-
- seq_ctrl = ((recv_frame->attrib.seq_num&0xffff) << 4) |
- (recv_frame->attrib.frag_num & 0xf);
-
- if (ieee80211_has_retry(hdr->frame_control)) {
- if (token >= 0) {
- if ((seq_ctrl == mlmeext->action_public_rxseq) &&
- (token == mlmeext->action_public_dialog_token)) {
- DBG_8723A("%s(%s): seq_ctrl = 0x%x, "
- "rxseq = 0x%x, token:%d\n", __func__,
- adapter->pnetdev->name, seq_ctrl,
- mlmeext->action_public_rxseq, token);
- return _FAIL;
- }
- } else {
- if (seq_ctrl == mlmeext->action_public_rxseq) {
- DBG_8723A("%s(%s): seq_ctrl = 0x%x, "
- "rxseq = 0x%x\n", __func__,
- adapter->pnetdev->name, seq_ctrl,
- mlmeext->action_public_rxseq);
- return _FAIL;
- }
- }
- }
-
- mlmeext->action_public_rxseq = seq_ctrl;
-
- if (token >= 0)
- mlmeext->action_public_dialog_token = token;
-
- return _SUCCESS;
-}
-
-static int on_action_public23a_p2p(struct recv_frame *precv_frame)
-{
- struct sk_buff *skb = precv_frame->pkt;
- u8 *pframe = skb->data;
- u8 *frame_body;
- u8 dialogToken = 0;
-
- frame_body = (unsigned char *)
- (pframe + sizeof(struct ieee80211_hdr_3addr));
-
- dialogToken = frame_body[7];
-
- if (rtw_action_public_decache(precv_frame, dialogToken) == _FAIL)
- return _FAIL;
-
- return _SUCCESS;
-}
-
-static int on_action_public23a_vendor(struct recv_frame *precv_frame)
-{
- unsigned int ret = _FAIL;
- struct sk_buff *skb = precv_frame->pkt;
- u8 *pframe = skb->data;
- u8 *frame_body = pframe + sizeof(struct ieee80211_hdr_3addr);
-
- if (!memcmp(frame_body + 2, P2P_OUI23A, 4)) {
- ret = on_action_public23a_p2p(precv_frame);
- }
-
- return ret;
-}
-
-static unsigned int
-on_action_public23a_default(struct recv_frame *precv_frame, u8 action)
-{
- unsigned int ret = _FAIL;
- struct sk_buff *skb = precv_frame->pkt;
- u8 *pframe = skb->data;
- uint frame_len = skb->len;
- u8 *frame_body = pframe + sizeof(struct ieee80211_hdr_3addr);
- u8 token;
- struct rtw_adapter *adapter = precv_frame->adapter;
- int cnt = 0;
- char msg[64];
-
- token = frame_body[2];
-
- if (rtw_action_public_decache(precv_frame, token) == _FAIL)
- goto exit;
-
- cnt += sprintf((msg+cnt), "%s(token:%u)",
- action_public_str23a(action), token);
- rtw_cfg80211_rx_action(adapter, pframe, frame_len, msg);
-
- ret = _SUCCESS;
-
-exit:
- return ret;
-}
-
static int on_action_public23a(struct rtw_adapter *padapter,
struct recv_frame *precv_frame)
{
- int ret = _FAIL;
struct sk_buff *skb = precv_frame->pkt;
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
u8 *pframe = skb->data;
- u8 *frame_body = pframe + sizeof(struct ieee80211_hdr_3addr);
- u8 category, action;
+ int freq, channel;
/* check RA matches or not */
if (!ether_addr_equal(myid(&padapter->eeprompriv), hdr->addr1))
- goto exit;
+ return _FAIL;
- category = frame_body[0];
- if (category != WLAN_CATEGORY_PUBLIC)
- goto exit;
+ channel = rtw_get_oper_ch23a(padapter);
- action = frame_body[1];
- switch (action) {
- case ACT_PUBLIC_VENDOR:
- ret = on_action_public23a_vendor(precv_frame);
- break;
- default:
- ret = on_action_public23a_default(precv_frame, action);
- break;
- }
+ if (channel <= RTW_CH_MAX_2G_CHANNEL)
+ freq = ieee80211_channel_to_frequency(channel,
+ IEEE80211_BAND_2GHZ);
+ else
+ freq = ieee80211_channel_to_frequency(channel,
+ IEEE80211_BAND_5GHZ);
-exit:
- return ret;
+ if (cfg80211_rx_mgmt(padapter->rtw_wdev, freq, 0, pframe,
+ skb->len, 0, GFP_ATOMIC))
+ return _SUCCESS;
+
+ return _FAIL;
}
static int
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
unsigned int rate_len;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
- u8 *wps_ie;
- u32 wps_ielen;
+ const u8 *wps_ie;
u8 sr = 0;
int len_diff;
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_BEACON);
- pwlanhdr->seq_ctrl = 0;
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_BEACON);
+ mgmt->seq_ctrl = 0;
- ether_addr_copy(pwlanhdr->addr1, bc_addr);
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(cur_network));
+ ether_addr_copy(mgmt->da, bc_addr);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(cur_network));
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+ /* timestamp will be inserted by hardware */
+
+ put_unaligned_le16(cur_network->beacon_interval,
+ &mgmt->u.beacon.beacon_int);
- if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
+ put_unaligned_le16(cur_network->capability,
+ &mgmt->u.beacon.capab_info);
+
+ pframe = mgmt->u.beacon.variable;
+ pattrib->pktlen = offsetof(struct ieee80211_mgmt, u.beacon.variable);
+
+ if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+ u8 *iebuf;
+ int buflen;
/* DBG_8723A("ie len =%d\n", cur_network->IELength); */
memcpy(pframe, cur_network->IEs, cur_network->IELength);
len_diff = update_hidden_ssid(pframe + _BEACON_IE_OFFSET_,
pframe += (cur_network->IELength+len_diff);
pattrib->pktlen += (cur_network->IELength+len_diff);
- wps_ie = rtw_get_wps_ie23a(pmgntframe->buf_addr + TXDESC_OFFSET+
- sizeof (struct ieee80211_hdr_3addr) +
- _BEACON_IE_OFFSET_, pattrib->pktlen -
- sizeof (struct ieee80211_hdr_3addr) -
- _BEACON_IE_OFFSET_, NULL,
- &wps_ielen);
- if (wps_ie && wps_ielen > 0) {
- rtw_get_wps_attr_content23a(wps_ie, wps_ielen,
+ iebuf = pmgntframe->buf_addr + TXDESC_OFFSET +
+ sizeof (struct ieee80211_hdr_3addr) +
+ _BEACON_IE_OFFSET_;
+ buflen = pattrib->pktlen - sizeof (struct ieee80211_hdr_3addr) -
+ _BEACON_IE_OFFSET_;
+ wps_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ iebuf, buflen);
+
+ if (wps_ie && wps_ie[1] > 0) {
+ rtw_get_wps_attr_content23a(wps_ie, wps_ie[1],
WPS_ATTR_SELECTED_REGISTRAR,
(u8*)&sr, NULL);
}
goto _issue_bcn;
}
- /* below for ad-hoc mode */
-
- /* timestamp will be inserted by hardware */
- pframe += 8;
- pattrib->pktlen += 8;
-
- /* beacon interval: 2 bytes */
-
- memcpy(pframe, (unsigned char *)
- rtw_get_beacon_interval23a_from_ie(cur_network->IEs), 2);
-
- pframe += 2;
- pattrib->pktlen += 2;
-
- /* capability info: 2 bytes */
-
- memcpy(pframe, (unsigned char *)
- rtw_get_capability23a_from_ie(cur_network->IEs), 2);
-
- pframe += 2;
- pattrib->pktlen += 2;
-
/* SSID */
pframe = rtw_set_ie23a(pframe, WLAN_EID_SSID,
cur_network->Ssid.ssid_len,
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
unsigned char *mac, *bssid;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
#ifdef CONFIG_8723AU_AP_MODE
- u8 *pwps_ie;
- uint wps_ielen;
+ const u8 *pwps_ie;
u8 *ssid_ie;
int ssid_ielen;
int ssid_ielen_diff;
u8 buf[MAX_IE_SZ];
- u8 *ies;
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#endif
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* DBG_8723A("%s\n", __func__); */
+ if (cur_network->IELength > MAX_IE_SZ)
+ return;
+
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
if (!pmgntframe) {
DBG_8723A("%s, alloc mgnt frame fail\n", __func__);
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)pmgntframe->buf_addr + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
mac = myid(&padapter->eeprompriv);
bssid = cur_network->MacAddress;
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_PROBE_RESP);
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_RESP);
- ether_addr_copy(pwlanhdr->addr1, da);
- ether_addr_copy(pwlanhdr->addr2, mac);
- ether_addr_copy(pwlanhdr->addr3, bssid);
+ ether_addr_copy(mgmt->da, da);
+ ether_addr_copy(mgmt->sa, mac);
+ ether_addr_copy(mgmt->bssid, bssid);
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = pattrib->hdrlen;
- pframe += pattrib->hdrlen;
- if (cur_network->IELength > MAX_IE_SZ)
- return;
+ /* timestamp will be inserted by hardware */
+ put_unaligned_le16(cur_network->beacon_interval,
+ &mgmt->u.probe_resp.beacon_int);
+
+ put_unaligned_le16(cur_network->capability,
+ &mgmt->u.probe_resp.capab_info);
+
+ pframe = mgmt->u.probe_resp.variable;
+ pattrib->pktlen =
+ offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
+
+ /* below for ad-hoc mode */
#ifdef CONFIG_8723AU_AP_MODE
if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
- pwps_ie = rtw_get_wps_ie23a(cur_network->IEs +
- _FIXED_IE_LENGTH_,
- cur_network->IELength -
- _FIXED_IE_LENGTH_, NULL,
- &wps_ielen);
-
- /* inerset & update wps_probe_resp_ie */
- if (pmlmepriv->wps_probe_resp_ie && pwps_ie && wps_ielen > 0) {
- uint wps_offset, remainder_ielen;
- u8 *premainder_ie;
-
- wps_offset = (uint)(pwps_ie - cur_network->IEs);
-
- premainder_ie = pwps_ie + wps_ielen;
-
- remainder_ielen = cur_network->IELength - wps_offset -
- wps_ielen;
-
- memcpy(pframe, cur_network->IEs, wps_offset);
- pframe += wps_offset;
- pattrib->pktlen += wps_offset;
-
- /* to get ie data len */
- wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];
- if (wps_offset + wps_ielen + 2 <= MAX_IE_SZ) {
- memcpy(pframe, pmlmepriv->wps_probe_resp_ie,
- wps_ielen+2);
- pframe += wps_ielen+2;
- pattrib->pktlen += wps_ielen+2;
- }
-
- if (wps_offset + wps_ielen + 2 + remainder_ielen <=
- MAX_IE_SZ) {
- memcpy(pframe, premainder_ie, remainder_ielen);
- pframe += remainder_ielen;
- pattrib->pktlen += remainder_ielen;
- }
- } else {
- memcpy(pframe, cur_network->IEs, cur_network->IELength);
- pframe += cur_network->IELength;
- pattrib->pktlen += cur_network->IELength;
- }
+ pwps_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ cur_network->IEs +
+ _FIXED_IE_LENGTH_,
+ cur_network->IELength -
+ _FIXED_IE_LENGTH_);
+
+ memcpy(pframe, cur_network->IEs + _FIXED_IE_LENGTH_,
+ cur_network->IELength - _FIXED_IE_LENGTH_);
+ pframe += cur_network->IELength;
+ pattrib->pktlen += cur_network->IELength;
/* retrieve SSID IE from cur_network->Ssid */
- ies = pmgntframe->buf_addr + TXDESC_OFFSET +
- sizeof(struct ieee80211_hdr_3addr);
- ssid_ie = rtw_get_ie23a(ies + _FIXED_IE_LENGTH_, WLAN_EID_SSID,
- &ssid_ielen,
- pframe - ies - _FIXED_IE_LENGTH_);
+ ssid_ie = rtw_get_ie23a(mgmt->u.probe_resp.variable,
+ WLAN_EID_SSID, &ssid_ielen,
+ pframe - mgmt->u.probe_resp.variable);
ssid_ielen_diff = cur_network->Ssid.ssid_len - ssid_ielen;
} else
#endif
{
-
- /* timestamp will be inserted by hardware */
- pframe += 8;
- pattrib->pktlen += 8;
-
- /* beacon interval: 2 bytes */
-
- memcpy(pframe, (unsigned char *)
- rtw_get_beacon_interval23a_from_ie(cur_network->IEs), 2);
-
- pframe += 2;
- pattrib->pktlen += 2;
-
- /* capability info: 2 bytes */
-
- memcpy(pframe, (unsigned char *)
- rtw_get_capability23a_from_ie(cur_network->IEs), 2);
-
- pframe += 2;
- pattrib->pktlen += 2;
-
- /* below for ad-hoc mode */
-
/* SSID */
pframe = rtw_set_ie23a(pframe, WLAN_EID_SSID,
cur_network->Ssid.ssid_len,
struct cfg80211_ssid *pssid, u8 *da, int wait_ack)
{
int ret = _FAIL;
- struct xmit_frame *pmgntframe;
- struct pkt_attrib *pattrib;
- unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
- unsigned char *mac;
- unsigned char bssrate[NumRates];
+ struct xmit_frame *pmgntframe;
+ struct pkt_attrib *pattrib;
+ unsigned char *pframe;
+ struct ieee80211_hdr *pwlanhdr;
+ unsigned char *mac;
+ unsigned char bssrate[NumRates];
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- int bssrate_len = 0;
- u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+ int bssrate_len = 0;
+ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_,
("+%s\n", __func__));
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
unsigned int val32;
- unsigned short val16;
+ u16 auth_algo;
int use_shared_key = 0;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_AUTH);
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+ pattrib->pktlen = offsetof(struct ieee80211_mgmt, u.auth.variable);
if (psta) { /* for AP mode */
#ifdef CONFIG_8723AU_AP_MODE
-
- ether_addr_copy(pwlanhdr->addr1, psta->hwaddr);
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, myid(&padapter->eeprompriv));
+ unsigned short val16;
+ ether_addr_copy(mgmt->da, psta->hwaddr);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, myid(&padapter->eeprompriv));
/* setting auth algo number */
val16 = (u16)psta->authalg;
if (status != WLAN_STATUS_SUCCESS)
val16 = 0;
- if (val16) {
- val16 = cpu_to_le16(val16);
+ if (val16)
use_shared_key = 1;
- }
- pframe = rtw_set_fixed_ie23a(pframe, _AUTH_ALGM_NUM_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ mgmt->u.auth.auth_alg = cpu_to_le16(val16);
/* setting auth seq number */
- val16 = (u16)psta->auth_seq;
- val16 = cpu_to_le16(val16);
- pframe = rtw_set_fixed_ie23a(pframe, _AUTH_SEQ_NUM_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ mgmt->u.auth.auth_transaction =
+ cpu_to_le16((u16)psta->auth_seq);
/* setting status code... */
- val16 = status;
- val16 = cpu_to_le16(val16);
- pframe = rtw_set_fixed_ie23a(pframe, _STATUS_CODE_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ mgmt->u.auth.status_code = cpu_to_le16(status);
+ pframe = mgmt->u.auth.variable;
/* added challenging text... */
if ((psta->auth_seq == 2) &&
(psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1))
psta->chg_txt, &pattrib->pktlen);
#endif
} else {
- ether_addr_copy(pwlanhdr->addr1,
- get_my_bssid23a(&pmlmeinfo->network));
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3,
+ struct ieee80211_mgmt *iv_mgmt;
+
+ ether_addr_copy(mgmt->da, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid,
get_my_bssid23a(&pmlmeinfo->network));
/* setting auth algo number */
/* 0:OPEN System, 1:Shared key */
- val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)? 1: 0;
- if (val16) {
- val16 = cpu_to_le16(val16);
+ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) {
use_shared_key = 1;
- }
+ auth_algo = WLAN_AUTH_SHARED_KEY;
+ } else
+ auth_algo = WLAN_AUTH_OPEN;
+
/* DBG_8723A("%s auth_algo = %s auth_seq =%d\n", __func__,
(pmlmeinfo->auth_algo == 0)?"OPEN":"SHARED",
pmlmeinfo->auth_seq); */
if ((pmlmeinfo->auth_seq == 3) &&
(pmlmeinfo->state & WIFI_FW_AUTH_STATE) &&
(use_shared_key == 1)) {
+ u32 *piv = (u32 *)&mgmt->u.auth;
+
+ iv_mgmt = (struct ieee80211_mgmt *)(pframe + 4);
/* DBG_8723A("==> iv(%d), key_index(%d)\n",
pmlmeinfo->iv, pmlmeinfo->key_index); */
- val32 = ((pmlmeinfo->iv++) |
- (pmlmeinfo->key_index << 30));
- val32 = cpu_to_le32(val32);
- pframe = rtw_set_fixed_ie23a(pframe, 4,
- (unsigned char *)&val32,
- &pattrib->pktlen);
+ val32 = (pmlmeinfo->iv & 0x3fffffff) |
+ (pmlmeinfo->key_index << 30);
+ pmlmeinfo->iv++;
+ put_unaligned_le32(val32, piv);
+
+ pattrib->pktlen += 4;
pattrib->iv_len = IEEE80211_WEP_IV_LEN;
- }
+ } else
+ iv_mgmt = mgmt;
- pframe = rtw_set_fixed_ie23a(pframe, _AUTH_ALGM_NUM_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ iv_mgmt->u.auth.auth_alg = cpu_to_le16(auth_algo);
/* setting auth seq number */
- val16 = pmlmeinfo->auth_seq;
- val16 = cpu_to_le16(val16);
- pframe = rtw_set_fixed_ie23a(pframe, _AUTH_SEQ_NUM_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ iv_mgmt->u.auth.auth_transaction =
+ cpu_to_le16(pmlmeinfo->auth_seq);
/* setting status code... */
- val16 = status;
- val16 = cpu_to_le16(val16);
- pframe = rtw_set_fixed_ie23a(pframe, _STATUS_CODE_,
- (unsigned char *)&val16,
- &pattrib->pktlen);
+ iv_mgmt->u.auth.status_code = cpu_to_le16(status);
+
+ pframe = iv_mgmt->u.auth.variable;
/* then checking to see if sending challenging text... */
if ((pmlmeinfo->auth_seq == 3) &&
pmlmeinfo->chg_txt,
&pattrib->pktlen);
- pwlanhdr->frame_control |=
+ mgmt->frame_control |=
cpu_to_le16(IEEE80211_FCTL_PROTECTED);
pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
struct sta_info *pstat, u16 pkt_type)
{
struct xmit_frame *pmgntframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
struct pkt_attrib *pattrib;
unsigned char *pframe;
- unsigned short val;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | pkt_type);
+ mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | pkt_type);
- ether_addr_copy(pwlanhdr->addr1, pstat->hwaddr);
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->da, pstat->hwaddr);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(&pmlmeinfo->network));
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
pattrib->hdrlen = sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen += pattrib->hdrlen;
- pframe += pattrib->hdrlen;
-
- /* capability */
- val = *(unsigned short *)rtw_get_capability23a_from_ie(ie);
+ pattrib->pktlen =
+ offsetof(struct ieee80211_mgmt, u.assoc_resp.variable);
- pframe = rtw_set_fixed_ie23a(pframe, _CAPABILITY_,
- (unsigned char *)&val, &pattrib->pktlen);
+ mgmt->u.assoc_resp.capab_info = cpu_to_le16(pnetwork->capability);
+ mgmt->u.assoc_resp.status_code = cpu_to_le16(status);
+ mgmt->u.assoc_resp.aid = cpu_to_le16(pstat->aid | BIT(14) | BIT(15));
- status = cpu_to_le16(status);
- pframe = rtw_set_fixed_ie23a(pframe, _STATUS_CODE_,
- (unsigned char *)&status,
- &pattrib->pktlen);
-
- val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15));
- pframe = rtw_set_fixed_ie23a(pframe, _ASOC_ID_, (unsigned char *)&val,
- &pattrib->pktlen);
+ pframe = mgmt->u.assoc_resp.variable;
if (pstat->bssratelen <= 8) {
pframe = rtw_set_ie23a(pframe, WLAN_EID_SUPP_RATES,
REALTEK_96B_IE, &pattrib->pktlen);
}
- /* add WPS IE ie for wps 2.0 */
- if (pmlmepriv->wps_assoc_resp_ie &&
- pmlmepriv->wps_assoc_resp_ie_len > 0) {
- memcpy(pframe, pmlmepriv->wps_assoc_resp_ie,
- pmlmepriv->wps_assoc_resp_ie_len);
-
- pframe += pmlmepriv->wps_assoc_resp_ie_len;
- pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len;
- }
-
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe23a(padapter, pmgntframe);
struct pkt_attrib *pattrib;
unsigned char *pframe;
const u8 *p;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
unsigned int i, j, index = 0;
unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates];
struct registry_priv *pregpriv = &padapter->registrypriv;
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)pmgntframe->buf_addr + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ASSOC_REQ);
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ASSOC_REQ);
- ether_addr_copy(pwlanhdr->addr1, get_my_bssid23a(&pmlmeinfo->network));
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->da, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(&pmlmeinfo->network));
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
-
/* caps */
- memcpy(pframe,
- rtw_get_capability23a_from_ie(pmlmeinfo->network.IEs), 2);
-
- pframe += 2;
- pattrib->pktlen += 2;
-
- /* listen interval */
+ put_unaligned_le16(pmlmeinfo->network.capability,
+ &mgmt->u.assoc_req.capab_info);
/* todo: listen interval for power saving */
- put_unaligned_le16(3, pframe);
- pframe += 2;
- pattrib->pktlen += 2;
+ put_unaligned_le16(3, &mgmt->u.assoc_req.listen_interval);
+
+ pframe = mgmt->u.assoc_req.variable;
+ pattrib->pktlen = offsetof(struct ieee80211_mgmt, u.assoc_req.variable);
/* SSID */
pframe = rtw_set_ie23a(pframe, WLAN_EID_SSID,
&pattrib->pktlen);
/* HT caps */
- if (padapter->mlmepriv.htpriv.ht_option == true) {
+ if (padapter->mlmepriv.htpriv.ht_option) {
p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, pie, pie_len);
if (p && !is_ap_in_tkip23a(padapter)) {
- memcpy(&pmlmeinfo->HT_caps, p + 2,
- sizeof(struct HT_caps_element));
+ struct ieee80211_ht_cap *cap = &pmlmeinfo->ht_cap;
+
+ memcpy(cap, p + 2, sizeof(struct ieee80211_ht_cap));
/* to disable 40M Hz support while gd_bw_40MHz_en = 0 */
if (pregpriv->cbw40_enable == 0) {
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info &= (~(BIT(6) | BIT(1)));
+ cap->cap_info &= ~cpu_to_le16(
+ IEEE80211_HT_CAP_SGI_40 |
+ IEEE80211_HT_CAP_SUP_WIDTH_20_40);
} else {
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= BIT(1);
+ cap->cap_info |= cpu_to_le16(
+ IEEE80211_HT_CAP_SUP_WIDTH_20_40);
}
/* todo: disable SM power save mode */
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |=
- 0x000c;
+ cap->cap_info |= cpu_to_le16(IEEE80211_HT_CAP_SM_PS);
rf_type = rtl8723a_get_rf_type(padapter);
/* switch (pregpriv->rf_config) */
case RF_1T1R:
/* RX STBC One spatial stream */
if (pregpriv->rx_stbc)
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);
+ cap->cap_info |= cpu_to_le16(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
- memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R23A, 16);
+ memcpy(&cap->mcs, MCS_rate_1R23A, 16);
break;
case RF_2T2R:
pregpriv->wifi_spec == 1) {
DBG_8723A("declare supporting RX "
"STBC\n");
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0200);/* RX STBC two spatial stream */
+ /* RX STBC two spatial stream */
+ cap->cap_info |= cpu_to_le16(2 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
}
- memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R23A, 16);
+ memcpy(&cap->mcs, MCS_rate_2R23A, 16);
break;
}
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info =
- cpu_to_le16(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info);
if (rtl8723a_BT_coexist(padapter) &&
rtl8723a_BT_using_antenna_1(padapter)) {
/* set to 8K */
- pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para &= (u8)~IEEE80211_HT_AMPDU_PARM_FACTOR;
-/* pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para |= MAX_AMPDU_FACTOR_8K */
+ cap->ampdu_params_info &=
+ ~IEEE80211_HT_AMPDU_PARM_FACTOR;
+/* cap->ampdu_params_info |= MAX_AMPDU_FACTOR_8K */
}
pframe = rtw_set_ie23a(pframe, WLAN_EID_HT_CAPABILITY,
- p[1], (u8 *)&pmlmeinfo->HT_caps,
+ p[1], (u8 *)&pmlmeinfo->ht_cap,
&pattrib->pktlen);
}
}
kfree(pmlmepriv->assoc_req);
pmlmepriv->assoc_req = kmalloc(pattrib->pktlen, GFP_ATOMIC);
if (pmlmepriv->assoc_req) {
- memcpy(pmlmepriv->assoc_req, pwlanhdr, pattrib->pktlen);
+ memcpy(pmlmepriv->assoc_req, mgmt, pattrib->pktlen);
pmlmepriv->assoc_req_len = pattrib->pktlen;
}
} else
{
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
- unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)(pmgntframe->buf_addr + TXDESC_OFFSET);
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_DEAUTH);
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DEAUTH);
- ether_addr_copy(pwlanhdr->addr1, da);
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->da, da);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(&pmlmeinfo->network));
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+ pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr) + 2;
- reason = cpu_to_le16(reason);
- pframe = rtw_set_fixed_ie23a(pframe, WLAN_REASON_PREV_AUTH_NOT_VALID,
- (unsigned char *)&reason,
- &pattrib->pktlen);
+ mgmt->u.deauth.reason_code = cpu_to_le16(reason);
pattrib->last_txcmdsz = pattrib->pktlen;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
unsigned char *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- u8 category, action;
DBG_8723A("%s(%s): ra ="MAC_FMT", ch:%u, offset:%u\n", __func__,
padapter->pnetdev->name, MAC_ARG(ra), new_ch, ch_offset);
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)(pmgntframe->buf_addr + TXDESC_OFFSET);
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ACTION);
- ether_addr_copy(pwlanhdr->addr1, ra); /* RA */
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv)); /* TA */
- ether_addr_copy(pwlanhdr->addr3, ra); /* DA = RA */
+ ether_addr_copy(mgmt->da, ra); /* RA */
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv)); /* TA */
+ ether_addr_copy(mgmt->bssid, ra); /* DA = RA */
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
-
- /* category, action */
- category = WLAN_CATEGORY_SPECTRUM_MGMT;
- action = WLAN_ACTION_SPCT_CHL_SWITCH;
+ mgmt->u.action.category = WLAN_CATEGORY_SPECTRUM_MGMT;
+ mgmt->u.action.u.chan_switch.action_code = WLAN_ACTION_SPCT_CHL_SWITCH;
- pframe = rtw_set_fixed_ie23a(pframe, 1, &category, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie23a(pframe, 1, &action, &pattrib->pktlen);
+ pframe = mgmt->u.action.u.chan_switch.variable;
+ pattrib->pktlen = offsetof(struct ieee80211_mgmt,
+ u.action.u.chan_switch.variable);
pframe = rtw_set_ie23a_ch_switch (pframe, &pattrib->pktlen, 0,
new_ch, 0);
const unsigned char *raddr,
unsigned char action, unsigned short status)
{
- u8 category = WLAN_CATEGORY_BACK;
u16 start_seq;
u16 BA_para_set;
- u16 reason_code;
u16 BA_timeout_value;
u16 BA_starting_seqctrl;
+ u16 BA_para;
int max_rx_ampdu_factor;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
- u8 *pframe;
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct registry_priv *pregpriv = &padapter->registrypriv;
u8 tendaAPMac[] = {0xC8, 0x3A, 0x35};
- DBG_8723A("%s, category =%d, action =%d, status =%d\n",
- __func__, category, action, status);
+ DBG_8723A("%s, action =%d, status =%d\n", __func__, action, status);
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
if (!pmgntframe)
memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
- pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)(pmgntframe->buf_addr + TXDESC_OFFSET);
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
+ mgmt->frame_control =
+ cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ACTION);
- /* memcpy(pwlanhdr->addr1, get_my_bssid23a(&pmlmeinfo->network), ETH_ALEN); */
- ether_addr_copy(pwlanhdr->addr1, raddr);
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt->da, raddr);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(&pmlmeinfo->network));
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt->seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
+ mgmt->u.action.category = WLAN_CATEGORY_BACK;
- pframe = rtw_set_fixed_ie23a(pframe, 1, &category, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie23a(pframe, 1, &action, &pattrib->pktlen);
+ pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr) + 1;
status = cpu_to_le16(status);
- if (category != 3)
- goto out;
+ switch (action) {
+ case WLAN_ACTION_ADDBA_REQ:
+ pattrib->pktlen += sizeof(mgmt->u.action.u.addba_req);
+
+ mgmt->u.action.u.addba_req.action_code = action;
- switch (action)
- {
- case 0: /* ADDBA req */
do {
pmlmeinfo->dialogToken++;
} while (pmlmeinfo->dialogToken == 0);
- pframe = rtw_set_fixed_ie23a(pframe, 1, &pmlmeinfo->dialogToken,
- &pattrib->pktlen);
+
+ mgmt->u.action.u.addba_req.dialog_token =
+ pmlmeinfo->dialogToken;
if (rtl8723a_BT_coexist(padapter) &&
rtl8723a_BT_using_antenna_1(padapter) &&
/* immediate ack & 64 buffer size */
BA_para_set = (0x1002 | ((status & 0xf) << 2));
}
- BA_para_set = cpu_to_le16(BA_para_set);
- pframe = rtw_set_fixed_ie23a(pframe, 2,
- (unsigned char *)&BA_para_set,
- &pattrib->pktlen);
+
+ put_unaligned_le16(BA_para_set,
+ &mgmt->u.action.u.addba_req.capab);
BA_timeout_value = 5000;/* 5ms */
BA_timeout_value = cpu_to_le16(BA_timeout_value);
- pframe = rtw_set_fixed_ie23a(pframe, 2, (unsigned char *)
- &BA_timeout_value,
- &pattrib->pktlen);
+ put_unaligned_le16(BA_timeout_value,
+ &mgmt->u.action.u.addba_req.timeout);
+
+ psta = rtw_get_stainfo23a(pstapriv, raddr);
+ if (psta) {
+ int idx;
- /* if ((psta = rtw_get_stainfo23a(pstapriv,
- pmlmeinfo->network.MacAddress)) != NULL) */
- if ((psta = rtw_get_stainfo23a(pstapriv, raddr))) {
- start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1;
+ idx = status & 0x07;
+ start_seq =
+ (psta->sta_xmitpriv.txseq_tid[idx] & 0xfff) + 1;
DBG_8723A("BA_starting_seqctrl = %d for TID =%d\n",
- start_seq, status & 0x07);
+ start_seq, idx);
- psta->BA_starting_seqctrl[status & 0x07] = start_seq;
+ psta->BA_starting_seqctrl[idx] = start_seq;
BA_starting_seqctrl = start_seq << 4;
- }
+ } else
+ BA_starting_seqctrl = 0;
+
+ put_unaligned_le16(BA_starting_seqctrl,
+ &mgmt->u.action.u.addba_req.start_seq_num);
- BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl);
- pframe = rtw_set_fixed_ie23a(pframe, 2, (unsigned char *)&BA_starting_seqctrl, &pattrib->pktlen);
break;
- case 1: /* ADDBA rsp */
- pframe = rtw_set_fixed_ie23a(pframe, 1, &pmlmeinfo->ADDBA_req.dialog_token, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie23a(pframe, 2,
- (unsigned char *)&status,
- &pattrib->pktlen);
+ case WLAN_ACTION_ADDBA_RESP:
+ pattrib->pktlen += sizeof(mgmt->u.action.u.addba_resp);
+
+ mgmt->u.action.u.addba_resp.action_code = action;
+ mgmt->u.action.u.addba_resp.dialog_token =
+ pmlmeinfo->ADDBA_req.dialog_token;
+ put_unaligned_le16(status,
+ &mgmt->u.action.u.addba_resp.status);
+
GetHalDefVar8192CUsb(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR,
&max_rx_ampdu_factor);
+
+ BA_para = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f;
if (max_rx_ampdu_factor == IEEE80211_HT_MAX_AMPDU_64K)
- BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); /* 64 buffer size */
+ BA_para_set = BA_para | 0x1000; /* 64 buffer size */
else if (max_rx_ampdu_factor == IEEE80211_HT_MAX_AMPDU_32K)
- BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0800); /* 32 buffer size */
+ BA_para_set = BA_para | 0x0800; /* 32 buffer size */
else if (max_rx_ampdu_factor == IEEE80211_HT_MAX_AMPDU_16K)
- BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0400); /* 16 buffer size */
+ BA_para_set = BA_para | 0x0400; /* 16 buffer size */
else if (max_rx_ampdu_factor == IEEE80211_HT_MAX_AMPDU_8K)
- BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0200); /* 8 buffer size */
+ BA_para_set = BA_para | 0x0200; /* 8 buffer size */
else
- BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); /* 64 buffer size */
+ BA_para_set = BA_para | 0x1000; /* 64 buffer size */
if (rtl8723a_BT_coexist(padapter) &&
rtl8723a_BT_using_antenna_1(padapter) &&
}
if (pregpriv->ampdu_amsdu == 0)/* disabled */
- BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0));
+ BA_para_set &= ~BIT(0);
else if (pregpriv->ampdu_amsdu == 1)/* enabled */
- BA_para_set = cpu_to_le16(BA_para_set | BIT(0));
- else /* auto */
- BA_para_set = cpu_to_le16(BA_para_set);
-
- pframe = rtw_set_fixed_ie23a(pframe, 2,
- (unsigned char *)&BA_para_set,
- &pattrib->pktlen);
- pframe = rtw_set_fixed_ie23a(pframe, 2, (unsigned char *)&pmlmeinfo->ADDBA_req.BA_timeout_value, &pattrib->pktlen);
- break;
- case 2:/* DELBA */
- BA_para_set = (status & 0x1F) << 3;
- BA_para_set = cpu_to_le16(BA_para_set);
- pframe = rtw_set_fixed_ie23a(pframe, 2,
- (unsigned char *)&BA_para_set,
- &pattrib->pktlen);
-
- reason_code = 37;/* Requested from peer STA as it does not
- want to use the mechanism */
- reason_code = cpu_to_le16(reason_code);
- pframe = rtw_set_fixed_ie23a(pframe, 2,
- (unsigned char *)&reason_code,
- &pattrib->pktlen);
- break;
- default:
- break;
- }
+ BA_para_set |= BIT(0);
-out:
- pattrib->last_txcmdsz = pattrib->pktlen;
+ put_unaligned_le16(BA_para_set,
+ &mgmt->u.action.u.addba_resp.capab);
- dump_mgntframe23a(padapter, pmgntframe);
-}
+ put_unaligned_le16(pmlmeinfo->ADDBA_req.BA_timeout_value,
+ &mgmt->u.action.u.addba_resp.timeout);
-static void issue_action_BSSCoexistPacket(struct rtw_adapter *padapter)
-{
- struct list_head *plist, *phead, *ptmp;
- unsigned char category, action;
- struct xmit_frame *pmgntframe;
- struct pkt_attrib *pattrib;
- u8 *pframe;
- struct ieee80211_hdr *pwlanhdr;
- struct wlan_network *pnetwork;
- struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
- struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
- struct rtw_queue *queue = &pmlmepriv->scanned_queue;
- u8 InfoContent[16] = {0};
- u8 ICS[8][15];
- int i;
-
- if (pmlmepriv->num_FortyMHzIntolerant == 0 ||
- pmlmepriv->num_sta_no_ht == 0)
- return;
-
- if (pmlmeinfo->bwmode_updated)
- return;
-
- DBG_8723A("%s\n", __func__);
-
- category = WLAN_CATEGORY_PUBLIC;
- action = ACT_PUBLIC_BSSCOEXIST;
-
- pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
- if (!pmgntframe)
- return;
-
- /* update attribute */
- pattrib = &pmgntframe->attrib;
- update_mgntframe_attrib23a(padapter, pattrib);
-
- memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
-
- pframe = (u8 *)pmgntframe->buf_addr + TXDESC_OFFSET;
- pwlanhdr = (struct ieee80211_hdr *)pframe;
-
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
-
- ether_addr_copy(pwlanhdr->addr1, get_my_bssid23a(&pmlmeinfo->network));
- ether_addr_copy(pwlanhdr->addr2, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
-
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
- pmlmeext->mgnt_seq++;
-
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pattrib->pktlen = sizeof(struct ieee80211_hdr_3addr);
-
- pframe = rtw_set_fixed_ie23a(pframe, 1, &category, &pattrib->pktlen);
- pframe = rtw_set_fixed_ie23a(pframe, 1, &action, &pattrib->pktlen);
-
- if (pmlmepriv->num_FortyMHzIntolerant > 0) {
- u8 iedata = BIT(2);/* 20 MHz BSS Width Request */
-
- pframe = rtw_set_ie23a(pframe, WLAN_EID_BSS_COEX_2040, 1,
- &iedata, &pattrib->pktlen);
- }
-
- if (pmlmepriv->num_sta_no_ht <= 0)
- goto out;
-
- memset(ICS, 0, sizeof(ICS));
-
- spin_lock_bh(&pmlmepriv->scanned_queue.lock);
-
- phead = get_list_head(queue);
- plist = phead->next;
-
- list_for_each_safe(plist, ptmp, phead) {
- const u8 *p;
- struct wlan_bssid_ex *pbss_network;
-
- pnetwork = container_of(plist, struct wlan_network, list);
-
- pbss_network = &pnetwork->network;
-
- p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY,
- pbss_network->IEs + _FIXED_IE_LENGTH_,
- pbss_network->IELength -_FIXED_IE_LENGTH_);
- if (!p || !p[1]) { /* non-HT */
- if (pbss_network->DSConfig <= 0 ||
- pbss_network->DSConfig > 14)
- continue;
-
- ICS[0][pbss_network->DSConfig] = 1;
-
- if (ICS[0][0] == 0)
- ICS[0][0] = 1;
- }
-
- }
-
- spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
-
- for (i = 0; i < 8;i++) {
- if (ICS[i][0] == 1) {
- int j, k = 0;
-
- InfoContent[k] = i;
- /* SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent, i); */
- k++;
+ pattrib->pktlen += 8;
+ break;
+ case WLAN_ACTION_DELBA:
+ pattrib->pktlen += sizeof(mgmt->u.action.u.delba);
- for (j = 1; j <= 14; j++) {
- if (ICS[i][j] == 1) {
- if (k < 16) {
- /* channel number */
- InfoContent[k] = j;
- k++;
- }
- }
- }
+ mgmt->u.action.u.delba.action_code = action;
+ BA_para_set = (status & 0x1F) << 3;
+ mgmt->u.action.u.delba.params = cpu_to_le16(BA_para_set);
+ mgmt->u.action.u.delba.reason_code =
+ cpu_to_le16(WLAN_REASON_QSTA_NOT_USE);
- pframe = rtw_set_ie23a(pframe,
- EID_BSSIntolerantChlReport, k,
- InfoContent, &pattrib->pktlen);
- }
+ pattrib->pktlen += 5;
+ break;
+ default:
+ break;
}
-out:
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe23a(padapter, pmgntframe);
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *psta = NULL;
/* struct recv_reorder_ctrl *preorder_ctrl; */
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u16 tid;
int send_beacon23a(struct rtw_adapter *padapter)
{
- bool bxmitok;
- int issue = 0;
+ bool bxmitok;
+ int issue = 0;
int poll = 0;
unsigned long start = jiffies;
unsigned int passing_time;
int i = 0;
u8 Channel_5G[45] = {36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58,
- 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
- 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159,
- 161, 163, 165};
+ 60, 62, 64, 100, 102, 104, 106, 108, 110, 112,
+ 114, 116, 118, 120, 122, 124, 126, 128, 130, 132,
+ 134, 136, 138, 140, 149, 151, 153, 155, 157, 159,
+ 161, 163, 165};
for (i = 0; i < sizeof(Channel_5G); i++)
if (channel == Channel_5G[i])
return true;
{
unsigned char survey_channel = 0;
enum rt_scan_type ScanType = SCAN_PASSIVE;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct rtw_ieee80211_channel *ch;
pmlmeext->chan_scan_time = SURVEY_TO;
pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
-
- issue_action_BSSCoexistPacket(padapter);
- issue_action_BSSCoexistPacket(padapter);
- issue_action_BSSCoexistPacket(padapter);
}
return;
}
/* collect bss info from Beacon and Probe request/response frames. */
-int collect_bss_info23a(struct rtw_adapter *padapter,
- struct recv_frame *precv_frame,
- struct wlan_bssid_ex *bssid)
+static struct wlan_bssid_ex *collect_bss_info(struct rtw_adapter *padapter,
+ struct recv_frame *precv_frame)
{
int i;
const u8 *p;
struct registry_priv *pregistrypriv = &padapter->registrypriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
- u16 capab_info;
+ struct wlan_bssid_ex *bssid;
length = skb->len - sizeof(struct ieee80211_hdr_3addr);
if (length > MAX_IE_SZ) {
/* DBG_8723A("IE too long for survey event\n"); */
- return _FAIL;
+ return NULL;
}
- memset(bssid, 0, sizeof(struct wlan_bssid_ex));
+ bssid = kzalloc(sizeof(struct wlan_bssid_ex), GFP_ATOMIC);
+ if (!bssid)
+ return NULL;
if (ieee80211_is_beacon(mgmt->frame_control)) {
bssid->reserved = 1;
ie_offset = offsetof(struct ieee80211_mgmt, u.beacon.variable);
- capab_info = mgmt->u.beacon.capab_info;
+ bssid->capability =
+ get_unaligned_le16(&mgmt->u.beacon.capab_info);
+ bssid->beacon_interval =
+ get_unaligned_le16(&mgmt->u.beacon.beacon_int);
+ bssid->tsf = get_unaligned_le64(&mgmt->u.beacon.timestamp);
} else if (ieee80211_is_probe_req(mgmt->frame_control)) {
ie_offset = offsetof(struct ieee80211_mgmt,
u.probe_req.variable);
bssid->reserved = 2;
- capab_info = 0;
+ bssid->capability = 0;
+ bssid->beacon_interval =
+ padapter->registrypriv.dev_network.beacon_interval;
+ bssid->tsf = 0;
} else if (ieee80211_is_probe_resp(mgmt->frame_control)) {
ie_offset = offsetof(struct ieee80211_mgmt,
u.probe_resp.variable);
bssid->reserved = 3;
- capab_info = mgmt->u.probe_resp.capab_info;
+ bssid->capability =
+ get_unaligned_le16(&mgmt->u.probe_resp.capab_info);
+ bssid->beacon_interval =
+ get_unaligned_le16(&mgmt->u.probe_resp.beacon_int);
+ bssid->tsf = get_unaligned_le64(&mgmt->u.probe_resp.timestamp);
} else {
bssid->reserved = 0;
ie_offset = offsetof(struct ieee80211_mgmt, u.beacon.variable);
- capab_info = mgmt->u.beacon.capab_info;
+ bssid->capability =
+ get_unaligned_le16(&mgmt->u.beacon.capab_info);
+ bssid->beacon_interval =
+ padapter->registrypriv.dev_network.beacon_interval;
+ bssid->tsf = 0;
}
ie_offset -= offsetof(struct ieee80211_mgmt, u);
if (!p) {
DBG_8723A("marc: cannot find SSID for survey event\n");
- return _FAIL;
+ goto fail;
}
if (p[1] > IEEE80211_MAX_SSID_LEN) {
DBG_8723A("%s()-%d: IE too long (%d) for survey "
"event\n", __func__, __LINE__, p[1]);
- return _FAIL;
+ goto fail;
}
memcpy(bssid->Ssid.ssid, p + 2, p[1]);
bssid->Ssid.ssid_len = p[1];
- memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
-
/* checking rate info... */
i = 0;
p = cfg80211_find_ie(WLAN_EID_SUPP_RATES, bssid->IEs + ie_offset,
if (p[1] > NDIS_802_11_LENGTH_RATES_EX) {
DBG_8723A("%s()-%d: IE too long (%d) for survey "
"event\n", __func__, __LINE__, p[1]);
- return _FAIL;
+ goto fail;
}
memcpy(bssid->SupportedRates, p + 2, p[1]);
i = p[1];
if (p[1] > (NDIS_802_11_LENGTH_RATES_EX-i)) {
DBG_8723A("%s()-%d: IE too long (%d) for survey "
"event\n", __func__, __LINE__, p[1]);
- return _FAIL;
+ goto fail;
}
memcpy(bssid->SupportedRates + i, p + 2, p[1]);
}
if (bssid->IELength < 12)
- return _FAIL;
+ goto fail;
/* Checking for DSConfig */
p = cfg80211_find_ie(WLAN_EID_DS_PARAMS, bssid->IEs + ie_offset,
bssid->IEs + ie_offset,
bssid->IELength - ie_offset);
if (p) {
- struct HT_info_element *HT_info =
- (struct HT_info_element *)(p + 2);
- bssid->DSConfig = HT_info->primary_channel;
+ struct ieee80211_ht_operation *HT_info =
+ (struct ieee80211_ht_operation *)(p + 2);
+ bssid->DSConfig = HT_info->primary_chan;
} else /* use current channel */
bssid->DSConfig = rtw_get_oper_ch23a(padapter);
}
bssid->ifmode = NL80211_IFTYPE_STATION;
ether_addr_copy(bssid->MacAddress, mgmt->sa);
bssid->Privacy = 1;
- return _SUCCESS;
+ return bssid;
}
- bssid->BeaconPeriod = get_unaligned_le16(
- rtw_get_beacon_interval23a_from_ie(bssid->IEs));
-
- if (capab_info & BIT(0)) {
+ if (bssid->capability & WLAN_CAPABILITY_ESS) {
bssid->ifmode = NL80211_IFTYPE_STATION;
ether_addr_copy(bssid->MacAddress, mgmt->sa);
} else {
ether_addr_copy(bssid->MacAddress, mgmt->bssid);
}
- if (capab_info & BIT(4))
+ if (bssid->capability & WLAN_CAPABILITY_PRIVACY)
bssid->Privacy = 1;
else
bssid->Privacy = 0;
bssid->IEs + ie_offset,
bssid->IELength - ie_offset);
if (p && p[1] > 0) {
- struct HT_caps_element *pHT_caps;
- pHT_caps = (struct HT_caps_element *)(p + 2);
+ struct ieee80211_ht_cap *pHT_caps;
+ pHT_caps = (struct ieee80211_ht_cap *)(p + 2);
- if (pHT_caps->u.HT_cap_element.HT_caps_info & BIT(14))
+ if (pHT_caps->cap_info &
+ cpu_to_le16(IEEE80211_HT_CAP_40MHZ_INTOLERANT))
pmlmepriv->num_FortyMHzIntolerant++;
} else
pmlmepriv->num_sta_no_ht++;
if (bssid->DSConfig != rtw_get_oper_ch23a(padapter))
bssid->PhyInfo.SignalQuality = 101;
- return _SUCCESS;
+ return bssid;
+fail:
+ kfree (bssid);
+ return NULL;
}
static void start_create_ibss(struct rtw_adapter* padapter)
{
- unsigned short caps;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ unsigned short caps;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
pmlmeext->cur_channel = (u8)pnetwork->DSConfig;
- pmlmeinfo->bcn_interval = get_beacon_interval23a(pnetwork);
+ pmlmeinfo->bcn_interval = pnetwork->beacon_interval;
/* update wireless mode */
update_wireless_mode23a(padapter);
/* udpate capability */
- caps = rtw_get_capability23a(pnetwork);
+ caps = pnetwork->capability;
update_capinfo23a(padapter, caps);
if (caps & WLAN_CAPABILITY_IBSS) { /* adhoc master */
rtl8723a_set_sec_cfg(padapter, 0xcf);
static void start_clnt_join(struct rtw_adapter* padapter)
{
- unsigned short caps;
- u8 val8;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ unsigned short caps;
+ u8 val8;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
int beacon_timeout;
pmlmeext->cur_channel = (u8)pnetwork->DSConfig;
- pmlmeinfo->bcn_interval = get_beacon_interval23a(pnetwork);
+ pmlmeinfo->bcn_interval = pnetwork->beacon_interval;
/* update wireless mode */
update_wireless_mode23a(padapter);
/* udpate capability */
- caps = rtw_get_capability23a(pnetwork);
+ caps = pnetwork->capability;
update_capinfo23a(padapter, caps);
if (caps & WLAN_CAPABILITY_ESS) {
/* switch channel */
static void start_clnt_auth(struct rtw_adapter* padapter)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
del_timer_sync(&pmlmeext->link_timer);
/* AP may: 1)not response auth or 2)deauth us after link is complete */
/* issue deauth before issuing auth to deal with the situation */
/* Commented by Albert 2012/07/21 */
- /* For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. */
- issue_deauth23a(padapter, (&pmlmeinfo->network)->MacAddress, WLAN_REASON_DEAUTH_LEAVING);
+ /* For the Win8 P2P connection, it will be hard to have a
+ successful connection if this Wi-Fi doesn't connect to it. */
+ issue_deauth23a(padapter, (&pmlmeinfo->network)->MacAddress,
+ WLAN_REASON_DEAUTH_LEAVING);
DBG_8723A_LEVEL(_drv_always_, "start auth\n");
issue_auth(padapter, NULL, 0);
static void start_clnt_assoc(struct rtw_adapter* padapter)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
del_timer_sync(&pmlmeext->link_timer);
int receive_disconnect23a(struct rtw_adapter *padapter,
unsigned char *MacAddr, unsigned short reason)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* check A3 */
*****************************************************************************/
-void report_survey_event23a(struct rtw_adapter *padapter, struct recv_frame *precv_frame)
+void report_survey_event23a(struct rtw_adapter *padapter,
+ struct recv_frame *precv_frame)
{
struct cmd_obj *pcmd_obj;
- u8 *pevtcmd;
+ u8 *pevtcmd;
u32 cmdsz;
- struct survey_event *psurvey_evt;
+ struct survey_event *psurvey_evt;
struct C2HEvent_Header *pc2h_evt_hdr;
struct mlme_ext_priv *pmlmeext;
struct cmd_priv *pcmdpriv;
pmlmeext = &padapter->mlmeextpriv;
pcmdpriv = &padapter->cmdpriv;
- pcmd_obj = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd_obj)
return;
psurvey_evt = (struct survey_event*)(pevtcmd + sizeof(struct C2HEvent_Header));
- if (collect_bss_info23a(padapter, precv_frame, &psurvey_evt->bss) == _FAIL) {
+ psurvey_evt->bss = collect_bss_info(padapter, precv_frame);
+ if (!psurvey_evt->bss) {
kfree(pcmd_obj);
kfree(pevtcmd);
return;
}
- process_80211d(padapter, &psurvey_evt->bss);
+ process_80211d(padapter, psurvey_evt->bss);
rtw_enqueue_cmd23a(pcmdpriv, pcmd_obj);
void report_surveydone_event23a(struct rtw_adapter *padapter)
{
struct cmd_obj *pcmd_obj;
- u8 *pevtcmd;
+ u8 *pevtcmd;
u32 cmdsz;
struct surveydone_event *psurveydone_evt;
- struct C2HEvent_Header *pc2h_evt_hdr;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct C2HEvent_Header *pc2h_evt_hdr;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- pcmd_obj = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd_obj)
return;
void report_join_res23a(struct rtw_adapter *padapter, int res)
{
struct cmd_obj *pcmd_obj;
- u8 *pevtcmd;
+ u8 *pevtcmd;
u32 cmdsz;
struct joinbss_event *pjoinbss_evt;
struct C2HEvent_Header *pc2h_evt_hdr;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- pcmd_obj = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd_obj)
return;
return;
}
-void report_del_sta_event23a(struct rtw_adapter *padapter, unsigned char* MacAddr, unsigned short reason)
+void report_del_sta_event23a(struct rtw_adapter *padapter,
+ unsigned char* MacAddr, unsigned short reason)
{
struct cmd_obj *pcmd_obj;
- u8 *pevtcmd;
+ u8 *pevtcmd;
u32 cmdsz;
struct sta_info *psta;
- int mac_id;
- struct stadel_event *pdel_sta_evt;
- struct C2HEvent_Header *pc2h_evt_hdr;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ int mac_id;
+ struct stadel_event *pdel_sta_evt;
+ struct C2HEvent_Header *pc2h_evt_hdr;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- pcmd_obj = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd_obj)
return;
return;
}
-void report_add_sta_event23a(struct rtw_adapter *padapter, unsigned char* MacAddr, int cam_idx)
+void report_add_sta_event23a(struct rtw_adapter *padapter,
+ unsigned char* MacAddr, int cam_idx)
{
struct cmd_obj *pcmd_obj;
- u8 *pevtcmd;
+ u8 *pevtcmd;
u32 cmdsz;
- struct stassoc_event *padd_sta_evt;
- struct C2HEvent_Header *pc2h_evt_hdr;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct stassoc_event *padd_sta_evt;
+ struct C2HEvent_Header *pc2h_evt_hdr;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- pcmd_obj = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ pcmd_obj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd_obj)
return;
void update_sta_info23a(struct rtw_adapter *padapter, struct sta_info *psta)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* ERP */
VCS_update23a(padapter, psta);
psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable;
- if (support_short_GI23a(padapter, &pmlmeinfo->HT_caps))
+ if (support_short_GI23a(padapter, &pmlmeinfo->ht_cap))
psta->htpriv.sgi = true;
psta->qos_option = true;
psta->state = _FW_LINKED;
}
-void mlmeext_joinbss_event_callback23a(struct rtw_adapter *padapter, int join_res)
+void mlmeext_joinbss_event_callback23a(struct rtw_adapter *padapter,
+ int join_res)
{
- struct sta_info *psta, *psta_bmc;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct sta_info *psta, *psta_bmc;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
- struct sta_priv *pstapriv = &padapter->stapriv;
+ struct sta_priv *pstapriv = &padapter->stapriv;
if (join_res < 0) {
hw_var_set_mlme_join(padapter, 1);
DBG_8723A("=>%s\n", __func__);
}
-void mlmeext_sta_add_event_callback23a(struct rtw_adapter *padapter, struct sta_info *psta)
+void mlmeext_sta_add_event_callback23a(struct rtw_adapter *padapter,
+ struct sta_info *psta)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
pmlmeext->scan_abort = false;/* reset */
}
- ph2c = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj),
- GFP_ATOMIC);
+ ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c)
goto exit_survey_timer_hdl;
- psurveyPara = (struct sitesurvey_parm*)
- kzalloc(sizeof(struct sitesurvey_parm), GFP_ATOMIC);
+ psurveyPara = kzalloc(sizeof(struct sitesurvey_parm),
+ GFP_ATOMIC);
if (!psurveyPara) {
kfree(ph2c);
goto exit_survey_timer_hdl;
/* static unsigned int rx_pkt = 0; */
/* static u64 tx_cnt = 0; */
/* struct xmit_priv *pxmitpriv = &padapter->xmitpriv; */
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* struct sta_priv *pstapriv = &padapter->stapriv; */
static void addba_timer_hdl(unsigned long data)
{
struct sta_info *psta = (struct sta_info *)data;
- struct ht_priv *phtpriv;
+ struct ht_priv *phtpriv;
if (!psta)
return;
phtpriv = &psta->htpriv;
- if (phtpriv->ht_option == true && phtpriv->ampdu_enable == true) {
+ if (phtpriv->ht_option && phtpriv->ampdu_enable) {
if (phtpriv->candidate_tid_bitmap)
phtpriv->candidate_tid_bitmap = 0x0;
}
void init_mlme_ext_timer23a(struct rtw_adapter *padapter)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
setup_timer(&pmlmeext->survey_timer, survey_timer_hdl,
(unsigned long)padapter);
int createbss_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
{
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
const struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
const struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf;
- struct HT_info_element *pht_info;
+ struct ieee80211_ht_operation *pht_info;
u32 i;
int bcn_fixed_size;
u8 *p;
/* spec case only for cisco's ap because cisco's ap
* issue assoc rsp using mcs rate @40MHz or @20MHz */
- pht_info = (struct HT_info_element *)(p + 2);
+ pht_info = (struct ieee80211_ht_operation *)(p + 2);
- if ((pregpriv->cbw40_enable) &&
- (pht_info->infos[0] & BIT(2))) {
+ if (pregpriv->cbw40_enable &&
+ (pht_info->ht_param &
+ IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)) {
/* switch to the 40M Hz mode according to AP */
pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
- switch (pht_info->infos[0] & 0x3)
- {
- case 1:
+ switch (pht_info->ht_param &
+ IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
pmlmeext->cur_ch_offset =
HAL_PRIME_CHNL_OFFSET_LOWER;
break;
- case 3:
+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
pmlmeext->cur_ch_offset =
HAL_PRIME_CHNL_OFFSET_UPPER;
break;
rtw_free_uc_swdec_pending_queue23a(padapter);
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
static int
int i, j;
int scan_ch_num = 0;
int set_idx;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
/* clear out first */
memset(out, 0, sizeof(struct rtw_ieee80211_channel)*out_num);
for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) {
if (pparm->ssid[i].ssid_len) {
memcpy(pmlmeext->sitesurvey_res.ssid[i].ssid,
- pparm->ssid[i].ssid, IW_ESSID_MAX_SIZE);
+ pparm->ssid[i].ssid,
+ IEEE80211_MAX_SSID_LEN);
pmlmeext->sitesurvey_res.ssid[i].ssid_len =
pparm->ssid[i].ssid_len;
} else {
if (pparm->mode < 4)
pmlmeinfo->auth_algo = pparm->mode;
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
int setkey_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
psta = rtw_get_stainfo23a(&padapter->stapriv, pparm->addr);
if (!psta)
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) &&
pmlmeinfo->HT_enable) ||
} else
psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid);
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
int set_tx_beacon_cmd23a(struct rtw_adapter* padapter)
{
struct cmd_obj *ph2c;
- struct Tx_Beacon_param *ptxBeacon_parm;
+ struct Tx_Beacon_param *ptxBeacon_parm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u8 res = _SUCCESS;
int len_diff = 0;
- ph2c = (struct cmd_obj *)kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
+ ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
- ptxBeacon_parm = (struct Tx_Beacon_param *)
- kzalloc(sizeof(struct Tx_Beacon_param), GFP_ATOMIC);
+ ptxBeacon_parm = kzalloc(sizeof(struct Tx_Beacon_param), GFP_ATOMIC);
if (!ptxBeacon_parm) {
kfree(ph2c);
res = _FAIL;
int set_ch_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
{
const struct set_ch_parm *set_ch_parm;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
if (!pbuf)
return H2C_PARAMETERS_ERROR;
set_channel_bwmode23a(padapter, set_ch_parm->ch,
set_ch_parm->ch_offset, set_ch_parm->bw);
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
int set_chplan_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
{
const struct SetChannelPlan_param *setChannelPlan_param;
- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
if (!pbuf)
return H2C_PARAMETERS_ERROR;
init_channel_list(padapter, pmlmeext->channel_set,
pmlmeext->max_chan_nums, &pmlmeext->channel_list);
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
int led_blink_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
ledBlink_param = (struct LedBlink_param *)pbuf;
- return H2C_SUCCESS;
+ return H2C_SUCCESS;
}
int set_csa_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf)
{
- return H2C_REJECTED;
+ return H2C_REJECTED;
}
/* TDLS_WRCR : write RCR DATA BIT */
static bool rtw_pwr_unassociated_idle(struct rtw_adapter *adapter)
{
- struct rtw_adapter *buddy = adapter->pbuddy_adapter;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct xmit_priv *pxmit_priv = &adapter->xmitpriv;
goto exit;
}
- /* consider buddy, if exist */
- if (buddy) {
- struct mlme_priv *b_pmlmepriv = &buddy->mlmepriv;
-
- if (check_fwstate(b_pmlmepriv,
- WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
- check_fwstate(b_pmlmepriv,
- WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
- check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ||
- check_fwstate(b_pmlmepriv,
- WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE)) {
- goto exit;
- }
- }
-
if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) {
DBG_8723A_LEVEL(_drv_always_,
return pnetwork->MacAddress;
}
-u16 get_beacon_interval23a(struct wlan_bssid_ex *bss)
-{
- unsigned short val;
- memcpy(&val, rtw_get_beacon_interval23a_from_ie(bss->IEs), 2);
-
- return le16_to_cpu(val);
-}
-
bool is_client_associated_to_ap23a(struct rtw_adapter *padapter)
{
struct mlme_ext_priv *pmlmeext;
memset(pmlmeinfo->FW_sta_info, 0, sizeof(pmlmeinfo->FW_sta_info));
}
-int WMM_param_handler23a(struct rtw_adapter *padapter, u8 *p)
+int WMM_param_handler23a(struct rtw_adapter *padapter, const u8 *p)
{
/* struct registry_priv *pregpriv = &padapter->registrypriv; */
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
return;
}
-static void bwmode_update_check(struct rtw_adapter *padapter, u8 *p)
+static void bwmode_update_check(struct rtw_adapter *padapter, const u8 *p)
{
- struct HT_info_element *pHT_info;
+ struct ieee80211_ht_operation *pHT_info;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
return;
if (!phtpriv->ht_option)
return;
- if (p[1] > sizeof(struct HT_info_element))
+ if (p[1] != sizeof(struct ieee80211_ht_operation))
return;
- pHT_info = (struct HT_info_element *)(p + 2);
+ pHT_info = (struct ieee80211_ht_operation *)(p + 2);
- if ((pHT_info->infos[0] & BIT(2)) && pregistrypriv->cbw40_enable) {
+ if ((pHT_info->ht_param & IEEE80211_HT_PARAM_CHAN_WIDTH_ANY) &&
+ pregistrypriv->cbw40_enable) {
new_bwmode = HT_CHANNEL_WIDTH_40;
- switch (pHT_info->infos[0] & 0x3) {
- case 1:
+ switch (pHT_info->ht_param & IEEE80211_HT_PARAM_CHA_SEC_OFFSET){
+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
break;
- case 3:
+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
break;
default:
}
}
-void HT_caps_handler23a(struct rtw_adapter *padapter, u8 *p)
+void HT_caps_handler23a(struct rtw_adapter *padapter, const u8 *p)
{
unsigned int i;
u8 rf_type;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
+ struct ieee80211_ht_cap *cap;
+ u8 *dstcap;
if (!p)
return;
- if (phtpriv->ht_option == false)
+ if (!phtpriv->ht_option)
return;
pmlmeinfo->HT_caps_enable = 1;
+ cap = &pmlmeinfo->ht_cap;
+ dstcap = (u8 *)cap;
for (i = 0; i < p[1]; i++) {
if (i != 2) {
- /* Commented by Albert 2010/07/12 */
- /* Got the endian issue here. */
- pmlmeinfo->HT_caps.u.HT_cap[i] &= p[i + 2];
+ dstcap[i] &= p[i + 2];
} else {
/* modify from fw by Thomas 2010/11/17 */
- if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (p[i + 2] & 0x3))
- max_AMPDU_len = p[i + 2] & 0x3;
+ if ((cap->ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_FACTOR) >
+ (p[i + 2] & IEEE80211_HT_AMPDU_PARM_FACTOR))
+ max_AMPDU_len = p[i + 2] &
+ IEEE80211_HT_AMPDU_PARM_FACTOR;
else
- max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3;
-
- if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (p[i + 2] & 0x1c))
- min_MPDU_spacing = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c;
+ max_AMPDU_len = cap->ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_FACTOR;
+
+ if ((cap->ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_DENSITY) >
+ (p[i + 2] & IEEE80211_HT_AMPDU_PARM_DENSITY))
+ min_MPDU_spacing = cap->ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_DENSITY;
else
- min_MPDU_spacing = p[i + 2] & 0x1c;
+ min_MPDU_spacing = p[i + 2] &
+ IEEE80211_HT_AMPDU_PARM_DENSITY;
- pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para =
+ cap->ampdu_params_info =
max_AMPDU_len | min_MPDU_spacing;
}
}
- /* Commented by Albert 2010/07/12 */
- /* Have to handle the endian issue after copying. */
- /* HT_ext_caps didn't be used yet. */
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info =
- le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info);
- pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps =
- le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps);
-
rf_type = rtl8723a_get_rf_type(padapter);
/* update the MCS rates */
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < IEEE80211_HT_MCS_MASK_LEN; i++) {
if (rf_type == RF_1T1R || rf_type == RF_1T2R)
- pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &=
- MCS_rate_1R23A[i];
+ cap->mcs.rx_mask[i] &= MCS_rate_1R23A[i];
else
- pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &=
- MCS_rate_2R23A[i];
+ cap->mcs.rx_mask[i] &= MCS_rate_2R23A[i];
}
return;
}
-void HT_info_handler23a(struct rtw_adapter *padapter, u8 *p)
+void HT_info_handler23a(struct rtw_adapter *padapter, const u8 *p)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (!p)
return;
- if (phtpriv->ht_option == false)
+ if (!phtpriv->ht_option)
return;
- if (p[1] > sizeof(struct HT_info_element))
+ if (p[1] != sizeof(struct ieee80211_ht_operation))
return;
pmlmeinfo->HT_info_enable = 1;
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
- max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03;
+ max_AMPDU_len = pmlmeinfo->ht_cap.ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_FACTOR;
min_MPDU_spacing =
- (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2;
+ (pmlmeinfo->ht_cap.ampdu_params_info &
+ IEEE80211_HT_AMPDU_PARM_DENSITY) >> 2;
rtl8723a_set_ampdu_min_space(padapter, min_MPDU_spacing);
rtl8723a_set_ampdu_factor(padapter, max_AMPDU_len);
}
-void ERP_IE_handler23a(struct rtw_adapter *padapter, u8 *p)
+void ERP_IE_handler23a(struct rtw_adapter *padapter, const u8 *p)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct ieee80211_mgmt *mgmt, u32 pkt_len)
{
struct wlan_network *cur_network = &Adapter->mlmepriv.cur_network;
- struct HT_info_element *pht_info;
- struct ieee80211_ht_cap *pht_cap;
- struct wlan_bssid_ex *bssid;
+ struct ieee80211_ht_operation *pht_info;
unsigned short val16;
- u16 wpa_len = 0, rsn_len = 0;
- u8 encryp_protocol;
+ u8 crypto, bcn_channel;
int group_cipher = 0, pairwise_cipher = 0, is_8021x = 0, r;
- u32 bcn_channel;
- unsigned short ht_cap_info;
- unsigned char ht_info_infos_0;
- int len, pie_len, ie_offset;
- const u8 *p;
- u8 *pie;
+ int pie_len, ie_offset, ssid_len, privacy;
+ const u8 *p, *ssid;
if (is_client_associated_to_ap23a(Adapter) == false)
- return true;
+ return _SUCCESS;
if (unlikely(!ieee80211_is_beacon(mgmt->frame_control))) {
printk(KERN_WARNING "%s: received a non beacon frame!\n",
__func__);
- return false;
- }
-
- len = pkt_len - sizeof(struct ieee80211_hdr_3addr);
-
- if (len > MAX_IE_SZ) {
- DBG_8723A("%s IE too long for survey event\n", __func__);
return _FAIL;
}
- if (memcmp(cur_network->network.MacAddress, mgmt->bssid, 6)) {
- DBG_8723A("Oops: rtw_check_network_encrypt linked but recv "
- "other bssid bcn\n" MAC_FMT MAC_FMT,
- MAC_ARG(mgmt->bssid),
+ if (!ether_addr_equal(cur_network->network.MacAddress, mgmt->bssid)) {
+ DBG_8723A("%s: linked but recv other bssid bcn"
+ MAC_FMT MAC_FMT "\n", __func__, MAC_ARG(mgmt->bssid),
MAC_ARG(cur_network->network.MacAddress));
- return true;
- }
-
- bssid = kzalloc(sizeof(struct wlan_bssid_ex), GFP_ATOMIC);
- if (!bssid)
return _FAIL;
-
- bssid->reserved = 1;
-
- bssid->Length = offsetof(struct wlan_bssid_ex, IEs) + len;
-
- /* below is to copy the information element */
- bssid->IELength = len;
- memcpy(bssid->IEs, &mgmt->u, len);
+ }
/* check bw and channel offset */
/* parsing HT_CAP_IE */
ie_offset = offsetof(struct ieee80211_mgmt, u.beacon.variable) -
offsetof(struct ieee80211_mgmt, u);
- pie = bssid->IEs + ie_offset;
- pie_len = pkt_len - ie_offset;
-
- p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, pie, pie_len);
- if (p && p[1] > 0) {
- pht_cap = (struct ieee80211_ht_cap *)(p + 2);
- ht_cap_info = pht_cap->cap_info;
- } else {
- pht_cap = NULL;
- ht_cap_info = 0;
- }
-
- /* parsing HT_INFO_IE */
- p = cfg80211_find_ie(WLAN_EID_HT_OPERATION, pie, pie_len);
- if (p && p[1] > 0) {
- pht_info = (struct HT_info_element *)(p + 2);
- ht_info_infos_0 = pht_info->infos[0];
- } else {
- pht_info = NULL;
- ht_info_infos_0 = 0;
- }
-
- if (ht_cap_info != cur_network->BcnInfo.ht_cap_info ||
- ((ht_info_infos_0 & 0x03) !=
- (cur_network->BcnInfo.ht_info_infos_0 & 0x03))) {
- DBG_8723A("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n",
- __func__, ht_cap_info, ht_info_infos_0);
- DBG_8723A("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n",
- __func__, cur_network->BcnInfo.ht_cap_info,
- cur_network->BcnInfo.ht_info_infos_0);
- DBG_8723A("%s bw mode change, disconnect\n", __func__);
- /* bcn_info_update */
- cur_network->BcnInfo.ht_cap_info = ht_cap_info;
- cur_network->BcnInfo.ht_info_infos_0 = ht_info_infos_0;
- /* to do : need to check that whether modify related
- register of BB or not */
- }
+ pie_len = pkt_len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
/* Checking for channel */
- p = cfg80211_find_ie(WLAN_EID_DS_PARAMS, pie, pie_len);
+ p = cfg80211_find_ie(WLAN_EID_DS_PARAMS, mgmt->u.beacon.variable,
+ pie_len);
if (p)
bcn_channel = p[2];
else {
/* In 5G, some ap do not have DSSET IE checking HT
info for channel */
- p = cfg80211_find_ie(WLAN_EID_HT_OPERATION, pie, pie_len);
+ p = cfg80211_find_ie(WLAN_EID_HT_OPERATION,
+ mgmt->u.beacon.variable, pie_len);
- if (pht_info)
- bcn_channel = pht_info->primary_channel;
- else { /* we don't find channel IE, so don't check it */
+ if (p && p[1] > 0) {
+ pht_info = (struct ieee80211_ht_operation *)(p + 2);
+ bcn_channel = pht_info->primary_chan;
+ } else { /* we don't find channel IE, so don't check it */
DBG_8723A("Oops: %s we don't find channel IE, so don't "
"check it\n", __func__);
bcn_channel = Adapter->mlmeextpriv.cur_channel;
}
/* checking SSID */
- p = cfg80211_find_ie(WLAN_EID_SSID, pie, pie_len);
+ p = cfg80211_find_ie(WLAN_EID_SSID, mgmt->u.beacon.variable, pie_len);
if (p && p[1]) {
- memcpy(bssid->Ssid.ssid, p + 2, p[1]);
- bssid->Ssid.ssid_len = p[1];
+ ssid = p + 2;
+ ssid_len = p[1];
} else {
DBG_8723A("%s marc: cannot find SSID for survey event\n",
__func__);
- bssid->Ssid.ssid_len = 0;
- bssid->Ssid.ssid[0] = '\0';
+ ssid = NULL;
+ ssid_len = 0;
}
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
("%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d "
"cur_network->network.Ssid.Ssid:%s len:%d\n", __func__,
- bssid->Ssid.ssid, bssid->Ssid.ssid_len,
- cur_network->network.Ssid.ssid,
+ ssid, ssid_len, cur_network->network.Ssid.ssid,
cur_network->network.Ssid.ssid_len));
- if (memcmp(bssid->Ssid.ssid, cur_network->network.Ssid.ssid, 32) ||
- bssid->Ssid.ssid_len != cur_network->network.Ssid.ssid_len) {
- if (bssid->Ssid.ssid[0] != '\0' &&
- bssid->Ssid.ssid_len != 0) { /* not hidden ssid */
- DBG_8723A("%s(), SSID is not match return FAIL\n",
- __func__);
- goto _mismatch;
- }
+ if (ssid_len != cur_network->network.Ssid.ssid_len || ssid_len > 32 ||
+ (ssid_len &&
+ memcmp(ssid, cur_network->network.Ssid.ssid, ssid_len))) {
+ DBG_8723A("%s(), SSID is not match return FAIL\n", __func__);
+ goto _mismatch;
}
/* check encryption info */
- val16 = rtw_get_capability23a(bssid);
+ val16 = le16_to_cpu(mgmt->u.beacon.capab_info);
- if (val16 & BIT(4))
- bssid->Privacy = 1;
+ if (val16 & WLAN_CAPABILITY_PRIVACY)
+ privacy = 1;
else
- bssid->Privacy = 0;
+ privacy = 0;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
("%s(): cur_network->network.Privacy is %d, bssid.Privacy "
- "is %d\n", __func__, cur_network->network.Privacy,
- bssid->Privacy));
- if (cur_network->network.Privacy != bssid->Privacy) {
+ "is %d\n", __func__, cur_network->network.Privacy, privacy));
+ if (cur_network->network.Privacy != privacy) {
DBG_8723A("%s(), privacy is not match return FAIL\n", __func__);
goto _mismatch;
}
- rtw_get_sec_ie23a(bssid->IEs, bssid->IELength, NULL, &rsn_len, NULL,
- &wpa_len);
-
- if (rsn_len > 0)
- encryp_protocol = ENCRYP_PROTOCOL_WPA2;
- else if (wpa_len > 0)
- encryp_protocol = ENCRYP_PROTOCOL_WPA;
- else {
- if (bssid->Privacy)
- encryp_protocol = ENCRYP_PROTOCOL_WEP;
- else
- encryp_protocol = ENCRYP_PROTOCOL_OPENSYS;
- }
-
- if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) {
- DBG_8723A("%s(): enctyp is not match, return FAIL\n", __func__);
- goto _mismatch;
- }
-
- if (encryp_protocol == ENCRYP_PROTOCOL_WPA ||
- encryp_protocol == ENCRYP_PROTOCOL_WPA2) {
+ p = cfg80211_find_ie(WLAN_EID_RSN, mgmt->u.beacon.variable, pie_len);
+ if (p && p[1]) {
+ crypto = ENCRYP_PROTOCOL_WPA2;
+ if (p && p[1]) {
+ r = rtw_parse_wpa2_ie23a(p, p[1] + 2, &group_cipher,
+ &pairwise_cipher, &is_8021x);
+ if (r == _SUCCESS)
+ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
+ ("%s pnetwork->pairwise_cipher: %d, "
+ "pnetwork->group_cipher: %d, is_802x "
+ ": %d\n", __func__, pairwise_cipher,
+ group_cipher, is_8021x));
+ }
+ } else {
p = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
WLAN_OUI_TYPE_MICROSOFT_WPA,
- pie, pie_len);
- if (p && p[1] > 0) {
+ mgmt->u.beacon.variable, pie_len);
+ if (p && p[1]) {
+ crypto = ENCRYP_PROTOCOL_WPA;
r = rtw_parse_wpa_ie23a(p, p[1] + 2, &group_cipher,
&pairwise_cipher, &is_8021x);
if (r == _SUCCESS)
"%d\n", __func__, pairwise_cipher,
group_cipher, is_8021x));
} else {
- p = cfg80211_find_ie(WLAN_EID_RSN, pie, pie_len);
-
- if (p && p[1] > 0) {
- r = rtw_parse_wpa2_ie23a(p, p[1] + 2,
- &group_cipher,
- &pairwise_cipher,
- &is_8021x);
- if (r == _SUCCESS)
- RT_TRACE(_module_rtl871x_mlme_c_,
- _drv_info_,
- ("%s pnetwork->pairwise_cipher"
- ": %d, pnetwork->group_cipher"
- " is %d, is_802x is %d\n",
- __func__, pairwise_cipher,
- group_cipher, is_8021x));
- }
+ if (privacy)
+ crypto = ENCRYP_PROTOCOL_WEP;
+ else
+ crypto = ENCRYP_PROTOCOL_OPENSYS;
}
+ }
+ if (cur_network->BcnInfo.encryp_protocol != crypto) {
+ DBG_8723A("%s(): encryption mismatch, return FAIL\n", __func__);
+ goto _mismatch;
+ }
+
+ if (crypto == ENCRYP_PROTOCOL_WPA || crypto == ENCRYP_PROTOCOL_WPA2) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_,
("%s cur_network->group_cipher is %d: %d\n", __func__,
cur_network->BcnInfo.group_cipher, group_cipher));
}
}
- kfree(bssid);
return _SUCCESS;
_mismatch:
- kfree(bssid);
return _FAIL;
}
-void update_beacon23a_info(struct rtw_adapter *padapter, u8 *pframe,
+void update_beacon23a_info(struct rtw_adapter *padapter,
+ struct ieee80211_mgmt *mgmt,
uint pkt_len, struct sta_info *psta)
{
- unsigned int i;
unsigned int len;
- u8 *p;
+ const u8 *p;
- len = pkt_len -
- (_BEACON_IE_OFFSET_ + sizeof(struct ieee80211_hdr_3addr));
+ len = pkt_len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
- for (i = 0; i < len;) {
- p = (u8 *)(pframe + (_BEACON_IE_OFFSET_ + sizeof(struct ieee80211_hdr_3addr)) + i);
+ p = cfg80211_find_ie(WLAN_EID_HT_OPERATION, mgmt->u.beacon.variable,
+ len);
+ if (p)
+ bwmode_update_check(padapter, p);
- switch (p[0]) {
- case WLAN_EID_HT_OPERATION: /* HT info */
- /* HT_info_handler23a(padapter, pIE); */
- bwmode_update_check(padapter, p);
- break;
- case WLAN_EID_ERP_INFO:
- ERP_IE_handler23a(padapter, p);
- VCS_update23a(padapter, psta);
- break;
- default:
- break;
- }
- i += (p[1] + 2);
+ p = cfg80211_find_ie(WLAN_EID_ERP_INFO, mgmt->u.beacon.variable, len);
+ if (p) {
+ ERP_IE_handler23a(padapter, p);
+ VCS_update23a(padapter, psta);
}
}
bcn_fixed_size = offsetof(struct ieee80211_mgmt, u.beacon.variable) -
offsetof(struct ieee80211_mgmt, u.beacon);
- if (rtw_get_capability23a(cur_network) & WLAN_CAPABILITY_PRIVACY) {
+ if (cur_network->capability & WLAN_CAPABILITY_PRIVACY) {
for (i = bcn_fixed_size; i < pmlmeinfo->network.IELength;) {
p = pmlmeinfo->network.IEs + i;
bcn_fixed_size = offsetof(struct ieee80211_mgmt, u.beacon.variable) -
offsetof(struct ieee80211_mgmt, u.beacon);
- if (rtw_get_capability23a(cur_network) & WLAN_CAPABILITY_PRIVACY) {
+ if (cur_network->capability & WLAN_CAPABILITY_PRIVACY) {
for (i = bcn_fixed_size; i < cur_network->IELength;) {
p = cur_network->IEs + i;
bcn_fixed_size = offsetof(struct ieee80211_mgmt, u.beacon.variable) -
offsetof(struct ieee80211_mgmt, u.beacon);
- if (rtw_get_capability23a(cur_network) & WLAN_CAPABILITY_PRIVACY) {
+ if (cur_network->capability & WLAN_CAPABILITY_PRIVACY) {
for (i = bcn_fixed_size; i < pmlmeinfo->network.IELength;) {
p = pmlmeinfo->network.IEs + i;
return mask;
}
-unsigned int update_MSC_rate23a(struct HT_caps_element *pHT_caps)
+unsigned int update_MSC_rate23a(struct ieee80211_ht_cap *pHT_caps)
{
unsigned int mask = 0;
- mask = pHT_caps->u.HT_cap_element.MCS_rate[0] << 12 |
- pHT_caps->u.HT_cap_element.MCS_rate[1] << 20;
+ mask = pHT_caps->mcs.rx_mask[0] << 12 |
+ pHT_caps->mcs.rx_mask[1] << 20;
return mask;
}
int support_short_GI23a(struct rtw_adapter *padapter,
- struct HT_caps_element *pHT_caps)
+ struct ieee80211_ht_cap *pHT_caps)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
return _FAIL;
bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40)? 6: 5;
- if (pHT_caps->u.HT_cap_element.HT_caps_info & (0x1 << bit_offset))
+ if (pHT_caps->cap_info & cpu_to_le16(0x1 << bit_offset))
return _SUCCESS;
else
return _FAIL;
true : false;
}
}
-
-static struct rtw_adapter *pbuddy_padapter;
-
-int rtw_handle_dualmac23a(struct rtw_adapter *adapter, bool init)
-{
- int status = _SUCCESS;
-
- if (init) {
- if (pbuddy_padapter == NULL) {
- pbuddy_padapter = adapter;
- DBG_8723A("%s(): pbuddy_padapter == NULL, "
- "Set pbuddy_padapter\n", __func__);
- } else {
- adapter->pbuddy_adapter = pbuddy_padapter;
- pbuddy_padapter->pbuddy_adapter = adapter;
- /* clear global value */
- pbuddy_padapter = NULL;
- DBG_8723A("%s(): pbuddy_padapter exist, "
- "Exchange Information\n", __func__);
- }
- } else
- pbuddy_padapter = NULL;
-
- return status;
-}
******************************************************************************/
#include <drv_types.h>
#include <rtl8723a_hal.h>
-#include <rtw_ioctl_set.h>
#include <usb_ops_linux.h>
#define DIS_PS_RX_BCN
mask = update_supported_rate23a(cur_network->SupportedRates,
supportRateNum);
mask |= (pmlmeinfo->HT_enable) ?
- update_MSC_rate23a(&pmlmeinfo->HT_caps):0;
- if (support_short_GI23a(padapter, &pmlmeinfo->HT_caps))
+ update_MSC_rate23a(&pmlmeinfo->ht_cap):0;
+ if (support_short_GI23a(padapter, &pmlmeinfo->ht_cap))
shortGIrate = true;
break;
case 1:/* for broadcast/multicast */
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
-#include <rtw_ioctl_set.h>
#include <rtl8723a_hal.h>
#include <usb_ops_linux.h>
}
-static void ConstructBeacon(struct rtw_adapter *padapter, u8 *pframe, u32 *pLength)
+static void
+ConstructBeacon(struct rtw_adapter *padapter, u8 *pframe, u32 *pLength)
{
- struct ieee80211_hdr *pwlanhdr;
+ struct ieee80211_mgmt *mgmt;
u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
/* DBG_8723A("%s\n", __func__); */
- pwlanhdr = (struct ieee80211_hdr *)pframe;
+ mgmt = (struct ieee80211_mgmt *)pframe;
- pwlanhdr->frame_control =
+ mgmt->frame_control =
cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_BEACON);
- memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
- memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN);
- memcpy(pwlanhdr->addr3, get_my_bssid23a(cur_network), ETH_ALEN);
+ ether_addr_copy(mgmt->da, bc_addr);
+ ether_addr_copy(mgmt->sa, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt->bssid, get_my_bssid23a(cur_network));
/* A Beacon frame shouldn't have fragment bits set */
- pwlanhdr->seq_ctrl = 0;
-
- pframe += sizeof(struct ieee80211_hdr_3addr);
- pktlen = sizeof (struct ieee80211_hdr_3addr);
+ mgmt->seq_ctrl = 0;
/* timestamp will be inserted by hardware */
- pframe += 8;
- pktlen += 8;
-
- /* beacon interval: 2 bytes */
- memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval23a_from_ie(cur_network->IEs)), 2);
- pframe += 2;
- pktlen += 2;
+ put_unaligned_le16(cur_network->beacon_interval,
+ &mgmt->u.beacon.beacon_int);
- /* capability info: 2 bytes */
- memcpy(pframe, (unsigned char *)(rtw_get_capability23a_from_ie(cur_network->IEs)), 2);
+ put_unaligned_le16(cur_network->capability,
+ &mgmt->u.beacon.capab_info);
- pframe += 2;
- pktlen += 2;
+ pframe = mgmt->u.beacon.variable;
+ pktlen = offsetof(struct ieee80211_mgmt, u.beacon.variable);
if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
bcn_fixed_size =
mask = update_supported_rate23a(cur_network->SupportedRates,
supportRateNum);
mask |= (pmlmeinfo->HT_enable) ?
- update_MSC_rate23a(&pmlmeinfo->HT_caps) : 0;
+ update_MSC_rate23a(&pmlmeinfo->ht_cap) : 0;
- if (support_short_GI23a(padapter, &pmlmeinfo->HT_caps))
+ if (support_short_GI23a(padapter, &pmlmeinfo->ht_cap))
shortGIrate = true;
break;
u8 bWritePortCancel;
/* The driver will show the desired chan nor when this flag is 1. */
u8 bNotifyChannelChange;
- struct rtw_adapter *pbuddy_adapter;
/* extend to support multi interface */
/* IFACE_ID0 is equals to PRIMARY_ADAPTER */
#define adapter_to_dvobj(adapter) (adapter->dvobj)
-int rtw_handle_dualmac23a(struct rtw_adapter *adapter, bool init);
-
static inline u8 *myid(struct eeprom_priv *peepriv)
{
return peepriv->mac_addr;
#endif
-#define MGMT_QUEUE_NUM 5
-
#ifdef CONFIG_8723AU_AP_MODE
/* STA flags */
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
-#define WLAN_FC_GET_TYPE(fc) (fc & IEEE80211_FCTL_FTYPE)
-#define WLAN_FC_GET_STYPE(fc) (fc & IEEE80211_FCTL_STYPE)
-
-#define WLAN_QC_GET_TID(qc) (qc & 0x0f)
-
-#define WLAN_GET_SEQ_FRAG(seq) (seq & RTW_IEEE80211_SCTL_FRAG)
-#define WLAN_GET_SEQ_SEQ(seq) (seq & RTW_IEEE80211_SCTL_SEQ)
-
-
#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534
#define WLAN_REASON_EXPIRATION_CHK 65535
-
#define IEEE80211_STATMASK_SIGNAL (1<<0)
#define IEEE80211_STATMASK_RSSI (1<<1)
#define IEEE80211_STATMASK_NOISE (1<<2)
#define IEEE80211_OFDM_SHIFT_MASK_A 4
#define WEP_KEYS 4
-#define WEP_KEY_LEN 13
/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
#define MAX_RATES_LENGTH 12
#define MAX_RATES_EX_LENGTH 16
#define MAX_CHANNEL_NUMBER 161
+#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */
#define MAX_WPA_IE_LEN 256
-#define MAX_WPS_IE_LEN 512
+#define MAX_WPS_IE_LEN 256
#define MAX_P2P_IE_LEN 256
#define MAX_WFD_IE_LEN 128
-#define IW_ESSID_MAX_SIZE 32
-
/*
join_res:
-1: authentication fail
#define MAXTID 16
-enum _PUBLIC_ACTION{
- ACT_PUBLIC_BSSCOEXIST = 0, /* 20/40 BSS Coexistence */
- ACT_PUBLIC_DSE_ENABLE = 1,
- ACT_PUBLIC_DSE_DEENABLE = 2,
- ACT_PUBLIC_DSE_REG_LOCATION = 3,
- ACT_PUBLIC_EXT_CHL_SWITCH = 4,
- ACT_PUBLIC_DSE_MSR_REQ = 5,
- ACT_PUBLIC_DSE_MSR_RPRT = 6,
- ACT_PUBLIC_MP = 7, /* Measurement Pilot */
- ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8,
- ACT_PUBLIC_VENDOR = 9, /* for WIFI_DIRECT */
- ACT_PUBLIC_GAS_INITIAL_REQ = 10,
- ACT_PUBLIC_GAS_INITIAL_RSP = 11,
- ACT_PUBLIC_GAS_COMEBACK_REQ = 12,
- ACT_PUBLIC_GAS_COMEBACK_RSP = 13,
- ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14,
- ACT_PUBLIC_LOCATION_TRACK = 15,
- ACT_PUBLIC_MAX
-};
-
#define WME_OUI_TYPE 2
#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1
/*, (channel)->orig_mag*/ \
/*, (channel)->orig_mpwr*/ \
-u8 *rtw_set_fixed_ie23a(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen);
u8 *rtw_set_ie23a(u8 *pbuf, int index, uint len, const u8 *source, uint *frlen);
-enum secondary_ch_offset {
- SCN = 0, /* no secondary channel */
- SCA = 1, /* secondary channel above */
- SCB = 3, /* secondary channel below */
-};
u8 hal_ch_offset_to_secondary_ch_offset23a(u8 ch_offset);
u8 *rtw_set_ie23a_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt);
u8 *rtw_set_ie23a_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset);
void rtw_set_supported_rate23a(u8* SupportedRates, uint mode) ;
-int rtw_get_wpa_cipher_suite23a(const u8 *s);
-int rtw_get_wpa2_cipher_suite23a(const u8 *s);
int rtw_parse_wpa_ie23a(const u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
int rtw_parse_wpa2_ie23a(const u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
-int rtw_get_sec_ie23a(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len);
-
-u8 *rtw_get_wps_ie23a(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen);
-u8 *rtw_get_wps_attr23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr);
-u8 *rtw_get_wps_attr_content23a(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content);
+const u8 *rtw_get_wps_attr23a(const u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr);
+const u8 *rtw_get_wps_attr_content23a(const u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content);
uint rtw_get_rateset_len23a(u8 *rateset);
void rtw_get_bcn_info23a(struct wlan_network *pnetwork);
-u16 rtw_mcs_rate23a(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char * MCS_rate);
-
-const char *action_public_str23a(u8 action);
+u16 rtw_mcs_rate23a(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
+ struct ieee80211_mcs_info *mcs);
#endif /* IEEE80211_H */
unsigned char *da, unsigned short reason);
#endif /* CONFIG_8723AU_AP_MODE */
-void rtw_cfg80211_rx_action(struct rtw_adapter *adapter, u8 *frame,
- uint frame_len, const char*msg);
-
bool rtw_cfg80211_pwr_mgmt(struct rtw_adapter *adapter);
#endif /* __IOCTL_CFG80211_H__ */
void CheckFwRsvdPageContent23a(struct rtw_adapter *padapter);
+int FillH2CCmd(struct rtw_adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
+
#endif
#define DBG_8723A_LEVEL(_level, fmt, arg...) \
do { \
if (_level <= GlobalDebugLevel23A) \
- pr_info(DRIVER_PREFIX"ERROR " fmt, ##arg);\
+ pr_info(DRIVER_PREFIX fmt, ##arg);\
} while (0)
#define DBG_8723A(...) \
Used to report a bss has been scanned
*/
struct survey_event {
- struct wlan_bssid_ex bss;
+ struct wlan_bssid_ex *bss;
};
/*
struct ht_priv
{
- u32 ht_option;
- u32 ampdu_enable;/* for enable Tx A-MPDU */
+ bool ht_option;
+ bool ampdu_enable;/* for enable Tx A-MPDU */
/* u8 baddbareq_issued[16]; */
u32 tx_amsdu_enable;/* for enable Tx A-MSDU */
u32 tx_amdsu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */
+++ /dev/null
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- ******************************************************************************/
-#ifndef __RTW_IOCTL_SET_H_
-#define __RTW_IOCTL_SET_H_
-
-#include <drv_types.h>
-
-int rtw_set_802_11_authentication_mode23a(struct rtw_adapter *pdapter,
- enum ndis_802_11_auth_mode authmode);
-int rtw_set_802_11_bssid23a_list_scan(struct rtw_adapter *padapter,
- struct cfg80211_ssid *pssid,
- int ssid_max_num);
-int rtw_set_802_11_ssid23a(struct rtw_adapter * padapter,
- struct cfg80211_ssid * ssid);
-
-u16 rtw_get_cur_max_rate23a(struct rtw_adapter *adapter);
-s32 FillH2CCmd(struct rtw_adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
-int rtw_do_join23a(struct rtw_adapter *padapter);
-
-#endif
u32 assoc_req_len;
u32 assoc_rsp_len;
u8 *assoc_rsp;
- u32 wps_assoc_resp_ie_len;
- u8 *wps_assoc_resp_ie;
- u8 *wps_probe_resp_ie;
- u32 wps_probe_resp_ie_len;
- u8 *wps_beacon_ie;
- u32 wps_beacon_ie_len;
- u32 p2p_go_probe_resp_ie_len; /* for GO */
- u32 p2p_assoc_req_ie_len;
- u8 *p2p_beacon_ie;
- u8 *p2p_probe_req_ie;
- u8 *p2p_probe_resp_ie;
- u8 *p2p_go_probe_resp_ie; /* for GO */
- u8 *p2p_assoc_req_ie;
- u32 p2p_beacon_ie_len;
- u32 p2p_probe_req_ie_len;
- u32 p2p_probe_resp_ie_len;
- u8 *wfd_assoc_req_ie;
- u32 wfd_assoc_req_ie_len;
#ifdef CONFIG_8723AU_AP_MODE
/* Number of associated Non-ERP stations (i.e., stations using 802.11b
u8 update_bcn;
#endif /* ifdef CONFIG_8723AU_AP_MODE */
-
- u8 *wfd_beacon_ie;
- u8 *wfd_probe_req_ie;
- u8 *wfd_probe_resp_ie;
- u8 *wfd_go_probe_resp_ie; /* for GO */
-
- u32 wfd_beacon_ie_len;
- u32 wfd_probe_req_ie_len;
- u32 wfd_probe_resp_ie_len;
- u32 wfd_go_probe_resp_ie_len; /* for GO */
};
void rtw_joinbss_event_prehandle23a(struct rtw_adapter *adapter, u8 *pbuf);
void rtw_free_mlme_priv23a(struct mlme_priv *pmlmepriv);
+int rtw_do_join_adhoc(struct rtw_adapter *adapter);
+int rtw_do_join_network(struct rtw_adapter *adapter,
+ struct wlan_network *candidate);
int rtw_select_and_join_from_scanned_queue23a(struct mlme_priv *pmlmepriv);
int rtw_set_key23a(struct rtw_adapter *adapter,
struct security_priv *psecuritypriv, int keyid, u8 set_tx);
spin_unlock_bh(&pmlmepriv->lock);
}
-u16 rtw_get_capability23a(struct wlan_bssid_ex *bss);
-void rtw_update_scanned_network23a(struct rtw_adapter *adapter,
- struct wlan_bssid_ex *target);
void rtw_disconnect_hdl23a_under_linked(struct rtw_adapter *adapter,
struct sta_info *psta, u8 free_assoc);
void rtw_generate_random_ibss23a(u8 *pibss);
void rtw_update_registrypriv_dev_network23a(struct rtw_adapter *adapter);
-void rtw_get_encrypt_decrypt_from_registrypriv23a(struct rtw_adapter *adapter);
-
void rtw_scan_timeout_handler23a(unsigned long data);
void rtw_dynamic_check_timer_handler(unsigned long data);
int rtw_linked_check(struct rtw_adapter *padapter);
-__le16 *rtw_get_capability23a_from_ie(u8 *ie);
-__le16 *rtw_get_beacon_interval23a_from_ie(u8 *ie);
-
-
void rtw_joinbss_reset23a(struct rtw_adapter *padapter);
-unsigned int rtw_restructure_ht_ie23a(struct rtw_adapter *padapter, u8 *in_ie,
- u8 *out_ie, uint in_len, uint *pout_len);
+bool rtw_restructure_ht_ie23a(struct rtw_adapter *padapter, u8 *in_ie,
+ u8 *out_ie, uint in_len, uint *pout_len);
void rtw_update_ht_cap23a(struct rtw_adapter *padapter,
u8 *pie, uint ie_len);
void rtw_issue_addbareq_cmd23a(struct rtw_adapter *padapter,
struct xmit_frame *pxmitframe);
-int rtw_is_same_ibss23a(struct rtw_adapter *adapter,
- struct wlan_network *pnetwork);
+bool rtw_is_same_ibss23a(struct rtw_adapter *adapter,
+ struct wlan_network *pnetwork);
int is_same_network23a(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst);
void rtw23a_roaming(struct rtw_adapter *adapter,
struct ADDBA_request ADDBA_req;
struct WMM_para_element WMM_param;
- struct HT_caps_element HT_caps;
- struct HT_info_element HT_info;
+ struct ieee80211_ht_cap ht_cap;
+ struct ieee80211_ht_operation HT_info;
struct wlan_bssid_ex network;/* join network or bss_network, if in ap mode, it is the same to cur_network.network */
struct FW_Sta_Info FW_sta_info[NUM_STA];
};
bool IsLegal5GChannel(struct rtw_adapter *Adapter, u8 channel);
-int collect_bss_info23a(struct rtw_adapter *padapter,
- struct recv_frame *precv_frame,
- struct wlan_bssid_ex *bssid);
void update_network23a(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
struct rtw_adapter *padapter, bool update_ie);
u8 *get_my_bssid23a(struct wlan_bssid_ex *pnetwork);
-u16 get_beacon_interval23a(struct wlan_bssid_ex *bss);
bool is_client_associated_to_ap23a(struct rtw_adapter *padapter);
bool is_client_associated_to_ibss23a(struct rtw_adapter *padapter);
unsigned char check_assoc_AP23a(u8 *pframe, uint len);
-int WMM_param_handler23a(struct rtw_adapter *padapter, u8 *p);
+int WMM_param_handler23a(struct rtw_adapter *padapter, const u8 *p);
void WMMOnAssocRsp23a(struct rtw_adapter *padapter);
-void HT_caps_handler23a(struct rtw_adapter *padapter, u8 *p);
-void HT_info_handler23a(struct rtw_adapter *padapter, u8 *p);
+void HT_caps_handler23a(struct rtw_adapter *padapter, const u8 *p);
+void HT_info_handler23a(struct rtw_adapter *padapter, const u8 *p);
void HTOnAssocRsp23a(struct rtw_adapter *padapter);
-void ERP_IE_handler23a(struct rtw_adapter *padapter, u8 *p);
+void ERP_IE_handler23a(struct rtw_adapter *padapter, const u8 *p);
void VCS_update23a(struct rtw_adapter *padapter, struct sta_info *psta);
-void update_beacon23a_info(struct rtw_adapter *padapter, u8 *pframe, uint len,
- struct sta_info *psta);
+void update_beacon23a_info(struct rtw_adapter *padapter,
+ struct ieee80211_mgmt *mgmt, uint len,
+ struct sta_info *psta);
int rtw_check_bcn_info23a(struct rtw_adapter *Adapter,
struct ieee80211_mgmt *mgmt, u32 packet_len);
void update_IOT_info23a(struct rtw_adapter *padapter);
void update_sta_info23a(struct rtw_adapter *padapter, struct sta_info *psta);
unsigned int update_basic_rate23a(unsigned char *ptn, unsigned int ptn_sz);
unsigned int update_supported_rate23a(unsigned char *ptn, unsigned int ptn_sz);
-unsigned int update_MSC_rate23a(struct HT_caps_element *pHT_caps);
+unsigned int update_MSC_rate23a(struct ieee80211_ht_cap *ht_cap);
void Update_RA_Entry23a(struct rtw_adapter *padapter, struct sta_info *psta);
void set_sta_rate23a(struct rtw_adapter *padapter, struct sta_info *psta);
unsigned char get_highest_rate_idx23a(u32 mask);
int support_short_GI23a(struct rtw_adapter *padapter,
- struct HT_caps_element *pHT_caps);
+ struct ieee80211_ht_cap *ht_cap);
bool is_ap_in_tkip23a(struct rtw_adapter *padapter);
bool is_ap_in_wep23a(struct rtw_adapter *padapter);
bool should_forbid_n_rate23a(struct rtw_adapter *padapter);
HT_CHANNEL_WIDTH_10 = 4,
};
-/* */
-/* Represent Extention Channel Offset in HT Capabilities */
-/* This is available only in 40Mhz mode. */
-/* */
-enum {
- HT_EXTCHNL_OFFSET_NO_EXT = 0,
- HT_EXTCHNL_OFFSET_UPPER = 1,
- HT_EXTCHNL_OFFSET_NO_DEF = 2,
- HT_EXTCHNL_OFFSET_LOWER = 3,
-};
-
/* 2007/11/15 MH Define different RF type. */
enum {
RF_1T2R = 0,
#define is_wep_enc(alg) (alg == WLAN_CIPHER_SUITE_WEP40 || \
alg == WLAN_CIPHER_SUITE_WEP104)
-#define _WPA2_IE_ID_ 0x30
-
#define SHA256_MAC_LEN 32
#define AES_BLOCK_SIZE 16
#define AES_PRIV_SIZE (4 * 44)
u8 assoc_info[600];
u8 szofcapability[256]; /* for wpa2 usage */
u8 oidassociation[512]; /* for wpa/wpa2 usage */
- u8 authenticator_ie[256]; /* store ap security information element */
u8 supplicant_ie[256]; /* store sta security information element */
/* for tkip countermeasure */
#define _AUTH_IE_OFFSET_ 6
#define _DEAUTH_IE_OFFSET_ 0
#define _BEACON_IE_OFFSET_ 12
-#define _PUBLIC_ACTION_IE_OFFSET_ 8
#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_
#define _STATUS_CODE_ 2
#define _TIMESTAMP_ 8
-/*-----------------------------------------------------------------------------
- Below is the definition for WMM
-------------------------------------------------------------------------------*/
-#define _WMM_IE_Length_ 7 /* for WMM STA */
-#define _WMM_Para_Element_Length_ 24
-
-
/*-----------------------------------------------------------------------------
Below is the definition for 802.11n
------------------------------------------------------------------------------*/
-/* struct rtw_ieee80211_ht_cap - HT additional information
- *
- * This structure refers to "HT information element" as
- * described in 802.11n draft section 7.3.2.53
- */
-struct ieee80211_ht_addt_info {
- unsigned char control_chan;
- unsigned char ht_param;
- unsigned short operation_mode;
- unsigned short stbc_param;
- unsigned char basic_set[16];
-} __packed;
-
-struct HT_caps_element {
- union {
- struct {
- unsigned short HT_caps_info;
- unsigned char AMPDU_para;
- unsigned char MCS_rate[16];
- unsigned short HT_ext_caps;
- unsigned int Beamforming_caps;
- unsigned char ASEL_caps;
- } HT_cap_element;
- unsigned char HT_cap[26];
- } u;
-} __packed;
-
-struct HT_info_element {
- unsigned char primary_channel;
- unsigned char infos[5];
- unsigned char MCS_rate[16];
-} __packed;
-
struct AC_param {
unsigned char ACI_AIFSN;
unsigned char CW;
int is_8021x;
/* bwmode 20/40 and ch_offset UP/LOW */
- unsigned short ht_cap_info;
- unsigned char ht_info_infos_0;
};
struct wlan_bssid_ex {
struct cfg80211_ssid Ssid;
u32 Privacy;
long Rssi;/* in dBM, raw data , get from PHY) */
- u16 BeaconPeriod; /* units are Kusec */
+ u16 beacon_interval;
+ u16 capability;
+ u64 tsf;
u32 ATIMWindow; /* units are Kusec */
u32 DSConfig; /* Frequency, units are kHz */
enum nl80211_iftype ifmode;
#include <osdep_service.h>
#include <drv_types.h>
-#include <rtw_ioctl_set.h>
#include <xmit_osdep.h>
#include "ioctl_cfg80211.h"
#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 65535 /* ms */
#define RTW_MAX_NUM_PMKIDS 4
-#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */
-
static const u32 rtw_cipher_suites[] = {
WLAN_CIPHER_SUITE_WEP40,
WLAN_CIPHER_SUITE_WEP104,
},
};
-#define MAX_BSSINFO_LEN 1000
static int rtw_cfg80211_inform_bss(struct rtw_adapter *padapter,
struct wlan_network *pnetwork)
{
int ret = 0;
struct ieee80211_channel *notify_channel;
struct cfg80211_bss *bss;
- /* struct ieee80211_supported_band *band; */
u16 channel;
u32 freq;
- u64 notify_timestamp;
- u16 notify_capability;
- u16 notify_interval;
u8 *notify_ie;
size_t notify_ielen;
s32 notify_signal;
- u8 buf[MAX_BSSINFO_LEN], *pbuf;
- size_t len;
- struct ieee80211_hdr *pwlanhdr;
struct wireless_dev *wdev = padapter->rtw_wdev;
struct wiphy *wiphy = wdev->wiphy;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- /* DBG_8723A("%s\n", __func__); */
-
- if (pnetwork->network.IELength > MAX_IE_SZ) {
- DBG_8723A("%s IE Length too long > %d byte\n", __func__,
- MAX_IE_SZ);
- goto exit;
- }
-
channel = pnetwork->network.DSConfig;
if (channel <= RTW_CH_MAX_2G_CHANNEL)
freq = ieee80211_channel_to_frequency(channel,
notify_channel = ieee80211_get_channel(wiphy, freq);
- notify_timestamp = jiffies_to_msecs(jiffies) * 1000; /* uSec */
-
- notify_interval =
- get_unaligned_le16(
- rtw_get_beacon_interval23a_from_ie(pnetwork->network.IEs));
- notify_capability =
- get_unaligned_le16(
- rtw_get_capability23a_from_ie(pnetwork->network.IEs));
-
notify_ie = pnetwork->network.IEs + _FIXED_IE_LENGTH_;
notify_ielen = pnetwork->network.IELength - _FIXED_IE_LENGTH_;
} else {
notify_signal = 100 * translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength); /* dbm */
}
- pbuf = buf;
-
- pwlanhdr = (struct ieee80211_hdr *)pbuf;
- pwlanhdr->seq_ctrl = 0;
-
- if (pnetwork->network.reserved == 1) { /* WIFI_BEACON */
- eth_broadcast_addr(pwlanhdr->addr1);
- pwlanhdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_BEACON);
- } else {
- ether_addr_copy(pwlanhdr->addr1, myid(&padapter->eeprompriv));
- pwlanhdr->frame_control =
- cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_PROBE_RESP);
- }
-
- ether_addr_copy(pwlanhdr->addr2, pnetwork->network.MacAddress);
- ether_addr_copy(pwlanhdr->addr3, pnetwork->network.MacAddress);
-
- pbuf += sizeof(struct ieee80211_hdr_3addr);
- len = sizeof(struct ieee80211_hdr_3addr);
-
- memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength);
- len += pnetwork->network.IELength;
-
- bss = cfg80211_inform_bss_frame(wiphy, notify_channel,
- (struct ieee80211_mgmt *)buf, len,
- notify_signal, GFP_ATOMIC);
+ bss = cfg80211_inform_bss(wiphy, notify_channel,
+ pnetwork->network.MacAddress,
+ pnetwork->network.tsf,
+ pnetwork->network.capability,
+ pnetwork->network.beacon_interval,
+ notify_ie, notify_ielen,
+ notify_signal, GFP_ATOMIC);
if (unlikely(!bss)) {
DBG_8723A("rtw_cfg80211_inform_bss error\n");
cfg80211_put_bss(wiphy, bss);
-exit:
return ret;
}
return 0;
}
+static u16 rtw_get_cur_max_rate(struct rtw_adapter *adapter)
+{
+ int i = 0;
+ const u8 *p;
+ u16 rate = 0, max_rate = 0;
+ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
+ struct registry_priv *pregistrypriv = &adapter->registrypriv;
+ struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
+ struct ieee80211_ht_cap *pht_capie;
+ u8 rf_type = 0;
+ u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0;
+ u16 mcs_rate = 0;
+
+ p = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, &pcur_bss->IEs[12],
+ pcur_bss->IELength - 12);
+ if (p && p[1] > 0) {
+ pht_capie = (struct ieee80211_ht_cap *)(p + 2);
+
+ memcpy(&mcs_rate, &pht_capie->mcs, 2);
+
+ /* bw_40MHz = (pht_capie->cap_info&
+ IEEE80211_HT_CAP_SUP_WIDTH_20_40) ? 1:0; */
+ /* cur_bwmod is updated by beacon, pmlmeinfo is
+ updated by association response */
+ bw_40MHz = (pmlmeext->cur_bwmode &&
+ (pmlmeinfo->HT_info.ht_param &
+ IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)) ? 1:0;
+
+ /* short_GI = (pht_capie->cap_info & (IEEE80211_HT_CAP
+ _SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1 : 0; */
+ short_GI_20 = (pmlmeinfo->ht_cap.cap_info &
+ cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) ? 1:0;
+ short_GI_40 = (pmlmeinfo->ht_cap.cap_info &
+ cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) ? 1:0;
+
+ rf_type = rtl8723a_get_rf_type(adapter);
+ max_rate = rtw_mcs_rate23a(rf_type, bw_40MHz &
+ pregistrypriv->cbw40_enable,
+ short_GI_20, short_GI_40,
+ &pmlmeinfo->ht_cap.mcs);
+ } else {
+ while (pcur_bss->SupportedRates[i] != 0 &&
+ pcur_bss->SupportedRates[i] != 0xFF) {
+ rate = pcur_bss->SupportedRates[i] & 0x7F;
+ if (rate>max_rate)
+ max_rate = rate;
+ i++;
+ }
+
+ max_rate = max_rate * 10 / 2;
+ }
+
+ return max_rate;
+}
+
static int cfg80211_rtw_get_station(struct wiphy *wiphy,
struct net_device *ndev,
const u8 *mac, struct station_info *sinfo)
signal_strength);
sinfo->filled |= STATION_INFO_TX_BITRATE;
- sinfo->txrate.legacy = rtw_get_cur_max_rate23a(padapter);
+ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter);
sinfo->filled |= STATION_INFO_RX_PACKETS;
sinfo->rx_packets = sta_rx_data_pkts(psta);
char *buf, int len)
{
int ret = 0;
- uint wps_ielen = 0;
- u8 *wps_ie;
+ const u8 *wps_ie;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
DBG_8723A("%s, ielen =%d\n", __func__, len);
if (len > 0) {
- wps_ie = rtw_get_wps_ie23a(buf, len, NULL, &wps_ielen);
+ wps_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ buf, len);
if (wps_ie) {
- DBG_8723A("probe_req_wps_ielen =%d\n", wps_ielen);
+ DBG_8723A("probe_req_wps_ielen =%d\n", wps_ie[1]);
if (pmlmepriv->wps_probe_req_ie) {
pmlmepriv->wps_probe_req_ie_len = 0;
pmlmepriv->wps_probe_req_ie = NULL;
}
- pmlmepriv->wps_probe_req_ie = kmemdup(wps_ie,
- wps_ielen,
+ pmlmepriv->wps_probe_req_ie = kmemdup(wps_ie, wps_ie[1],
GFP_KERNEL);
if (pmlmepriv->wps_probe_req_ie == NULL) {
DBG_8723A("%s()-%d: kmalloc() ERROR!\n",
__func__, __LINE__);
return -EINVAL;
}
- pmlmepriv->wps_probe_req_ie_len = wps_ielen;
+ pmlmepriv->wps_probe_req_ie_len = wps_ie[1];
}
}
static int rtw_cfg80211_set_wpa_ie(struct rtw_adapter *padapter, const u8 *pie,
size_t ielen)
{
- u8 *buf = NULL;
+ const u8 *wps_ie;
int group_cipher = 0, pairwise_cipher = 0;
int ret = 0;
const u8 *pwpa, *pwpa2;
ret = -EINVAL;
goto exit;
}
- buf = kmemdup(pie, ielen, GFP_KERNEL);
- if (buf == NULL) {
- ret = -ENOMEM;
- goto exit;
- }
/* dump */
DBG_8723A("set wpa_ie(length:%zu):\n", ielen);
for (i = 0; i < ielen; i = i + 8)
- DBG_8723A("0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n",
- buf[i], buf[i + 1],
- buf[i + 2], buf[i + 3], buf[i + 4],
- buf[i + 5], buf[i + 6], buf[i + 7]);
+ DBG_8723A("0x%.2x 0x%.2x 0x%.2x 0x%.2x "
+ "0x%.2x 0x%.2x 0x%.2x 0x%.2x\n",
+ pie[i], pie[i + 1], pie[i + 2], pie[i + 3],
+ pie[i + 4], pie[i + 5], pie[i + 6], pie[i + 7]);
if (ielen < RSN_HEADER_LEN) {
RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_,
("Ie len too short %d\n", (int)ielen));
pwpa = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
WLAN_OUI_TYPE_MICROSOFT_WPA,
- buf, ielen);
+ pie, ielen);
if (pwpa && pwpa[1] > 0) {
if (rtw_parse_wpa_ie23a(pwpa, pwpa[1] + 2, &group_cipher,
&pairwise_cipher, NULL) == _SUCCESS) {
}
}
- pwpa2 = cfg80211_find_ie(WLAN_EID_RSN, buf, ielen);
+ pwpa2 = cfg80211_find_ie(WLAN_EID_RSN, pie, ielen);
if (pwpa2 && pwpa2[1] > 0) {
if (rtw_parse_wpa2_ie23a (pwpa2, pwpa2[1] + 2, &group_cipher,
&pairwise_cipher, NULL) == _SUCCESS) {
break;
}
- { /* handle wps_ie */
- uint wps_ielen;
- u8 *wps_ie;
-
- wps_ie = rtw_get_wps_ie23a(buf, ielen, NULL, &wps_ielen);
- if (wps_ie && wps_ielen > 0) {
- DBG_8723A("got wps_ie, wps_ielen:%u\n", wps_ielen);
- padapter->securitypriv.wps_ie_len =
- wps_ielen <
- MAX_WPS_IE_LEN ? wps_ielen : MAX_WPS_IE_LEN;
- memcpy(padapter->securitypriv.wps_ie, wps_ie,
- padapter->securitypriv.wps_ie_len);
- set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS);
- } else {
- _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS);
- }
+ wps_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ pie, ielen);
+ if (wps_ie && wps_ie[1] > 0) {
+ DBG_8723A("got wps_ie, wps_ielen:%u\n", wps_ie[1]);
+ padapter->securitypriv.wps_ie_len = wps_ie[1];
+ memcpy(padapter->securitypriv.wps_ie, wps_ie,
+ padapter->securitypriv.wps_ie_len);
+ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS);
+ } else {
+ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS);
}
/* TKIP and AES disallow multicast packets until installing group key */
padapter->securitypriv.ndisauthtype));
exit:
- kfree(buf);
if (ret)
_clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS);
return ret;
}
switch (wep->keylen) {
- case 5:
+ case WLAN_KEY_LEN_WEP40:
psecuritypriv->dot11PrivacyAlgrthm = WLAN_CIPHER_SUITE_WEP40;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("%s:wep->KeyLength = 5\n", __func__));
break;
- case 13:
+ case WLAN_KEY_LEN_WEP104:
psecuritypriv->dot11PrivacyAlgrthm = WLAN_CIPHER_SUITE_WEP104;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("%s:wep->KeyLength = 13\n", __func__));
return res;
}
+static int rtw_set_ssid(struct rtw_adapter *padapter,
+ struct wlan_network *newnetwork)
+{
+ struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+ struct wlan_network *pnetwork = &pmlmepriv->cur_network;
+ int status = _SUCCESS;
+ u32 cur_time = 0;
+
+ DBG_8723A_LEVEL(_drv_always_, "set ssid [%s] fw_state = 0x%08x\n",
+ newnetwork->network.Ssid.ssid, get_fwstate(pmlmepriv));
+
+ if (padapter->hw_init_completed == false) {
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+ ("set_ssid: hw_init_completed == false =>exit!!!\n"));
+ status = _FAIL;
+ goto exit;
+ }
+
+ spin_lock_bh(&pmlmepriv->lock);
+
+ DBG_8723A("Set SSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
+ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
+ goto handle_tkip_countermeasure;
+
+ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) {
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
+ ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
+
+ if (pmlmepriv->assoc_ssid.ssid_len ==
+ newnetwork->network.Ssid.ssid_len &&
+ !memcmp(&pmlmepriv->assoc_ssid.ssid,
+ newnetwork->network.Ssid.ssid,
+ newnetwork->network.Ssid.ssid_len)) {
+ if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+ RT_TRACE(_module_rtl871x_ioctl_set_c_,
+ _drv_err_, ("New SSID is same SSID, "
+ "fw_state = 0x%08x\n",
+ get_fwstate(pmlmepriv)));
+
+ if (rtw_is_same_ibss23a(padapter, pnetwork)) {
+ /*
+ * it means driver is in
+ * WIFI_ADHOC_MASTER_STATE, we needn't
+ * create bss again.
+ */
+ goto release_mlme_lock;
+ }
+
+ /*
+ * if in WIFI_ADHOC_MASTER_STATE |
+ * WIFI_ADHOC_STATE, create bss or
+ * rejoin again
+ */
+ rtw_disassoc_cmd23a(padapter, 0, true);
+
+ if (check_fwstate(pmlmepriv, _FW_LINKED))
+ rtw_indicate_disconnect23a(padapter);
+
+ rtw_free_assoc_resources23a(padapter, 1);
+
+ if (check_fwstate(pmlmepriv,
+ WIFI_ADHOC_MASTER_STATE)) {
+ _clr_fwstate_(pmlmepriv,
+ WIFI_ADHOC_MASTER_STATE);
+ set_fwstate(pmlmepriv,
+ WIFI_ADHOC_STATE);
+ }
+ } else {
+ rtw_lps_ctrl_wk_cmd23a(padapter,
+ LPS_CTRL_JOINBSS, 1);
+ }
+ } else {
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
+ ("Set SSID not the same ssid\n"));
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
+ ("set_ssid =[%s] len = 0x%x\n",
+ newnetwork->network.Ssid.ssid,
+ newnetwork->network.Ssid.ssid_len));
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
+ ("assoc_ssid =[%s] len = 0x%x\n",
+ pmlmepriv->assoc_ssid.ssid,
+ pmlmepriv->assoc_ssid.ssid_len));
+
+ rtw_disassoc_cmd23a(padapter, 0, true);
+
+ if (check_fwstate(pmlmepriv, _FW_LINKED))
+ rtw_indicate_disconnect23a(padapter);
+
+ rtw_free_assoc_resources23a(padapter, 1);
+
+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
+ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
+ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
+ }
+ }
+ }
+
+handle_tkip_countermeasure:
+
+ if (padapter->securitypriv.btkip_countermeasure == true) {
+ cur_time = jiffies;
+
+ if ((cur_time -
+ padapter->securitypriv.btkip_countermeasure_time) >
+ 60 * HZ) {
+ padapter->securitypriv.btkip_countermeasure = false;
+ padapter->securitypriv.btkip_countermeasure_time = 0;
+ } else {
+ status = _FAIL;
+ goto release_mlme_lock;
+ }
+ }
+
+ memcpy(&pmlmepriv->assoc_ssid, &newnetwork->network.Ssid,
+ sizeof(struct cfg80211_ssid));
+
+ pmlmepriv->assoc_by_bssid = false;
+
+ pmlmepriv->to_join = true;
+
+ if (!check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) {
+ pmlmepriv->cur_network.join_res = -2;
+
+ status = rtw_do_join_network(padapter, newnetwork);
+ if (status == _SUCCESS) {
+ pmlmepriv->to_join = false;
+ } else {
+ if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
+ /* switch to ADHOC_MASTER */
+ status = rtw_do_join_adhoc(padapter);
+ if (status != _SUCCESS)
+ goto release_mlme_lock;
+ } else {
+ /* can't associate ; reset under-linking */
+ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
+ status = _FAIL;
+ pmlmepriv->to_join = false;
+ }
+ }
+ }
+release_mlme_lock:
+ spin_unlock_bh(&pmlmepriv->lock);
+
+exit:
+ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
+ ("-%s: status =%d\n", __func__, status));
+
+ return status;
+}
+
static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
struct cfg80211_connect_params *sme)
{
int ret = 0;
struct list_head *phead, *plist, *ptmp;
struct wlan_network *pnetwork = NULL;
- enum ndis_802_11_auth_mode authmode;
- struct cfg80211_ssid ndis_ssid;
- u8 *dst_ssid;
- u8 *src_ssid;
- u8 *dst_bssid;
- const u8 *src_bssid;
/* u8 matched_by_bssid = false; */
/* u8 matched_by_ssid = false; */
u8 matched = false;
goto exit;
}
- if (!sme->ssid || !sme->ssid_len) {
+ if (!sme->ssid || !sme->ssid_len ||
+ sme->ssid_len > IEEE80211_MAX_SSID_LEN) {
ret = -EINVAL;
goto exit;
}
- if (sme->ssid_len > IW_ESSID_MAX_SIZE) {
- ret = -E2BIG;
- goto exit;
- }
-
- memset(&ndis_ssid, 0, sizeof(struct cfg80211_ssid));
- ndis_ssid.ssid_len = sme->ssid_len;
- memcpy(ndis_ssid.ssid, sme->ssid, sme->ssid_len);
-
- DBG_8723A("ssid =%s, len =%zu\n", ndis_ssid.ssid, sme->ssid_len);
+ DBG_8723A("ssid =%s, len =%zu\n", sme->ssid, sme->ssid_len);
if (sme->bssid)
DBG_8723A("bssid =" MAC_FMT "\n", MAC_ARG(sme->bssid));
list_for_each_safe(plist, ptmp, phead) {
pnetwork = container_of(plist, struct wlan_network, list);
- dst_ssid = pnetwork->network.Ssid.ssid;
- dst_bssid = pnetwork->network.MacAddress;
-
if (sme->bssid) {
if (!ether_addr_equal(pnetwork->network.MacAddress,
sme->bssid))
}
if (sme->bssid) {
- src_bssid = sme->bssid;
-
- if (ether_addr_equal(dst_bssid, src_bssid)) {
+ if (ether_addr_equal(pnetwork->network.MacAddress,
+ sme->bssid)) {
DBG_8723A("matched by bssid\n");
- ndis_ssid.ssid_len =
- pnetwork->network.Ssid.ssid_len;
- memcpy(ndis_ssid.ssid,
- pnetwork->network.Ssid.ssid,
- pnetwork->network.Ssid.ssid_len);
-
matched = true;
break;
}
-
} else if (sme->ssid && sme->ssid_len) {
- src_ssid = ndis_ssid.ssid;
-
- if ((!memcmp(dst_ssid, src_ssid, ndis_ssid.ssid_len)) &&
- (pnetwork->network.Ssid.ssid_len ==
- ndis_ssid.ssid_len)) {
+ if (!memcmp(pnetwork->network.Ssid.ssid,
+ sme->ssid, sme->ssid_len) &&
+ pnetwork->network.Ssid.ssid_len == sme->ssid_len) {
DBG_8723A("matched by ssid\n");
+
matched = true;
break;
}
spin_unlock_bh(&queue->lock);
- if (!matched || (pnetwork == NULL)) {
+ if (!matched || !pnetwork) {
ret = -ENOENT;
DBG_8723A("connect, matched == false, goto exit\n");
goto exit;
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open;
psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen;
- ret =
- rtw_cfg80211_set_wpa_version(psecuritypriv,
- sme->crypto.wpa_versions);
+ ret = rtw_cfg80211_set_wpa_version(psecuritypriv,
+ sme->crypto.wpa_versions);
if (ret < 0)
goto exit;
ret = rtw_cfg80211_set_cipher(psecuritypriv,
sme->crypto.cipher_group, false);
if (ret < 0)
- return ret;
+ goto exit;
if (sme->crypto.n_akm_suites) {
ret = rtw_cfg80211_set_key_mgt(psecuritypriv,
goto exit;
}
- authmode = psecuritypriv->ndisauthtype;
- rtw_set_802_11_authentication_mode23a(padapter, authmode);
+ if (psecuritypriv->ndisauthtype > 3)
+ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
+
+ if (rtw_set_auth23a(padapter, psecuritypriv) != _SUCCESS) {
+ ret = -EBUSY;
+ goto exit;
+ }
/* rtw_set_802_11_encryption_mode(padapter,
padapter->securitypriv.ndisencryptstatus); */
- if (rtw_set_802_11_ssid23a(padapter, &ndis_ssid) == false) {
- ret = -1;
+ if (rtw_set_ssid(padapter, pnetwork) != _SUCCESS) {
+ ret = -EBUSY;
goto exit;
}
{
s32 freq;
int channel;
- u8 *pmgmt_frame;
uint frame_len;
- struct ieee80211_hdr *pwlanhdr;
- u8 mgmt_buf[128];
+ struct ieee80211_mgmt mgmt;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct net_device *ndev = padapter->pnetdev;
DBG_8723A("%s(padapter =%p,%s)\n", __func__, padapter, ndev->name);
- memset(mgmt_buf, 0, 128);
+ memset(&mgmt, 0, sizeof(struct ieee80211_mgmt));
#if defined(RTW_USE_CFG80211_STA_EVENT)
cfg80211_del_sta(ndev, da, GFP_ATOMIC);
freq = ieee80211_channel_to_frequency(channel,
IEEE80211_BAND_5GHZ);
- pmgmt_frame = mgmt_buf;
- pwlanhdr = (struct ieee80211_hdr *)pmgmt_frame;
-
- pwlanhdr->frame_control =
+ mgmt.frame_control =
cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_DEAUTH);
- ether_addr_copy(pwlanhdr->addr1, myid(&padapter->eeprompriv));
- ether_addr_copy(pwlanhdr->addr2, da);
- ether_addr_copy(pwlanhdr->addr3, get_my_bssid23a(&pmlmeinfo->network));
+ ether_addr_copy(mgmt.da, myid(&padapter->eeprompriv));
+ ether_addr_copy(mgmt.sa, da);
+ ether_addr_copy(mgmt.bssid, get_my_bssid23a(&pmlmeinfo->network));
- pwlanhdr->seq_ctrl =
- cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
+ mgmt.seq_ctrl = cpu_to_le16(IEEE80211_SN_TO_SEQ(pmlmeext->mgnt_seq));
pmlmeext->mgnt_seq++;
- pmgmt_frame += sizeof(struct ieee80211_hdr_3addr);
- frame_len = sizeof(struct ieee80211_hdr_3addr);
+ mgmt.u.disassoc.reason_code = cpu_to_le16(reason);
- reason = cpu_to_le16(reason);
- pmgmt_frame = rtw_set_fixed_ie23a(pmgmt_frame,
- WLAN_REASON_PREV_AUTH_NOT_VALID,
- (unsigned char *)&reason, &frame_len);
+ frame_len = sizeof(struct ieee80211_hdr_3addr) + 2;
- cfg80211_rx_mgmt(padapter->rtw_wdev, freq, 0, mgmt_buf, frame_len,
+ cfg80211_rx_mgmt(padapter->rtw_wdev, freq, 0, (u8 *)&mgmt, frame_len,
0, GFP_ATOMIC);
#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */
}
MAC_ARG(mgmt->da), __func__, ndev->name);
category = mgmt->u.action.category;
action = mgmt->u.action.u.wme_action.action_code;
- if (mgmt->u.action.category == WLAN_CATEGORY_PUBLIC)
- DBG_8723A("RTW_Tx:%s\n", action_public_str23a(action));
- else
- DBG_8723A("RTW_Tx:category(%u), action(%u)\n", category,
- action);
+ DBG_8723A("RTW_Tx:category(%u), action(%u)\n",
+ category, action);
/* starting alloc mgmt frame to dump it */
pmgntframe = alloc_mgtxmitframe23a(pxmitpriv);
size_t head_len, const u8 *tail, size_t tail_len)
{
int ret = 0;
- u8 *pbuf = NULL;
+ u8 *pbuf;
uint len, wps_ielen = 0;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+ struct wlan_bssid_ex *bss = &pmlmepriv->cur_network.network;
+ const struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)head;
/* struct sta_priv *pstapriv = &padapter->stapriv; */
DBG_8723A("%s beacon_head_len =%zu, beacon_tail_len =%zu\n",
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true)
return -EINVAL;
- if (head_len < 24)
+ if (head_len < offsetof(struct ieee80211_mgmt, u.beacon.variable))
return -EINVAL;
pbuf = kzalloc(head_len + tail_len, GFP_KERNEL);
if (!pbuf)
return -ENOMEM;
+
+ bss->beacon_interval = get_unaligned_le16(&mgmt->u.beacon.beacon_int);
+ bss->capability = get_unaligned_le16(&mgmt->u.beacon.capab_info);
+ bss->tsf = get_unaligned_le64(&mgmt->u.beacon.timestamp);
+
/* 24 = beacon header len. */
- memcpy(pbuf, (void *)head + 24, head_len - 24);
- memcpy(pbuf + head_len - 24, (void *)tail, tail_len);
+ memcpy(pbuf, (void *)head + sizeof(struct ieee80211_hdr_3addr),
+ head_len - sizeof(struct ieee80211_hdr_3addr));
+ memcpy(pbuf + head_len - sizeof(struct ieee80211_hdr_3addr),
+ (void *)tail, tail_len);
- len = head_len + tail_len - 24;
+ len = head_len + tail_len - sizeof(struct ieee80211_hdr_3addr);
/* check wps ie if inclued */
- if (rtw_get_wps_ie23a
- (pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL,
- &wps_ielen))
+ if (cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT,
+ WLAN_OUI_TYPE_MICROSOFT_WPS,
+ pbuf + _FIXED_IE_LENGTH_,
+ len - _FIXED_IE_LENGTH_))
DBG_8723A("add bcn, wps_ielen =%d\n", wps_ielen);
/* pbss_network->IEs will not include p2p_ie, wfd ie */
}
#endif /* CONFIG_8723AU_AP_MODE */
-void rtw_cfg80211_rx_action(struct rtw_adapter *adapter, u8 *frame,
- uint frame_len, const char *msg)
-{
- struct ieee80211_mgmt *hdr = (struct ieee80211_mgmt *)frame;
- s32 freq;
- int channel;
-
- channel = rtw_get_oper_ch23a(adapter);
-
- DBG_8723A("RTW_Rx:cur_ch =%d\n", channel);
- if (msg)
- DBG_8723A("RTW_Rx:%s\n", msg);
- else
- DBG_8723A("RTW_Rx:category(%u), action(%u)\n",
- hdr->u.action.category,
- hdr->u.action.u.wme_action.action_code);
-
- if (channel <= RTW_CH_MAX_2G_CHANNEL)
- freq = ieee80211_channel_to_frequency(channel,
- IEEE80211_BAND_2GHZ);
- else
- freq = ieee80211_channel_to_frequency(channel,
- IEEE80211_BAND_5GHZ);
-
- cfg80211_rx_mgmt(adapter->rtw_wdev, freq, 0, frame, frame_len,
- 0, GFP_ATOMIC);
-}
-
static int _cfg80211_rtw_mgmt_tx(struct rtw_adapter *padapter, u8 tx_ch,
const u8 *buf, size_t len)
{
MAC_ARG(hdr->da));
category = hdr->u.action.category;
action = hdr->u.action.u.wme_action.action_code;
- if (category == WLAN_CATEGORY_PUBLIC)
- DBG_8723A("RTW_Tx:%s\n", action_public_str23a(action));
- else
- DBG_8723A("RTW_Tx:category(%u), action(%u)\n",
- category, action);
+ DBG_8723A("RTW_Tx:category(%u), action(%u)\n", category, action);
do {
dump_cnt++;
#include <osdep_service.h>
#include <drv_types.h>
#include <mlme_osdep.h>
-#include <rtw_ioctl_set.h>
static struct rt_pmkid_list backupPMKIDList[NUM_PMKID_CACHE];
kfree(padapter->HalData);
padapter->HalData = NULL;
- RT_TRACE(_module_os_intfs_c_, _drv_info_, ("<== rtw_free_drv_sw23a\n"));
-
- /* clear pbuddy_adapter to avoid access wrong pointer. */
- if (padapter->pbuddy_adapter != NULL)
- padapter->pbuddy_adapter->pbuddy_adapter = NULL;
RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-rtw_free_drv_sw23a\n"));
return _SUCCESS;
}
pnetdev = rtw_init_netdev23a(padapter);
if (!pnetdev)
- goto handle_dualmac;
+ goto free_adapter;
padapter = netdev_priv(pnetdev);
padapter->dvobj = dvobj;
rtl8723au_set_hw_type(padapter);
- if (rtw_handle_dualmac23a(padapter, 1) != _SUCCESS)
- goto free_adapter;
-
SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj));
if (rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)))
- goto handle_dualmac;
+ goto free_adapter;
/* step 2. allocate HalData */
padapter->HalData = kzalloc(sizeof(struct hal_data_8723a), GFP_KERNEL);
rtw_wdev_unregister(padapter->rtw_wdev);
rtw_wdev_free(padapter->rtw_wdev);
}
-handle_dualmac:
- if (status != _SUCCESS)
- rtw_handle_dualmac23a(padapter, 0);
free_adapter:
if (status != _SUCCESS) {
if (pnetdev)
DBG_8723A("+r871xu_dev_remove, hw_init_completed =%d\n",
if1->hw_init_completed);
- rtw_handle_dualmac23a(if1, 0);
-
if (if1->rtw_wdev) {
rtw_wdev_unregister(if1->rtw_wdev);
rtw_wdev_free(if1->rtw_wdev);
select WEXT_PRIV
select EEPROM_93CX6
select CRYPTO
- default N
---help---
If built as a module, it will be called r8821ae.ko.
if (dn <= 0)
dn = 0;
- if(up >= n) // if ³sÄò n Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration
+ if(up >= n) // Google translated: if consecutive n-2 seconds retry count is 0, width-modulated WiFi duration
{
wait_count = 0;
n = 3;
if (up <= 0)
up = 0;
- if (dn == 2) // if ³sÄò 2 Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration
+ if (dn == 2) // Google translated: if 2 consecutive two seconds retry count <3, then tune narrow WiFi duration
{
if (wait_count <= 2)
- m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
+ m++; // Google translated: Avoid been back and forth in the two level
else
m = 1;
- if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
+ if ( m >= 20) // Google translated: m max = 20 'Max 120 seconds recheck whether to adjust WiFi duration.
m = 20;
n = 3*m;
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
}
}
- else //retry count > 3, ¥un1¦¸ retry count > 3, «h½Õ¯¶WiFi duration
+ else // Google translated: retry count> 3, as long as a second retry count> 3, then tune narrow WiFi duration
{
if (wait_count == 1)
- m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
+ m++; // Google translated: Avoid been back and forth in the two level
else
m = 1;
- if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
+ if ( m >= 20) // Google translated: m max = 20 'Max 120 seconds recheck whether to adjust WiFi duration.
m = 20;
n = 3*m;
}
-void rtl_p2p_noa_ie(struct ieee80211_hw *hw, void *data, unsigned int len)
+static void rtl_p2p_noa_ie(struct ieee80211_hw *hw, void *data,
+ unsigned int len)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct ieee80211_mgmt *mgmt = (void *)data;
}
}
-void rtl_p2p_action_ie(struct ieee80211_hw *hw, void *data, unsigned int len)
+static void rtl_p2p_action_ie(struct ieee80211_hw *hw, void *data,
+ unsigned int len)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct ieee80211_mgmt *mgmt = (void *)data;
u32 count = 0;
struct scatterlist *sg_src_tmp = sg_src;
struct scatterlist *sg_dst_tmp = sg_dst;
+
in_offset = 0;
out_offset = 0;
struct crypto_ahash *tfm = crypto_ahash_reqtfm(sep->current_hash_req);
struct this_task_ctx *ta_ctx = ahash_request_ctx(sep->current_hash_req);
struct sep_system_ctx *sctx = crypto_ahash_ctx(tfm);
+
dev_dbg(&ta_ctx->sep_used->pdev->dev,
"hash init post op\n");
struct crypto_ahash *tfm = crypto_ahash_reqtfm(sep->current_hash_req);
struct this_task_ctx *ta_ctx = ahash_request_ctx(sep->current_hash_req);
struct sep_system_ctx *sctx = crypto_ahash_ctx(tfm);
+
dev_dbg(&ta_ctx->sep_used->pdev->dev,
"hash update post op\n");
struct crypto_ahash *tfm = crypto_ahash_reqtfm(sep->current_hash_req);
struct sep_system_ctx *sctx = crypto_ahash_ctx(tfm);
struct this_task_ctx *ta_ctx = ahash_request_ctx(sep->current_hash_req);
+
dev_dbg(&ta_ctx->sep_used->pdev->dev,
"hash final post op\n");
struct crypto_ahash *tfm = crypto_ahash_reqtfm(sep->current_hash_req);
struct sep_system_ctx *sctx = crypto_ahash_ctx(tfm);
struct this_task_ctx *ta_ctx = ahash_request_ctx(sep->current_hash_req);
+
dev_dbg(&ta_ctx->sep_used->pdev->dev,
"hash digest post op\n");
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha1 final\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha1 digest\n");
/* Clear out task context */
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha1 finup\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing md5 init\n");
/* Clear out task context */
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing md5 update\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing md5 final\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha224 init\n");
/* Clear out task context */
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha224 update\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha224 final\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha256 init\n");
/* Clear out task context */
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha256 update\n");
ta_ctx->sep_used = sep_dev;
int error;
int error1;
struct this_task_ctx *ta_ctx = ahash_request_ctx(req);
+
pr_debug("sep - doing sha256 final\n");
ta_ctx->sep_used = sep_dev;
static void process_rx_char(struct usb_serial_port *port, unsigned char data)
{
struct urb *urb = port->read_urb;
+
if (urb->actual_length)
tty_insert_flip_char(&port->port, data, TTY_NORMAL);
}
#define MK_64 SKEIN_MK_64
/* blkSize = 256 bits. hashSize = 128 bits */
-const u64 SKEIN_256_IV_128[] = {
+static const u64 SKEIN_256_IV_128[] = {
MK_64(0xE1111906, 0x964D7260),
MK_64(0x883DAAA7, 0x7C8D811C),
MK_64(0x10080DF4, 0x91960F7A),
};
/* blkSize = 256 bits. hashSize = 160 bits */
-const u64 SKEIN_256_IV_160[] = {
+static const u64 SKEIN_256_IV_160[] = {
MK_64(0x14202314, 0x72825E98),
MK_64(0x2AC4E9A2, 0x5A77E590),
MK_64(0xD47A5856, 0x8838D63E),
};
/* blkSize = 256 bits. hashSize = 224 bits */
-const u64 SKEIN_256_IV_224[] = {
+static const u64 SKEIN_256_IV_224[] = {
MK_64(0xC6098A8C, 0x9AE5EA0B),
MK_64(0x876D5686, 0x08C5191C),
MK_64(0x99CB88D7, 0xD7F53884),
};
/* blkSize = 256 bits. hashSize = 256 bits */
-const u64 SKEIN_256_IV_256[] = {
+static const u64 SKEIN_256_IV_256[] = {
MK_64(0xFC9DA860, 0xD048B449),
MK_64(0x2FCA6647, 0x9FA7D833),
MK_64(0xB33BC389, 0x6656840F),
};
/* blkSize = 512 bits. hashSize = 128 bits */
-const u64 SKEIN_512_IV_128[] = {
+static const u64 SKEIN_512_IV_128[] = {
MK_64(0xA8BC7BF3, 0x6FBF9F52),
MK_64(0x1E9872CE, 0xBD1AF0AA),
MK_64(0x309B1790, 0xB32190D3),
};
/* blkSize = 512 bits. hashSize = 160 bits */
-const u64 SKEIN_512_IV_160[] = {
+static const u64 SKEIN_512_IV_160[] = {
MK_64(0x28B81A2A, 0xE013BD91),
MK_64(0xC2F11668, 0xB5BDF78F),
MK_64(0x1760D8F3, 0xF6A56F12),
};
/* blkSize = 512 bits. hashSize = 224 bits */
-const u64 SKEIN_512_IV_224[] = {
+static const u64 SKEIN_512_IV_224[] = {
MK_64(0xCCD06162, 0x48677224),
MK_64(0xCBA65CF3, 0xA92339EF),
MK_64(0x8CCD69D6, 0x52FF4B64),
};
/* blkSize = 512 bits. hashSize = 256 bits */
-const u64 SKEIN_512_IV_256[] = {
+static const u64 SKEIN_512_IV_256[] = {
MK_64(0xCCD044A1, 0x2FDB3E13),
MK_64(0xE8359030, 0x1A79A9EB),
MK_64(0x55AEA061, 0x4F816E6F),
};
/* blkSize = 512 bits. hashSize = 384 bits */
-const u64 SKEIN_512_IV_384[] = {
+static const u64 SKEIN_512_IV_384[] = {
MK_64(0xA3F6C6BF, 0x3A75EF5F),
MK_64(0xB0FEF9CC, 0xFD84FAA4),
MK_64(0x9D77DD66, 0x3D770CFE),
};
/* blkSize = 512 bits. hashSize = 512 bits */
-const u64 SKEIN_512_IV_512[] = {
+static const u64 SKEIN_512_IV_512[] = {
MK_64(0x4903ADFF, 0x749C51CE),
MK_64(0x0D95DE39, 0x9746DF03),
MK_64(0x8FD19341, 0x27C79BCE),
};
/* blkSize = 1024 bits. hashSize = 384 bits */
-const u64 SKEIN_1024_IV_384[] = {
+static const u64 SKEIN_1024_IV_384[] = {
MK_64(0x5102B6B8, 0xC1894A35),
MK_64(0xFEEBC9E3, 0xFE8AF11A),
MK_64(0x0C807F06, 0xE32BED71),
};
/* blkSize = 1024 bits. hashSize = 512 bits */
-const u64 SKEIN_1024_IV_512[] = {
+static const u64 SKEIN_1024_IV_512[] = {
MK_64(0xCAEC0E5D, 0x7C1B1B18),
MK_64(0xA01B0E04, 0x5F03E802),
MK_64(0x33840451, 0xED912885),
};
/* blkSize = 1024 bits. hashSize = 1024 bits */
-const u64 SKEIN_1024_IV_1024[] = {
+static const u64 SKEIN_1024_IV_1024[] = {
MK_64(0xD593DA07, 0x41E72355),
MK_64(0x15B5E511, 0xAC73E00C),
MK_64(0x5180E5AE, 0xBAF2C4F0),
if (up_flag)
goto out;
if (last_keycode == keycode &&
- last_spk_jiffy + MAX_DELAY > jiffies) {
+ time_after(last_spk_jiffy + MAX_DELAY, jiffies)) {
spk_close_press = 1;
offset = spk_shift_table[shift_info + 32];
/* double press? */
{
int status = 0;
struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;
+
if (channel_info != NULL) {
if (pchnl) {
/* Return the requested information: */
int bridge_io_destroy(struct io_mgr *hio_mgr)
{
int status = 0;
+
if (hio_mgr) {
/* Free IO DPC object */
tasklet_kill(&hio_mgr->dpc_tasklet);
u32 total_bytes = ul_num_bytes;
u8 host_buf[BUFFERSIZE];
struct bridge_dev_context *dev_context = dev_ctxt;
+
while (total_bytes > 0 && !status) {
copy_bytes =
total_bytes > BUFFERSIZE ? BUFFERSIZE : total_bytes;
struct bridge_dev_context *dev_context = dev_ctxt;
u32 ul_remain_bytes = 0;
u32 ul_bytes = 0;
+
ul_remain_bytes = ul_num_bytes;
while (ul_remain_bytes > 0 && !status) {
ul_bytes =
struct cfg_hostres *resources = dev_context->resources;
int status = 0;
u32 base1, base2, base3;
+
base1 = OMAP_DSP_MEM1_SIZE;
base2 = OMAP_DSP_MEM2_BASE - OMAP_DSP_MEM1_BASE;
base3 = OMAP_DSP_MEM3_BASE - OMAP_DSP_MEM1_BASE;
u32 ul_shm_offset_virt = 0;
struct cfg_hostres *host_res = dev_context->resources;
bool trace_load = false;
+
temp_byte1 = 0x0;
temp_byte2 = 0x0;
void dsp_wdt_dpc(unsigned long data)
{
struct deh_mgr *deh_mgr;
+
dev_get_deh_mgr(dev_get_first(), &deh_mgr);
if (deh_mgr)
bridge_deh_notify(deh_mgr, DSP_WDTOVERFLOW, 0);
if (!dl_state.dload_errcount) {
/* fix up entry point address */
unsigned sref = dl_state.dfile_hdr.df_entry_secn - 1;
+
if (sref < dl_state.allocated_secn_count)
dl_state.dfile_hdr.df_entrypt +=
dl_state.ldr_sections[sref].run_addr;
if (!dl_state.dload_errcount) {
/* fix up entry point address */
unsigned sref = dl_state.dfile_hdr.df_entry_secn - 1;
+
if (sref < dl_state.allocated_secn_count)
dl_state.dfile_hdr.df_entrypt +=
dl_state.ldr_sections[sref].run_addr;
struct doff_scnhdr_t *shp;
struct ldr_section_info *asecs;
struct my_handle *hndl;
+
nsecs = dlthis->dfile_hdr.df_no_scns;
if (!nsecs)
return;
unsigned rinbuf;
int siz;
struct reloc_record_t *rp, rrec[MY_RELOC_BUF_SIZ];
+
rp = rrec;
rinbuf = rnum > MY_RELOC_BUF_SIZ ? MY_RELOC_BUF_SIZ : rnum;
siz = rinbuf * sizeof(struct reloc_record_t);
sp = (u16 *) data;
do {
register u16 tmp;
+
tmp = *sp;
*sp++ = SWAP16BY8(tmp);
} while ((i -= 1) > 0);
register tgt_au_t *src = (tgt_au_t *) srcp;
register tgt_au_t *dst = (tgt_au_t *) dstp;
register int cnt = charcount;
+
do {
#if TARGET_AU_BITS <= BITS_PER_AU
/* byte-swapping issues may exist for strings on target */
struct modules_header mhdr;
struct ldr_section_info dllview_info;
struct dynload_symbol *debug_mirror_sym;
+
hndl = dlthis->myhandle;
if (!hndl)
return; /* must be errors detected, so forget it */
*/
if (sgn) {
unsigned tmp = (val >> fieldsz) + (sgn & 0x1);
+
if (tmp > ovf_limit[sgn - 1])
return 1;
}
case RACT_C6BASE:
if (dlthis->bss_run_base == 0) {
struct dynload_symbol *symp;
+
symp = dlthis->mysym->find_matching_symbol
(dlthis->mysym, bsssymbol);
/* lookup value of global BSS base */
* FALSE: Failed to find symbol.
*/
typedef bool(*dbll_sym_lookup) (void *handle, void *parg, void *rmm_handle,
- const char *name, struct dbll_sym_val ** sym);
+ const char *name, struct dbll_sym_val **sym);
/*
* ======== dbll_tell_fxn ========
* These file manipulation functions should be compatible with the
* "C" run time library functions of the same name.
*/
- s32(*fread) (void *, size_t, size_t, void *);
- s32(*fseek) (void *, long, int);
- s32(*ftell) (void *);
- s32(*fclose) (void *);
- void *(*fopen) (const char *, const char *);
+ s32 (*fread)(void *ptr, size_t size, size_t count, void *filp);
+ s32 (*fseek)(void *filp, long offset, int origin);
+ s32 (*ftell)(void *filp);
+ s32 (*fclose)(void *filp);
+ void *(*fopen)(const char *path, const char *mode);
};
/*
* Ensures:
*/
typedef int(*dbll_get_sect_fxn) (struct dbll_library_obj *lib,
- char *name, u32 * addr, u32 * size);
+ char *name, u32 *addr, u32 *size);
/*
* ======== dbll_init ========
if (!status) {
struct bridge_drv_interface *intf_fxns;
+
dev_get_intf_fxns(hdev_obj, &intf_fxns);
/* Let Bridge channel module finish the create: */
status = (*intf_fxns->chnl_create) (&hchnl_mgr, hdev_obj,
u32 mgrwrap_enum_node_info(union trapped_args *args, void *pr_ctxt)
{
u8 *pndb_props;
- u32 num_nodes;
- int status = 0;
+ u32 num_nodes = 0;
+ int status;
u32 size = args->args_mgr_enumnode_info.ndb_props_size;
if (size < sizeof(struct dsp_ndbprops))
return -EINVAL;
+ size = sizeof(struct dsp_ndbprops);
pndb_props = kmalloc(size, GFP_KERNEL);
if (pndb_props == NULL)
- status = -ENOMEM;
+ return -ENOMEM;
+
+ status =
+ mgr_enum_node_info(args->args_mgr_enumnode_info.node_id,
+ (struct dsp_ndbprops *)pndb_props, size,
+ &num_nodes);
- if (!status) {
- status =
- mgr_enum_node_info(args->args_mgr_enumnode_info.node_id,
- (struct dsp_ndbprops *)pndb_props, size,
- &num_nodes);
- }
CP_TO_USR(args->args_mgr_enumnode_info.ndb_props, pndb_props, status,
size);
CP_TO_USR(args->args_mgr_enumnode_info.num_nodes, &num_nodes, status,
u32 mgrwrap_enum_proc_info(union trapped_args *args, void *pr_ctxt)
{
u8 *processor_info;
- u8 num_procs;
- int status = 0;
+ u8 num_procs = 0;
+ int status;
u32 size = args->args_mgr_enumproc_info.processor_info_size;
if (size < sizeof(struct dsp_processorinfo))
return -EINVAL;
- processor_info = kmalloc(size, GFP_KERNEL);
+ if (size > sizeof(struct mgr_processorextinfo))
+ size = sizeof(struct mgr_processorextinfo);
+
+ processor_info = kzalloc(size, GFP_KERNEL);
if (processor_info == NULL)
- status = -ENOMEM;
+ return -ENOMEM;
+
+ status =
+ mgr_enum_processor_info(args->args_mgr_enumproc_info.
+ processor_id,
+ (struct dsp_processorinfo *)
+ processor_info, size, &num_procs);
- if (!status) {
- status =
- mgr_enum_processor_info(args->args_mgr_enumproc_info.
- processor_id,
- (struct dsp_processorinfo *)
- processor_info, size, &num_procs);
- }
CP_TO_USR(args->args_mgr_enumproc_info.processor_info, processor_info,
status, size);
CP_TO_USR(args->args_mgr_enumproc_info.num_procs, &num_procs,
int status = 0;
struct dsp_notification *anotifications[MAX_EVENTS];
struct dsp_notification notifications[MAX_EVENTS];
- u32 index, i;
+ u32 index = 0, i;
u32 count = args->args_mgr_wait.count;
if (count > MAX_EVENTS)
- status = -EINVAL;
+ return -EINVAL;
/* get the array of pointers to user structures */
CP_FM_USR(anotifications, args->args_mgr_wait.anotifications,
/* get the events */
for (i = 0; i < count; i++) {
CP_FM_USR(¬ifications[i], anotifications[i], status, 1);
- if (status || !notifications[i].handle) {
- status = -EINVAL;
- break;
- }
+ if (status || !notifications[i].handle)
+ return -EINVAL;
/* set the array of pointers to kernel structures */
anotifications[i] = ¬ifications[i];
}
- if (!status) {
- status = mgr_wait_for_bridge_events(anotifications, count,
- &index,
- args->args_mgr_wait.
- timeout);
- }
+ status = mgr_wait_for_bridge_events(anotifications, count,
+ &index,
+ args->args_mgr_wait.
+ timeout);
CP_TO_USR(args->args_mgr_wait.index, &index, status, 1);
return status;
}
*/
u32 strmwrap_select(union trapped_args *args, void *pr_ctxt)
{
- u32 mask;
+ u32 mask = 0;
struct strm_object *strm_tab[MAX_STREAMS];
int status = 0;
struct strm_res_object *strm_res;
strncpy(sz_sect_name, ".", 2);
do {
char *uuid = strsep(&tmp, "-");
+
if (!uuid)
break;
len -= strlen(uuid);
{
struct dev_object *dev;
struct cfg_devnode *dev_node;
+
if (atomic_read(&bridge_cref)) {
reinit_completion(&bridge_comp);
while (!wait_for_completion_timeout(&bridge_comp,
{
int status = 0;
struct process_context *ctxt = (struct process_context *)process_ctxt;
+
drv_remove_all_strm_res_elements(ctxt);
drv_remove_all_node_res_elements(ctxt);
drv_remove_all_dmm_res_elements(ctxt);
struct rmm_addr *rmm_addr_obj = (struct rmm_addr *)dsp_address;
bool mem_load_req = false;
int status = -ENOMEM; /* Set to fail */
+
nldr_obj = hnode->nldr_obj;
rmm = nldr_obj->rmm;
/* Convert size to DSP words */
enum node_state node_get_state(void *hnode)
{
struct node_object *pnode = (struct node_object *)hnode;
+
if (!pnode)
return -1;
return pnode->node_state;
(struct proc_object *)hnode->processor;
#endif
int status;
+
if (!hnode)
goto func_end;
hnode_mgr = hnode->node_mgr;
u32 mpu_addr, u32 size)
{
struct dmm_map_object *map_obj;
+
pr_debug("%s: looking for mpu_addr 0x%x size 0x%x\n", __func__,
mpu_addr, size);
int proc_get_trace(void *hprocessor, u8 *pbuf, u32 max_size)
{
int status;
+
status = -ENOSYS;
return status;
}
static s32 get_envp_count(char **envp)
{
s32 ret = 0;
+
if (envp) {
while (*envp++)
ret++;
/* MOST COMMON */
#define POSTCODE_LINUX_2(EVENT_PC, severity) \
- POSTCODE_LINUX_A(CURRENT_FILE_PC, EVENT_PC, 0x0000, severity);
+ POSTCODE_LINUX_A(CURRENT_FILE_PC, EVENT_PC, 0x0000, severity)
#define POSTCODE_LINUX_3(EVENT_PC, pc32bit, severity) \
- POSTCODE_LINUX_A(CURRENT_FILE_PC, EVENT_PC, pc32bit, severity);
+ POSTCODE_LINUX_A(CURRENT_FILE_PC, EVENT_PC, pc32bit, severity)
#define POSTCODE_LINUX_4(EVENT_PC, pc16bit1, pc16bit2, severity) \
POSTCODE_LINUX_B(CURRENT_FILE_PC, EVENT_PC, pc16bit1, \
- pc16bit2, severity);
+ pc16bit2, severity)
#endif
#endif
snprintf(status_attr_path, SYSFS_PATH_MAX, "%s/usbip_status",
udev->path);
- if ((fd = open(status_attr_path, O_RDONLY)) < 0) {
+ fd = open(status_attr_path, O_RDONLY);
+ if (fd < 0) {
err("error opening attribute %s", status_attr_path);
return -1;
}
goto err;
/* reallocate buffer to include usb interface data */
- size = sizeof(struct usbip_exported_device) + edev->udev.bNumInterfaces *
- sizeof(struct usbip_usb_interface);
+ size = sizeof(struct usbip_exported_device) +
+ edev->udev.bNumInterfaces * sizeof(struct usbip_usb_interface);
edev_old = edev;
edev = realloc(edev, size);
break;
case GetHubStatus:
usbip_dbg_vhci_rh(" GetHubStatus\n");
- *(__le32 *) buf = __constant_cpu_to_le32(0);
+ *(__le32 *) buf = cpu_to_le32(0);
break;
case GetPortStatus:
usbip_dbg_vhci_rh(" GetPortStatus port %x\n", wIndex);
#include "rf.h"
/*--------------------- Static Definitions -------------------------*/
-//static int msglevel =MSG_LEVEL_DEBUG;
+/* static int msglevel =MSG_LEVEL_DEBUG; */
static int msglevel = MSG_LEVEL_INFO;
/*--------------------- Static Classes ----------------------------*/
};
#define CB_VT3253B0_AGC_FOR_RFMD2959 195
-// For RFMD2959
+/* For RFMD2959 */
unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
{0xF0, 0x00},
{0xF1, 0x3E},
};
#define CB_VT3253B0_INIT_FOR_AIROHA2230 256
-// For AIROHA
+/* For AIROHA */
unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
{0x00, 0x31},
{0x01, 0x00},
{0x69, 0x00},
{0x6a, 0x00},
{0x6b, 0x00},
- {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
+ {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
{0x6d, 0x03},
{0x6e, 0x01},
{0x6f, 0x00},
};
#define CB_VT3253B0_INIT_FOR_UW2451 256
-//For UW2451
+/* For UW2451 */
unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
{0x00, 0x31},
{0x01, 0x00},
{0x69, 0x00},
{0x6a, 0x00},
{0x6b, 0x00},
- {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
+ {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
{0x6d, 0x03},
{0x6e, 0x01},
{0x6f, 0x00},
};
#define CB_VT3253B0_AGC 193
-// For AIROHA
+/* For AIROHA */
unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
{0xF0, 0x00},
{0xF1, 0x00},
uRate = (unsigned int)awcFrameTime[uRateIdx];
- if (uRateIdx <= 3) { //CCK mode
- if (byPreambleType == 1) //Short
+ if (uRateIdx <= 3) { /* CCK mode */
+ if (byPreambleType == 1) /* Short */
uPreamble = 96;
else
uPreamble = 192;
- uFrameTime = (cbFrameLength * 80) / uRate; //?????
+ uFrameTime = (cbFrameLength * 80) / uRate; /* ????? */
uTmp = (uFrameTime * uRate) / 80;
if (cbFrameLength != uTmp)
uFrameTime++;
return uPreamble + uFrameTime;
} else {
- uFrameTime = (cbFrameLength * 8 + 22) / uRate; //????????
+ uFrameTime = (cbFrameLength * 8 + 22) / uRate; /* ???????? */
uTmp = ((uFrameTime * uRate) - 22) / 8;
if (cbFrameLength != uTmp)
uFrameTime++;
- uFrameTime = uFrameTime * 4; //???????
+ uFrameTime = uFrameTime * 4; /* ??????? */
if (byPktType != PK_TYPE_11A)
- uFrameTime += 6; //??????
+ uFrameTime += 6; /* ?????? */
- return 20 + uFrameTime; //??????
+ return 20 + uFrameTime; /* ?????? */
}
}
cbUsCount = cbBitCount / 2;
if (byPreambleType == 1)
*pbyPhySgn = 0x09;
- else // long preamble
+ else /* long preamble */
*pbyPhySgn = 0x01;
break;
cbUsCount++;
if (byPreambleType == 1)
*pbyPhySgn = 0x0a;
- else // long preamble
+ else /* long preamble */
*pbyPhySgn = 0x02;
break;
}
if (byPreambleType == 1)
*pbyPhySgn = 0x0b;
- else // long preamble
+ else /* long preamble */
*pbyPhySgn = 0x03;
break;
case RATE_6M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9B; //1001 1011
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8B; //1000 1011
+ if (byPacketType == PK_TYPE_11A) { /*11a, 5GHZ */
+ *pbyPhySgn = 0x9B; /* 1001 1011 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8B; /* 1000 1011 */
}
break;
case RATE_9M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9F; //1001 1111
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8F; //1000 1111
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9F; /* 1001 1111 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8F; /* 1000 1111 */
}
break;
case RATE_12M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9A; //1001 1010
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8A; //1000 1010
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9A; /* 1001 1010 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8A; /* 1000 1010 */
}
break;
case RATE_18M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9E; //1001 1110
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8E; //1000 1110
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9E; /* 1001 1110 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8E; /* 1000 1110 */
}
break;
case RATE_24M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x99; //1001 1001
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x89; //1000 1001
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x99; /* 1001 1001 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x89; /* 1000 1001 */
}
break;
case RATE_36M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9D; //1001 1101
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8D; //1000 1101
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9D; /* 1001 1101 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8D; /* 1000 1101 */
}
break;
case RATE_48M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x98; //1001 1000
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x88; //1000 1000
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x98; /* 1001 1000 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x88; /* 1000 1000 */
}
break;
case RATE_54M:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9C; //1001 1100
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8C; //1000 1100
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9C; /* 1001 1100 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8C; /* 1000 1100 */
}
break;
default:
- if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
- *pbyPhySgn = 0x9C; //1001 1100
- } else {//11g, 2.4GHZ
- *pbyPhySgn = 0x8C; //1000 1100
+ if (byPacketType == PK_TYPE_11A) {/* 11a, 5GHZ */
+ *pbyPhySgn = 0x9C; /* 1001 1100 */
+ } else {/* 11g, 2.4GHZ */
+ *pbyPhySgn = 0x8C; /* 1000 1100 */
}
break;
}
unsigned short ww;
unsigned char byValue;
- // BB reg offset
+ /* BB reg offset */
VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
- // turn on REGR
+ /* turn on REGR */
MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
if (byValue & BBREGCTL_DONE)
break;
}
- // get BB data
+ /* get BB data */
VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
if (ww == W_MAX_TIMEOUT) {
unsigned short ww;
unsigned char byValue;
- // BB reg offset
+ /* BB reg offset */
VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
- // set BB data
+ /* set BB data */
VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
- // turn on BBREGCTL_REGW
+ /* turn on BBREGCTL_REGW */
MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
if (byValue & BBREGCTL_DONE)
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
- // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- //bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);
- // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- //bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);
- // Select VC1/VC2, CR215 = 0x02->0x06
+ /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
+ /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
+ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
+ /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
+ /* Select VC1/VC2, CR215 = 0x02->0x06 */
bResult &= BBbWriteEmbedded(dwIoBase, 0xd7, 0x06);
- //{{RobertYu:20050125, request by Jack
+ /* {{RobertYu:20050125, request by Jack */
bResult &= BBbWriteEmbedded(dwIoBase, 0x90, 0x20);
bResult &= BBbWriteEmbedded(dwIoBase, 0x97, 0xeb);
- //}}
+ /* }} */
- //{{RobertYu:20050221, request by Jack
+ /* {{RobertYu:20050221, request by Jack */
bResult &= BBbWriteEmbedded(dwIoBase, 0xa6, 0x00);
bResult &= BBbWriteEmbedded(dwIoBase, 0xa8, 0x30);
- //}}
+ /* }} */
bResult &= BBbWriteEmbedded(dwIoBase, 0xb0, 0x58);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
pDevice->ldBmThreshold[1] = -50;
pDevice->ldBmThreshold[2] = 0;
pDevice->ldBmThreshold[3] = 0;
- //}} RobertYu
+ /* }} RobertYu */
} else if (byRFType == RF_VT3226) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
pDevice->ldBmThreshold[1] = -48;
pDevice->ldBmThreshold[2] = 0;
pDevice->ldBmThreshold[3] = 0;
- // Fix VT3226 DFC system timing issue
+ /* Fix VT3226 DFC system timing issue */
MACvSetRFLE_LatchBase(dwIoBase);
- //{{ RobertYu: 20050104
+ /* {{ RobertYu: 20050104 */
} else if (byRFType == RF_AIROHA7230) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
- //{{ RobertYu:20050223, request by JerryChung
- // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- //bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);
- // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- //bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);
- // Select VC1/VC2, CR215 = 0x02->0x06
+ /* {{ RobertYu:20050223, request by JerryChung */
+ /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
+ /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
+ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
+ /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
+ /* Select VC1/VC2, CR215 = 0x02->0x06 */
bResult &= BBbWriteEmbedded(dwIoBase, 0xd7, 0x06);
- //}}
+ /* }} */
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
pDevice->ldBmThreshold[1] = -48;
pDevice->ldBmThreshold[2] = 0;
pDevice->ldBmThreshold[3] = 0;
- //}} RobertYu
+ /* }} RobertYu */
} else {
- // No VGA Table now
+ /* No VGA Table now */
pDevice->bUpdateBBVGA = false;
pDevice->abyBBVGA[0] = 0x1C;
}
unsigned char byData;
unsigned long dwIoBase = pDevice->PortOffset;
- //CR C9 = 0x00
- BBbReadEmbedded(dwIoBase, 0xC9, &pDevice->byBBCRc9);//CR201
+ /* CR C9 = 0x00 */
+ BBbReadEmbedded(dwIoBase, 0xC9, &pDevice->byBBCRc9); /* CR201 */
BBbWriteEmbedded(dwIoBase, 0xC9, 0);
- BBbReadEmbedded(dwIoBase, 0x4D, &pDevice->byBBCR4d);//CR77
+ BBbReadEmbedded(dwIoBase, 0x4D, &pDevice->byBBCR4d); /* CR77 */
BBbWriteEmbedded(dwIoBase, 0x4D, 0x90);
- //CR 88 = 0x02(CCK), 0x03(OFDM)
- BBbReadEmbedded(dwIoBase, 0x88, &pDevice->byBBCR88);//CR136
-
- if (pDevice->uConnectionRate <= RATE_11M) { //CCK
- // Enable internal digital loopback: CR33 |= 0000 0001
- BBbReadEmbedded(dwIoBase, 0x21, &byData);//CR33
- BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData | 0x01));//CR33
- // CR154 = 0x00
- BBbWriteEmbedded(dwIoBase, 0x9A, 0); //CR154
-
- BBbWriteEmbedded(dwIoBase, 0x88, 0x02);//CR239
- } else { //OFDM
- // Enable internal digital loopback:CR154 |= 0000 0001
- BBbReadEmbedded(dwIoBase, 0x9A, &byData);//CR154
- BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData | 0x01));//CR154
- // CR33 = 0x00
- BBbWriteEmbedded(dwIoBase, 0x21, 0); //CR33
-
- BBbWriteEmbedded(dwIoBase, 0x88, 0x03);//CR239
+ /* CR 88 = 0x02(CCK), 0x03(OFDM) */
+ BBbReadEmbedded(dwIoBase, 0x88, &pDevice->byBBCR88); /* CR136 */
+
+ if (pDevice->uConnectionRate <= RATE_11M) { /* CCK */
+ /* Enable internal digital loopback: CR33 |= 0000 0001 */
+ BBbReadEmbedded(dwIoBase, 0x21, &byData); /* CR33 */
+ BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData | 0x01)); /* CR33 */
+ /* CR154 = 0x00 */
+ BBbWriteEmbedded(dwIoBase, 0x9A, 0); /* CR154 */
+
+ BBbWriteEmbedded(dwIoBase, 0x88, 0x02); /* CR239 */
+ } else { /* OFDM */
+ /* Enable internal digital loopback:CR154 |= 0000 0001 */
+ BBbReadEmbedded(dwIoBase, 0x9A, &byData); /* CR154 */
+ BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData | 0x01)); /* CR154 */
+ /* CR33 = 0x00 */
+ BBbWriteEmbedded(dwIoBase, 0x21, 0); /* CR33 */
+
+ BBbWriteEmbedded(dwIoBase, 0x88, 0x03); /* CR239 */
}
- //CR14 = 0x00
- BBbWriteEmbedded(dwIoBase, 0x0E, 0);//CR14
+ /* CR14 = 0x00 */
+ BBbWriteEmbedded(dwIoBase, 0x0E, 0); /* CR14 */
- // Disable TX_IQUN
+ /* Disable TX_IQUN */
BBbReadEmbedded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
BBbWriteEmbedded(pDevice->PortOffset, 0x09, (unsigned char)(pDevice->byBBCR09 & 0xDE));
}
unsigned char byData;
unsigned long dwIoBase = pDevice->PortOffset;
- BBbWriteEmbedded(dwIoBase, 0xC9, pDevice->byBBCRc9);//CR201
- BBbWriteEmbedded(dwIoBase, 0x88, pDevice->byBBCR88);//CR136
- BBbWriteEmbedded(dwIoBase, 0x09, pDevice->byBBCR09);//CR136
- BBbWriteEmbedded(dwIoBase, 0x4D, pDevice->byBBCR4d);//CR77
-
- if (pDevice->uConnectionRate <= RATE_11M) { // CCK
- // Set the CR33 Bit2 to disable internal Loopback.
- BBbReadEmbedded(dwIoBase, 0x21, &byData);//CR33
- BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData & 0xFE));//CR33
- } else { // OFDM
- BBbReadEmbedded(dwIoBase, 0x9A, &byData);//CR154
- BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData & 0xFE));//CR154
+ BBbWriteEmbedded(dwIoBase, 0xC9, pDevice->byBBCRc9); /* CR201 */
+ BBbWriteEmbedded(dwIoBase, 0x88, pDevice->byBBCR88); /* CR136 */
+ BBbWriteEmbedded(dwIoBase, 0x09, pDevice->byBBCR09); /* CR136 */
+ BBbWriteEmbedded(dwIoBase, 0x4D, pDevice->byBBCR4d); /* CR77 */
+
+ if (pDevice->uConnectionRate <= RATE_11M) { /* CCK */
+ /* Set the CR33 Bit2 to disable internal Loopback. */
+ BBbReadEmbedded(dwIoBase, 0x21, &byData);/* CR33 */
+ BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData & 0xFE)); /* CR33 */
+ } else { /* OFDM */
+ BBbReadEmbedded(dwIoBase, 0x9A, &byData); /* CR154 */
+ BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData & 0xFE)); /* CR154 */
}
- BBbReadEmbedded(dwIoBase, 0x0E, &byData);//CR14
- BBbWriteEmbedded(dwIoBase, 0x0E, (unsigned char)(byData | 0x80));//CR14
+ BBbReadEmbedded(dwIoBase, 0x0E, &byData); /* CR14 */
+ BBbWriteEmbedded(dwIoBase, 0x0E, (unsigned char)(byData | 0x80)); /* CR14 */
}
/*
unsigned char byBBRxConf = 0;
unsigned char byBBVGA = 0;
- BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
+ BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf); /* CR10 */
if (pDevice->bShortSlotTime)
- byBBRxConf &= 0xDF;//1101 1111
+ byBBRxConf &= 0xDF; /* 1101 1111 */
else
- byBBRxConf |= 0x20;//0010 0000
+ byBBRxConf |= 0x20; /* 0010 0000 */
- // patch for 3253B0 Baseband with Cardbus module
+ /* patch for 3253B0 Baseband with Cardbus module */
BBbReadEmbedded(pDevice->PortOffset, 0xE7, &byBBVGA);
if (byBBVGA == pDevice->abyBBVGA[0])
- byBBRxConf |= 0x20;//0010 0000
+ byBBRxConf |= 0x20; /* 0010 0000 */
- BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
+ BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf); /* CR10 */
}
void BBvSetVGAGainOffset(PSDevice pDevice, unsigned char byData)
BBbWriteEmbedded(pDevice->PortOffset, 0xE7, byData);
- BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
- // patch for 3253B0 Baseband with Cardbus module
+ BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf); /* CR10 */
+ /* patch for 3253B0 Baseband with Cardbus module */
if (byData == pDevice->abyBBVGA[0])
- byBBRxConf |= 0x20;//0010 0000
+ byBBRxConf |= 0x20; /* 0010 0000 */
else if (pDevice->bShortSlotTime)
- byBBRxConf &= 0xDF;//1101 1111
+ byBBRxConf &= 0xDF; /* 1101 1111 */
else
- byBBRxConf |= 0x20;//0010 0000
+ byBBRxConf |= 0x20; /* 0010 0000 */
pDevice->byBBVGACurrent = byData;
- BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
+ BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf); /* CR10 */
}
/*
{
unsigned char byBBTxConf;
- BBbReadEmbedded(dwIoBase, 0x09, &byBBTxConf);//CR09
+ BBbReadEmbedded(dwIoBase, 0x09, &byBBTxConf); /* CR09 */
if (byAntennaMode == ANT_DIVERSITY) {
- // bit 1 is diversity
+ /* bit 1 is diversity */
byBBTxConf |= 0x02;
} else if (byAntennaMode == ANT_A) {
- // bit 2 is ANTSEL
- byBBTxConf &= 0xF9; // 1111 1001
+ /* bit 2 is ANTSEL */
+ byBBTxConf &= 0xF9; /* 1111 1001 */
} else if (byAntennaMode == ANT_B) {
- byBBTxConf &= 0xFD; // 1111 1101
+ byBBTxConf &= 0xFD; /* 1111 1101 */
byBBTxConf |= 0x04;
}
- BBbWriteEmbedded(dwIoBase, 0x09, byBBTxConf);//CR09
+ BBbWriteEmbedded(dwIoBase, 0x09, byBBTxConf); /* CR09 */
}
/*
{
unsigned char byBBRxConf;
- BBbReadEmbedded(dwIoBase, 0x0A, &byBBRxConf);//CR10
+ BBbReadEmbedded(dwIoBase, 0x0A, &byBBRxConf); /* CR10 */
if (byAntennaMode == ANT_DIVERSITY) {
byBBRxConf |= 0x01;
} else if (byAntennaMode == ANT_A) {
- byBBRxConf &= 0xFC; // 1111 1100
+ byBBRxConf &= 0xFC; /* 1111 1100 */
} else if (byAntennaMode == ANT_B) {
- byBBRxConf &= 0xFE; // 1111 1110
+ byBBRxConf &= 0xFE; /* 1111 1110 */
byBBRxConf |= 0x02;
}
- BBbWriteEmbedded(dwIoBase, 0x0A, byBBRxConf);//CR10
+ BBbWriteEmbedded(dwIoBase, 0x0A, byBBRxConf); /* CR10 */
}
/*
void
BBvSetDeepSleep(unsigned long dwIoBase, unsigned char byLocalID)
{
- BBbWriteEmbedded(dwIoBase, 0x0C, 0x17);//CR12
- BBbWriteEmbedded(dwIoBase, 0x0D, 0xB9);//CR13
+ BBbWriteEmbedded(dwIoBase, 0x0C, 0x17); /* CR12 */
+ BBbWriteEmbedded(dwIoBase, 0x0D, 0xB9); /* CR13 */
}
void
BBvExitDeepSleep(unsigned long dwIoBase, unsigned char byLocalID)
{
- BBbWriteEmbedded(dwIoBase, 0x0C, 0x00);//CR12
- BBbWriteEmbedded(dwIoBase, 0x0D, 0x01);//CR13
+ BBbWriteEmbedded(dwIoBase, 0x0C, 0x00); /* CR12 */
+ BBbWriteEmbedded(dwIoBase, 0x0D, 0x01); /* CR13 */
}
static
unsigned long ulMaxPacket;
unsigned long ulPacketNum;
- //This is a thousand-ratio
+ /* This is a thousand-ratio */
ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
if (pDevice->uNumSQ3[RATE_54M] != 0) {
ulPacketNum = pDevice->uNumSQ3[RATE_54M];
BBvClearAntDivSQ3Value(pDevice);
}
- } else { //byAntennaState == 1
+ } else { /* byAntennaState == 1 */
if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
del_timer(&pDevice->TimerSQ3Tmax1);
pDevice->byAntennaState = 0;
BBvClearAntDivSQ3Value(pDevice);
}
- } //byAntennaState
+ } /* byAntennaState */
}
/*+
)
{
PSDevice pDevice = (PSDevice) pDeviceHandler;
- PPMKID_CANDIDATE pCandidateList;
+ struct pmkid_candidate *pCandidateList;
unsigned int ii = 0;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bAdd_PMKID_Candidate START: (%d)\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
//Added new types for PMKID Candidate lists.
-typedef struct _PMKID_CANDIDATE {
+struct pmkid_candidate {
NDIS_802_11_MAC_ADDRESS BSSID;
unsigned long Flags;
-} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
+};
typedef struct _BSSID_INFO
{
NDIS_802_11_STATUS_TYPE StatusType;
unsigned long Version; // Version of the structure
unsigned long NumCandidates; // No. of pmkid candidates
- PMKID_CANDIDATE CandidateList[MAX_PMKIDLIST];
+ struct pmkid_candidate CandidateList[MAX_PMKIDLIST];
} SPMKIDCandidateEvent, *PSPMKIDCandidateEvent;
//--
//2008-0714<Add>by Mike Liu
static bool device_release_WPADEV(PSDevice pDevice);
-static int ethtool_ioctl(struct net_device *dev, void *useraddr);
+static int ethtool_ioctl(struct net_device *dev, void __user *useraddr);
static int device_rx_srv(PSDevice pDevice, unsigned int uIdx);
static int device_tx_srv(PSDevice pDevice, unsigned int uIdx);
static bool device_alloc_rx_buf(PSDevice pDevice, PSRxDesc pDesc);
break;
case SIOCETHTOOL:
- return ethtool_ioctl(dev, (void *)rq->ifr_data);
+ return ethtool_ioctl(dev, rq->ifr_data);
// All other calls are currently unsupported
default:
return rc;
}
-static int ethtool_ioctl(struct net_device *dev, void *useraddr)
+static int ethtool_ioctl(struct net_device *dev, void __user *useraddr)
{
u32 ethcmd;
#include "rf.h"
#include "iowpa.h"
#include "aes_ccmp.h"
+#include "dpc.h"
/*--------------------- Static Definitions -------------------------*/
/*--------------------- Static Variables --------------------------*/
static int msglevel = MSG_LEVEL_INFO;
-const unsigned char acbyRxRate[MAX_RATE] =
+static const unsigned char acbyRxRate[MAX_RATE] =
{2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108};
/*--------------------- Static Functions --------------------------*/
#include "device.h"
#include "ioctl.h"
#include "iocmd.h"
+#include "iwctl.h"
#include "mac.h"
#include "card.h"
#include "hostap.h"
int iwctl_siwscan(struct net_device *dev,
struct iw_request_info *info,
- struct iw_param *wrq,
+ struct iw_point *wrq,
char *extra);
//2008-0409-07, <Add> by Einsn Liu
//End Add -- //2008-0409-07, <Add> by Einsn Liu
extern const struct iw_handler_def iwctl_handler_def;
-extern const struct iw_priv_args iwctl_private_args;
+extern struct iw_priv_args iwctl_private_args[];
#endif // __IWCTL_H__
if (byRxDataRate <= RATE_11M) {
byMaxAckRate = RATE_1M;
} else {
- // 24M is mandatory for 802.11a and 802.11g
+ /* 24M is mandatory for 802.11a and 802.11g */
byMaxAckRate = RATE_24M;
}
if (pSupportRateIEs) {
pMgmt->sNodeDBTable[uNodeIndex].uTxAttempts++;
if (bTxOk) {
- // transmit success, TxAttempts at least plus one
+ /* transmit success, TxAttempts at least plus one */
pMgmt->sNodeDBTable[uNodeIndex].uTxOk[MAX_RATE]++;
pMgmt->sNodeDBTable[uNodeIndex].uTxOk[wRate]++;
} else {
if ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) ||
(pMgmt->eCurrMode == WMAC_MODE_ESS_AP)) {
- // Adhoc Tx rate decided from node DB
+ /* Adhoc Tx rate decided from node DB */
if (BSSDBbIsSTAInNodeDB(pMgmt, pbyDestAddress, &uNodeIndex)) {
wTxDataRate = (pMgmt->sNodeDBTable[uNodeIndex].wTxDataRate);
pSupportRateIEs = (PWLAN_IE_SUPP_RATES) (pMgmt->sNodeDBTable[uNodeIndex].abyCurrSuppRates);
pSupportRateIEs = (PWLAN_IE_SUPP_RATES) pMgmt->abyCurrSuppRates;
pExtSupportRateIEs = (PWLAN_IE_SUPP_RATES) pMgmt->abyCurrExtSuppRates;
}
- } else { // Infrastructure: rate decided from AP Node, index = 0
+ } else { /* Infrastructure: rate decided from AP Node, index = 0 */
wTxDataRate = (pMgmt->sNodeDBTable[0].wTxDataRate);
#ifdef PLICE_DEBUG
)
{
PSDevice pDevice = (PSDevice)hDeviceContext;
- PPMKID_CANDIDATE pCandidateList;
+ struct pmkid_candidate *pCandidateList;
unsigned int ii = 0;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "bAdd_PMKID_Candidate START: (%d)\n", (int)pDevice->gsPMKIDCandidate.NumCandidates);
* Date: Jun. 5, 2002
*
* Functions:
- * BBuGetFrameTime - Calculate data frame transmitting time
- * BBvCalculateParameter - Calculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
+ * vnt_get_frame_time - Calculate data frame transmitting time
+ * vnt_get_phy_field - Calculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
* BBbVT3184Init - VIA VT3184 baseband chip init code
*
* Revision History:
* Return Value: FrameTime
*
*/
-unsigned int BBuGetFrameTime(u8 preamble_type, u8 pkt_type,
+unsigned int vnt_get_frame_time(u8 preamble_type, u8 pkt_type,
unsigned int frame_length, u16 tx_rate)
{
unsigned int frame_time;
* Return Value: none
*
*/
-void BBvCalculateParameter(struct vnt_private *priv, u32 frame_length,
+void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
{
u32 bit_count;
priv->ldBmThreshold[2] = 0;
priv->ldBmThreshold[3] = 0;
/* Fix VT3226 DFC system timing issue */
- MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
+ vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
} else if ((priv->byRFType == RF_VT3342A0)) {
priv->byBBRxConf = abyVT3184_VT3226D0[10];
length = sizeof(abyVT3184_VT3226D0);
priv->ldBmThreshold[2] = 0;
priv->ldBmThreshold[3] = 0;
/* Fix VT3226 DFC system timing issue */
- MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
+ vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
} else {
return true;
}
(priv->byRFType == RF_VT3342A0)) {
vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x23);
- MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
} else if (priv->byRFType == RF_VT3226D0) {
vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x11);
- MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, 0x01);
}
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
__le16 len;
} __packed;
-unsigned int BBuGetFrameTime(u8 preamble_type, u8 pkt_type,
+unsigned int vnt_get_frame_time(u8 preamble_type, u8 pkt_type,
unsigned int frame_length, u16 tx_rate);
-void BBvCalculateParameter(struct vnt_private *, u32 frame_length,
+void vnt_get_phy_field(struct vnt_private *, u32 frame_length,
u16 tx_rate, u8 pkt_type, struct vnt_phy_field *);
void BBvSetShortSlotTime(struct vnt_private *);
/* on/off protect mode */
if (WLAN_GET_ERP_USE_PROTECTION(pDevice->byERPFlag)) {
if (!pDevice->bProtectMode) {
- MACvEnableProtectMD(pDevice);
+ vnt_mac_enable_protect_mode(pDevice);
pDevice->bProtectMode = true;
}
} else if (pDevice->bProtectMode) {
- MACvDisableProtectMD(pDevice);
+ vnt_mac_disable_protect_mode(pDevice);
pDevice->bProtectMode = false;
}
/* on/off short slot time */
if (pDevice->bShortSlotTime) {
pDevice->bShortSlotTime = false;
BBvSetShortSlotTime(pDevice);
- vUpdateIFS((void *) pDevice);
+ vnt_update_ifs(pDevice);
}
} else if (!pDevice->bShortSlotTime) {
pDevice->bShortSlotTime = true;
BBvSetShortSlotTime(pDevice);
- vUpdateIFS((void *) pDevice);
+ vnt_update_ifs(pDevice);
}
/* on/off barker long preamble mode */
if (uLongPreambleSTACnt > 0) {
if (!pDevice->bBarkerPreambleMd) {
- MACvEnableBarkerPreambleMd(pDevice);
+ vnt_mac_enable_barker_preamble_mode(pDevice);
pDevice->bBarkerPreambleMd = true;
}
} else if (pDevice->bBarkerPreambleMd) {
- MACvDisableBarkerPreambleMd(pDevice);
+ vnt_mac_disable_barker_preamble_mode(pDevice);
pDevice->bBarkerPreambleMd = false;
}
* Purpose: Provide functions to setup NIC operation mode
* Functions:
* s_vSafeResetTx - Rest Tx
- * CARDvSetRSPINF - Set RSPINF
- * vUpdateIFS - Update slotTime,SIFS,DIFS, and EIFS
- * CARDvUpdateBasicTopRate - Update BasicTopRate
- * CARDbAddBasicRate - Add to BasicRateSet
+ * vnt_set_rspinf - Set RSPINF
+ * vnt_update_ifs - Update slotTime,SIFS,DIFS, and EIFS
+ * vnt_update_top_rates - Update BasicTopRate
+ * vnt_add_basic_rate - Add to BasicRateSet
* CARDbSetBasicRate - Set Basic Tx Rate
- * CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet
+ * vnt_ofdm_min_rate - Check if any OFDM rate is in BasicRateSet
* CARDvSetLoopbackMode - Set Loopback mode
* CARDbSoftwareReset - Sortware reset NIC
- * CARDqGetTSFOffset - Calculate TSFOffset
- * CARDbGetCurrentTSF - Read Current NIC TSF counter
- * CARDqGetNextTBTT - Calculate Next Beacon TSF counter
- * CARDvSetFirstNextTBTT - Set NIC Beacon time
- * CARDvUpdateNextTBTT - Sync. NIC Beacon time
- * CARDbRadioPowerOff - Turn Off NIC Radio Power
- * CARDbRadioPowerOn - Turn On NIC Radio Power
+ * vnt_get_tsf_offset - Calculate TSFOffset
+ * vnt_get_current_tsf - Read Current NIC TSF counter
+ * vnt_get_next_tbtt - Calculate Next Beacon TSF counter
+ * vnt_reset_next_tbtt - Set NIC Beacon time
+ * vnt_update_next_tbtt - Sync. NIC Beacon time
+ * vnt_radio_power_off - Turn Off NIC Radio Power
+ * vnt_radio_power_on - Turn On NIC Radio Power
* CARDbSetWEPMode - Set NIC Wep mode
* CARDbSetTxPower - Set NIC tx power
*
* Revision History:
* 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
* 08-26-2003 Kyle Hsu: Modify the definition type of dwIoBase.
- * 09-01-2003 Bryan YC Fan: Add vUpdateIFS().
+ * 09-01-2003 Bryan YC Fan: Add vnt_update_ifs().
*
*/
* Out:
* none
*/
-void CARDbSetMediaChannel(struct vnt_private *priv, u32 connection_channel)
+void vnt_set_channel(struct vnt_private *priv, u32 connection_channel)
{
if (priv->byBBType == BB_TYPE_11A) {
}
/* clear NAV */
- MACvRegBitsOn(priv, MAC_REG_MACCR, MACCR_CLRNAV);
+ vnt_mac_reg_bits_on(priv, MAC_REG_MACCR, MACCR_CLRNAV);
/* Set Channel[7] = 0 to tell H/W channel is changing now. */
- MACvRegBitsOff(priv, MAC_REG_CHANNEL, 0xb0);
+ vnt_mac_reg_bits_off(priv, MAC_REG_CHANNEL, 0xb0);
vnt_control_out(priv, MESSAGE_TYPE_SELECT_CHANNLE,
connection_channel, 0, 0, NULL);
* Return Value: response Control frame rate
*
*/
-static u16 swGetCCKControlRate(struct vnt_private *priv, u16 rate_idx)
+static u16 vnt_get_cck_rate(struct vnt_private *priv, u16 rate_idx)
{
u16 ui = rate_idx;
* Return Value: response Control frame rate
*
*/
-static u16 swGetOFDMControlRate(struct vnt_private *priv, u16 rate_idx)
+static u16 vnt_get_ofdm_rate(struct vnt_private *priv, u16 rate_idx)
{
u16 ui = rate_idx;
dev_dbg(&priv->usb->dev, "%s basic rate: %d\n",
__func__, priv->wBasicRate);
- if (!CARDbIsOFDMinBasicRate(priv)) {
+ if (!vnt_ofdm_min_rate(priv)) {
dev_dbg(&priv->usb->dev, "%s (NO OFDM) %d\n",
__func__, rate_idx);
if (rate_idx > RATE_24M)
* Return Value: none
*
*/
-static void CARDvCalculateOFDMRParameter(u16 rate, u8 bb_type,
+static void vnt_calculate_ofdm_rate(u16 rate, u8 bb_type,
u8 *tx_rate, u8 *rsv_time)
{
*
*/
-void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
+void vnt_set_rspinf(struct vnt_private *priv, u8 bb_type)
{
struct vnt_phy_field phy[4];
u8 tx_rate[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; /* For OFDM */
int i;
/*RSPINF_b_1*/
- BBvCalculateParameter(priv, 14,
- swGetCCKControlRate(priv, RATE_1M), PK_TYPE_11B, &phy[0]);
+ vnt_get_phy_field(priv, 14,
+ vnt_get_cck_rate(priv, RATE_1M), PK_TYPE_11B, &phy[0]);
/*RSPINF_b_2*/
- BBvCalculateParameter(priv, 14,
- swGetCCKControlRate(priv, RATE_2M), PK_TYPE_11B, &phy[1]);
+ vnt_get_phy_field(priv, 14,
+ vnt_get_cck_rate(priv, RATE_2M), PK_TYPE_11B, &phy[1]);
/*RSPINF_b_5*/
- BBvCalculateParameter(priv, 14,
- swGetCCKControlRate(priv, RATE_5M), PK_TYPE_11B, &phy[2]);
+ vnt_get_phy_field(priv, 14,
+ vnt_get_cck_rate(priv, RATE_5M), PK_TYPE_11B, &phy[2]);
/*RSPINF_b_11*/
- BBvCalculateParameter(priv, 14,
- swGetCCKControlRate(priv, RATE_11M), PK_TYPE_11B, &phy[3]);
+ vnt_get_phy_field(priv, 14,
+ vnt_get_cck_rate(priv, RATE_11M), PK_TYPE_11B, &phy[3]);
/*RSPINF_a_6*/
- CARDvCalculateOFDMRParameter(RATE_6M, bb_type,
- &tx_rate[0], &rsv_time[0]);
+ vnt_calculate_ofdm_rate(RATE_6M, bb_type, &tx_rate[0], &rsv_time[0]);
/*RSPINF_a_9*/
- CARDvCalculateOFDMRParameter(RATE_9M, bb_type,
- &tx_rate[1], &rsv_time[1]);
+ vnt_calculate_ofdm_rate(RATE_9M, bb_type, &tx_rate[1], &rsv_time[1]);
/*RSPINF_a_12*/
- CARDvCalculateOFDMRParameter(RATE_12M, bb_type,
- &tx_rate[2], &rsv_time[2]);
+ vnt_calculate_ofdm_rate(RATE_12M, bb_type, &tx_rate[2], &rsv_time[2]);
/*RSPINF_a_18*/
- CARDvCalculateOFDMRParameter(RATE_18M, bb_type,
- &tx_rate[3], &rsv_time[3]);
+ vnt_calculate_ofdm_rate(RATE_18M, bb_type, &tx_rate[3], &rsv_time[3]);
/*RSPINF_a_24*/
- CARDvCalculateOFDMRParameter(RATE_24M, bb_type,
- &tx_rate[4], &rsv_time[4]);
+ vnt_calculate_ofdm_rate(RATE_24M, bb_type, &tx_rate[4], &rsv_time[4]);
/*RSPINF_a_36*/
- CARDvCalculateOFDMRParameter(swGetOFDMControlRate(priv, RATE_36M),
+ vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_36M),
bb_type, &tx_rate[5], &rsv_time[5]);
/*RSPINF_a_48*/
- CARDvCalculateOFDMRParameter(swGetOFDMControlRate(priv, RATE_48M),
+ vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_48M),
bb_type, &tx_rate[6], &rsv_time[6]);
/*RSPINF_a_54*/
- CARDvCalculateOFDMRParameter(swGetOFDMControlRate(priv, RATE_54M),
+ vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
bb_type, &tx_rate[7], &rsv_time[7]);
/*RSPINF_a_72*/
- CARDvCalculateOFDMRParameter(swGetOFDMControlRate(priv, RATE_54M),
+ vnt_calculate_ofdm_rate(vnt_get_ofdm_rate(priv, RATE_54M),
bb_type, &tx_rate[8], &rsv_time[8]);
put_unaligned(phy[0].len, (u16 *)&data[0]);
* Return Value: None.
*
*/
-void vUpdateIFS(struct vnt_private *priv)
+void vnt_update_ifs(struct vnt_private *priv)
{
u8 max_min = 0;
u8 data[4];
MESSAGE_REQUEST_MACREG, 1, &max_min);
}
-void CARDvUpdateBasicTopRate(struct vnt_private *priv)
+void vnt_update_top_rates(struct vnt_private *priv)
{
u8 top_ofdm = RATE_24M, top_cck = RATE_1M;
u8 i;
* Return Value: true if succeeded; false if failed.
*
*/
-void CARDbAddBasicRate(struct vnt_private *priv, u16 rate_idx)
+void vnt_add_basic_rate(struct vnt_private *priv, u16 rate_idx)
{
priv->wBasicRate |= (1 << rate_idx);
/*Determines the highest basic rate.*/
- CARDvUpdateBasicTopRate(priv);
+ vnt_update_top_rates(priv);
}
-int CARDbIsOFDMinBasicRate(struct vnt_private *priv)
+int vnt_ofdm_min_rate(struct vnt_private *priv)
{
int ii;
return false;
}
-u8 CARDbyGetPktType(struct vnt_private *priv)
+u8 vnt_get_pkt_type(struct vnt_private *priv)
{
if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
return (u8)priv->byBBType;
- else if (CARDbIsOFDMinBasicRate(priv))
+ else if (vnt_ofdm_min_rate(priv))
return PK_TYPE_11GA;
else
return PK_TYPE_11GB;
* Return Value: TSF Offset value
*
*/
-u64 CARDqGetTSFOffset(u8 rx_rate, u64 tsf1, u64 tsf2)
+u64 vnt_get_tsf_offset(u8 rx_rate, u64 tsf1, u64 tsf2)
{
u64 tsf_offset = 0;
u16 rx_bcn_offset = 0;
* Return Value: none
*
*/
-void CARDvAdjustTSF(struct vnt_private *priv, u8 rx_rate,
+void vnt_adjust_tsf(struct vnt_private *priv, u8 rx_rate,
u64 time_stamp, u64 local_tsf)
{
u64 tsf_offset = 0;
u8 data[8];
- tsf_offset = CARDqGetTSFOffset(rx_rate, time_stamp, local_tsf);
+ tsf_offset = vnt_get_tsf_offset(rx_rate, time_stamp, local_tsf);
data[0] = (u8)tsf_offset;
data[1] = (u8)(tsf_offset >> 8);
* Return Value: true if success; otherwise false
*
*/
-bool CARDbGetCurrentTSF(struct vnt_private *priv, u64 *current_tsf)
+bool vnt_get_current_tsf(struct vnt_private *priv, u64 *current_tsf)
{
*current_tsf = priv->qwCurrTSF;
* Return Value: true if success; otherwise false
*
*/
-bool CARDbClearCurrentTSF(struct vnt_private *priv)
+bool vnt_clear_current_tsf(struct vnt_private *priv)
{
- MACvRegBitsOn(priv, MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
+ vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
priv->qwCurrTSF = 0;
* Return Value: TSF value of next Beacon
*
*/
-u64 CARDqGetNextTBTT(u64 tsf, u16 beacon_interval)
+u64 vnt_get_next_tbtt(u64 tsf, u16 beacon_interval)
{
u32 beacon_int;
* Return Value: none
*
*/
-void CARDvSetFirstNextTBTT(struct vnt_private *priv, u16 beacon_interval)
+void vnt_reset_next_tbtt(struct vnt_private *priv, u16 beacon_interval)
{
u64 next_tbtt = 0;
u8 data[8];
- CARDbClearCurrentTSF(priv);
+ vnt_clear_current_tsf(priv);
- next_tbtt = CARDqGetNextTBTT(next_tbtt, beacon_interval);
+ next_tbtt = vnt_get_next_tbtt(next_tbtt, beacon_interval);
data[0] = (u8)next_tbtt;
data[1] = (u8)(next_tbtt >> 8);
* Return Value: none
*
*/
-void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 tsf,
+void vnt_update_next_tbtt(struct vnt_private *priv, u64 tsf,
u16 beacon_interval)
{
u8 data[8];
- tsf = CARDqGetNextTBTT(tsf, beacon_interval);
+ tsf = vnt_get_next_tbtt(tsf, beacon_interval);
data[0] = (u8)tsf;
data[1] = (u8)(tsf >> 8);
* Return Value: true if success; otherwise false
*
*/
-int CARDbRadioPowerOff(struct vnt_private *priv)
+int vnt_radio_power_off(struct vnt_private *priv)
{
int ret = true;
case RF_VT3226:
case RF_VT3226D0:
case RF_VT3342A0:
- MACvRegBitsOff(priv, MAC_REG_SOFTPWRCTL,
+ vnt_mac_reg_bits_off(priv, MAC_REG_SOFTPWRCTL,
(SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
break;
}
- MACvRegBitsOff(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vnt_mac_reg_bits_off(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
BBvSetDeepSleep(priv);
* Return Value: true if success; otherwise false
*
*/
-int CARDbRadioPowerOn(struct vnt_private *priv)
+int vnt_radio_power_on(struct vnt_private *priv)
{
int ret = true;
BBvExitDeepSleep(priv);
- MACvRegBitsOn(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
+ vnt_mac_reg_bits_on(priv, MAC_REG_HOSTCR, HOSTCR_RXON);
switch (priv->byRFType) {
case RF_AL2230:
case RF_VT3226:
case RF_VT3226D0:
case RF_VT3342A0:
- MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL,
+ vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL,
(SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
break;
}
return ret;
}
-void CARDvSetBSSMode(struct vnt_private *priv)
+void vnt_set_bss_mode(struct vnt_private *priv)
{
if (priv->byRFType == RF_AIROHA7230 && priv->byBBType == BB_TYPE_11A)
- MACvSetBBType(priv, BB_TYPE_11G);
+ vnt_mac_set_bb_type(priv, BB_TYPE_11G);
else
- MACvSetBBType(priv, priv->byBBType);
+ vnt_mac_set_bb_type(priv, priv->byBBType);
- priv->byPacketType = CARDbyGetPktType(priv);
+ priv->byPacketType = vnt_get_pkt_type(priv);
if (priv->byBBType == BB_TYPE_11A)
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
else if (priv->byBBType == BB_TYPE_11G)
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
- vUpdateIFS(priv);
- CARDvSetRSPINF(priv, (u8)priv->byBBType);
+ vnt_update_ifs(priv);
+ vnt_set_rspinf(priv, (u8)priv->byBBType);
if (priv->byBBType == BB_TYPE_11A) {
if (priv->byRFType == RF_AIROHA7230) {
struct vnt_private;
-void CARDbSetMediaChannel(struct vnt_private *pDevice, u32 uConnectionChannel);
-void CARDvSetRSPINF(struct vnt_private *, u8);
-void vUpdateIFS(struct vnt_private *);
-void CARDvUpdateBasicTopRate(struct vnt_private *);
-void CARDbAddBasicRate(struct vnt_private *, u16);
-int CARDbIsOFDMinBasicRate(struct vnt_private *pDevice);
-void CARDvAdjustTSF(struct vnt_private *pDevice, u8 byRxRate,
- u64 qwBSSTimestamp, u64 qwLocalTSF);
-bool CARDbGetCurrentTSF(struct vnt_private *pDevice, u64 *pqwCurrTSF);
-bool CARDbClearCurrentTSF(struct vnt_private *pDevice);
-void CARDvSetFirstNextTBTT(struct vnt_private *pDevice, u16 wBeaconInterval);
-void CARDvUpdateNextTBTT(struct vnt_private *pDevice, u64 qwTSF,
- u16 wBeaconInterval);
-u64 CARDqGetNextTBTT(u64 qwTSF, u16 wBeaconInterval);
-u64 CARDqGetTSFOffset(u8 byRxRate, u64 qwTSF1, u64 qwTSF2);
-int CARDbRadioPowerOff(struct vnt_private *pDevice);
-int CARDbRadioPowerOn(struct vnt_private *pDevice);
-u8 CARDbyGetPktType(struct vnt_private *pDevice);
-void CARDvSetBSSMode(struct vnt_private *pDevice);
+void vnt_set_channel(struct vnt_private *, u32);
+void vnt_set_rspinf(struct vnt_private *, u8);
+void vnt_update_ifs(struct vnt_private *);
+void vnt_update_top_rates(struct vnt_private *);
+void vnt_add_basic_rate(struct vnt_private *, u16);
+int vnt_ofdm_min_rate(struct vnt_private *);
+void vnt_adjust_tsf(struct vnt_private *, u8, u64, u64);
+bool vnt_get_current_tsf(struct vnt_private *, u64 *);
+bool vnt_clear_current_tsf(struct vnt_private *);
+void vnt_reset_next_tbtt(struct vnt_private *, u16);
+void vnt_update_next_tbtt(struct vnt_private *, u64, u16);
+u64 vnt_get_next_tbtt(u64, u16);
+u64 vnt_get_tsf_offset(u8 byRxRate, u64 qwTSF1, u64 qwTSF2);
+int vnt_radio_power_off(struct vnt_private *);
+int vnt_radio_power_on(struct vnt_private *);
+u8 vnt_get_pkt_type(struct vnt_private *);
+void vnt_set_bss_mode(struct vnt_private *);
#endif /* __CARD_H__ */
* add to basic rate set, update pDevice->byTopCCKBasicRate and
* pDevice->byTopOFDMBasicRate
*/
- CARDbAddBasicRate((void *)pDevice, RATEwGetRateIdx(byRate));
+ vnt_add_basic_rate(pDevice, RATEwGetRateIdx(byRate));
DBG_PRT(MSG_LEVEL_DEBUG,
KERN_INFO"ParseMaxRate AddBasicRate: %d\n",
RATEwGetRateIdx(byRate));
* add to basic rate set, update pDevice->byTopCCKBasicRate and
* pDevice->byTopOFDMBasicRate
*/
- CARDbAddBasicRate((void *)pDevice, RATEwGetRateIdx(byRate));
+ vnt_add_basic_rate(pDevice, RATEwGetRateIdx(byRate));
DBG_PRT(MSG_LEVEL_DEBUG,
KERN_INFO"ParseMaxRate AddBasicRate: %d\n",
RATEwGetRateIdx(byRate));
}
if ((pDevice->byPacketType == PK_TYPE_11GB)
- && CARDbIsOFDMinBasicRate((void *)pDevice)) {
+ && vnt_ofdm_min_rate(pDevice)) {
pDevice->byPacketType = PK_TYPE_11GA;
}
else
*pwMaxBasicRate = pDevice->byTopOFDMBasicRate;
if (wOldBasicRate != pDevice->wBasicRate)
- CARDvSetRSPINF((void *)pDevice, pDevice->byBBType);
+ vnt_set_rspinf(pDevice, pDevice->byBBType);
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Exit ParseMaxRate\n");
}
void *priv;
struct sk_buff *skb;
struct urb *urb;
+ struct ieee80211_hdr *hdr;
unsigned int buf_len;
+ u16 tx_hdr_size;
u8 type;
bool in_use;
unsigned char data[MAX_TOTAL_SIZE_WITH_ALL_HEADERS];
#include "firmware.h"
#include "usbpipe.h"
-static int msglevel = MSG_LEVEL_INFO;
-/* static int msglevel = MSG_LEVEL_DEBUG; */
-
#define FIRMWARE_VERSION 0x133 /* version 1.51 */
#define FIRMWARE_NAME "vntwusb.fw"
#define FIRMWARE_CHUNK_SIZE 0x400
-int FIRMWAREbDownload(struct vnt_private *pDevice)
+int vnt_download_firmware(struct vnt_private *priv)
{
- struct device *dev = &pDevice->usb->dev;
+ struct device *dev = &priv->usb->dev;
const struct firmware *fw;
- int NdisStatus;
- void *pBuffer = NULL;
+ int status;
+ void *buffer = NULL;
bool result = false;
- u16 wLength;
+ u16 length;
int ii, rc;
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Download firmware\n");
+ dev_dbg(dev, "---->Download firmware\n");
rc = request_firmware(&fw, FIRMWARE_NAME, dev);
if (rc) {
goto out;
}
- pBuffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
- if (!pBuffer)
+ buffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
+ if (!buffer)
goto out;
for (ii = 0; ii < fw->size; ii += FIRMWARE_CHUNK_SIZE) {
- wLength = min_t(int, fw->size - ii, FIRMWARE_CHUNK_SIZE);
- memcpy(pBuffer, fw->data + ii, wLength);
+ length = min_t(int, fw->size - ii, FIRMWARE_CHUNK_SIZE);
+ memcpy(buffer, fw->data + ii, length);
- NdisStatus = vnt_control_out(pDevice,
+ status = vnt_control_out(priv,
0,
0x1200+ii,
0x0000,
- wLength,
- pBuffer);
+ length,
+ buffer);
+
+ dev_dbg(dev, "Download firmware...%d %zu\n", ii, fw->size);
- DBG_PRT(MSG_LEVEL_DEBUG,
- KERN_INFO"Download firmware...%d %zu\n", ii, fw->size);
- if (NdisStatus != STATUS_SUCCESS)
+ if (status != STATUS_SUCCESS)
goto free_fw;
}
release_firmware(fw);
out:
- kfree(pBuffer);
+ kfree(buffer);
return result;
}
MODULE_FIRMWARE(FIRMWARE_NAME);
-int FIRMWAREbBrach2Sram(struct vnt_private *pDevice)
+int vnt_firmware_branch_to_sram(struct vnt_private *priv)
{
- int NdisStatus;
+ int status;
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"---->Branch to Sram\n");
+ dev_dbg(&priv->usb->dev, "---->Branch to Sram\n");
- NdisStatus = vnt_control_out(pDevice,
+ status = vnt_control_out(priv,
1,
0x1200,
0x0000,
0,
NULL);
- if (NdisStatus != STATUS_SUCCESS)
+ if (status != STATUS_SUCCESS)
return false;
else
return true;
}
-int FIRMWAREbCheckVersion(struct vnt_private *pDevice)
+int vnt_check_firmware_version(struct vnt_private *priv)
{
- int ntStatus;
+ int status;
- ntStatus = vnt_control_in(pDevice,
+ status = vnt_control_in(priv,
MESSAGE_TYPE_READ,
0,
MESSAGE_REQUEST_VERSION,
2,
- (u8 *) &(pDevice->wFirmwareVersion));
+ (u8 *) &(priv->wFirmwareVersion));
+
+ dev_dbg(&priv->usb->dev, "Firmware Version [%04x]\n",
+ priv->wFirmwareVersion);
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Firmware Version [%04x]\n",
- pDevice->wFirmwareVersion);
- if (ntStatus != STATUS_SUCCESS) {
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Firmware Invalid.\n");
+ if (status != STATUS_SUCCESS) {
+ dev_dbg(&priv->usb->dev, "Firmware Invalid.\n");
return false;
}
- if (pDevice->wFirmwareVersion == 0xFFFF) {
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"In Loader.\n");
+ if (priv->wFirmwareVersion == 0xFFFF) {
+ dev_dbg(&priv->usb->dev, "In Loader.\n");
return false;
}
- DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Firmware Version [%04x]\n",
- pDevice->wFirmwareVersion);
- if (pDevice->wFirmwareVersion < FIRMWARE_VERSION) {
+
+ dev_dbg(&priv->usb->dev, "Firmware Version [%04x]\n",
+ priv->wFirmwareVersion);
+
+ if (priv->wFirmwareVersion < FIRMWARE_VERSION) {
/* branch to loader for download new firmware */
- FIRMWAREbBrach2Sram(pDevice);
+ vnt_firmware_branch_to_sram(priv);
return false;
}
return true;
#include "device.h"
-int FIRMWAREbDownload(struct vnt_private *);
-int FIRMWAREbBrach2Sram(struct vnt_private *);
-int FIRMWAREbCheckVersion(struct vnt_private *);
+int vnt_download_firmware(struct vnt_private *);
+int vnt_firmware_branch_to_sram(struct vnt_private *);
+int vnt_check_firmware_version(struct vnt_private *);
#endif /* __FIRMWARE_H__ */
pDevice->eEncryptionStatus = Ndis802_11EncryptionDisabled;
if (pDevice->flags & DEVICE_FLAGS_OPENED) {
for (uu = 0; uu < MAX_KEY_TABLE; uu++)
- MACvDisableKeyEntry(pDevice, uu);
+ vnt_mac_disable_keyentry(pDevice, uu);
}
}
if (wrq->flags & IW_ENCODE_RESTRICTED) {
if (wrq->disabled) {
pDevice->ePSMode = WMAC_POWER_CAM;
- PSvDisablePowerSaving(pDevice);
+ vnt_disable_power_saving(pDevice);
return rc;
}
if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
pDevice->ePSMode = WMAC_POWER_FAST;
- PSvEnablePowerSaving((void *)pDevice, pMgmt->wListenInterval);
+ vnt_enable_power_saving(pDevice, pMgmt->wListenInterval);
} else if ((wrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) {
pDevice->ePSMode = WMAC_POWER_FAST;
- PSvEnablePowerSaving((void *)pDevice, pMgmt->wListenInterval);
+ vnt_enable_power_saving(pDevice, pMgmt->wListenInterval);
}
switch (wrq->flags & IW_POWER_MODE) {
pTable->KeyTable[i].wKeyCtl = 0;
pTable->KeyTable[i].bSoftWEP = false;
pbyData[wLength++] = (u8) i;
- //MACvDisableKeyEntry(pDevice, i);
}
}
pKey->abyKey[15] |= 0x80;
}
- MACvSetKeyEntry(pDevice, pTable->KeyTable[i].wKeyCtl, i, uKeyIdx,
- pbyBSSID, pKey->abyKey);
+ vnt_mac_set_keyentry(pDevice, pTable->KeyTable[i].wKeyCtl, i,
+ uKeyIdx, pbyBSSID, pKey->abyKey);
if ((dwKeyIndex & USE_KEYRSC) == 0)
pKey->KeyRSC = 0; /* RSC set by NIC */
pKey->abyKey[15] |= 0x80;
}
- MACvSetKeyEntry(pDevice, pTable->KeyTable[j].wKeyCtl, j, uKeyIdx,
+ vnt_mac_set_keyentry(pDevice, pTable->KeyTable[j].wKeyCtl, j, uKeyIdx,
pbyBSSID, pKey->abyKey);
if ((dwKeyIndex & USE_KEYRSC) == 0)
pKey->abyKey[15] |= 0x80;
}
- MACvSetKeyEntry(pDevice, pTable->KeyTable[MAX_KEY_TABLE-1].wKeyCtl,
+ vnt_mac_set_keyentry(pDevice, pTable->KeyTable[MAX_KEY_TABLE-1].wKeyCtl,
MAX_KEY_TABLE-1, uKeyIdx,
pTable->KeyTable[MAX_KEY_TABLE-1].abyBSSID, pKey->abyKey);
pKey->abyKey[15] |= 0x80;
}
- MACvSetKeyEntry(pDevice, pTable->KeyTable[i].wKeyCtl, i, uKeyIdx,
- pTable->KeyTable[i].abyBSSID, pKey->abyKey);
+ vnt_mac_set_keyentry(pDevice, pTable->KeyTable[i].wKeyCtl, i,
+ uKeyIdx, pTable->KeyTable[i].abyBSSID, pKey->abyKey);
if ((dwKeyIndex & USE_KEYRSC) == 0)
pKey->KeyRSC = 0; /* RSC set by NIC */
* Return Value: none
*
*/
-void MACvWriteMultiAddr(struct vnt_private *priv, u64 mc_filter)
+void vnt_mac_set_filter(struct vnt_private *priv, u64 mc_filter)
{
__le64 le_mc = cpu_to_le64(mc_filter);
*
*
*/
-void MACbShutdown(struct vnt_private *priv)
+void vnt_mac_shutdown(struct vnt_private *priv)
{
vnt_control_out(priv, MESSAGE_TYPE_MACSHUTDOWN, 0, 0, 0, NULL);
}
-void MACvSetBBType(struct vnt_private *priv, u8 type)
+void vnt_mac_set_bb_type(struct vnt_private *priv, u8 type)
{
u8 data[2];
* Return Value: none
*
*/
-void MACvDisableKeyEntry(struct vnt_private *priv, u8 entry_idx)
+void vnt_mac_disable_keyentry(struct vnt_private *priv, u8 entry_idx)
{
vnt_control_out(priv, MESSAGE_TYPE_CLRKEYENTRY, 0, 0,
sizeof(entry_idx), &entry_idx);
* Return Value: none
*
*/
-void MACvSetKeyEntry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx,
+void vnt_mac_set_keyentry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx,
u32 key_idx, u8 *addr, u8 *key)
{
struct vnt_mac_set_key set_key;
(u16)key_idx, sizeof(struct vnt_mac_set_key), (u8 *)&set_key);
}
-void MACvRegBitsOff(struct vnt_private *priv, u8 reg_ofs, u8 bits)
+void vnt_mac_reg_bits_off(struct vnt_private *priv, u8 reg_ofs, u8 bits)
{
u8 data[2];
reg_ofs, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvRegBitsOn(struct vnt_private *priv, u8 reg_ofs, u8 bits)
+void vnt_mac_reg_bits_on(struct vnt_private *priv, u8 reg_ofs, u8 bits)
{
u8 data[2];
reg_ofs, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvWriteWord(struct vnt_private *priv, u8 reg_ofs, u16 word)
+void vnt_mac_write_word(struct vnt_private *priv, u8 reg_ofs, u16 word)
{
u8 data[2];
reg_ofs, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvWriteBSSIDAddress(struct vnt_private *priv, u8 *addr)
+void vnt_mac_set_bssid_addr(struct vnt_private *priv, u8 *addr)
{
vnt_control_out(priv, MESSAGE_TYPE_WRITE, MAC_REG_BSSID0,
MESSAGE_REQUEST_MACREG, ETH_ALEN, addr);
}
-void MACvEnableProtectMD(struct vnt_private *priv)
+void vnt_mac_enable_protect_mode(struct vnt_private *priv)
{
u8 data[2];
MAC_REG_ENCFG0, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvDisableProtectMD(struct vnt_private *priv)
+void vnt_mac_disable_protect_mode(struct vnt_private *priv)
{
u8 data[2];
MAC_REG_ENCFG0, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvEnableBarkerPreambleMd(struct vnt_private *priv)
+void vnt_mac_enable_barker_preamble_mode(struct vnt_private *priv)
{
u8 data[2];
MAC_REG_ENCFG2, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvDisableBarkerPreambleMd(struct vnt_private *priv)
+void vnt_mac_disable_barker_preamble_mode(struct vnt_private *priv)
{
u8 data[2];
MAC_REG_ENCFG2, MESSAGE_REQUEST_MACREG, ARRAY_SIZE(data), data);
}
-void MACvWriteBeaconInterval(struct vnt_private *priv, u16 interval)
+void vnt_mac_set_beacon_interval(struct vnt_private *priv, u16 interval)
{
u8 data[2];
u8 key[WLAN_KEY_LEN_CCMP];
} __packed;
-void MACvWriteMultiAddr(struct vnt_private *, u64);
-void MACbShutdown(struct vnt_private *);
-void MACvSetBBType(struct vnt_private *, u8);
-void MACvDisableKeyEntry(struct vnt_private *, u8);
-void MACvSetKeyEntry(struct vnt_private *, u16, u32, u32, u8 *, u8 *);
-void MACvRegBitsOff(struct vnt_private *, u8, u8);
-void MACvRegBitsOn(struct vnt_private *, u8, u8);
-void MACvWriteWord(struct vnt_private *, u8, u16);
-void MACvWriteBSSIDAddress(struct vnt_private *, u8 *);
-void MACvEnableProtectMD(struct vnt_private *);
-void MACvDisableProtectMD(struct vnt_private *);
-void MACvEnableBarkerPreambleMd(struct vnt_private *);
-void MACvDisableBarkerPreambleMd(struct vnt_private *);
-void MACvWriteBeaconInterval(struct vnt_private *, u16);
+void vnt_mac_set_filter(struct vnt_private *, u64);
+void vnt_mac_shutdown(struct vnt_private *);
+void vnt_mac_set_bb_type(struct vnt_private *, u8);
+void vnt_mac_disable_keyentry(struct vnt_private *, u8);
+void vnt_mac_set_keyentry(struct vnt_private *, u16, u32, u32, u8 *, u8 *);
+void vnt_mac_reg_bits_off(struct vnt_private *, u8, u8);
+void vnt_mac_reg_bits_on(struct vnt_private *, u8, u8);
+void vnt_mac_write_word(struct vnt_private *, u8, u16);
+void vnt_mac_set_bssid_addr(struct vnt_private *, u8 *);
+void vnt_mac_enable_protect_mode(struct vnt_private *);
+void vnt_mac_disable_protect_mode(struct vnt_private *);
+void vnt_mac_enable_barker_preamble_mode(struct vnt_private *);
+void vnt_mac_disable_barker_preamble_mode(struct vnt_private *);
+void vnt_mac_set_beacon_interval(struct vnt_private *, u16);
void vnt_mac_set_led(struct vnt_private *priv, u8, u8);
#endif /* __MAC_H__ */
memcpy(pDevice->abySNAP_RFC1042, abySNAP_RFC1042, ETH_ALEN);
memcpy(pDevice->abySNAP_Bridgetunnel, abySNAP_Bridgetunnel, ETH_ALEN);
- if (!FIRMWAREbCheckVersion(pDevice)) {
- if (FIRMWAREbDownload(pDevice) == true) {
- if (FIRMWAREbBrach2Sram(pDevice) == false) {
+ if (!vnt_check_firmware_version(pDevice)) {
+ if (vnt_download_firmware(pDevice) == true) {
+ if (vnt_firmware_branch_to_sram(pDevice) == false) {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
- " FIRMWAREbBrach2Sram fail\n");
+ " vnt_firmware_branch_to_sram fail\n");
return false;
}
} else {
pMgmt->eScanType = WMAC_SCAN_PASSIVE;
pMgmt->uCurrChannel = pDevice->uChannel;
pMgmt->uIBSSChannel = pDevice->uChannel;
- CARDbSetMediaChannel(pDevice, pMgmt->uCurrChannel);
+
+ vnt_set_channel(pDevice, pMgmt->uCurrChannel);
/* get permanent network address */
memcpy(pDevice->abyPermanentNetAddr, init_rsp->net_addr, 6);
* set Short Slot Time, xIFS, and RSPINF
*/
if (pDevice->byBBType == BB_TYPE_11A) {
- CARDbAddBasicRate(pDevice, RATE_6M);
+ vnt_add_basic_rate(pDevice, RATE_6M);
pDevice->bShortSlotTime = true;
} else {
- CARDbAddBasicRate(pDevice, RATE_1M);
+ vnt_add_basic_rate(pDevice, RATE_1M);
pDevice->bShortSlotTime = false;
}
BBvSetShortSlotTime(pDevice);
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
pDevice->byBBVGANew = pDevice->byBBVGACurrent;
if ((byTmp & GPIO3_DATA) == 0) {
pDevice->bHWRadioOff = true;
- MACvRegBitsOn(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_GPIOCTL1,
+ GPIO3_INTMD);
} else {
- MACvRegBitsOff(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_GPIOCTL1,
+ GPIO3_INTMD);
pDevice->bHWRadioOff = false;
}
vnt_mac_set_led(pDevice, LEDSTS_STS, LEDSTS_SLOW);
- MACvRegBitsOn(pDevice, MAC_REG_GPIOCTL0, 0x01);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_GPIOCTL0, 0x01);
if ((pDevice->bHWRadioOff == true) ||
(pDevice->bRadioControlOff == true)) {
- CARDbRadioPowerOff(pDevice);
+ vnt_radio_power_off(pDevice);
} else {
- CARDbRadioPowerOn(pDevice);
+ vnt_radio_power_on(pDevice);
}
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"<----INIbInitAdapter Exit\n");
pDevice->eEncryptionStatus = Ndis802_11EncryptionDisabled;
for (uu = 0; uu < MAX_KEY_TABLE; uu++)
- MACvDisableKeyEntry(pDevice,uu);
+ vnt_mac_disable_keyentry(pDevice, uu);
+
+ if ((pDevice->flags & DEVICE_FLAGS_UNPLUG) == false)
+ vnt_mac_shutdown(pDevice);
- if ((pDevice->flags & DEVICE_FLAGS_UNPLUG) == false) {
- MACbShutdown(pDevice);
- }
netif_stop_queue(pDevice->dev);
MP_SET_FLAG(pDevice, fMP_DISCONNECTED);
MP_CLEAR_FLAG(pDevice, fMP_POST_WRITES);
} else if ((netdev_mc_count(dev) > priv->multicast_limit) ||
(dev->flags & IFF_ALLMULTI)) {
mc_filter = ~0x0;
- MACvWriteMultiAddr(priv, mc_filter);
+ vnt_mac_set_filter(priv, mc_filter);
priv->byRxMode |= (RCR_MULTICAST|RCR_BROADCAST);
} else {
mc_filter |= 1ULL << (bit_nr & 0x3f);
}
- MACvWriteMultiAddr(priv, mc_filter);
+ vnt_mac_set_filter(priv, mc_filter);
priv->byRxMode &= ~(RCR_UNICAST);
priv->byRxMode |= (RCR_MULTICAST|RCR_BROADCAST);
* Date: July 17, 2002
*
* Functions:
- * PSvEnablePowerSaving - Enable Power Saving Mode
+ * vnt_enable_power_saving - Enable Power Saving Mode
* PSvDiasblePowerSaving - Disable Power Saving Mode
* PSbConsiderPowerDown - Decide if we can Power Down
* PSvSendPSPOLL - Send PS-POLL packet
* PSbSendNullPacket - Send Null packet
- * PSbIsNextTBTTWakeUp - Decide if we need to wake up at next Beacon
+ * vnt_next_tbtt_wakeup - Decide if we need to wake up at next Beacon
*
* Revision History:
*
*
*/
-void PSvEnablePowerSaving(struct vnt_private *pDevice, u16 wListenInterval)
+void vnt_enable_power_saving(struct vnt_private *priv, u16 listen_interval)
{
- struct vnt_manager *pMgmt = &pDevice->vnt_mgmt;
- u16 wAID = pMgmt->wCurrAID | BIT14 | BIT15;
+ struct vnt_manager *mgmt = &priv->vnt_mgmt;
+ u16 aid = mgmt->wCurrAID | BIT14 | BIT15;
/* set period of power up before TBTT */
- MACvWriteWord(pDevice, MAC_REG_PWBT, C_PWBT);
+ vnt_mac_write_word(priv, MAC_REG_PWBT, C_PWBT);
- if (pDevice->op_mode != NL80211_IFTYPE_ADHOC) {
+ if (priv->op_mode != NL80211_IFTYPE_ADHOC) {
/* set AID */
- MACvWriteWord(pDevice, MAC_REG_AIDATIM, wAID);
+ vnt_mac_write_word(priv, MAC_REG_AIDATIM, aid);
}
/* Warren:06-18-2004,the sequence must follow
* PSEN->AUTOSLEEP->GO2DOZE
*/
/* enable power saving hw function */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_PSEN);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_PSEN);
/* Set AutoSleep */
- MACvRegBitsOn(pDevice, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* Warren:MUST turn on this once before turn on AUTOSLEEP ,or the
* AUTOSLEEP doesn't work
*/
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_GO2DOZE);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_GO2DOZE);
- if (wListenInterval >= 2) {
+ if (listen_interval >= 2) {
/* clear always listen beacon */
- MACvRegBitsOff(pDevice, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vnt_mac_reg_bits_off(priv, MAC_REG_PSCTL, PSCTL_ALBCN);
/* first time set listen next beacon */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_LNBCN);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_LNBCN);
- pMgmt->wCountToWakeUp = wListenInterval;
+ mgmt->wCountToWakeUp = listen_interval;
} else {
/* always listen beacon */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_ALBCN);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_ALBCN);
- pMgmt->wCountToWakeUp = 0;
+ mgmt->wCountToWakeUp = 0;
}
- pDevice->bEnablePSMode = true;
+ priv->bEnablePSMode = true;
/* We don't send null pkt in ad hoc mode
* since beacon will handle this.
*/
- if (pDevice->op_mode == NL80211_IFTYPE_STATION)
- PSbSendNullPacket(pDevice);
+ if (priv->op_mode == NL80211_IFTYPE_STATION)
+ PSbSendNullPacket(priv);
- pDevice->bPWBitOn = true;
+ priv->bPWBitOn = true;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "PS:Power Saving Mode Enable...\n");
}
*
*/
-void PSvDisablePowerSaving(struct vnt_private *pDevice)
+void vnt_disable_power_saving(struct vnt_private *priv)
{
/* disable power saving hw function */
- vnt_control_out(pDevice, MESSAGE_TYPE_DISABLE_PS, 0,
+ vnt_control_out(priv, MESSAGE_TYPE_DISABLE_PS, 0,
0, 0, NULL);
/* clear AutoSleep */
- MACvRegBitsOff(pDevice, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
+ vnt_mac_reg_bits_off(priv, MAC_REG_PSCFG, PSCFG_AUTOSLEEP);
/* set always listen beacon */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_ALBCN);
- pDevice->bEnablePSMode = false;
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_ALBCN);
+ priv->bEnablePSMode = false;
- if (pDevice->op_mode == NL80211_IFTYPE_STATION)
- PSbSendNullPacket(pDevice);
+ if (priv->op_mode == NL80211_IFTYPE_STATION)
+ PSbSendNullPacket(priv);
- pDevice->bPWBitOn = false;
+ priv->bPWBitOn = false;
}
/*
return false;
/* Froce PSEN on */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_PSEN);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_PSCTL, PSCTL_PSEN);
if (pMgmt->eCurrMode != WMAC_MODE_IBSS_STA) {
if (bCheckCountToWakeUp && (pMgmt->wCountToWakeUp == 0
pDevice->bPSRxBeacon = true;
/* no Tx, no Rx isr, now go to Doze */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_GO2DOZE);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_PSCTL, PSCTL_GO2DOZE);
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Go to Doze ZZZZZZZZZZZZZZZ\n");
return true;
}
*
*/
-int PSbIsNextTBTTWakeUp(struct vnt_private *pDevice)
+int vnt_next_tbtt_wakeup(struct vnt_private *priv)
{
- struct vnt_manager *pMgmt = &pDevice->vnt_mgmt;
- int bWakeUp = false;
+ struct vnt_manager *mgmt = &priv->vnt_mgmt;
+ int wake_up = false;
- if (pMgmt->wListenInterval >= 2) {
- if (pMgmt->wCountToWakeUp == 0)
- pMgmt->wCountToWakeUp = pMgmt->wListenInterval;
+ if (mgmt->wListenInterval >= 2) {
+ if (mgmt->wCountToWakeUp == 0)
+ mgmt->wCountToWakeUp = mgmt->wListenInterval;
- pMgmt->wCountToWakeUp--;
+ mgmt->wCountToWakeUp--;
- if (pMgmt->wCountToWakeUp == 1) {
+ if (mgmt->wCountToWakeUp == 1) {
/* Turn on wake up to listen next beacon */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_LNBCN);
- pDevice->bPSRxBeacon = false;
- bWakeUp = true;
- } else if (!pDevice->bPSRxBeacon) {
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_LNBCN);
+ priv->bPSRxBeacon = false;
+ wake_up = true;
+ } else if (!priv->bPSRxBeacon) {
/* Listen until RxBeacon */
- MACvRegBitsOn(pDevice, MAC_REG_PSCTL, PSCTL_LNBCN);
+ vnt_mac_reg_bits_on(priv, MAC_REG_PSCTL, PSCTL_LNBCN);
}
}
- return bWakeUp;
+ return wake_up;
}
int PSbConsiderPowerDown(struct vnt_private *, int bCheckRxDMA,
int bCheckCountToWakeUp);
-void PSvDisablePowerSaving(struct vnt_private *);
-void PSvEnablePowerSaving(struct vnt_private *, u16 wListenInterval);
+void vnt_disable_power_saving(struct vnt_private *);
+void vnt_enable_power_saving(struct vnt_private *, u16);
void PSvSendPSPOLL(struct vnt_private *);
int PSbSendNullPacket(struct vnt_private *);
-int PSbIsNextTBTTWakeUp(struct vnt_private *);
+int vnt_next_tbtt_wakeup(struct vnt_private *);
#endif /* __POWER_H__ */
static struct vnt_usb_send_context *s_vGetFreeContext(struct vnt_private *);
-static u16 s_vGenerateTxParameter(struct vnt_private *pDevice,
+static u16 s_vGenerateTxParameter(struct vnt_usb_send_context *tx_context,
u8 byPktType, u16 wCurrentRate, struct vnt_tx_buffer *tx_buffer,
struct vnt_mic_hdr **mic_hdr, u32 need_mic, u32 cbFrameSize,
int bNeedACK, struct ethhdr *psEthHeader, bool need_rts);
static void s_vGenerateMACHeader(struct vnt_private *pDevice,
- u8 *pbyBufferAddr, u16 wDuration, struct ethhdr *psEthHeader,
- int bNeedEncrypt, u16 wFragType, u32 uFragIdx);
+ struct ieee80211_hdr *pMACHeader, u16 wDuration,
+ struct ethhdr *psEthHeader, int bNeedEncrypt, u16 wFragType,
+ u32 uFragIdx);
-static void s_vFillTxKey(struct vnt_private *pDevice,
+static void s_vFillTxKey(struct vnt_usb_send_context *tx_context,
struct vnt_tx_fifo_head *fifo_head, u8 *pbyIVHead,
- PSKeyItem pTransmitKey, u8 *pbyHdrBuf, u16 wPayloadLen,
- struct vnt_mic_hdr *mic_hdr);
+ PSKeyItem pTransmitKey, u16 wPayloadLen, struct vnt_mic_hdr *mic_hdr);
static void s_vSWencryption(struct vnt_private *pDevice,
PSKeyItem pTransmitKey, u8 *pbyPayloadHead, u16 wPayloadSize);
static __le16 s_uGetRTSCTSRsvTime(struct vnt_private *priv,
u8 rsv_type, u8 pkt_type, u32 frame_length, u16 current_rate);
-static u16 s_vFillCTSHead(struct vnt_private *pDevice,
+static u16 s_vFillCTSHead(struct vnt_usb_send_context *tx_context,
u8 byPktType, union vnt_tx_data_head *head, u32 cbFrameLength,
int bNeedAck, u16 wCurrentRate, u8 byFBOption);
-static u16 s_vFillRTSHead(struct vnt_private *pDevice, u8 byPktType,
+static u16 s_vFillRTSHead(struct vnt_usb_send_context *tx_context, u8 byPktType,
union vnt_tx_data_head *head, u32 cbFrameLength, int bNeedAck,
struct ethhdr *psEthHeader, u16 wCurrentRate, u8 byFBOption);
context->in_use = true;
memset(context->data, 0,
MAX_TOTAL_SIZE_WITH_ALL_HEADERS);
+
+ context->hdr = NULL;
+
return context;
}
}
stats->tx_bytes += wPktLength;
}
-static void s_vFillTxKey(struct vnt_private *pDevice,
+static void s_vFillTxKey(struct vnt_usb_send_context *tx_context,
struct vnt_tx_fifo_head *fifo_head, u8 *pbyIVHead,
- PSKeyItem pTransmitKey, u8 *pbyHdrBuf, u16 wPayloadLen,
- struct vnt_mic_hdr *mic_hdr)
+ PSKeyItem pTransmitKey, u16 wPayloadLen, struct vnt_mic_hdr *mic_hdr)
{
- u8 *pbyBuf = (u8 *)&fifo_head->adwTxKey[0];
+ struct vnt_private *pDevice = tx_context->priv;
+ struct ieee80211_hdr *pMACHeader = tx_context->hdr;
+ u8 *pbyBuf = fifo_head->tx_key;
__le32 *pdwIV = (__le32 *)pbyIVHead;
__le32 *pdwExtIV = (__le32 *)((u8 *)pbyIVHead + 4);
- struct ieee80211_hdr *pMACHeader = (struct ieee80211_hdr *)pbyHdrBuf;
__le32 rev_iv_counter;
/* Fill TXKEY */
{
u32 data_time, ack_time;
- data_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ data_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
frame_length, rate);
if (pkt_type == PK_TYPE_11B)
- ack_time = BBuGetFrameTime(priv->byPreambleType, pkt_type, 14,
- (u16)priv->byTopCCKBasicRate);
+ ack_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
+ 14, (u16)priv->byTopCCKBasicRate);
else
- ack_time = BBuGetFrameTime(priv->byPreambleType, pkt_type, 14,
- (u16)priv->byTopOFDMBasicRate);
+ ack_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
+ 14, (u16)priv->byTopOFDMBasicRate);
if (need_ack)
return data_time + priv->uSIFS + ack_time;
rrv_time = rts_time = cts_time = ack_time = data_time = 0;
- data_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ data_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
frame_length, current_rate);
if (rsv_type == 0) {
- rts_time = BBuGetFrameTime(priv->byPreambleType,
+ rts_time = vnt_get_frame_time(priv->byPreambleType,
pkt_type, 20, priv->byTopCCKBasicRate);
- cts_time = ack_time = BBuGetFrameTime(priv->byPreambleType,
+ cts_time = ack_time = vnt_get_frame_time(priv->byPreambleType,
pkt_type, 14, priv->byTopCCKBasicRate);
} else if (rsv_type == 1) {
- rts_time = BBuGetFrameTime(priv->byPreambleType,
+ rts_time = vnt_get_frame_time(priv->byPreambleType,
pkt_type, 20, priv->byTopCCKBasicRate);
- cts_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ cts_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
14, priv->byTopCCKBasicRate);
- ack_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ ack_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
14, priv->byTopOFDMBasicRate);
} else if (rsv_type == 2) {
- rts_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ rts_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
20, priv->byTopOFDMBasicRate);
- cts_time = ack_time = BBuGetFrameTime(priv->byPreambleType,
+ cts_time = ack_time = vnt_get_frame_time(priv->byPreambleType,
pkt_type, 14, priv->byTopOFDMBasicRate);
} else if (rsv_type == 3) {
- cts_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ cts_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
14, priv->byTopCCKBasicRate);
- ack_time = BBuGetFrameTime(priv->byPreambleType, pkt_type,
+ ack_time = vnt_get_frame_time(priv->byPreambleType, pkt_type,
14, priv->byTopOFDMBasicRate);
rrv_time = cts_time + ack_time + data_time + 2 * priv->uSIFS;
if (bNeedAck) {
if (byPktType == PK_TYPE_11B)
- uAckTime = BBuGetFrameTime(pDevice->byPreambleType,
+ uAckTime = vnt_get_frame_time(pDevice->byPreambleType,
byPktType, 14, pDevice->byTopCCKBasicRate);
else
- uAckTime = BBuGetFrameTime(pDevice->byPreambleType,
+ uAckTime = vnt_get_frame_time(pDevice->byPreambleType,
byPktType, 14, pDevice->byTopOFDMBasicRate);
return cpu_to_le16((u16)(pDevice->uSIFS + uAckTime));
}
case RTSDUR_BA:
case RTSDUR_BA_F0:
case RTSDUR_BA_F1:
- uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType,
- 14, pDevice->byTopCCKBasicRate);
+ uCTSTime = vnt_get_frame_time(pDevice->byPreambleType,
+ byPktType, 14, pDevice->byTopCCKBasicRate);
uDurTime = uCTSTime + 2 * pDevice->uSIFS +
s_uGetTxRsvTime(pDevice, byPktType,
cbFrameLength, wRate, bNeedAck);
case RTSDUR_AA:
case RTSDUR_AA_F0:
case RTSDUR_AA_F1:
- uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType,
- 14, pDevice->byTopOFDMBasicRate);
+ uCTSTime = vnt_get_frame_time(pDevice->byPreambleType,
+ byPktType, 14, pDevice->byTopOFDMBasicRate);
uDurTime = uCTSTime + 2 * pDevice->uSIFS +
s_uGetTxRsvTime(pDevice, byPktType,
cbFrameLength, wRate, bNeedAck);
return cpu_to_le16((u16)uDurTime);
}
-static u16 vnt_rxtx_datahead_g(struct vnt_private *priv, u8 pkt_type, u16 rate,
- struct vnt_tx_datahead_g *buf, u32 frame_len, int need_ack)
+static u16 vnt_mac_hdr_pos(struct vnt_usb_send_context *tx_context,
+ struct ieee80211_hdr *hdr)
{
+ u8 *head = tx_context->data + offsetof(struct vnt_tx_buffer, fifo_head);
+ u8 *hdr_pos = (u8 *)hdr;
+
+ tx_context->hdr = hdr;
+ if (!tx_context->hdr)
+ return 0;
+
+ return (u16)(hdr_pos - head);
+}
+
+static u16 vnt_rxtx_datahead_g(struct vnt_usb_send_context *tx_context,
+ u8 pkt_type, u16 rate, struct vnt_tx_datahead_g *buf,
+ u32 frame_len, int need_ack)
+{
+
+ struct vnt_private *priv = tx_context->priv;
+
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(priv, frame_len, rate, pkt_type, &buf->a);
- BBvCalculateParameter(priv, frame_len, priv->byTopCCKBasicRate,
+ vnt_get_phy_field(priv, frame_len, rate, pkt_type, &buf->a);
+ vnt_get_phy_field(priv, frame_len, priv->byTopCCKBasicRate,
PK_TYPE_11B, &buf->b);
/* Get Duration and TimeStamp */
buf->time_stamp_off_b = vnt_time_stamp_off(priv,
priv->byTopCCKBasicRate);
+ tx_context->tx_hdr_size = vnt_mac_hdr_pos(tx_context, &buf->hdr);
+
return le16_to_cpu(buf->duration_a);
}
-static u16 vnt_rxtx_datahead_g_fb(struct vnt_private *priv, u8 pkt_type,
- u16 rate, struct vnt_tx_datahead_g_fb *buf,
+static u16 vnt_rxtx_datahead_g_fb(struct vnt_usb_send_context *tx_context,
+ u8 pkt_type, u16 rate, struct vnt_tx_datahead_g_fb *buf,
u32 frame_len, int need_ack)
{
+ struct vnt_private *priv = tx_context->priv;
+
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(priv, frame_len, rate, pkt_type, &buf->a);
+ vnt_get_phy_field(priv, frame_len, rate, pkt_type, &buf->a);
- BBvCalculateParameter(priv, frame_len, priv->byTopCCKBasicRate,
+ vnt_get_phy_field(priv, frame_len, priv->byTopCCKBasicRate,
PK_TYPE_11B, &buf->b);
/* Get Duration and TimeStamp */
buf->time_stamp_off_b = vnt_time_stamp_off(priv,
priv->byTopCCKBasicRate);
+ tx_context->tx_hdr_size = vnt_mac_hdr_pos(tx_context, &buf->hdr);
+
return le16_to_cpu(buf->duration_a);
}
-static u16 vnt_rxtx_datahead_a_fb(struct vnt_private *priv, u8 pkt_type,
- u16 rate, struct vnt_tx_datahead_a_fb *buf,
+static u16 vnt_rxtx_datahead_a_fb(struct vnt_usb_send_context *tx_context,
+ u8 pkt_type, u16 rate, struct vnt_tx_datahead_a_fb *buf,
u32 frame_len, int need_ack)
{
+ struct vnt_private *priv = tx_context->priv;
+
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(priv, frame_len, rate, pkt_type, &buf->a);
+ vnt_get_phy_field(priv, frame_len, rate, pkt_type, &buf->a);
/* Get Duration and TimeStampOff */
buf->duration = s_uGetDataDuration(priv, pkt_type, need_ack);
buf->time_stamp_off = vnt_time_stamp_off(priv, rate);
+ tx_context->tx_hdr_size = vnt_mac_hdr_pos(tx_context, &buf->hdr);
+
return le16_to_cpu(buf->duration);
}
-static u16 vnt_rxtx_datahead_ab(struct vnt_private *priv, u8 pkt_type,
- u16 rate, struct vnt_tx_datahead_ab *buf,
+static u16 vnt_rxtx_datahead_ab(struct vnt_usb_send_context *tx_context,
+ u8 pkt_type, u16 rate, struct vnt_tx_datahead_ab *buf,
u32 frame_len, int need_ack)
{
+ struct vnt_private *priv = tx_context->priv;
+
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(priv, frame_len, rate, pkt_type, &buf->ab);
+ vnt_get_phy_field(priv, frame_len, rate, pkt_type, &buf->ab);
/* Get Duration and TimeStampOff */
buf->duration = s_uGetDataDuration(priv, pkt_type, need_ack);
buf->time_stamp_off = vnt_time_stamp_off(priv, rate);
+ tx_context->tx_hdr_size = vnt_mac_hdr_pos(tx_context, &buf->hdr);
+
return le16_to_cpu(buf->duration);
}
return 0;
}
-static u16 vnt_rxtx_rts_g_head(struct vnt_private *priv,
+static u16 vnt_rxtx_rts_g_head(struct vnt_usb_send_context *tx_context,
struct vnt_rts_g *buf, struct ethhdr *eth_hdr,
u8 pkt_type, u32 frame_len, int need_ack,
u16 current_rate, u8 fb_option)
{
+ struct vnt_private *priv = tx_context->priv;
u16 rts_frame_len = 20;
- BBvCalculateParameter(priv, rts_frame_len, priv->byTopCCKBasicRate,
+ vnt_get_phy_field(priv, rts_frame_len, priv->byTopCCKBasicRate,
PK_TYPE_11B, &buf->b);
- BBvCalculateParameter(priv, rts_frame_len,
+ vnt_get_phy_field(priv, rts_frame_len,
priv->byTopOFDMBasicRate, pkt_type, &buf->a);
buf->duration_bb = s_uGetRTSCTSDuration(priv, RTSDUR_BB, frame_len,
vnt_fill_ieee80211_rts(priv, &buf->data, eth_hdr, buf->duration_aa);
- return vnt_rxtx_datahead_g(priv, pkt_type, current_rate,
+ return vnt_rxtx_datahead_g(tx_context, pkt_type, current_rate,
&buf->data_head, frame_len, need_ack);
}
-static u16 vnt_rxtx_rts_g_fb_head(struct vnt_private *priv,
+static u16 vnt_rxtx_rts_g_fb_head(struct vnt_usb_send_context *tx_context,
struct vnt_rts_g_fb *buf, struct ethhdr *eth_hdr,
u8 pkt_type, u32 frame_len, int need_ack,
u16 current_rate, u8 fb_option)
{
+ struct vnt_private *priv = tx_context->priv;
u16 rts_frame_len = 20;
- BBvCalculateParameter(priv, rts_frame_len, priv->byTopCCKBasicRate,
+ vnt_get_phy_field(priv, rts_frame_len, priv->byTopCCKBasicRate,
PK_TYPE_11B, &buf->b);
- BBvCalculateParameter(priv, rts_frame_len,
+ vnt_get_phy_field(priv, rts_frame_len,
priv->byTopOFDMBasicRate, pkt_type, &buf->a);
vnt_fill_ieee80211_rts(priv, &buf->data, eth_hdr, buf->duration_aa);
- return vnt_rxtx_datahead_g_fb(priv, pkt_type, current_rate,
+ return vnt_rxtx_datahead_g_fb(tx_context, pkt_type, current_rate,
&buf->data_head, frame_len, need_ack);
}
-static u16 vnt_rxtx_rts_ab_head(struct vnt_private *priv,
+static u16 vnt_rxtx_rts_ab_head(struct vnt_usb_send_context *tx_context,
struct vnt_rts_ab *buf, struct ethhdr *eth_hdr,
u8 pkt_type, u32 frame_len, int need_ack,
u16 current_rate, u8 fb_option)
{
+ struct vnt_private *priv = tx_context->priv;
u16 rts_frame_len = 20;
- BBvCalculateParameter(priv, rts_frame_len,
+ vnt_get_phy_field(priv, rts_frame_len,
priv->byTopOFDMBasicRate, pkt_type, &buf->ab);
buf->duration = s_uGetRTSCTSDuration(priv, RTSDUR_AA, frame_len,
vnt_fill_ieee80211_rts(priv, &buf->data, eth_hdr, buf->duration);
- return vnt_rxtx_datahead_ab(priv, pkt_type, current_rate,
+ return vnt_rxtx_datahead_ab(tx_context, pkt_type, current_rate,
&buf->data_head, frame_len, need_ack);
}
-static u16 vnt_rxtx_rts_a_fb_head(struct vnt_private *priv,
+static u16 vnt_rxtx_rts_a_fb_head(struct vnt_usb_send_context *tx_context,
struct vnt_rts_a_fb *buf, struct ethhdr *eth_hdr,
u8 pkt_type, u32 frame_len, int need_ack,
u16 current_rate, u8 fb_option)
{
+ struct vnt_private *priv = tx_context->priv;
u16 rts_frame_len = 20;
- BBvCalculateParameter(priv, rts_frame_len,
+ vnt_get_phy_field(priv, rts_frame_len,
priv->byTopOFDMBasicRate, pkt_type, &buf->a);
buf->duration = s_uGetRTSCTSDuration(priv, RTSDUR_AA, frame_len,
vnt_fill_ieee80211_rts(priv, &buf->data, eth_hdr, buf->duration);
- return vnt_rxtx_datahead_a_fb(priv, pkt_type, current_rate,
+ return vnt_rxtx_datahead_a_fb(tx_context, pkt_type, current_rate,
&buf->data_head, frame_len, need_ack);
}
-static u16 s_vFillRTSHead(struct vnt_private *pDevice, u8 byPktType,
+static u16 s_vFillRTSHead(struct vnt_usb_send_context *tx_context, u8 byPktType,
union vnt_tx_data_head *head, u32 cbFrameLength, int bNeedAck,
struct ethhdr *psEthHeader, u16 wCurrentRate, u8 byFBOption)
{
case PK_TYPE_11GB:
case PK_TYPE_11GA:
if (byFBOption == AUTO_FB_NONE)
- return vnt_rxtx_rts_g_head(pDevice, &head->rts_g,
+ return vnt_rxtx_rts_g_head(tx_context, &head->rts_g,
psEthHeader, byPktType, cbFrameLength,
bNeedAck, wCurrentRate, byFBOption);
else
- return vnt_rxtx_rts_g_fb_head(pDevice, &head->rts_g_fb,
- psEthHeader, byPktType, cbFrameLength,
- bNeedAck, wCurrentRate, byFBOption);
+ return vnt_rxtx_rts_g_fb_head(tx_context,
+ &head->rts_g_fb, psEthHeader, byPktType,
+ cbFrameLength, bNeedAck, wCurrentRate,
+ byFBOption);
break;
case PK_TYPE_11A:
if (byFBOption) {
- return vnt_rxtx_rts_a_fb_head(pDevice, &head->rts_a_fb,
- psEthHeader, byPktType, cbFrameLength,
- bNeedAck, wCurrentRate, byFBOption);
+ return vnt_rxtx_rts_a_fb_head(tx_context,
+ &head->rts_a_fb, psEthHeader, byPktType,
+ cbFrameLength, bNeedAck, wCurrentRate,
+ byFBOption);
break;
}
case PK_TYPE_11B:
- return vnt_rxtx_rts_ab_head(pDevice, &head->rts_ab,
+ return vnt_rxtx_rts_ab_head(tx_context, &head->rts_ab,
psEthHeader, byPktType, cbFrameLength,
bNeedAck, wCurrentRate, byFBOption);
}
return 0;
}
-static u16 s_vFillCTSHead(struct vnt_private *pDevice,
+static u16 s_vFillCTSHead(struct vnt_usb_send_context *tx_context,
u8 byPktType, union vnt_tx_data_head *head, u32 cbFrameLength,
int bNeedAck, u16 wCurrentRate, u8 byFBOption)
{
+ struct vnt_private *pDevice = tx_context->priv;
u32 uCTSFrameLen = 14;
if (!head)
/* Auto Fall back */
struct vnt_cts_fb *pBuf = &head->cts_g_fb;
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(pDevice, uCTSFrameLen,
+ vnt_get_phy_field(pDevice, uCTSFrameLen,
pDevice->byTopCCKBasicRate, PK_TYPE_11B, &pBuf->b);
pBuf->duration_ba = s_uGetRTSCTSDuration(pDevice, CTSDUR_BA,
cbFrameLength, byPktType,
memcpy(pBuf->data.ra, pDevice->abyCurrentNetAddr, ETH_ALEN);
- return vnt_rxtx_datahead_g_fb(pDevice, byPktType, wCurrentRate,
- &pBuf->data_head, cbFrameLength, bNeedAck);
+ return vnt_rxtx_datahead_g_fb(tx_context, byPktType,
+ wCurrentRate, &pBuf->data_head, cbFrameLength,
+ bNeedAck);
} else {
struct vnt_cts *pBuf = &head->cts_g;
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(pDevice, uCTSFrameLen,
+ vnt_get_phy_field(pDevice, uCTSFrameLen,
pDevice->byTopCCKBasicRate, PK_TYPE_11B, &pBuf->b);
/* Get CTSDuration_ba */
pBuf->duration_ba = s_uGetRTSCTSDuration(pDevice,
memcpy(pBuf->data.ra, pDevice->abyCurrentNetAddr, ETH_ALEN);
- return vnt_rxtx_datahead_g(pDevice, byPktType, wCurrentRate,
+ return vnt_rxtx_datahead_g(tx_context, byPktType, wCurrentRate,
&pBuf->data_head, cbFrameLength, bNeedAck);
}
*
-*/
-static u16 s_vGenerateTxParameter(struct vnt_private *pDevice,
+static u16 s_vGenerateTxParameter(struct vnt_usb_send_context *tx_context,
u8 byPktType, u16 wCurrentRate, struct vnt_tx_buffer *tx_buffer,
struct vnt_mic_hdr **mic_hdr, u32 need_mic, u32 cbFrameSize,
int bNeedACK, struct ethhdr *psEthHeader, bool need_rts)
{
+ struct vnt_private *pDevice = tx_context->priv;
struct vnt_tx_fifo_head *pFifoHead = &tx_buffer->fifo_head;
union vnt_tx_data_head *head = NULL;
u16 wFifoCtl;
}
/* Fill RTS */
- return s_vFillRTSHead(pDevice, byPktType, head,
+ return s_vFillRTSHead(tx_context, byPktType, head,
cbFrameSize, bNeedACK, psEthHeader,
wCurrentRate, byFBOption);
}
/* Fill CTS */
- return s_vFillCTSHead(pDevice, byPktType,
+ return s_vFillCTSHead(tx_context, byPktType,
head, cbFrameSize, bNeedACK, wCurrentRate,
byFBOption);
}
byPktType, cbFrameSize, wCurrentRate, bNeedACK);
/* Fill RTS */
- return s_vFillRTSHead(pDevice, byPktType, head,
+ return s_vFillRTSHead(tx_context, byPktType, head,
cbFrameSize, bNeedACK, psEthHeader,
wCurrentRate, byFBOption);
} else {
PK_TYPE_11A, cbFrameSize,
wCurrentRate, bNeedACK);
- return vnt_rxtx_datahead_a_fb(pDevice, byPktType,
+ return vnt_rxtx_datahead_a_fb(tx_context, byPktType,
wCurrentRate, &head->data_head_a_fb,
cbFrameSize, bNeedACK);
}
bNeedACK);
/* Fill RTS */
- return s_vFillRTSHead(pDevice, byPktType, head,
+ return s_vFillRTSHead(tx_context, byPktType, head,
cbFrameSize,
bNeedACK, psEthHeader, wCurrentRate, byFBOption);
} else {
PK_TYPE_11B, cbFrameSize,
wCurrentRate, bNeedACK);
- return vnt_rxtx_datahead_ab(pDevice, byPktType,
+ return vnt_rxtx_datahead_ab(tx_context, byPktType,
wCurrentRate, &head->data_head_ab,
cbFrameSize, bNeedACK);
}
unsigned int cbFragmentSize,//Hdr+payoad+FCS
*/
-static int s_bPacketToWirelessUsb(struct vnt_private *pDevice, u8 byPktType,
- struct vnt_tx_buffer *tx_buffer, int bNeedEncryption,
+static int s_bPacketToWirelessUsb(struct vnt_usb_send_context *tx_context,
+ u8 byPktType, struct vnt_tx_buffer *tx_buffer, int bNeedEncryption,
u32 uSkbPacketLen, struct ethhdr *psEthHeader,
u8 *pPacket, PSKeyItem pTransmitKey, u32 uNodeIndex, u16 wCurrentRate,
u32 *pcbHeaderLen, u32 *pcbTotalLen)
{
+ struct vnt_private *pDevice = tx_context->priv;
struct vnt_tx_fifo_head *pTxBufHead = &tx_buffer->fifo_head;
u32 cbFrameSize, cbFrameBodySize;
u32 cb802_1_H_len;
u32 cbFCSlen = 4, cbMICHDR = 0;
int bNeedACK;
bool bRTS = false;
- u8 *pbyType, *pbyMacHdr, *pbyIVHead, *pbyPayloadHead, *pbyTxBufferAddr;
+ u8 *pbyType, *pbyMacHdr, *pbyIVHead, *pbyPayloadHead;
u8 abySNAP_RFC1042[ETH_ALEN] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00};
u8 abySNAP_Bridgetunnel[ETH_ALEN]
= {0xAA, 0xAA, 0x03, 0x00, 0x00, 0xF8};
u32 cbHeaderLength = 0, uPadding = 0;
struct vnt_mic_hdr *pMICHDR;
u8 byFBOption = AUTO_FB_NONE, byFragType;
- u16 wTxBufSize;
u32 dwMICKey0, dwMICKey1, dwMIC_Priority;
u32 *pdwMIC_L, *pdwMIC_R;
int bSoftWEP = false;
pTxBufHead->wFIFOCtl |= (FIFOCTL_RTS | FIFOCTL_LRETRY);
}
- pbyTxBufferAddr = (u8 *) &(pTxBufHead->adwTxKey[0]);
- wTxBufSize = sizeof(struct vnt_tx_fifo_head);
-
- if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {//802.11g packet
- if (byFBOption == AUTO_FB_NONE) {
- if (bRTS == true) {//RTS_need
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
- cbMICHDR + sizeof(struct vnt_rts_g);
- }
- else { //RTS_needless
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_cts) +
- cbMICHDR + sizeof(struct vnt_cts);
- }
- } else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
- cbMICHDR + sizeof(struct vnt_rts_g_fb);
- }
- else if (bRTS == false) { //RTS_needless
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_cts) +
- cbMICHDR + sizeof(struct vnt_cts_fb);
- }
- } // Auto Fall Back
- }
- else {//802.11a/b packet
- if (byFBOption == AUTO_FB_NONE) {
- if (bRTS == true) {//RTS_need
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
- cbMICHDR + sizeof(struct vnt_rts_ab);
- }
- else if (bRTS == false) { //RTS_needless, no MICHDR
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
- cbMICHDR + sizeof(struct vnt_tx_datahead_ab);
- }
- } else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
- cbMICHDR + sizeof(struct vnt_rts_a_fb);
- }
- else if (bRTS == false) { //RTS_needless
- cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
- cbMICHDR + sizeof(struct vnt_tx_datahead_a_fb);
- }
- } // Auto Fall Back
- }
-
- pbyMacHdr = (u8 *)(pbyTxBufferAddr + cbHeaderLength);
- pbyIVHead = (u8 *)(pbyMacHdr + cbMACHdLen + uPadding);
- pbyPayloadHead = (u8 *)(pbyMacHdr + cbMACHdLen + uPadding + cbIVlen);
-
//=========================
// No Fragmentation
//=========================
//pTxBufHead = (PSTxBufHead) &(pTxBufHead->adwTxKey[0]);
/* Fill FIFO, RrvTime, RTS and CTS */
- uDuration = s_vGenerateTxParameter(pDevice, byPktType, wCurrentRate,
+ uDuration = s_vGenerateTxParameter(tx_context, byPktType, wCurrentRate,
tx_buffer, &pMICHDR, cbMICHDR,
cbFrameSize, bNeedACK, psEthHeader, bRTS);
- // Generate TX MAC Header
- s_vGenerateMACHeader(pDevice, pbyMacHdr, (u16)uDuration, psEthHeader, bNeedEncryption,
- byFragType, 0);
+ cbHeaderLength = tx_context->tx_hdr_size;
+ if (!cbHeaderLength)
+ return false;
+
+ pbyMacHdr = (u8 *)tx_context->hdr;
+ pbyIVHead = (u8 *)(pbyMacHdr + cbMACHdLen + uPadding);
+ pbyPayloadHead = (u8 *)(pbyMacHdr + cbMACHdLen + uPadding + cbIVlen);
+
+ /* Generate TX MAC Header */
+ s_vGenerateMACHeader(pDevice, tx_context->hdr, (u16)uDuration,
+ psEthHeader, bNeedEncryption, byFragType, 0);
if (bNeedEncryption == true) {
//Fill TXKEY
- s_vFillTxKey(pDevice, pTxBufHead, pbyIVHead, pTransmitKey,
- pbyMacHdr, (u16)cbFrameBodySize, pMICHDR);
+ s_vFillTxKey(tx_context, pTxBufHead, pbyIVHead, pTransmitKey,
+ (u16)cbFrameBodySize, pMICHDR);
}
/* 802.1H */
-*/
static void s_vGenerateMACHeader(struct vnt_private *pDevice,
- u8 *pbyBufferAddr, u16 wDuration, struct ethhdr *psEthHeader,
- int bNeedEncrypt, u16 wFragType, u32 uFragIdx)
+ struct ieee80211_hdr *pMACHeader, u16 wDuration,
+ struct ethhdr *psEthHeader, int bNeedEncrypt, u16 wFragType,
+ u32 uFragIdx)
{
- struct ieee80211_hdr *pMACHeader = (struct ieee80211_hdr *)pbyBufferAddr;
pMACHeader->frame_control = TYPE_802_11_DATA;
pTX_Buffer = (struct vnt_tx_buffer *)&pContext->data[0];
cbFrameBodySize = pPacket->cbPayloadLen;
pTxBufHead = &pTX_Buffer->fifo_head;
- pbyTxBufferAddr = (u8 *)&pTxBufHead->adwTxKey[0];
+ pbyTxBufferAddr = (u8 *)pTxBufHead;
wTxBufSize = sizeof(struct vnt_tx_fifo_head);
}
//the rest of pTxBufHead->wFragCtl:FragTyp will be set later in s_vFillFragParameter()
- //Set RrvTime/RTS/CTS Buffer
- if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {//802.11g packet
- cbHeaderSize = wTxBufSize + sizeof(struct vnt_rrv_time_cts) +
- sizeof(struct vnt_cts);
- }
- else { // 802.11a/b packet
- cbHeaderSize = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
- sizeof(struct vnt_tx_datahead_ab);
- }
-
memcpy(&(sEthHeader.h_dest[0]),
&(pPacket->p80211Header->sA3.abyAddr1[0]),
ETH_ALEN);
pTxBufHead->wFragCtl |= (u16)FRAGCTL_NONFRAG;
/* Fill FIFO,RrvTime,RTS,and CTS */
- uDuration = s_vGenerateTxParameter(pDevice, byPktType, wCurrentRate,
+ uDuration = s_vGenerateTxParameter(pContext, byPktType, wCurrentRate,
pTX_Buffer, &pMICHDR, 0,
cbFrameSize, bNeedACK, &sEthHeader, false);
- pMACHeader = (struct ieee80211_hdr *) (pbyTxBufferAddr + cbHeaderSize);
+ cbHeaderSize = pContext->tx_hdr_size;
+ if (!cbHeaderSize) {
+ pContext->in_use = false;
+ return CMD_STATUS_RESOURCES;
+ }
+
+ pMACHeader = pContext->hdr;
cbReqCount = cbHeaderSize + cbMacHdLen + uPadding + cbIVlen + cbFrameBodySize;
}
} while(false);
//Fill TXKEY
- s_vFillTxKey(pDevice, pTxBufHead, pbyIVHead, pTransmitKey,
- (u8 *)pMACHeader, (u16)cbFrameBodySize, NULL);
+ s_vFillTxKey(pContext, pTxBufHead, pbyIVHead, pTransmitKey,
+ (u16)cbFrameBodySize, NULL);
memcpy(pMACHeader, pPacket->p80211Header, cbMacHdLen);
memcpy(pbyPayloadHead, ((u8 *)(pPacket->p80211Header) + cbMacHdLen),
wCurrentRate = RATE_6M;
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(pDevice, cbFrameSize, wCurrentRate,
+ vnt_get_phy_field(pDevice, cbFrameSize, wCurrentRate,
PK_TYPE_11A, &short_head->ab);
/* Get Duration and TimeStampOff */
short_head->fifo_ctl |= FIFOCTL_11B;
/* Get SignalField,ServiceField,Length */
- BBvCalculateParameter(pDevice, cbFrameSize, wCurrentRate,
+ vnt_get_phy_field(pDevice, cbFrameSize, wCurrentRate,
PK_TYPE_11B, &short_head->ab);
/* Get Duration and TimeStampOff */
pTX_Buffer = (struct vnt_tx_buffer *)&pContext->data[0];
- fConvertedPacket = s_bPacketToWirelessUsb(pDevice, byPktType,
+ fConvertedPacket = s_bPacketToWirelessUsb(pContext, byPktType,
pTX_Buffer, bNeedEncryption,
skb->len, &pDevice->sTxEthHeader,
(u8 *)skb->data, pTransmitKey, uNodeIndex,
__le16 duration_a;
__le16 time_stamp_off_b;
__le16 time_stamp_off_a;
+ struct ieee80211_hdr hdr;
} __packed;
struct vnt_tx_datahead_g_fb {
__le16 duration_a_f1;
__le16 time_stamp_off_b;
__le16 time_stamp_off_a;
+ struct ieee80211_hdr hdr;
} __packed;
struct vnt_tx_datahead_ab {
struct vnt_phy_field ab;
__le16 duration;
__le16 time_stamp_off;
+ struct ieee80211_hdr hdr;
} __packed;
struct vnt_tx_datahead_a_fb {
__le16 time_stamp_off;
__le16 duration_f0;
__le16 duration_f1;
+ struct ieee80211_hdr hdr;
} __packed;
/* RTS buffer header */
};
struct vnt_tx_fifo_head {
- u32 adwTxKey[4];
+ u8 tx_key[WLAN_KEY_LEN_CCMP];
u16 wFIFOCtl;
__le16 time_stamp;
u16 wFragCtl;
if (bStop) {
//PMESG(("STOP_BEACON: IBSSChannel = %u, ScanChannel = %u\n",
// pMgmt->uIBSSChannel, pMgmt->uScanChannel));
- MACvRegBitsOff(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
}
} /* vAdHocBeaconStop */
if ((pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) &&
(pMgmt->eCurrState >= WMAC_STATE_STARTED)) {
//PMESG(("RESTART_BEACON\n"));
- MACvRegBitsOn(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
}
}
pDevice->byScanBBType = pDevice->byBBType; //lucas
pDevice->bStopDataPkt = true;
// Turn off RCR_BSSID filter every time
- MACvRegBitsOff(pDevice, MAC_REG_RCR, RCR_BSSID);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_RCR, RCR_BSSID);
pDevice->byRxMode &= ~RCR_BSSID;
}
//lucas
if ((pDevice->byBBType != BB_TYPE_11A) &&
(pMgmt->uScanChannel > CB_MAX_CHANNEL_24G)) {
pDevice->byBBType = BB_TYPE_11A;
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
} else if ((pDevice->byBBType == BB_TYPE_11A) &&
(pMgmt->uScanChannel <= CB_MAX_CHANNEL_24G)) {
pDevice->byBBType = BB_TYPE_11G;
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
}
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Scanning.... channel: [%d]\n", pMgmt->uScanChannel);
// Set channel
- CARDbSetMediaChannel(pDevice, pMgmt->uScanChannel);
+ vnt_set_channel(pDevice, pMgmt->uScanChannel);
// Set Baseband to be more sensitive.
BBvSetShortSlotTime(pDevice);
// Set Baseband's sensitivity back.
if (pDevice->byBBType != pDevice->byScanBBType) {
pDevice->byBBType = pDevice->byScanBBType;
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
}
BBvSetShortSlotTime(pDevice);
// Set channel back
vAdHocBeaconRestart(pDevice);
// Set channel back
- CARDbSetMediaChannel(pDevice, pMgmt->uCurrChannel);
+ vnt_set_channel(pDevice, pMgmt->uCurrChannel);
// Set Filter
if (pMgmt->bCurrBSSIDFilterOn) {
- MACvRegBitsOn(pDevice, MAC_REG_RCR, RCR_BSSID);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_RCR, RCR_BSSID);
pDevice->byRxMode |= RCR_BSSID;
}
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Scanning, set back to channel: [%d]\n", pMgmt->uCurrChannel);
}
netif_stop_queue(pDevice->dev);
if (pDevice->bNeedRadioOFF == true)
- CARDbRadioPowerOff(pDevice);
+ vnt_radio_power_off(pDevice);
break;
// set initial state
pMgmt->eCurrState = WMAC_STATE_IDLE;
pMgmt->eCurrMode = WMAC_MODE_STANDBY;
- PSvDisablePowerSaving((void *) pDevice);
+ vnt_disable_power_saving(pDevice);
BSSvClearNodeDBTable(pDevice, 0);
vMgrJoinBSSBegin((void *) pDevice, &Status);
// if Infra mode
if (pMgmt->eCurrState == WMAC_STATE_ASSOC) {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"eCurrState == WMAC_STATE_ASSOC\n");
if (pDevice->ePSMode != WMAC_POWER_CAM) {
- PSvEnablePowerSaving((void *) pDevice,
+ vnt_enable_power_saving(pDevice,
pMgmt->wListenInterval);
}
/*
KERN_INFO "vMgrCreateOwnIBSS fail!\n");
}
// always turn off unicast bit
- MACvRegBitsOff(pDevice, MAC_REG_RCR, RCR_UNICAST);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_RCR, RCR_UNICAST);
pDevice->byRxMode &= ~RCR_UNICAST;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "wcmd: rx_mode = %x\n", pDevice->byRxMode);
BSSvAddMulticastNode(pDevice);
memset(pItemSSID->abySSID, 0, WLAN_SSID_MAXLEN);
netif_stop_queue(pDevice->dev);
- CARDbRadioPowerOff(pDevice);
- MACvRegBitsOn(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
+ vnt_radio_power_off(pDevice);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
vnt_mac_set_led(pDevice, LEDSTS_STS, LEDSTS_OFF);
} else {
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" WLAN_CMD_RADIO_START_ON........................\n");
pDevice->bHWRadioOff = false;
- CARDbRadioPowerOn(pDevice);
- MACvRegBitsOff(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
+ vnt_radio_power_on(pDevice);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_GPIOCTL1, GPIO3_INTMD);
vnt_mac_set_led(pDevice, LEDSTS_STS, LEDSTS_ON);
}
break;
case WLAN_CMD_TBTT_WAKEUP_START:
- PSbIsNextTBTTWakeUp(pDevice);
+ vnt_next_tbtt_wakeup(pDevice);
break;
case WLAN_CMD_BECON_SEND_START:
break;
case WLAN_CMD_11H_CHSW_START:
- CARDbSetMediaChannel(pDevice, pDevice->byNewChannel);
+ vnt_set_channel(pDevice, pDevice->byNewChannel);
pDevice->bChannelSwitch = false;
pMgmt->uCurrChannel = pDevice->byNewChannel;
pDevice->bStopDataPkt = false;
if ((pBSSList->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION) != pDevice->bProtectMode) {//0000 0010
pDevice->bProtectMode = (pBSSList->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION);
if (pDevice->bProtectMode) {
- MACvEnableProtectMD(pDevice);
+ vnt_mac_enable_protect_mode(pDevice);
} else {
- MACvDisableProtectMD(pDevice);
+ vnt_mac_disable_protect_mode(pDevice);
}
- vUpdateIFS(pDevice);
+ vnt_update_ifs(pDevice);
}
if ((pBSSList->sERP.byERP & WLAN_EID_ERP_NONERP_PRESENT) != pDevice->bNonERPPresent) {//0000 0001
pDevice->bNonERPPresent = (pBSSList->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION);
pDevice->bBarkerPreambleMd = (pBSSList->sERP.byERP & WLAN_EID_ERP_BARKER_MODE);
//BarkerPreambleMd has higher priority than shortPreamble bit in Cap
if (pDevice->bBarkerPreambleMd) {
- MACvEnableBarkerPreambleMd(pDevice);
+ vnt_mac_enable_barker_preamble_mode(pDevice);
} else {
- MACvDisableBarkerPreambleMd(pDevice);
+ vnt_mac_disable_barker_preamble_mode(pDevice);
}
}
}
if (bShortSlotTime != pDevice->bShortSlotTime) {
pDevice->bShortSlotTime = bShortSlotTime;
BBvSetShortSlotTime(pDevice);
- vUpdateIFS(pDevice);
+ vnt_update_ifs(pDevice);
}
}
pDevice->byPreambleType = 0;
}
if (pDevice->byPreambleType != byOldPreambleType)
- CARDvSetRSPINF(pDevice, (u8)pDevice->byBBType);
+ vnt_set_rspinf(pDevice, (u8)pDevice->byBBType);
//
// Basic Rate Set may change dynamically
//
bTSFOffsetPostive = false;
if (bTSFOffsetPostive) {
- qwTSFOffset = CARDqGetTSFOffset(pRxPacket->byRxRate, (qwTimestamp), (qwLocalTSF));
+ qwTSFOffset = vnt_get_tsf_offset(pRxPacket->byRxRate, (qwTimestamp), (qwLocalTSF));
}
else {
- qwTSFOffset = CARDqGetTSFOffset(pRxPacket->byRxRate, (qwLocalTSF), (qwTimestamp));
+ qwTSFOffset = vnt_get_tsf_offset(pRxPacket->byRxRate, (qwLocalTSF), (qwTimestamp));
}
if (qwTSFOffset > TRIVIAL_SYNC_DIFFERENCE)
// set HW beacon interval and re-synchronizing....
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "Rejoining to Other Adhoc group with same SSID........\n");
- MACvWriteBeaconInterval(pDevice, pMgmt->wCurrBeaconPeriod);
- CARDvAdjustTSF(pDevice, pRxPacket->byRxRate, qwTimestamp, pRxPacket->qwLocalTSF);
- CARDvUpdateNextTBTT(pDevice, qwTimestamp, pMgmt->wCurrBeaconPeriod);
+ vnt_mac_set_beacon_interval(pDevice, pMgmt->wCurrBeaconPeriod);
+ vnt_adjust_tsf(pDevice, pRxPacket->byRxRate, qwTimestamp, pRxPacket->qwLocalTSF);
+ vnt_update_next_tbtt(pDevice, qwTimestamp, pMgmt->wCurrBeaconPeriod);
// Turn off bssid filter to avoid filter others adhoc station which bssid is different.
- MACvWriteBSSIDAddress(pDevice, pMgmt->abyCurrBSSID);
+ vnt_mac_set_bssid_addr(pDevice, pMgmt->abyCurrBSSID);
byOldPreambleType = pDevice->byPreambleType;
if (WLAN_GET_CAP_INFO_SHORTPREAMBLE(*sFrame.pwCapInfo)) {
pDevice->byPreambleType = 0;
}
if (pDevice->byPreambleType != byOldPreambleType)
- CARDvSetRSPINF(pDevice, (u8)pDevice->byBBType);
+ vnt_set_rspinf(pDevice, (u8)pDevice->byBBType);
- // MACvRegBitsOff(pDevice->PortOffset, MAC_REG_RCR, RCR_BSSID);
// set highest basic rate
// s_vSetHighestBasicRate(pDevice, (PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates);
// Prepare beacon frame
// endian issue ???
// Update TSF
if (bUpdateTSF) {
- CARDbGetCurrentTSF(pDevice, &qwCurrTSF);
- CARDvAdjustTSF(pDevice, pRxPacket->byRxRate, qwTimestamp , pRxPacket->qwLocalTSF);
- CARDbGetCurrentTSF(pDevice, &qwCurrTSF);
- CARDvUpdateNextTBTT(pDevice, qwTimestamp, pMgmt->wCurrBeaconPeriod);
+ vnt_get_current_tsf(pDevice, &qwCurrTSF);
+ vnt_adjust_tsf(pDevice, pRxPacket->byRxRate, qwTimestamp , pRxPacket->qwLocalTSF);
+ vnt_get_current_tsf(pDevice, &qwCurrTSF);
+ vnt_update_next_tbtt(pDevice, qwTimestamp, pMgmt->wCurrBeaconPeriod);
}
return;
// Disable Protect Mode
pDevice->bProtectMode = 0;
- MACvDisableProtectMD(pDevice);
+ vnt_mac_disable_protect_mode(pDevice);
pDevice->bBarkerPreambleMd = 0;
- MACvDisableBarkerPreambleMd(pDevice);
+ vnt_mac_disable_barker_preamble_mode(pDevice);
// Kyle Test 2003.11.04
// set HW beacon interval
if (pMgmt->wIBSSBeaconPeriod == 0)
pMgmt->wIBSSBeaconPeriod = DEFAULT_IBSS_BI;
- MACvWriteBeaconInterval(pDevice, pMgmt->wIBSSBeaconPeriod);
+ vnt_mac_set_beacon_interval(pDevice, pMgmt->wIBSSBeaconPeriod);
- CARDbGetCurrentTSF(pDevice, &qwCurrTSF);
+ vnt_get_current_tsf(pDevice, &qwCurrTSF);
// clear TSF counter
- CARDbClearCurrentTSF(pDevice);
+ vnt_clear_current_tsf(pDevice);
// enable TSF counter
- MACvRegBitsOn(pDevice,MAC_REG_TFTCTL,TFTCTL_TSFCNTREN);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
// set Next TBTT
- CARDvSetFirstNextTBTT(pDevice, pMgmt->wIBSSBeaconPeriod);
+ vnt_reset_next_tbtt(pDevice, pMgmt->wIBSSBeaconPeriod);
pMgmt->uIBSSChannel = pDevice->uChannel;
pMgmt->uIBSSChannel = DEFAULT_IBSS_CHANNEL;
// set channel and clear NAV
- CARDbSetMediaChannel(pDevice, pMgmt->uIBSSChannel);
+ vnt_set_channel(pDevice, pMgmt->uIBSSChannel);
pMgmt->uCurrChannel = pMgmt->uIBSSChannel;
pDevice->byPreambleType = pDevice->byShortPreamble;
// vUpdateIFS() use pDevice->bShortSlotTime as parameter so it must be called
// after setting ShortSlotTime.
// CARDvSetBSSMode call vUpdateIFS()
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
if (pMgmt->eConfigMode == WMAC_CONFIG_AP) {
- MACvRegBitsOn(pDevice, MAC_REG_HOSTCR, HOSTCR_AP);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_HOSTCR, HOSTCR_AP);
pMgmt->eCurrMode = WMAC_MODE_ESS_AP;
}
if (pMgmt->eConfigMode == WMAC_CONFIG_IBSS_STA) {
- MACvRegBitsOn(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
pMgmt->eCurrMode = WMAC_MODE_IBSS_STA;
}
}
// set BSSID filter
- MACvWriteBSSIDAddress(pDevice, pMgmt->abyCurrBSSID);
+ vnt_mac_set_bssid_addr(pDevice, pMgmt->abyCurrBSSID);
memcpy(pDevice->abyBSSID, pMgmt->abyCurrBSSID, WLAN_ADDR_LEN);
- MACvRegBitsOn(pDevice, MAC_REG_RCR, RCR_BSSID);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_RCR, RCR_BSSID);
pDevice->byRxMode |= RCR_BSSID;
pMgmt->bCurrBSSIDFilterOn = true;
RATEvParseMaxRate((void *)pDevice, pItemRates, pItemExtRates, true,
&wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
&byTopCCKBasicRate, &byTopOFDMBasicRate);
- vUpdateIFS(pDevice);
+
+ vnt_update_ifs(pDevice);
// TODO: deal with if wCapInfo the privacy is on, but station WEP is off
// TODO: deal with if wCapInfo the PS-Pollable is on.
pMgmt->wCurrBeaconPeriod = pCurr->wBeaconInterval;
pDevice->byPreambleType = 0;
}
// Change PreambleType must set RSPINF again
- CARDvSetRSPINF(pDevice, (u8)pDevice->byBBType);
+ vnt_set_rspinf(pDevice, (u8)pDevice->byBBType);
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"Join ESS\n");
if ((pCurr->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION) != pDevice->bProtectMode) {//0000 0010
pDevice->bProtectMode = (pCurr->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION);
if (pDevice->bProtectMode) {
- MACvEnableProtectMD(pDevice);
+ vnt_mac_enable_protect_mode(pDevice);
} else {
- MACvDisableProtectMD(pDevice);
+ vnt_mac_disable_protect_mode(pDevice);
}
- vUpdateIFS(pDevice);
+ vnt_update_ifs(pDevice);
}
if ((pCurr->sERP.byERP & WLAN_EID_ERP_NONERP_PRESENT) != pDevice->bNonERPPresent) {//0000 0001
pDevice->bNonERPPresent = (pCurr->sERP.byERP & WLAN_EID_ERP_USE_PROTECTION);
pDevice->bBarkerPreambleMd = (pCurr->sERP.byERP & WLAN_EID_ERP_BARKER_MODE);
//BarkerPreambleMd has higher priority than shortPreamble bit in Cap
if (pDevice->bBarkerPreambleMd) {
- MACvEnableBarkerPreambleMd(pDevice);
+ vnt_mac_enable_barker_preamble_mode(pDevice);
} else {
- MACvDisableBarkerPreambleMd(pDevice);
+ vnt_mac_disable_barker_preamble_mode(pDevice);
}
}
}
if (bShortSlotTime != pDevice->bShortSlotTime) {
pDevice->bShortSlotTime = bShortSlotTime;
BBvSetShortSlotTime(pDevice);
- vUpdateIFS(pDevice);
+ vnt_update_ifs(pDevice);
}
}
(PWLAN_IE_SUPP_RATES)pMgmt->abyCurrSuppRates,
NULL, true, &wMaxBasicRate, &wMaxSuppRate, &wSuppRate,
&byTopCCKBasicRate, &byTopOFDMBasicRate);
- vUpdateIFS(pDevice);
+ vnt_update_ifs(pDevice);
pMgmt->wCurrCapInfo = pCurr->wCapInfo;
pMgmt->wCurrBeaconPeriod = pCurr->wBeaconInterval;
memset(pMgmt->abyCurrSSID, 0, WLAN_IEHDR_LEN + WLAN_SSID_MAXLEN);
pDevice->byPreambleType = 0;
}
// Change PreambleType must set RSPINF again
- CARDvSetRSPINF(pDevice, (u8)pDevice->byBBType);
+ vnt_set_rspinf(pDevice, (u8)pDevice->byBBType);
// Prepare beacon
bMgrPrepareBeaconToSend((void *) pDevice, pMgmt);
// if previous mode is IBSS.
if(pMgmt->eCurrMode == WMAC_MODE_IBSS_STA) {
- MACvRegBitsOff(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
}
// Init the BSS informations
pDevice->bProtectMode = false;
- MACvDisableProtectMD(pDevice);
+ vnt_mac_disable_protect_mode(pDevice);
pDevice->bBarkerPreambleMd = false;
- MACvDisableBarkerPreambleMd(pDevice);
+ vnt_mac_disable_barker_preamble_mode(pDevice);
pDevice->bNonERPPresent = false;
pDevice->byPreambleType = 0;
pDevice->wBasicRate = 0;
// Set Basic Rate
- CARDbAddBasicRate((void *)pDevice, RATE_1M);
+ vnt_add_basic_rate(pDevice, RATE_1M);
// calculate TSF offset
// TSF Offset = Received Timestamp TSF - Marked Local's TSF
- CARDvAdjustTSF(pDevice, pCurr->byRxRate, pCurr->qwBSSTimestamp, pCurr->qwLocalTSF);
+ vnt_adjust_tsf(pDevice, pCurr->byRxRate, pCurr->qwBSSTimestamp, pCurr->qwLocalTSF);
// set HW beacon interval
- MACvWriteBeaconInterval(pDevice, pCurr->wBeaconInterval);
+ vnt_mac_set_beacon_interval(pDevice, pCurr->wBeaconInterval);
// set Next TBTT
// Next TBTT = ((local_current_TSF / beacon_interval) + 1 ) * beacon_interval
- CARDvSetFirstNextTBTT(pDevice, pCurr->wBeaconInterval);
+ vnt_reset_next_tbtt(pDevice, pCurr->wBeaconInterval);
// set BSSID
- MACvWriteBSSIDAddress(pDevice, pCurr->abyBSSID);
+ vnt_mac_set_bssid_addr(pDevice, pCurr->abyBSSID);
memcpy(pMgmt->abyCurrBSSID, pCurr->abyBSSID, 6);
pMgmt->eCurrentPHYMode = PHY_TYPE_11A;
pDevice->bShortSlotTime = true;
BBvSetShortSlotTime(pDevice);
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
} else {
return;
}
pMgmt->eCurrentPHYMode = PHY_TYPE_11B;
pDevice->bShortSlotTime = false;
BBvSetShortSlotTime(pDevice);
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
} else {
return;
}
pMgmt->eCurrentPHYMode = PHY_TYPE_11G;
pDevice->bShortSlotTime = true;
BBvSetShortSlotTime(pDevice);
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
} else if (pDevice->eConfigPHYMode == PHY_TYPE_11B) {
pDevice->byBBType = BB_TYPE_11B;
pDevice->bShortSlotTime = false;
BBvSetShortSlotTime(pDevice);
- CARDvSetBSSMode(pDevice);
+ vnt_set_bss_mode(pDevice);
} else {
return;
}
}
if (uBSSMode == WMAC_MODE_ESS_STA) {
- MACvRegBitsOff(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
- MACvRegBitsOn(pDevice, MAC_REG_RCR, RCR_BSSID);
+ vnt_mac_reg_bits_off(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_RCR, RCR_BSSID);
pDevice->byRxMode |= RCR_BSSID;
pMgmt->bCurrBSSIDFilterOn = true;
}
// set channel and clear NAV
- CARDbSetMediaChannel(pDevice, pCurr->uChannel);
+ vnt_set_channel(pDevice, pCurr->uChannel);
pMgmt->uCurrChannel = pCurr->uChannel;
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "<----s_bSynchBSS Set Channel [%d]\n", pCurr->uChannel);
// 2. In Infra mode : Supposed we already synchronized with AP right now.
if (uBSSMode == WMAC_MODE_IBSS_STA) {
- MACvRegBitsOn(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
- MACvRegBitsOn(pDevice, MAC_REG_RCR, RCR_BSSID);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_HOSTCR, HOSTCR_ADHOC);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_RCR, RCR_BSSID);
pDevice->byRxMode |= RCR_BSSID;
pMgmt->bCurrBSSIDFilterOn = true;
}
spin_unlock_irqrestore(&pDevice->lock, flags);
- MACvRegBitsOn(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
+ vnt_mac_reg_bits_on(pDevice, MAC_REG_TCR, TCR_AUTOBCNTX);
return true;
}
pDevice->byKeyIndex = 0;
pDevice->bTransmitKey = false;
for (uu=0; uu<MAX_KEY_TABLE; uu++) {
- MACvDisableKeyEntry(pDevice, uu);
+ vnt_mac_disable_keyentry(pDevice, uu);
}
return ret;
}
#include <linux/interrupt.h>
#include <linux/in.h>
#include <linux/delay.h>
-#include <asm/io.h>
-#include <asm/bitops.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
return -ENOMEM;
}
- link->resource[0]->end = HCF_NUM_IO_PORTS;
- link->resource[0]->flags= IO_DATA_PATH_WIDTH_16;
- link->config_flags |= CONF_ENABLE_IRQ;
- link->config_index = 5;
- link->config_regs = PRESENT_OPTION;
+ link->resource[0]->end = HCF_NUM_IO_PORTS;
+ link->resource[0]->flags = IO_DATA_PATH_WIDTH_16;
+ link->config_flags |= CONF_ENABLE_IRQ;
+ link->config_index = 5;
+ link->config_regs = PRESENT_OPTION;
link->priv = dev;
lp = wl_priv(dev);
0x33103a9b, 0xe175b0dd),
#else
PCMCIA_DEVICE_MANF_CARD(0x0156, 0x0004),
- PCMCIA_DEVICE_PROD_ID12("Linksys", "WCF54G_Wireless-G_CompactFlash_Card",
- 0x0733cc81, 0x98a599e1),
+ PCMCIA_DEVICE_PROD_ID12("Linksys",
+ "WCF54G_Wireless-G_CompactFlash_Card", 0x0733cc81,
+ 0x98a599e1),
#endif /* (HCF_TYPE) & HCF_TYPE_HII5 */
PCMCIA_DEVICE_NULL,
};
/* Interrupt enable disable functions */
/********************************************************************/
-extern inline void wl_act_int_on(struct wl_private *lp)
+static inline void wl_act_int_on(struct wl_private *lp)
{
/*
* Only do something when the driver is handling
}
}
-extern inline void wl_act_int_off(struct wl_private *lp)
+static inline void wl_act_int_off(struct wl_private *lp)
{
/*
* Only do something when the driver is handling
/* cfg80211 Interface for prism2_usb module */
+#include "hfa384x.h"
+#include "prism2mgmt.h"
/* Prism2 channel/frequency/bitrate declarations */
HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM);
if (result) {
netdev_err(wlandev->netdev,
- "setconfig(ROAMINGMODE) failed. result=%d\n", result);
+ "setconfig(ROAMINGMODE) failed. result=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
goto exit;
word);
if (result) {
netdev_warn(wlandev->netdev,
- "Passive scan not supported with "
- "current firmware. (<1.5.1)\n");
+ "Passive scan not supported with current firmware. (<1.5.1)\n");
}
}
word = 0;
for (i = 0; i < msg->channellist.data.len; i++) {
u8 channel = msg->channellist.data.data[i];
+
if (channel > 14)
continue;
/* channel 1 is BIT 0 ... channel 14 is BIT 13 */
result = hfa384x_drvr_enable(hw, 0);
if (result) {
netdev_err(wlandev->netdev,
- "drvr_enable(0) failed. result=%d\n", result);
+ "drvr_enable(0) failed. result=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
goto exit;
sizeof(hfa384x_HostScanRequest_data_t));
if (result) {
netdev_err(wlandev->netdev,
- "setconfig(SCANREQUEST) failed. result=%d\n", result);
+ "setconfig(SCANREQUEST) failed. result=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
goto exit;
result = hfa384x_drvr_disable(hw, 0);
if (result) {
netdev_err(wlandev->netdev,
- "drvr_disable(0) failed. result=%d\n", result);
+ "drvr_disable(0) failed. result=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
goto exit;
if (!hw->scanresults) {
netdev_err(wlandev->netdev,
- "dot11req_scan_results can only be used after "
- "a successful dot11req_scan.\n");
+ "dot11req_scan_results can only be used after a successful dot11req_scan.\n");
result = 2;
req->resultcode.data = P80211ENUM_resultcode_invalid_parameters;
goto exit;
result = hfa384x_drvr_setconfig16(hw, HFA384x_RID_TXRATECNTL, word);
if (result) {
- netdev_err(wlandev->netdev, "Failed to set txrates=%d.\n", word);
+ netdev_err(wlandev->netdev, "Failed to set txrates=%d.\n",
+ word);
goto failed;
}
HFA384x_PDA_LEN_MAX);
if (result) {
netdev_err(wlandev->netdev,
- "hfa384x_drvr_readpda() failed, "
- "result=%d\n", result);
+ "hfa384x_drvr_readpda() failed, result=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
if (wlandev->msdstate != WLAN_MSD_FWLOAD) {
netdev_err(wlandev->netdev,
- "ramdl_state(): may only be called "
- "in the fwload state.\n");
+ "ramdl_state(): may only be called in the fwload state.\n");
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
msg->resultcode.status = P80211ENUM_msgitem_status_data_ok;
if (wlandev->msdstate != WLAN_MSD_FWLOAD) {
netdev_err(wlandev->netdev,
- "ramdl_write(): may only be called "
- "in the fwload state.\n");
+ "ramdl_write(): may only be called in the fwload state.\n");
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
msg->resultcode.status = P80211ENUM_msgitem_status_data_ok;
if (wlandev->msdstate != WLAN_MSD_FWLOAD) {
netdev_err(wlandev->netdev,
- "flashdl_state(): may only be called "
- "in the fwload state.\n");
+ "flashdl_state(): may only be called in the fwload state.\n");
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
msg->resultcode.status = P80211ENUM_msgitem_status_data_ok;
result = prism2sta_ifstate(wlandev, P80211ENUM_ifstate_fwload);
if (result != P80211ENUM_resultcode_success) {
netdev_err(wlandev->netdev,
- "prism2sta_ifstate(fwload) failed,"
- "P80211ENUM_resultcode=%d\n", result);
+ "prism2sta_ifstate(fwload) failed, P80211ENUM_resultcode=%d\n",
+ result);
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
result = -1;
if (wlandev->msdstate != WLAN_MSD_FWLOAD) {
netdev_err(wlandev->netdev,
- "flashdl_write(): may only be called "
- "in the fwload state.\n");
+ "flashdl_write(): may only be called in the fwload state.\n");
msg->resultcode.data =
P80211ENUM_resultcode_implementation_failure;
msg->resultcode.status = P80211ENUM_msgitem_status_data_ok;
if (!isget)
if ((*uint32) % 2) {
- netdev_warn(wlandev->netdev, "Attempt to set odd number "
- "FragmentationThreshold\n");
+ netdev_warn(wlandev->netdev,
+ "Attempt to set odd number FragmentationThreshold\n");
msg->resultcode.data =
P80211ENUM_resultcode_not_supported;
return 0;
case DIDmsg_lnxreq_ifstate:
{
struct p80211msg_lnxreq_ifstate *ifstatemsg;
+
pr_debug("Received mlme ifstate request\n");
ifstatemsg = (struct p80211msg_lnxreq_ifstate *) msg;
result =
break;
case WLAN_MSD_RUNNING:
netdev_warn(wlandev->netdev,
- "Cannot enter fwload state from enable state,"
- "you must disable first.\n");
+ "Cannot enter fwload state from enable state, you must disable first.\n");
result = P80211ENUM_resultcode_invalid_parameters;
break;
case WLAN_MSD_HWFAIL:
*/
if (hw->join_ap && --hw->join_retries > 0) {
hfa384x_JoinRequest_data_t joinreq;
+
joinreq = hw->joinreq;
/* Send the join request */
hfa384x_drvr_setconfig(hw,
--- /dev/null
+/*
+ * KXCJK-1013 3-axis accelerometer Interface
+ * Copyright (c) 2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef __IIO_KXCJK_1013_H__
+#define __IIO_KXCJK_1013_H__
+
+struct kxcjk_1013_platform_data {
+ bool active_high_intr;
+};
+
+#endif
/**
* iio_trigger_poll() - called on a trigger occurring
* @trig: trigger which occurred
- * @time: timestamp when trigger occurred
*
* Typically called in relevant hardware interrupt handler.
**/
-void iio_trigger_poll(struct iio_trigger *trig, s64 time);
-void iio_trigger_poll_chained(struct iio_trigger *trig, s64 time);
+void iio_trigger_poll(struct iio_trigger *trig);
+void iio_trigger_poll_chained(struct iio_trigger *trig);
irqreturn_t iio_trigger_generic_data_rdy_poll(int irq, void *private);
return ret;
}
-
+EXPORT_SYMBOL_GPL(alarmtimer_get_rtcdev);
static int alarmtimer_rtc_add_device(struct device *dev,
struct class_interface *class_intf)
projects / karo-tx-linux.git / commitdiff