1 //==========================================================================
3 // devs/eth/sh/se7751/include/devs_eth_sh_se7751.inl
5 // SE7751 ethernet I/O definitions.
7 //==========================================================================
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40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
46 // Purpose: SE7751 ethernet defintions
47 //####DESCRIPTIONEND####
48 //==========================================================================
50 #include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHR
54 #define CYGHWR_AMD_PCNET_PCI_MEM_MAP_BASE (CYGARC_UNCACHED_ADDRESS(&CYGMEM_SECTION_pci_window[0]))
55 #define CYGHWR_AMD_PCNET_PCI_MEM_MAP_SIZE ((cyg_uint32)(CYGMEM_SECTION_pci_window_SIZE))
57 #endif // __WANT_CONFIG
62 #ifdef CYGPKG_DEVS_ETH_SH_SE7751_ETH0
64 // FIXME: find locations via PCI
65 static pcnet_priv_data amd_pcnet_eth0_priv_data = {
66 #ifdef CYGSEM_DEVS_ETH_SH_SE7751_ETH0_SET_ESA
67 esa : CYGDAT_DEVS_ETH_SH_SE7751_ETH0_ESA,
70 hardwired_esa : false,
72 config_esa : NULL, // rely on the hardwired address for now
74 rx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_RX_RING_SIZE*/,
77 tx_ring_cnt : (1<<2) /*CYGNUM_DEVS_ETH_MIPS_MIPS32_MALTA_ETH0_TX_RING_SIZE*/,
81 ETH_DRV_SC(amd_pcnet_sc,
82 &amd_pcnet_eth0_priv_data, // Driver specific data
83 CYGDAT_DEVS_ETH_SH_SE7751_ETH0_NAME,
90 pcnet_deliver, // "pseudoDSR" called from fast net thread
91 pcnet_poll, // poll function, encapsulates ISR and DSR
94 NETDEVTAB_ENTRY(pcnet_netdev,
95 "pcnet_" CYGDAT_DEVS_ETH_SH_SE7751_ETH0_NAME,
98 #endif // CYGPKG_DEVS_ETH_SH_SE7751_ETH0
100 // These arrays are used for sanity checking of pointers
101 struct pcnet_priv_data *
102 pcnet_priv_array[CYGNUM_DEVS_ETH_AMD_PCNET_DEV_COUNT] = {
103 #ifdef CYGPKG_DEVS_ETH_SH_SE7751_ETH0
104 &amd_pcnet_eth0_priv_data,
108 #endif // __WANT_DEVS
110 // EOF devs_eth_sh_se7751.inl