3 * Ilya Yanok, EmCraft Systems
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
22 #include <linux/types.h>
25 #define DCACHE_SIZE 0x4000 // 16KB Size of data cache in bytes
26 #define DCACHE_LINE_SIZE 32 // Size of a data cache line
27 #define DCACHE_WAYS 64 // Associativity of the cache
29 * This is the maximum size of an area which will be invalidated
30 * using the single invalidate entry instructions. Anything larger
31 * than this, and we go for the whole cache.
33 * This value should be chosen such that we choose the cheapest
36 #define CACHE_DLIMIT 16384
38 #ifndef CONFIG_SYS_DCACHE_OFF
39 void invalidate_dcache_all(void)
42 "mcr p15, 0, %0, c7, c6, 0\n" /* invalidate d-cache */
43 "mcr p15, 0, %0, c7, c5, 0\n" /* invalidate I cache */
44 "mcr p15, 0, %0, c7, c10, 4\n" /* data write back */
50 void invalidate_dcache_range(unsigned long start, unsigned long end)
53 #ifndef CONFIG_SYS_ARM_CACHE_WRITETHROUGH
55 "mcrne p15, 0, %1, c7, c10, 1\n" /* clean D entry */
57 "mcrne p15, 0, %2, c7, c10, 1\n" /* clean D entry */
63 "mcr p15, 0, %1, c7, c6, 1\n" /* invalidate D cache entry */
67 "mcr p15, 0, %0, c7, c5, 0\n" /* invalidate I cache */
68 "mcr p15, 0, %0, c7, c10, 4\n" /* data write back */
70 : "r"(0), "r"(start), "r"(end),
71 "I"(DCACHE_LINE_SIZE),
72 "I"(DCACHE_LINE_SIZE - 1)
77 #ifndef CONFIG_SYS_ARM_CACHE_WRITETHROUGH
78 void flush_dcache_range(unsigned long start, unsigned long end)
85 "mcr p15, 0, %1, c7, c14, 1\n" /* clean and invalidate D entry */
89 "mcr p15, 0, %0, c7, c5, 0\n" /* invalidate I cache */
90 "mcr p15, 0, %0, c7, c10, 4\n" /* data write back */
92 : "r"(0), "r"(start), "r"(end),
93 "I"(DCACHE_LINE_SIZE),
94 "I"(DCACHE_LINE_SIZE - 1)
99 void flush_cache(unsigned long start, unsigned long size)
101 flush_dcache_range(start, start + size);
104 void flush_dcache_all(void)
108 "mrc p15, 0, r15, c7, c14, 3\n" /* test,clean,invalidate */
110 "mcr p15, 0, %0, c7, c5, 0\n" /* invalidate I cache */
111 "mcr p15, 0, %0, c7, c10, 4\n" /* data write back */
118 void flush_dcache_range(unsigned long start, unsigned long end)
120 invalidate_dcache_range(start, end);
123 void flush_cache(unsigned long start, unsigned long end)
125 invalidate_dcache_range(start, end);
128 void flush_dcache_all(void)
130 invalidate_dcache_all();
132 #endif /* CONFIG_SYS_ARM_CACHE_WRITETHROUGH */
134 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
135 void invalidate_dcache_all(void)
139 void flush_dcache_all(void)
143 void invalidate_dcache_range(unsigned long start, unsigned long stop)
147 void flush_dcache_range(unsigned long start, unsigned long stop)
151 void flush_cache(unsigned long start, unsigned long size)
154 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
157 * Stub implementations for l2 cache operations
159 void __l2_cache_disable(void)
162 void l2_cache_disable(void)
163 __attribute__((weak, alias("__l2_cache_disable")));