3 * Clock initialization for OMAP5
6 * Texas Instruments, <www.ti.com>
8 * Aneesh V <aneesh@ti.com>
9 * Sricharan R <r.sricharan@ti.com>
11 * Based on previous work by:
12 * Santosh Shilimkar <santosh.shilimkar@ti.com>
13 * Rajendra Nayak <rnayak@ti.com>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm/omap_common.h>
35 #include <asm/arch/clocks.h>
36 #include <asm/arch/sys_proto.h>
37 #include <asm/utils.h>
38 #include <asm/omap_gpio.h>
41 #ifndef CONFIG_SPL_BUILD
43 * printing to console doesn't work unless
44 * this code is executed from SPL
46 #define printf(fmt, args...)
51 * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva
52 * We set the maximum voltages allowed here because Smart-Reflex is not
53 * enabled in bootloader. Voltage initialization in the kernel will set
54 * these to the nominal values after enabling Smart-Reflex
56 void scale_vcores(void)
58 u32 volt_core, volt_mpu, volt_mm;
60 omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
63 if (omap_revision() != OMAP5432_ES1_0) {
68 volt_core = VDD_CORE_5432;
69 volt_mpu = VDD_MPU_5432;
70 volt_mm = VDD_MM_5432;
73 do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt_core);
74 do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt_mpu);
75 do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt_mm);
77 if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
78 /* Configure LDO SRAM "magic" bits */
79 writel(2, (*prcm)->prm_sldo_core_setup);
80 writel(2, (*prcm)->prm_sldo_mpu_setup);
81 writel(2, (*prcm)->prm_sldo_mm_setup);
85 u32 get_offset_code(u32 volt_offset)
87 u32 offset_code, step = 10000; /* 10 mV represented in uV */
89 volt_offset -= PALMAS_SMPS_BASE_VOLT_UV;
91 offset_code = (volt_offset + step - 1) / step;
94 * Offset codes 1-6 all give the base voltage in Palmas
95 * Offset code 0 switches OFF the SMPS
97 return offset_code + 6;