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am33xx: Update DT files, add am335x_gp_evm_config target
[karo-tx-uboot.git] / arch / arm / dts / zynq-zc706.dts
1 /*
2  * Xilinx ZC706 board DTS
3  *
4  *  Copyright (C) 2011 - 2015 Xilinx
5  *  Copyright (C) 2012 National Instruments Corp.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
11
12 / {
13         model = "Zynq ZC706 Development Board";
14         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
15
16         aliases {
17                 ethernet0 = &gem0;
18                 i2c0 = &i2c0;
19                 serial0 = &uart1;
20         };
21
22         memory {
23                 device_type = "memory";
24                 reg = <0x0 0x40000000>;
25         };
26
27         chosen {
28                 bootargs = "earlyprintk";
29                 stdout-path = "serial0:115200n8";
30         };
31
32         usb_phy0: phy0 {
33                 compatible = "usb-nop-xceiv";
34                 #phy-cells = <0>;
35         };
36 };
37
38 &clkc {
39         ps-clk-frequency = <33333333>;
40 };
41
42 &gem0 {
43         status = "okay";
44         phy-mode = "rgmii-id";
45         phy-handle = <&ethernet_phy>;
46         pinctrl-names = "default";
47         pinctrl-0 = <&pinctrl_gem0_default>;
48
49         ethernet_phy: ethernet-phy@7 {
50                 reg = <7>;
51         };
52 };
53
54 &gpio0 {
55         pinctrl-names = "default";
56         pinctrl-0 = <&pinctrl_gpio0_default>;
57 };
58
59 &i2c0 {
60         status = "okay";
61         clock-frequency = <400000>;
62         pinctrl-names = "default";
63         pinctrl-0 = <&pinctrl_i2c0_default>;
64
65         i2cswitch@74 {
66                 compatible = "nxp,pca9548";
67                 #address-cells = <1>;
68                 #size-cells = <0>;
69                 reg = <0x74>;
70
71                 i2c@0 {
72                         #address-cells = <1>;
73                         #size-cells = <0>;
74                         reg = <0>;
75                         si570: clock-generator@5d {
76                                 #clock-cells = <0>;
77                                 compatible = "silabs,si570";
78                                 temperature-stability = <50>;
79                                 reg = <0x5d>;
80                                 factory-fout = <156250000>;
81                                 clock-frequency = <148500000>;
82                         };
83                 };
84
85                 i2c@2 {
86                         #address-cells = <1>;
87                         #size-cells = <0>;
88                         reg = <2>;
89                         eeprom@54 {
90                                 compatible = "at,24c08";
91                                 reg = <0x54>;
92                         };
93                 };
94
95                 i2c@3 {
96                         #address-cells = <1>;
97                         #size-cells = <0>;
98                         reg = <3>;
99                         gpio@21 {
100                                 compatible = "ti,tca6416";
101                                 reg = <0x21>;
102                                 gpio-controller;
103                                 #gpio-cells = <2>;
104                         };
105                 };
106
107                 i2c@4 {
108                         #address-cells = <1>;
109                         #size-cells = <0>;
110                         reg = <4>;
111                         rtc@51 {
112                                 compatible = "nxp,pcf8563";
113                                 reg = <0x51>;
114                         };
115                 };
116
117                 i2c@7 {
118                         #address-cells = <1>;
119                         #size-cells = <0>;
120                         reg = <7>;
121                         ucd90120@65 {
122                                 compatible = "ti,ucd90120";
123                                 reg = <0x65>;
124                         };
125                 };
126         };
127 };
128
129 &pinctrl0 {
130         pinctrl_gem0_default: gem0-default {
131                 mux {
132                         function = "ethernet0";
133                         groups = "ethernet0_0_grp";
134                 };
135
136                 conf {
137                         groups = "ethernet0_0_grp";
138                         slew-rate = <0>;
139                         io-standard = <4>;
140                 };
141
142                 conf-rx {
143                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
144                         bias-high-impedance;
145                         low-power-disable;
146                 };
147
148                 conf-tx {
149                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
150                         low-power-enable;
151                         bias-disable;
152                 };
153
154                 mux-mdio {
155                         function = "mdio0";
156                         groups = "mdio0_0_grp";
157                 };
158
159                 conf-mdio {
160                         groups = "mdio0_0_grp";
161                         slew-rate = <0>;
162                         io-standard = <1>;
163                         bias-disable;
164                 };
165         };
166
167         pinctrl_gpio0_default: gpio0-default {
168                 mux {
169                         function = "gpio0";
170                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
171                 };
172
173                 conf {
174                         groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
175                         slew-rate = <0>;
176                         io-standard = <1>;
177                 };
178
179                 conf-pull-up {
180                         pins = "MIO46", "MIO47";
181                         bias-pull-up;
182                 };
183
184                 conf-pull-none {
185                         pins = "MIO7";
186                         bias-disable;
187                 };
188         };
189
190         pinctrl_i2c0_default: i2c0-default {
191                 mux {
192                         groups = "i2c0_10_grp";
193                         function = "i2c0";
194                 };
195
196                 conf {
197                         groups = "i2c0_10_grp";
198                         bias-pull-up;
199                         slew-rate = <0>;
200                         io-standard = <1>;
201                 };
202         };
203
204         pinctrl_sdhci0_default: sdhci0-default {
205                 mux {
206                         groups = "sdio0_2_grp";
207                         function = "sdio0";
208                 };
209
210                 conf {
211                         groups = "sdio0_2_grp";
212                         slew-rate = <0>;
213                         io-standard = <1>;
214                         bias-disable;
215                 };
216
217                 mux-cd {
218                         groups = "gpio0_14_grp";
219                         function = "sdio0_cd";
220                 };
221
222                 conf-cd {
223                         groups = "gpio0_14_grp";
224                         bias-high-impedance;
225                         bias-pull-up;
226                         slew-rate = <0>;
227                         io-standard = <1>;
228                 };
229
230                 mux-wp {
231                         groups = "gpio0_15_grp";
232                         function = "sdio0_wp";
233                 };
234
235                 conf-wp {
236                         groups = "gpio0_15_grp";
237                         bias-high-impedance;
238                         bias-pull-up;
239                         slew-rate = <0>;
240                         io-standard = <1>;
241                 };
242         };
243
244         pinctrl_uart1_default: uart1-default {
245                 mux {
246                         groups = "uart1_10_grp";
247                         function = "uart1";
248                 };
249
250                 conf {
251                         groups = "uart1_10_grp";
252                         slew-rate = <0>;
253                         io-standard = <1>;
254                 };
255
256                 conf-rx {
257                         pins = "MIO49";
258                         bias-high-impedance;
259                 };
260
261                 conf-tx {
262                         pins = "MIO48";
263                         bias-disable;
264                 };
265         };
266
267         pinctrl_usb0_default: usb0-default {
268                 mux {
269                         groups = "usb0_0_grp";
270                         function = "usb0";
271                 };
272
273                 conf {
274                         groups = "usb0_0_grp";
275                         slew-rate = <0>;
276                         io-standard = <1>;
277                 };
278
279                 conf-rx {
280                         pins = "MIO29", "MIO31", "MIO36";
281                         bias-high-impedance;
282                 };
283
284                 conf-tx {
285                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
286                                "MIO35", "MIO37", "MIO38", "MIO39";
287                         bias-disable;
288                 };
289         };
290 };
291
292 &sdhci0 {
293         status = "okay";
294         pinctrl-names = "default";
295         pinctrl-0 = <&pinctrl_sdhci0_default>;
296 };
297
298 &uart1 {
299         status = "okay";
300         pinctrl-names = "default";
301         pinctrl-0 = <&pinctrl_uart1_default>;
302 };
303
304 &usb0 {
305         status = "okay";
306         dr_mode = "host";
307         usb-phy = <&usb_phy0>;
308         pinctrl-names = "default";
309         pinctrl-0 = <&pinctrl_usb0_default>;
310 };