arch/arm/include/asm/arch-socfpga/system_manager.h

   1 /*
   2  *  Copyright (C) 2013 Altera Corporation <www.altera.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef _SYSTEM_MANAGER_H_
   8 #define _SYSTEM_MANAGER_H_
   9
  10 #ifndef __ASSEMBLY__
  11
  12 void sysmgr_pinmux_init(void);
  13
  14 /* declaration for handoff table type */
  15 extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
  16
  17 #endif
  18
  19
  20 #define CONFIG_SYSMGR_PINMUXGRP_OFFSET  (0x400)
  21
  22 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel)  \
  23         ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38))
  24
  25 struct socfpga_system_manager {
  26         u32     siliconid1;
  27         u32     siliconid2;
  28         u32     _pad_0x8_0xf[2];
  29         u32     wddbg;
  30         u32     bootinfo;
  31         u32     hpsinfo;
  32         u32     parityinj;
  33         u32     fpgaintfgrp_gbl;
  34         u32     fpgaintfgrp_indiv;
  35         u32     fpgaintfgrp_module;
  36         u32     _pad_0x2c_0x2f;
  37         u32     scanmgrgrp_ctrl;
  38         u32     _pad_0x34_0x3f[3];
  39         u32     frzctrl_vioctrl;
  40         u32     _pad_0x44_0x4f[3];
  41         u32     frzctrl_hioctrl;
  42         u32     frzctrl_src;
  43         u32     frzctrl_hwctrl;
  44         u32     _pad_0x5c_0x5f;
  45         u32     emacgrp_ctrl;
  46         u32     emacgrp_l3master;
  47         u32     _pad_0x68_0x6f[2];
  48         u32     dmagrp_ctrl;
  49         u32     dmagrp_persecurity;
  50         u32     _pad_0x78_0x7f[2];
  51         u32     iswgrp_handoff[8];
  52         u32     _pad_0xa0_0xbf[8];
  53         u32     romcodegrp_ctrl;
  54         u32     romcodegrp_cpu1startaddr;
  55         u32     romcodegrp_initswstate;
  56         u32     romcodegrp_initswlastld;
  57         u32     romcodegrp_bootromswstate;
  58         u32     __pad_0xd4_0xdf[3];
  59         u32     romcodegrp_warmramgrp_enable;
  60         u32     romcodegrp_warmramgrp_datastart;
  61         u32     romcodegrp_warmramgrp_length;
  62         u32     romcodegrp_warmramgrp_execution;
  63         u32     romcodegrp_warmramgrp_crc;
  64         u32     __pad_0xf4_0xff[3];
  65         u32     romhwgrp_ctrl;
  66         u32     _pad_0x104_0x107;
  67         u32     sdmmcgrp_ctrl;
  68         u32     sdmmcgrp_l3master;
  69         u32     nandgrp_bootstrap;
  70         u32     nandgrp_l3master;
  71         u32     usbgrp_l3master;
  72         u32     _pad_0x11c_0x13f[9];
  73         u32     eccgrp_l2;
  74         u32     eccgrp_ocram;
  75         u32     eccgrp_usb0;
  76         u32     eccgrp_usb1;
  77         u32     eccgrp_emac0;
  78         u32     eccgrp_emac1;
  79         u32     eccgrp_dma;
  80         u32     eccgrp_can0;
  81         u32     eccgrp_can1;
  82         u32     eccgrp_nand;
  83         u32     eccgrp_qspi;
  84         u32     eccgrp_sdmmc;
  85 };
  86
  87 #endif /* _SYSTEM_MANAGER_H_ */