]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - arch/blackfin/include/asm/mach-bf609/BF609_cdef.h
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / arch / blackfin / include / asm / mach-bf609 / BF609_cdef.h
1 /* DO NOT EDIT THIS FILE
2  * Automatically generated by generate-cdef-headers.xsl
3  * DO NOT EDIT THIS FILE
4  */
5
6 #ifndef __BFIN_CDEF_ADSP_BF609_proc__
7 #define __BFIN_CDEF_ADSP_BF609_proc__
8
9 #include "../mach-common/ADSP-EDN-core_cdef.h"
10
11 #define bfin_read_CGU_STAT() bfin_read32(CGU_STAT)
12 #define bfin_read_CGU_CLKOUTSEL() bfin_read32(CGU_CLKOUTSEL)
13 #define bfin_read_CGU_CTL() bfin_read32(CGU_CTL)
14 #define bfin_write_CGU_CTL(val) bfin_write32(CGU_CTL, val)
15 #define bfin_read_CGU_DIV() bfin_read32(CGU_DIV)
16 #define bfin_write_CGU_DIV(val) bfin_write32(CGU_DIV, val)
17
18 #define bfin_read_RCU0_CTL() bfin_read32(RCU0_CTL)
19 #define bfin_write_RCU0_CTL(val) bfin_write32(RCU0_CTL, val)
20
21 #define bfin_read_CHIPID()              bfin_read32(CHIPID)
22 #define bfin_write_CHIPID(val)          bfin_write32(CHIPID, val)
23
24 #define bfin_read_DMC0_CFG() bfin_read32(DMC0_CFG)
25 #define bfin_write_DMC0_CFG(val) bfin_write32(DMC0_CFG, val)
26 #define bfin_read_DMC0_TR0() bfin_read32(DMC0_TR0)
27 #define bfin_write_DMC0_TR0(val) bfin_write32(DMC0_TR0, val)
28 #define bfin_read_DMC0_TR1() bfin_read32(DMC0_TR1)
29 #define bfin_write_DMC0_TR1(val) bfin_write32(DMC0_TR1, val)
30 #define bfin_read_DMC0_TR2() bfin_read32(DMC0_TR2)
31 #define bfin_write_DMC0_TR2(val) bfin_write32(DMC0_TR2, val)
32 #define bfin_read_DMC0_MR() bfin_read32(DMC0_MR)
33 #define bfin_write_DMC0_MR(val) bfin_write32(DMC0_MR, val)
34 #define bfin_read_DMC0_EMR1() bfin_read32(DMC0_EMR1)
35 #define bfin_write_DMC0_EMR1(val) bfin_write32(DMC0_EMR1, val)
36 #define bfin_read_DMC0_CTL() bfin_read32(DMC0_CTL)
37 #define bfin_write_DMC0_CTL(val) bfin_write32(DMC0_CTL, val)
38 #define bfin_read_DMC0_STAT() bfin_read32(DMC0_STAT)
39 #define bfin_write_DMC0_STAT(val) bfin_write32(DMC0_STAT, val)
40 #define bfin_read_DMC0_DLLCTL() bfin_read32(DMC0_DLLCTL)
41 #define bfin_write_DMC0_DLLCTL(val) bfin_write32(DMC0_DLLCTL, val)
42
43 #define bfin_read_SEC_CCTL()            bfin_read32(SEC0_CCTL0)
44 #define bfin_write_SEC_CCTL(val)        bfin_write32(SEC0_CCTL0, val)
45 #define bfin_read_SEC_GCTL()            bfin_read32(SEC0_GCTL)
46 #define bfin_write_SEC_GCTL(val)        bfin_write32(SEC0_GCTL, val)
47
48 #define bfin_read_SEC_FCTL()            bfin_read32(SEC0_FCTL)
49 #define bfin_write_SEC_FCTL(val)        bfin_write32(SEC0_FCTL, val)
50 #define bfin_read_SEC_SCTL(sid)         bfin_read32((SEC0_SCTL0 + (sid) * 8))
51 #define bfin_write_SEC_SCTL(sid, val)   bfin_write32((SEC0_SCTL0 \
52         + (sid) * 8), val)
53
54 #define bfin_read_SMC_GCTL() bfin_read32(SMC_GCTL)
55 #define bfin_write_SMC_GCTL(val) bfin_write32(SMC_GCTL, val)
56 #define bfin_read_SMC_GSTAT() bfin_read32(SMC_GSTAT)
57 #define bfin_read_SMC_B0CTL() bfin_read32(SMC_B0CTL)
58 #define bfin_write_SMC_B0CTL(val) bfin_write32(SMC_B0CTL, val)
59 #define bfin_read_SMC_B0TIM() bfin_read32(SMC_B0TIM)
60 #define bfin_write_SMC_B0TIM(val) bfin_write32(SMC_B0TIM, val)
61 #define bfin_read_SMC_B0ETIM() bfin_read32(SMC_B0ETIM)
62 #define bfin_write_SMC_B0ETIM(val) bfin_write32(SMC_B0ETIM, val)
63 #define bfin_read_SMC_B1CTL() bfin_read32(SMC_B1CTL)
64 #define bfin_write_SMC_B1CTL(val) bfin_write32(SMC_B1CTL, val)
65 #define bfin_read_SMC_B1TIM() bfin_read32(SMC_B1TIM)
66 #define bfin_write_SMC_B1TIM(val) bfin_write32(SMC_B1TIM, val)
67 #define bfin_read_SMC_B1ETIM() bfin_read32(SMC_B1ETIM)
68 #define bfin_write_SMC_B1ETIM(val) bfin_write32(SMC_B1ETIM, val)
69 #define bfin_read_SMC_B2CTL() bfin_read32(SMC_B2CTL)
70 #define bfin_write_SMC_B2CTL(val) bfin_write32(SMC_B2CTL, val)
71 #define bfin_read_SMC_B2TIM() bfin_read32(SMC_B2TIM)
72 #define bfin_write_SMC_B2TIM(val) bfin_write32(SMC_B2TIM, val)
73 #define bfin_read_SMC_B2ETIM() bfin_read32(SMC_B2ETIM)
74 #define bfin_write_SMC_B2ETIM(val) bfin_write32(SMC_B2ETIM, val)
75 #define bfin_read_SMC_B3CTL() bfin_read32(SMC_B3CTL)
76 #define bfin_write_SMC_B3CTL(val) bfin_write32(SMC_B3CTL, val)
77 #define bfin_read_SMC_B3TIM() bfin_read32(SMC_B3TIM)
78 #define bfin_write_SMC_B3TIM(val) bfin_write32(SMC_B3TIM, val)
79 #define bfin_read_SMC_B3ETIM() bfin_read32(SMC_B3ETIM)
80 #define bfin_write_SMC_B3ETIM(val) bfin_write32(SMC_B3ETIM, val)
81
82 #define bfin_read_USB_PLLOSC_CTRL()    bfin_read16(USB_PLL_OSC)
83 #define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLL_OSC, val)
84 #define bfin_write_USB_VBUS_CTL(val) bfin_write8(USB_VBUS_CTL, val)
85 #define bfin_read_USB_DMA_INTERRUPT()  bfin_read8(USB_DMA_IRQ)
86 #define bfin_write_USB_DMA_INTERRUPT(val) bfin_write8(USB_DMA_IRQ, val)
87 #define bfin_write_USB_APHY_CNTRL(val) bfin_write8(USB_PHY_CTL, val)
88 #define bfin_read_USB_APHY_CNTRL() bfin_read8(USB_PHY_CTL)
89
90 #define bfin_read_DMA10_NEXT_DESC_PTR() bfin_readPTR(DMA10_DSCPTR_NXT)
91 #define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_writePTR(DMA10_DSCPTR_NXT, val)
92 #define bfin_read_DMA10_START_ADDR() bfin_readPTR(DMA10_ADDRSTART)
93 #define bfin_write_DMA10_START_ADDR(val) bfin_writePTR(DMA10_ADDRSTART, val)
94 #define bfin_read_DMA10_CONFIG() bfin_read32(DMA10_CFG)
95 #define bfin_write_DMA10_CONFIG(val) bfin_write32(DMA10_CFG, val)
96 #define bfin_read_DMA10_X_COUNT() bfin_read32(DMA10_XCNT)
97 #define bfin_write_DMA10_X_COUNT(val) bfin_write32(DMA10_XCNT, val)
98 #define bfin_read_DMA10_X_MODIFY() bfin_read32(DMA10_XMOD)
99 #define bfin_write_DMA10_X_MODIFY(val) bfin_write32(DMA10_XMOD, val)
100 #define bfin_read_DMA10_Y_COUNT() bfin_read32(DMA10_YCNT)
101 #define bfin_write_DMA10_Y_COUNT(val) bfin_write32(DMA10_YCNT, val)
102 #define bfin_read_DMA10_Y_MODIFY() bfin_read32(DMA10_YMOD)
103 #define bfin_write_DMA10_Y_MODIFY(val) bfin_write32(DMA10_YMOD, val)
104 #define bfin_read_DMA10_CURR_DESC_PTR() bfin_readPTR(DMA10_DSCPTR_CUR)
105 #define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_writePTR(DMA10_DSCPTR_CUR, val)
106 #define bfin_read_DMA10_CURR_ADDR() bfin_readPTR(DMA10_ADDR_CUR)
107 #define bfin_write_DMA10_CURR_ADDR(val) bfin_writePTR(DMA10_ADDR_CUR, val)
108 #define bfin_read_DMA10_IRQ_STATUS() bfin_read32(DMA10_STAT)
109 #define bfin_write_DMA10_IRQ_STATUS(val) bfin_write32(DMA10_STAT, val)
110 #define bfin_read_DMA10_CURR_X_COUNT() bfin_read32(DMA10_XCNT_CUR)
111 #define bfin_write_DMA10_CURR_X_COUNT(val) bfin_write32(DMA10_XCNT_CUR, val)
112 #define bfin_read_DMA10_CURR_Y_COUNT() bfin_read32(DMA10_YCNT_CUR)
113 #define bfin_write_DMA10_CURR_Y_COUNT(val) bfin_write32(DMA10_YCNT_CUR, val)
114
115 #define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
116 #define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
117 #define bfin_read_WDOG_CTL() bfin_read32(WDOG_CTL)
118 #define bfin_write_WDOG_CTL(val) bfin_write32(WDOG_CTL, val)
119 #define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
120 #define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
121 #define bfin_read_SPI_BAUD() bfin_read32(SPI0_CLK)
122 #define bfin_write_SPI_BAUD(val) bfin_write32(SPI0_CLK, val)
123
124 #define bfin_read_PORTD_FER() bfin_read32(PORTD_FER)
125 #define bfin_write_PORTD_FER_SET(val) bfin_write32(PORTD_FER_SET, val)
126 #define bfin_write_PORTD_FER_CLR(val) bfin_write32(PORTD_FER_CLR, val)
127 #define bfin_read_PORTD_MUX() bfin_read32(PORTD_MUX)
128 #define bfin_write_PORTD_MUX(val) bfin_write32(PORTD_MUX, val)
129 #define bfin_read_PORTG_FER() bfin_read32(PORTG_FER)
130 #define bfin_write_PORTG_FER_SET(val) bfin_write32(PORTG_FER_SET, val)
131 #define bfin_write_PORTG_FER_CLR(val) bfin_write32(PORTG_FER_CLR, val)
132 #define bfin_read_PORTG_MUX() bfin_read32(PORTG_MUX)
133 #define bfin_write_PORTG_MUX(val) bfin_write32(PORTG_MUX, val)
134
135 #define bfin_read_RSI_CLK_CONTROL()    bfin_read16(RSI_CLK_CONTROL)
136 #define bfin_write_RSI_CLK_CONTROL(val) bfin_write16(RSI_CLK_CONTROL, val)
137 #define bfin_read_RSI_ARGUMENT()       bfin_read32(RSI_ARGUMENT)
138 #define bfin_write_RSI_ARGUMENT(val)   bfin_write32(RSI_ARGUMENT, val)
139 #define bfin_read_RSI_COMMAND()        bfin_read16(RSI_COMMAND)
140 #define bfin_write_RSI_COMMAND(val)    bfin_write16(RSI_COMMAND, val)
141 #define bfin_read_RSI_RESP_CMD()       bfin_read16(RSI_RESP_CMD)
142 #define bfin_write_RSI_RESP_CMD(val)   bfin_write16(RSI_RESP_CMD, val)
143 #define bfin_read_RSI_RESPONSE0()      bfin_read32(RSI_RESPONSE0)
144 #define bfin_write_RSI_RESPONSE0(val)  bfin_write32(RSI_RESPONSE0, val)
145 #define bfin_read_RSI_RESPONSE1()      bfin_read32(RSI_RESPONSE1)
146 #define bfin_write_RSI_RESPONSE1(val)  bfin_write32(RSI_RESPONSE1, val)
147 #define bfin_read_RSI_RESPONSE2()      bfin_read32(RSI_RESPONSE2)
148 #define bfin_write_RSI_RESPONSE2(val)  bfin_write32(RSI_RESPONSE2, val)
149 #define bfin_read_RSI_RESPONSE3()      bfin_read32(RSI_RESPONSE3)
150 #define bfin_write_RSI_RESPONSE3(val)  bfin_write32(RSI_RESPONSE3, val)
151 #define bfin_read_RSI_DATA_TIMER()     bfin_read32(RSI_DATA_TIMER)
152 #define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
153 #define bfin_read_RSI_DATA_LGTH()      bfin_read16(RSI_DATA_LGTH)
154 #define bfin_write_RSI_DATA_LGTH(val)  bfin_write16(RSI_DATA_LGTH, val)
155 #define bfin_read_RSI_DATA_CONTROL()   bfin_read16(RSI_DATA_CONTROL)
156 #define bfin_write_RSI_DATA_CONTROL(val) bfin_write16(RSI_DATA_CONTROL, val)
157 #define bfin_read_RSI_DATA_CNT()       bfin_read16(RSI_DATA_CNT)
158 #define bfin_write_RSI_DATA_CNT(val)   bfin_write16(RSI_DATA_CNT, val)
159 #define bfin_read_RSI_STATUS()         bfin_read32(RSI_STATUS)
160 #define bfin_write_RSI_STATUS(val)     bfin_write32(RSI_STATUS, val)
161 #define bfin_read_RSI_STATUSCL()       bfin_read16(RSI_STATUSCL)
162 #define bfin_write_RSI_STATUSCL(val)   bfin_write16(RSI_STATUSCL, val)
163 #define bfin_read_RSI_MASK0()          bfin_read32(RSI_MASK0)
164 #define bfin_write_RSI_MASK0(val)      bfin_write32(RSI_MASK0, val)
165 #define bfin_read_RSI_MASK1()          bfin_read32(RSI_MASK1)
166 #define bfin_write_RSI_MASK1(val)      bfin_write32(RSI_MASK1, val)
167 #define bfin_read_RSI_FIFO_CNT()       bfin_read16(RSI_FIFO_CNT)
168 #define bfin_write_RSI_FIFO_CNT(val)   bfin_write16(RSI_FIFO_CNT, val)
169 #define bfin_read_RSI_CEATA_CONTROL()  bfin_read16(RSI_CEATA_CONTROL)
170 #define bfin_write_RSI_CEATA_CONTROL(val) bfin_write16(RSI_CEATA_CONTROL, val)
171 #define bfin_read_RSI_BLKSZ()          bfin_read16(RSI_BLKSZ)
172 #define bfin_write_RSI_BLKSZ(val)      bfin_write16(RSI_BLKSZ, val)
173 #define bfin_read_RSI_FIFO()           bfin_read32(RSI_FIFO)
174 #define bfin_write_RSI_FIFO(val)       bfin_write32(RSI_FIFO, val)
175 #define bfin_read_RSI_ESTAT()          bfin_read32(RSI_ESTAT)
176 #define bfin_write_RSI_ESTAT(val)      bfin_write32(RSI_ESTAT, val)
177 #define bfin_read_RSI_EMASK()          bfin_read32(RSI_EMASK)
178 #define bfin_write_RSI_EMASK(val)      bfin_write32(RSI_EMASK, val)
179 #define bfin_read_RSI_CONFIG()         bfin_read16(RSI_CONFIG)
180 #define bfin_write_RSI_CONFIG(val)     bfin_write16(RSI_CONFIG, val)
181 #define bfin_read_RSI_RD_WAIT_EN()     bfin_read16(RSI_RD_WAIT_EN)
182 #define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
183 #define bfin_read_RSI_PID0()           bfin_read16(RSI_PID0)
184 #define bfin_write_RSI_PID0(val)       bfin_write16(RSI_PID0, val)
185 #define bfin_read_RSI_PID1()           bfin_read16(RSI_PID1)
186 #define bfin_write_RSI_PID1(val)       bfin_write16(RSI_PID1, val)
187 #define bfin_read_RSI_PID2()           bfin_read16(RSI_PID2)
188 #define bfin_write_RSI_PID2(val)       bfin_write16(RSI_PID2, val)
189 #define bfin_read_RSI_PID3()           bfin_read16(RSI_PID3)
190 #define bfin_write_RSI_PID3(val)       bfin_write16(RSI_PID3, val)
191
192 #endif /* __BFIN_CDEF_ADSP_BF609_proc__ */