arch/microblaze/cpu/u-boot-spl.lds

   1 /*
   2  * (C) Copyright 2013 - 2014 Xilinx, Inc
   3  *
   4  * Michal Simek <michal.simek@xilinx.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <asm-offsets.h>
  10
  11 OUTPUT_ARCH(microblaze)
  12 ENTRY(_start)
  13
  14 SECTIONS
  15 {
  16         .text ALIGN(0x4):
  17         {
  18                 __text_start = .;
  19                 arch/microblaze/cpu/start.o (.text)
  20                 *(.text)
  21                 *(.text.*)
  22                 __text_end = .;
  23         }
  24
  25         .rodata ALIGN(0x4):
  26         {
  27                 __rodata_start = .;
  28                 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  29                 __rodata_end = .;
  30         }
  31
  32         .data ALIGN(0x4):
  33         {
  34                 __data_start = .;
  35                 *(.data)
  36                 *(.data.*)
  37                 __data_end = .;
  38         }
  39
  40         . = ALIGN(4);
  41         .u_boot_list : {
  42                 KEEP(*(SORT(.u_boot_list*)));
  43         }
  44         __init_end = . ;
  45
  46         .bss ALIGN(0x4):
  47         {
  48                 __bss_start = .;
  49                 *(.sbss)
  50                 *(.scommon)
  51                 *(.bss)
  52                 *(.bss.*)
  53                 *(COMMON)
  54                 . = ALIGN(4);
  55                 __bss_end = .;
  56         }
  57         __end = . ;
  58 }
  59
  60 #if defined(CONFIG_SPL_MAX_FOOTPRINT)
  61 ASSERT(__end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \
  62         "SPL image plus BSS too big");
  63 #endif