arch/powerpc/dts/glacier.dts

   1 /*
   2  * Device Tree Source for AMCC Glacier (460GT)
   3  *
   4  * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0
   7  */
   8
   9 /dts-v1/;
  10
  11 / {
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14         model = "amcc,glacier";
  15         compatible = "amcc,glacier";
  16         dcr-parent = <&{/cpus/cpu@0}>;
  17
  18         aliases {
  19                 ethernet0 = &EMAC0;
  20                 ethernet1 = &EMAC1;
  21                 ethernet2 = &EMAC2;
  22                 ethernet3 = &EMAC3;
  23                 serial0 = &UART0;
  24                 serial1 = &UART1;
  25         };
  26
  27         chosen {
  28                 stdout-path = &UART0;
  29         };
  30
  31         cpus {
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34
  35                 cpu@0 {
  36                         device_type = "cpu";
  37                         model = "PowerPC,460GT";
  38                         reg = <0x00000000>;
  39                         clock-frequency = <0>; /* Filled in by U-Boot */
  40                         timebase-frequency = <0>; /* Filled in by U-Boot */
  41                         i-cache-line-size = <32>;
  42                         d-cache-line-size = <32>;
  43                         i-cache-size = <32768>;
  44                         d-cache-size = <32768>;
  45                         dcr-controller;
  46                         dcr-access-method = "native";
  47                         next-level-cache = <&L2C0>;
  48                 };
  49         };
  50
  51         memory {
  52                 device_type = "memory";
  53                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  54         };
  55
  56         UIC0: interrupt-controller0 {
  57                 compatible = "ibm,uic-460gt","ibm,uic";
  58                 interrupt-controller;
  59                 cell-index = <0>;
  60                 dcr-reg = <0x0c0 0x009>;
  61                 #address-cells = <0>;
  62                 #size-cells = <0>;
  63                 #interrupt-cells = <2>;
  64         };
  65
  66         UIC1: interrupt-controller1 {
  67                 compatible = "ibm,uic-460gt","ibm,uic";
  68                 interrupt-controller;
  69                 cell-index = <1>;
  70                 dcr-reg = <0x0d0 0x009>;
  71                 #address-cells = <0>;
  72                 #size-cells = <0>;
  73                 #interrupt-cells = <2>;
  74                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  75                 interrupt-parent = <&UIC0>;
  76         };
  77
  78         UIC2: interrupt-controller2 {
  79                 compatible = "ibm,uic-460gt","ibm,uic";
  80                 interrupt-controller;
  81                 cell-index = <2>;
  82                 dcr-reg = <0x0e0 0x009>;
  83                 #address-cells = <0>;
  84                 #size-cells = <0>;
  85                 #interrupt-cells = <2>;
  86                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  87                 interrupt-parent = <&UIC0>;
  88         };
  89
  90         UIC3: interrupt-controller3 {
  91                 compatible = "ibm,uic-460gt","ibm,uic";
  92                 interrupt-controller;
  93                 cell-index = <3>;
  94                 dcr-reg = <0x0f0 0x009>;
  95                 #address-cells = <0>;
  96                 #size-cells = <0>;
  97                 #interrupt-cells = <2>;
  98                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  99                 interrupt-parent = <&UIC0>;
 100         };
 101
 102         SDR0: sdr {
 103                 compatible = "ibm,sdr-460gt";
 104                 dcr-reg = <0x00e 0x002>;
 105         };
 106
 107         CPR0: cpr {
 108                 compatible = "ibm,cpr-460gt";
 109                 dcr-reg = <0x00c 0x002>;
 110         };
 111
 112         L2C0: l2c {
 113                 compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
 114                 dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
 115                            0x030 0x008>;        /* L2 cache DCR's */
 116                 cache-line-size = <32>;         /* 32 bytes */
 117                 cache-size = <262144>;          /* L2, 256K */
 118                 interrupt-parent = <&UIC1>;
 119                 interrupts = <11 1>;
 120         };
 121
 122         plb {
 123                 compatible = "ibm,plb-460gt", "ibm,plb4";
 124                 #address-cells = <2>;
 125                 #size-cells = <1>;
 126                 ranges;
 127                 clock-frequency = <0>; /* Filled in by U-Boot */
 128
 129                 SDRAM0: sdram {
 130                         compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
 131                         dcr-reg = <0x010 0x002>;
 132                 };
 133
 134                 CRYPTO: crypto@180000 {
 135                         compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto",
 136                                 "amcc,ppc4xx-crypto";
 137                         reg = <4 0x00180000 0x80400>;
 138                         interrupt-parent = <&UIC0>;
 139                         interrupts = <0x1d 0x4>;
 140                 };
 141
 142                 HWRNG: hwrng@110000 {
 143                         compatible = "amcc,ppc460ex-rng", "ppc4xx-rng";
 144                         reg = <4 0x00110000 0x50>;
 145                 };
 146
 147                 MAL0: mcmal {
 148                         compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
 149                         dcr-reg = <0x180 0x062>;
 150                         num-tx-chans = <4>;
 151                         num-rx-chans = <32>;
 152                         #address-cells = <0>;
 153                         #size-cells = <0>;
 154                         interrupt-parent = <&UIC2>;
 155                         interrupts = <  /*TXEOB*/ 0x6 0x4
 156                                         /*RXEOB*/ 0x7 0x4
 157                                         /*SERR*/  0x3 0x4
 158                                         /*TXDE*/  0x4 0x4
 159                                         /*RXDE*/  0x5 0x4>;
 160                         desc-base-addr-high = <0x8>;
 161                 };
 162
 163                 POB0: opb {
 164                         compatible = "ibm,opb-460gt", "ibm,opb";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 168                         clock-frequency = <0>; /* Filled in by U-Boot */
 169
 170                         EBC0: ebc {
 171                                 compatible = "ibm,ebc-460gt", "ibm,ebc";
 172                                 dcr-reg = <0x012 0x002>;
 173                                 #address-cells = <2>;
 174                                 #size-cells = <1>;
 175                                 clock-frequency = <0>; /* Filled in by U-Boot */
 176                                 /* ranges property is supplied by U-Boot */
 177                                 interrupts = <0x6 0x4>;
 178                                 interrupt-parent = <&UIC1>;
 179
 180                                 nor_flash@0,0 {
 181                                         compatible = "amd,s29gl512n", "cfi-flash";
 182                                         bank-width = <2>;
 183                                         reg = <0x00000000 0x00000000 0x04000000>;
 184                                         #address-cells = <1>;
 185                                         #size-cells = <1>;
 186                                         partition@0 {
 187                                                 label = "kernel";
 188                                                 reg = <0x00000000 0x001e0000>;
 189                                         };
 190                                         partition@1e0000 {
 191                                                 label = "dtb";
 192                                                 reg = <0x001e0000 0x00020000>;
 193                                         };
 194                                         partition@200000 {
 195                                                 label = "ramdisk";
 196                                                 reg = <0x00200000 0x01400000>;
 197                                         };
 198                                         partition@1600000 {
 199                                                 label = "jffs2";
 200                                                 reg = <0x01600000 0x00400000>;
 201                                         };
 202                                         partition@1a00000 {
 203                                                 label = "user";
 204                                                 reg = <0x01a00000 0x02560000>;
 205                                         };
 206                                         partition@3f60000 {
 207                                                 label = "env";
 208                                                 reg = <0x03f60000 0x00040000>;
 209                                         };
 210                                         partition@3fa0000 {
 211                                                 label = "u-boot";
 212                                                 reg = <0x03fa0000 0x00060000>;
 213                                         };
 214                                 };
 215
 216                                 ndfc@3,0 {
 217                                         compatible = "ibm,ndfc";
 218                                         reg = <0x00000003 0x00000000 0x00002000>;
 219                                         ccr = <0x00001000>;
 220                                         bank-settings = <0x80002222>;
 221                                         #address-cells = <1>;
 222                                         #size-cells = <1>;
 223
 224                                         nand {
 225                                                 #address-cells = <1>;
 226                                                 #size-cells = <1>;
 227
 228                                                 partition@0 {
 229                                                         label = "u-boot";
 230                                                         reg = <0x00000000 0x00100000>;
 231                                                 };
 232                                                 partition@100000 {
 233                                                         label = "user";
 234                                                         reg = <0x00000000 0x03f00000>;
 235                                                 };
 236                                         };
 237                                 };
 238                         };
 239
 240                         UART0: serial@ef600300 {
 241                                 device_type = "serial";
 242                                 reg-shift = <0>;
 243                                 compatible = "ns16550";
 244                                 reg = <0xef600300 0x00000008>;
 245                                 virtual-reg = <0xef600300>;
 246                                 clock-frequency = <0>; /* Filled in by U-Boot */
 247                                 current-speed = <0>; /* Filled in by U-Boot */
 248                                 interrupt-parent = <&UIC1>;
 249                                 interrupts = <0x1 0x4>;
 250                         };
 251
 252                         UART1: serial@ef600400 {
 253                                 device_type = "serial";
 254                                 reg-shift = <0>;
 255                                 compatible = "ns16550";
 256                                 reg = <0xef600400 0x00000008>;
 257                                 virtual-reg = <0xef600400>;
 258                                 clock-frequency = <0>; /* Filled in by U-Boot */
 259                                 current-speed = <0>; /* Filled in by U-Boot */
 260                                 interrupt-parent = <&UIC0>;
 261                                 interrupts = <0x1 0x4>;
 262                         };
 263
 264                         UART2: serial@ef600500 {
 265                                 device_type = "serial";
 266                                 reg-shift = <0>;
 267                                 compatible = "ns16550";
 268                                 reg = <0xef600500 0x00000008>;
 269                                 virtual-reg = <0xef600500>;
 270                                 clock-frequency = <0>; /* Filled in by U-Boot */
 271                                 current-speed = <0>; /* Filled in by U-Boot */
 272                                 interrupt-parent = <&UIC1>;
 273                                 interrupts = <28 0x4>;
 274                         };
 275
 276                         UART3: serial@ef600600 {
 277                                 device_type = "serial";
 278                                 reg-shift = <0>;
 279                                 compatible = "ns16550";
 280                                 reg = <0xef600600 0x00000008>;
 281                                 virtual-reg = <0xef600600>;
 282                                 clock-frequency = <0>; /* Filled in by U-Boot */
 283                                 current-speed = <0>; /* Filled in by U-Boot */
 284                                 interrupt-parent = <&UIC1>;
 285                                 interrupts = <29 0x4>;
 286                         };
 287
 288                         IIC0: i2c@ef600700 {
 289                                 compatible = "ibm,iic-460gt", "ibm,iic";
 290                                 reg = <0xef600700 0x00000014>;
 291                                 interrupt-parent = <&UIC0>;
 292                                 interrupts = <0x2 0x4>;
 293                                 #address-cells = <1>;
 294                                 #size-cells = <0>;
 295                                 rtc@68 {
 296                                         compatible = "stm,m41t80";
 297                                         reg = <0x68>;
 298                                         interrupt-parent = <&UIC2>;
 299                                         interrupts = <0x19 0x8>;
 300                                 };
 301                                 sttm@48 {
 302                                         compatible = "ad,ad7414";
 303                                         reg = <0x48>;
 304                                         interrupt-parent = <&UIC1>;
 305                                         interrupts = <0x14 0x8>;
 306                                 };
 307                         };
 308
 309                         IIC1: i2c@ef600800 {
 310                                 compatible = "ibm,iic-460gt", "ibm,iic";
 311                                 reg = <0xef600800 0x00000014>;
 312                                 interrupt-parent = <&UIC0>;
 313                                 interrupts = <0x3 0x4>;
 314                         };
 315
 316                         ZMII0: emac-zmii@ef600d00 {
 317                                 compatible = "ibm,zmii-460gt", "ibm,zmii";
 318                                 reg = <0xef600d00 0x0000000c>;
 319                         };
 320
 321                         RGMII0: emac-rgmii@ef601500 {
 322                                 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
 323                                 reg = <0xef601500 0x00000008>;
 324                                 has-mdio;
 325                         };
 326
 327                         RGMII1: emac-rgmii@ef601600 {
 328                                 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
 329                                 reg = <0xef601600 0x00000008>;
 330                                 has-mdio;
 331                         };
 332
 333                         TAH0: emac-tah@ef601350 {
 334                                 compatible = "ibm,tah-460gt", "ibm,tah";
 335                                 reg = <0xef601350 0x00000030>;
 336                         };
 337
 338                         TAH1: emac-tah@ef601450 {
 339                                 compatible = "ibm,tah-460gt", "ibm,tah";
 340                                 reg = <0xef601450 0x00000030>;
 341                         };
 342
 343                         EMAC0: ethernet@ef600e00 {
 344                                 device_type = "network";
 345                                 compatible = "ibm,emac-460gt", "ibm,emac4sync";
 346                                 interrupt-parent = <&EMAC0>;
 347                                 interrupts = <0x0 0x1>;
 348                                 #interrupt-cells = <1>;
 349                                 #address-cells = <0>;
 350                                 #size-cells = <0>;
 351                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
 352                                                  /*Wake*/   0x1 &UIC2 0x14 0x4>;
 353                                 reg = <0xef600e00 0x000000c4>;
 354                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 355                                 mal-device = <&MAL0>;
 356                                 mal-tx-channel = <0>;
 357                                 mal-rx-channel = <0>;
 358                                 cell-index = <0>;
 359                                 max-frame-size = <9000>;
 360                                 rx-fifo-size = <4096>;
 361                                 tx-fifo-size = <2048>;
 362                                 rx-fifo-size-gige = <16384>;
 363                                 phy-mode = "rgmii";
 364                                 phy-map = <0x00000000>;
 365                                 rgmii-device = <&RGMII0>;
 366                                 rgmii-channel = <0>;
 367                                 tah-device = <&TAH0>;
 368                                 tah-channel = <0>;
 369                                 has-inverted-stacr-oc;
 370                                 has-new-stacr-staopc;
 371                         };
 372
 373                         EMAC1: ethernet@ef600f00 {
 374                                 device_type = "network";
 375                                 compatible = "ibm,emac-460gt", "ibm,emac4sync";
 376                                 interrupt-parent = <&EMAC1>;
 377                                 interrupts = <0x0 0x1>;
 378                                 #interrupt-cells = <1>;
 379                                 #address-cells = <0>;
 380                                 #size-cells = <0>;
 381                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
 382                                                  /*Wake*/   0x1 &UIC2 0x15 0x4>;
 383                                 reg = <0xef600f00 0x000000c4>;
 384                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 385                                 mal-device = <&MAL0>;
 386                                 mal-tx-channel = <1>;
 387                                 mal-rx-channel = <8>;
 388                                 cell-index = <1>;
 389                                 max-frame-size = <9000>;
 390                                 rx-fifo-size = <4096>;
 391                                 tx-fifo-size = <2048>;
 392                                 rx-fifo-size-gige = <16384>;
 393                                 phy-mode = "rgmii";
 394                                 phy-map = <0x00000000>;
 395                                 rgmii-device = <&RGMII0>;
 396                                 rgmii-channel = <1>;
 397                                 tah-device = <&TAH1>;
 398                                 tah-channel = <1>;
 399                                 has-inverted-stacr-oc;
 400                                 has-new-stacr-staopc;
 401                                 mdio-device = <&EMAC0>;
 402                         };
 403
 404                         EMAC2: ethernet@ef601100 {
 405                                 device_type = "network";
 406                                 compatible = "ibm,emac-460gt", "ibm,emac4sync";
 407                                 interrupt-parent = <&EMAC2>;
 408                                 interrupts = <0x0 0x1>;
 409                                 #interrupt-cells = <1>;
 410                                 #address-cells = <0>;
 411                                 #size-cells = <0>;
 412                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
 413                                                  /*Wake*/   0x1 &UIC2 0x16 0x4>;
 414                                 reg = <0xef601100 0x000000c4>;
 415                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 416                                 mal-device = <&MAL0>;
 417                                 mal-tx-channel = <2>;
 418                                 mal-rx-channel = <16>;
 419                                 cell-index = <2>;
 420                                 max-frame-size = <9000>;
 421                                 rx-fifo-size = <4096>;
 422                                 tx-fifo-size = <2048>;
 423                                 rx-fifo-size-gige = <16384>;
 424                                 tx-fifo-size-gige = <16384>; /* emac2&3 only */
 425                                 phy-mode = "rgmii";
 426                                 phy-map = <0x00000000>;
 427                                 rgmii-device = <&RGMII1>;
 428                                 rgmii-channel = <0>;
 429                                 has-inverted-stacr-oc;
 430                                 has-new-stacr-staopc;
 431                                 mdio-device = <&EMAC0>;
 432                         };
 433
 434                         EMAC3: ethernet@ef601200 {
 435                                 device_type = "network";
 436                                 compatible = "ibm,emac-460gt", "ibm,emac4sync";
 437                                 interrupt-parent = <&EMAC3>;
 438                                 interrupts = <0x0 0x1>;
 439                                 #interrupt-cells = <1>;
 440                                 #address-cells = <0>;
 441                                 #size-cells = <0>;
 442                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
 443                                                  /*Wake*/   0x1 &UIC2 0x17 0x4>;
 444                                 reg = <0xef601200 0x000000c4>;
 445                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 446                                 mal-device = <&MAL0>;
 447                                 mal-tx-channel = <3>;
 448                                 mal-rx-channel = <24>;
 449                                 cell-index = <3>;
 450                                 max-frame-size = <9000>;
 451                                 rx-fifo-size = <4096>;
 452                                 tx-fifo-size = <2048>;
 453                                 rx-fifo-size-gige = <16384>;
 454                                 tx-fifo-size-gige = <16384>; /* emac2&3 only */
 455                                 phy-mode = "rgmii";
 456                                 phy-map = <0x00000000>;
 457                                 rgmii-device = <&RGMII1>;
 458                                 rgmii-channel = <1>;
 459                                 has-inverted-stacr-oc;
 460                                 has-new-stacr-staopc;
 461                                 mdio-device = <&EMAC0>;
 462                         };
 463                 };
 464
 465                 PCIX0: pci@c0ec00000 {
 466                         device_type = "pci";
 467                         #interrupt-cells = <1>;
 468                         #size-cells = <2>;
 469                         #address-cells = <3>;
 470                         compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix";
 471                         primary;
 472                         large-inbound-windows;
 473                         enable-msi-hole;
 474                         reg = <0x0000000c 0x0ec00000   0x00000008       /* Config space access */
 475                                0x00000000 0x00000000 0x00000000         /* no IACK cycles */
 476                                0x0000000c 0x0ed00000   0x00000004   /* Special cycles */
 477                                0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
 478                                0x0000000c 0x0ec80100  0x000000fc>;      /* Internal messaging registers */
 479
 480                         /* Outbound ranges, one memory and one IO,
 481                          * later cannot be changed
 482                          */
 483                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
 484                                   0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
 485                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
 486
 487                         /* Inbound 2GB range starting at 0 */
 488                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 489
 490                         /* This drives busses 0 to 0x3f */
 491                         bus-range = <0x0 0x3f>;
 492
 493                         /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
 494                         interrupt-map-mask = <0x0 0x0 0x0 0x0>;
 495                         interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
 496                 };
 497
 498                 PCIE0: pciex@d00000000 {
 499                         device_type = "pci";
 500                         #interrupt-cells = <1>;
 501                         #size-cells = <2>;
 502                         #address-cells = <3>;
 503                         compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
 504                         primary;
 505                         port = <0x0>; /* port number */
 506                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 507                                0x0000000c 0x08010000 0x00001000>;       /* Registers */
 508                         dcr-reg = <0x100 0x020>;
 509                         sdr-base = <0x300>;
 510
 511                         /* Outbound ranges, one memory and one IO,
 512                          * later cannot be changed
 513                          */
 514                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 515                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
 516                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 517
 518                         /* Inbound 2GB range starting at 0 */
 519                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 520
 521                         /* This drives busses 40 to 0x7f */
 522                         bus-range = <0x40 0x7f>;
 523
 524                         /* Legacy interrupts (note the weird polarity, the bridge seems
 525                          * to invert PCIe legacy interrupts).
 526                          * We are de-swizzling here because the numbers are actually for
 527                          * port of the root complex virtual P2P bridge. But I want
 528                          * to avoid putting a node for it in the tree, so the numbers
 529                          * below are basically de-swizzled numbers.
 530                          * The real slot is on idsel 0, so the swizzling is 1:1
 531                          */
 532                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 533                         interrupt-map = <
 534                                 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
 535                                 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
 536                                 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
 537                                 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
 538                 };
 539
 540                 PCIE1: pciex@d20000000 {
 541                         device_type = "pci";
 542                         #interrupt-cells = <1>;
 543                         #size-cells = <2>;
 544                         #address-cells = <3>;
 545                         compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
 546                         primary;
 547                         port = <0x1>; /* port number */
 548                         reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
 549                                0x0000000c 0x08011000 0x00001000>;       /* Registers */
 550                         dcr-reg = <0x120 0x020>;
 551                         sdr-base = <0x340>;
 552
 553                         /* Outbound ranges, one memory and one IO,
 554                          * later cannot be changed
 555                          */
 556                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
 557                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
 558                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 559
 560                         /* Inbound 2GB range starting at 0 */
 561                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 562
 563                         /* This drives busses 80 to 0xbf */
 564                         bus-range = <0x80 0xbf>;
 565
 566                         /* Legacy interrupts (note the weird polarity, the bridge seems
 567                          * to invert PCIe legacy interrupts).
 568                          * We are de-swizzling here because the numbers are actually for
 569                          * port of the root complex virtual P2P bridge. But I want
 570                          * to avoid putting a node for it in the tree, so the numbers
 571                          * below are basically de-swizzled numbers.
 572                          * The real slot is on idsel 0, so the swizzling is 1:1
 573                          */
 574                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 575                         interrupt-map = <
 576                                 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
 577                                 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
 578                                 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
 579                                 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
 580                 };
 581         };
 582 };