board/amcc/taihu/update.c

   1 /*
   2  * SPDX-License-Identifier:     GPL-2.0+
   3  */
   4
   5 #include <config.h>
   6 #include <common.h>
   7 #include <command.h>
   8 #include <asm/processor.h>
   9 #include <i2c.h>
  10
  11 #define PCI_M66EN 0x10
  12
  13 static uchar buf_33[] =
  14 {
  15         0xb5,   /* 0x00:hce =1, bss = 0, pae=1, ppdv= 0b10,spe = 1,ebw=0b01*/
  16         0x80,   /* 0x01~0x03:ptm1ms =0x80000001 */
  17         0x00,
  18         0x00,
  19         0x00,   /* 0x04~0x06:ptm1la = 0x00000000 */
  20         0x00,
  21         0x00,
  22         0x00,   /* 0x07~0x09:ptm2ma = 0x00000000 */
  23         0x00,
  24         0x00,
  25         0x00,   /* 0x0a~0x0c:ptm2la = 0x00000000 */
  26         0x00,
  27         0x00,
  28         0x10,   /* 0x0d~0x0e:vendor id 0x1014*/
  29         0x14,
  30         0x00,   /* 0x0f~0x10:device id 0x0000*/
  31         0x00,
  32         0x00,   /* 0x11:revision 0x00 */
  33         0x00,   /* 0x12~0x14:class 0x000000 */
  34         0x00,
  35         0x00,
  36         0x10,   /* 0x15~0x16:subsystem vendor id */
  37         0xe8,
  38         0x00,   /* 0x17~0x18:subsystem device id */
  39         0x00,
  40         0x61,   /* 0x19: opdv=0b01,cbdv=0b10,ccdv=0b00,ptm2ms_ena=0, ptm1ms_ena=1 */
  41         0x68,   /* 0x1a: rpci=1,fbmul=0b1010,epdv=0b00 */
  42         0x2d,   /* 0x1b: fwdvb=0b101,fwdva=0b101 */
  43         0x82,   /* 0x1c: pllr=1,sscs=0,mpdv=0b00,tun[22-23]=0b10 */
  44         0xbe,   /* 0x1d: tun[24-31]=0xbe */
  45         0x00,
  46         0x00
  47 };
  48
  49 static uchar buf_66[] =
  50 {
  51         0xb5,   /* 0x00:hce =1, bss = 0, pae=1, ppdv= 0b10,spe = 1,ebw=0b01*/
  52         0x80,   /* 0x01~0x03:ptm1ms =0x80000001 */
  53         0x00,
  54         0x00,
  55         0x00,   /* 0x04~0x06:ptm1la = 0x00000000 */
  56         0x00,
  57         0x00,
  58         0x00,   /* 0x07~0x09:ptm2ma = 0x00000000 */
  59         0x00,
  60         0x00,
  61         0x00,   /* 0x0a~0x0c:ptm2la = 0x00000000 */
  62         0x00,
  63         0x00,
  64         0x10,   /* 0x0d~0x0e:vendor id 0x1014*/
  65         0x14,
  66         0x00,   /* 0x0f~0x10:device id 0x0000*/
  67         0x00,
  68         0x00,   /* 0x11:revision 0x00 */
  69         0x00,   /* 0x12~0x14:class 0x000000 */
  70         0x00,
  71         0x00,
  72         0x10,   /* 0x15~0x16:subsystem vendor id */
  73         0xe8,
  74         0x00,   /* 0x17~0x18:subsystem device id */
  75         0x00,
  76         0x61,   /* 0x19: opdv=0b01,cbdv=0b10,ccdv=0b00,ptm2ms_ena=0, ptm1ms_ena=1 */
  77         0x68,   /* 0x1a: rpci=1,fbmul=0b1010,epdv=0b00 */
  78         0x2d,   /* 0x1b: fwdvb=0b101,fwdva=0b101 */
  79         0x82,   /* 0x1c: pllr=1,sscs=0,mpdv=0b00,tun[22-23]=0b10 */
  80         0xbe,   /* 0x1d: tun[24-31]=0xbe */
  81         0x00,
  82         0x00
  83 };
  84
  85 static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char * const argv[])
  86 {
  87         ulong len = 0x20;
  88         uchar chip = CONFIG_SYS_I2C_EEPROM_ADDR;
  89         uchar *pbuf;
  90         uchar base;
  91         int i;
  92
  93         if ((*(volatile char*)CPLD_REG0_ADDR & PCI_M66EN) != PCI_M66EN) {
  94                 pbuf = buf_33;
  95                 base = 0x00;
  96         } else {
  97                 pbuf = buf_66;
  98                 base = 0x40;
  99         }
 100
 101         for (i = 0; i< len; i++, base++) {
 102                 if (i2c_write(chip, base, 1, &pbuf[i],1)!= 0) {
 103                         printf("i2c_write fail\n");
 104                         return 1;
 105                 }
 106                 udelay(11000);
 107         }
 108
 109         return 0;
 110 }
 111
 112 U_BOOT_CMD (
 113         update_boot_eeprom, 1, 1, update_boot_eeprom,
 114         "update boot eeprom content",
 115         ""
 116 );