board/calao/tny_a9260/tny_a9260.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * Copyright (C) 2009
   7  * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #include <common.h>
  13 #include <asm/arch/at91sam9_matrix.h>
  14 #include <asm/arch/at91sam9_smc.h>
  15 #include <asm/arch/at91_common.h>
  16 #include <asm/arch/at91_pmc.h>
  17 #include <asm/arch/at91_rstc.h>
  18 #include <asm/arch/gpio.h>
  19 #include <asm/arch/hardware.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 /* ------------------------------------------------------------------------- */
  24 /*
  25  * Miscelaneous platform dependent initialisations
  26  */
  27
  28 static void tny_a9260_nand_hw_init(void)
  29 {
  30         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  31         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  32         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  33         unsigned long csa;
  34
  35         /* Assign CS3 to NAND/SmartMedia Interface */
  36         csa = readl(&matrix->ebicsa);
  37         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  38         writel(csa, &matrix->ebicsa);
  39
  40         /* Configure SMC CS3 for NAND/SmartMedia */
  41         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  42                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  43                 &smc->cs[3].setup);
  44         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  45                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  46                 &smc->cs[3].pulse);
  47         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  48                 &smc->cs[3].cycle);
  49         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  50                 AT91_SMC_MODE_EXNW_DISABLE |
  51 #ifdef CONFIG_SYS_NAND_DBW_16
  52                 AT91_SMC_MODE_DBW_16 |
  53 #else /* CONFIG_SYS_NAND_DBW_8 */
  54                 AT91_SMC_MODE_DBW_8 |
  55 #endif
  56                 AT91_SMC_MODE_TDF_CYCLE(2),
  57                 &smc->cs[3].mode);
  58
  59         writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
  60
  61         /* Configure RDY/BSY */
  62         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  63
  64         /* Enable NandFlash */
  65         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  66 }
  67
  68 int board_init(void)
  69 {
  70         /* adress of boot parameters */
  71         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  72
  73         at91_seriald_hw_init();
  74         tny_a9260_nand_hw_init();
  75         at91_spi0_hw_init(1 << 5);
  76         return 0;
  77 }
  78
  79 int dram_init(void)
  80 {
  81         gd->ram_size = get_ram_size(
  82                 (void *)CONFIG_SYS_SDRAM_BASE,
  83                 CONFIG_SYS_SDRAM_SIZE);
  84         return 0;
  85 }