2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
4 * Base on code from TI. Original Notices follow:
6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
8 * Modified for DA8xx EVM.
10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 * Parts are shamelessly stolen from various TI sources, original copyright
14 * -----------------------------------------------------------------
16 * Copyright (C) 2004 Texas Instruments.
18 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
37 #include <asm/arch/hardware.h>
38 #include <asm/arch/emif_defs.h>
40 #include "../common/misc.h"
42 DECLARE_GLOBAL_DATA_PTR;
44 #define pinmux &davinci_syscfg_regs->pinmux
46 /* SPI0 pin muxer settings */
47 static const struct pinmux_config spi0_pins[] = {
55 /* EMIF-A bus pins for 8-bit NAND support on CS3 */
56 static const struct pinmux_config emifa_nand_pins[] = {
72 /* UART pin muxer settings */
73 static const struct pinmux_config uart_pins[] = {
78 /* I2C pin muxer settings */
79 static const struct pinmux_config i2c_pins[] = {
84 /* USB0_DRVVBUS pin muxer settings */
85 static const struct pinmux_config usb_pins[] = {
89 static const struct pinmux_resource pinmuxes[] = {
90 #ifdef CONFIG_SPI_FLASH
91 PINMUX_ITEM(spi0_pins),
93 PINMUX_ITEM(uart_pins),
94 PINMUX_ITEM(i2c_pins),
95 #ifdef CONFIG_USB_DA8XX
96 PINMUX_ITEM(usb_pins),
98 #ifdef CONFIG_USE_NAND
99 PINMUX_ITEM(emifa_nand_pins),
105 #ifndef CONFIG_USE_IRQ
107 * Mask all IRQs by clearing the global enable and setting
108 * the enable clear for all the 90 interrupts.
111 writel(0, &davinci_aintc_regs->ger);
113 writel(0, &davinci_aintc_regs->hier);
115 writel(0xffffffff, &davinci_aintc_regs->ecr1);
116 writel(0xffffffff, &davinci_aintc_regs->ecr2);
117 writel(0xffffffff, &davinci_aintc_regs->ecr3);
120 #ifdef CONFIG_NAND_DAVINCI
121 /* EMIFA 100MHz clock select */
122 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
123 &davinci_syscfg_regs->cfgchip3);
125 writel((DAVINCI_ABCR_WSETUP(0) |
126 DAVINCI_ABCR_WSTROBE(2) |
127 DAVINCI_ABCR_WHOLD(0) |
128 DAVINCI_ABCR_RSETUP(0) |
129 DAVINCI_ABCR_RSTROBE(2) |
130 DAVINCI_ABCR_RHOLD(0) |
132 DAVINCI_ABCR_ASIZE_8BIT),
133 &davinci_emif_regs->AB2CR);
136 /* arch number of the board */
137 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
139 /* address of boot parameters */
140 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
143 * Power on required peripherals
144 * ARM does not have access by default to PSC0 and PSC1
145 * assuming here that the DSP bootloader has set the IOPU
146 * such that PSC access is available to ARM
148 lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */
149 lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */
150 lpsc_on(DAVINCI_LPSC_EMAC); /* image download */
151 lpsc_on(DAVINCI_LPSC_UART2); /* console */
152 lpsc_on(DAVINCI_LPSC_GPIO);
154 /* setup the SUSPSRC for ARM to control emulation suspend */
155 writel(readl(&davinci_syscfg_regs->suspsrc) &
156 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
157 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
158 DAVINCI_SYSCFG_SUSPSRC_UART2),
159 &davinci_syscfg_regs->suspsrc);
161 /* configure pinmux settings */
162 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
165 /* enable the console UART */
166 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
167 DAVINCI_UART_PWREMU_MGMT_UTRST),
168 &davinci_uart2_ctrl_regs->pwremu_mgmt);