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1 /*
2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3  *
4  * Authors:  Chunhe Lan <b25806@freescale.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __BCSR_H_
10 #define __BCSR_H_
11
12 #include <common.h>
13
14 /*
15  * BCSR Bit definitions
16         * BCSR 15 *
17         0       device insertion oriention
18         1       stack processor present
19         2       power supply shut down/normal operation
20         3       I2C bus0 drive enable
21         4       reserved
22         5:7     I2C bus0 select
23                                 5 - I2C_BUS_0_SS0
24                                 6 - I2C_BUS_0_SS1
25                                 7 - I2C_BUS_0_SS2
26 */
27
28 /* BCSR register base address is 0xFX000020 */
29 #define BCSR_BASE_REG_OFFSET    0x20
30 #define BCSR_ACCESS_REG_ADDR    (CONFIG_SYS_BCSR_BASE + BCSR_BASE_REG_OFFSET)
31
32 #define BCSR15_DEV_INS_ORI      0x80
33 #define BCSR15_STACK_PRO_PRE    0x40
34 #define BCSR15_POWER_SUPPLY     0x20
35 #define BCSR15_I2C_BUS0_EN      0x10
36 #define BCSR15_I2C_BUS0_SEG0    0x00
37 #define BCSR15_I2C_BUS0_SEG1    0x04
38 #define BCSR15_I2C_BUS0_SEG2    0x02
39 #define BCSR15_I2C_BUS0_SEG3    0x06
40 #define BCSR15_I2C_BUS0_SEG4    0x01
41 #define BCSR15_I2C_BUS0_SEG5    0x05
42 #define BCSR15_I2C_BUS0_SEG6    0x03
43 #define BCSR15_I2C_BUS0_SEG7    0x07
44 #define BCSR15_I2C_BUS0_SEG_CLR 0x07
45 #define BCSR19_SGMII_SEL_L      0x01
46
47 /*BCSR Utils functions*/
48 void fixup_i2c_bus0_sel_seg0(void);
49 #endif  /* __BCSR_H_ */