board/freescale/t102xqds/t102xqds_qixis.h

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __T1024QDS_QIXIS_H__
   8 #define __T1024QDS_QIXIS_H__
   9
  10 /* Definitions of QIXIS Registers for T1024/T1023 QDS */
  11
  12 /* BRDCFG4[4:7]] select EC1 and EC2 as a pair */
  13 #define BRDCFG4_EMISEL_MASK             0xE0
  14 #define BRDCFG4_EMISEL_SHIFT            5
  15
  16 /* BRDCFG5[0:1] controls routing and use of I2C3 & I2C4 ports*/
  17 #define BRDCFG5_IMX_MASK                0xC0
  18 #define BRDCFG5_IMX_DIU                 0x80
  19
  20 #define BRDCFG9_XFI_TX_DISABLE          0x10
  21
  22 /* BRDCFG13[0:5] TDM configuration and setup */
  23 #define BRDCFG13_TDM_MASK               0xfc
  24 #define BRDCFG13_TDM_INTERFACE          0x37
  25 #define BRDCFG13_HDLC_LOOPBACK          0x29
  26 #define BRDCFG13_TDM_LOOPBACK           0x31
  27
  28 /* BRDCFG15[3] controls LCD Panel Powerdown */
  29 #define BRDCFG15_LCDFM                  0x20
  30 #define BRDCFG15_LCDPD                  0x10
  31 #define BRDCFG15_LCDPD_MASK             0x10
  32 #define BRDCFG15_LCDPD_ENABLED          0x00
  33
  34 /* BRDCFG15[6:7] controls DIU MUX selction*/
  35 #define BRDCFG15_DIUSEL_MASK            0x03
  36 #define BRDCFG15_DIUSEL_HDMI            0x00
  37 #define BRDCFG15_DIUSEL_LCD             0x01
  38 #define BRDCFG15_DIUSEL_UCC             0x10
  39 #define BRDCFG15_DIUSEL_TDM             0x11
  40
  41 /* SYSCLK */
  42 #define QIXIS_SYSCLK_66                 0x0
  43 #define QIXIS_SYSCLK_83                 0x1
  44 #define QIXIS_SYSCLK_100                0x2
  45 #define QIXIS_SYSCLK_125                0x3
  46 #define QIXIS_SYSCLK_133                0x4
  47 #define QIXIS_SYSCLK_150                0x5
  48 #define QIXIS_SYSCLK_160                0x6
  49 #define QIXIS_SYSCLK_166                0x7
  50 #define QIXIS_SYSCLK_64                 0x8
  51
  52 /* DDRCLK */
  53 #define QIXIS_DDRCLK_66                 0x0
  54 #define QIXIS_DDRCLK_100                0x1
  55 #define QIXIS_DDRCLK_125                0x2
  56 #define QIXIS_DDRCLK_133                0x3
  57
  58
  59 #define QIXIS_SRDS1CLK_122              0x5a
  60 #define QIXIS_SRDS1CLK_125              0x5e
  61 #endif