board/gdsys/405ep/iocon.c

   1 /*
   2  * (C) Copyright 2010
   3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <command.h>
  26 #include <asm/processor.h>
  27 #include <asm/io.h>
  28 #include <asm/ppc4xx-gpio.h>
  29
  30 #include <gdsys_fpga.h>
  31
  32 #include "../common/osd.h"
  33
  34 enum {
  35         UNITTYPE_MAIN_SERVER = 0,
  36         UNITTYPE_MAIN_USER = 1,
  37         UNITTYPE_VIDEO_SERVER = 2,
  38         UNITTYPE_VIDEO_USER = 3,
  39 };
  40
  41 enum {
  42         HWVER_100 = 0,
  43         HWVER_104 = 1,
  44         HWVER_110 = 2,
  45 };
  46
  47 enum {
  48         COMPRESSION_NONE = 0,
  49         COMPRESSION_TYPE1_DELTA,
  50 };
  51
  52 enum {
  53         AUDIO_NONE = 0,
  54         AUDIO_TX = 1,
  55         AUDIO_RX = 2,
  56         AUDIO_RXTX = 3,
  57 };
  58
  59 enum {
  60         SYSCLK_147456 = 0,
  61 };
  62
  63 enum {
  64         RAM_DDR2_32 = 0,
  65 };
  66
  67 /*
  68  * Check Board Identity:
  69  */
  70 int checkboard(void)
  71 {
  72         ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
  73         char *s = getenv("serial#");
  74         u16 versions = in_le16(&fpga->versions);
  75         u16 fpga_version = in_le16(&fpga->fpga_version);
  76         u16 fpga_features = in_le16(&fpga->fpga_features);
  77         unsigned unit_type;
  78         unsigned hardware_version;
  79         unsigned feature_compression;
  80         unsigned feature_osd;
  81         unsigned feature_audio;
  82         unsigned feature_sysclock;
  83         unsigned feature_ramconfig;
  84         unsigned feature_carriers;
  85         unsigned feature_video_channels;
  86
  87         unit_type = (versions & 0xf000) >> 12;
  88         hardware_version = versions & 0x000f;
  89         feature_compression = (fpga_features & 0xe000) >> 13;
  90         feature_osd = fpga_features & (1<<11);
  91         feature_audio = (fpga_features & 0x0600) >> 9;
  92         feature_sysclock = (fpga_features & 0x0180) >> 7;
  93         feature_ramconfig = (fpga_features & 0x0060) >> 5;
  94         feature_carriers = (fpga_features & 0x000c) >> 2;
  95         feature_video_channels = fpga_features & 0x0003;
  96
  97         printf("Board: ");
  98
  99         printf("IoCon");
 100
 101         if (s != NULL) {
 102                 puts(", serial# ");
 103                 puts(s);
 104         }
 105         puts("\n       ");
 106
 107         switch (unit_type) {
 108         case UNITTYPE_MAIN_USER:
 109                 printf("Mainchannel");
 110                 break;
 111
 112         case UNITTYPE_VIDEO_USER:
 113                 printf("Videochannel");
 114                 break;
 115
 116         default:
 117                 printf("UnitType %d(not supported)", unit_type);
 118                 break;
 119         }
 120
 121         switch (hardware_version) {
 122         case HWVER_100:
 123                 printf(" HW-Ver 1.00\n");
 124                 break;
 125
 126         case HWVER_104:
 127                 printf(" HW-Ver 1.04\n");
 128                 break;
 129
 130         case HWVER_110:
 131                 printf(" HW-Ver 1.10\n");
 132                 break;
 133
 134         default:
 135                 printf(" HW-Ver %d(not supported)\n",
 136                        hardware_version);
 137                 break;
 138         }
 139
 140         printf("       FPGA V %d.%02d, features:",
 141                 fpga_version / 100, fpga_version % 100);
 142
 143
 144         switch (feature_compression) {
 145         case COMPRESSION_NONE:
 146                 printf(" no compression");
 147                 break;
 148
 149         case COMPRESSION_TYPE1_DELTA:
 150                 printf(" type1-deltacompression");
 151                 break;
 152
 153         default:
 154                 printf(" compression %d(not supported)", feature_compression);
 155                 break;
 156         }
 157
 158         printf(", %sosd", feature_osd ? "" : "no ");
 159
 160         switch (feature_audio) {
 161         case AUDIO_NONE:
 162                 printf(", no audio");
 163                 break;
 164
 165         case AUDIO_TX:
 166                 printf(", audio tx");
 167                 break;
 168
 169         case AUDIO_RX:
 170                 printf(", audio rx");
 171                 break;
 172
 173         case AUDIO_RXTX:
 174                 printf(", audio rx+tx");
 175                 break;
 176
 177         default:
 178                 printf(", audio %d(not supported)", feature_audio);
 179                 break;
 180         }
 181
 182         puts(",\n       ");
 183
 184         switch (feature_sysclock) {
 185         case SYSCLK_147456:
 186                 printf("clock 147.456 MHz");
 187                 break;
 188
 189         default:
 190                 printf("clock %d(not supported)", feature_sysclock);
 191                 break;
 192         }
 193
 194         switch (feature_ramconfig) {
 195         case RAM_DDR2_32:
 196                 printf(", RAM 32 bit DDR2");
 197                 break;
 198
 199         default:
 200                 printf(", RAM %d(not supported)", feature_ramconfig);
 201                 break;
 202         }
 203
 204         printf(", %d carrier(s)", feature_carriers);
 205
 206         printf(", %d video channel(s)\n", feature_video_channels);
 207
 208         return 0;
 209 }
 210
 211 int last_stage_init(void)
 212 {
 213         return osd_probe(0);
 214 }
 215
 216 /*
 217  * provide access to fpga gpios (for I2C bitbang)
 218  */
 219 void fpga_gpio_set(int pin)
 220 {
 221         out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x18), pin);
 222 }
 223
 224 void fpga_gpio_clear(int pin)
 225 {
 226         out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x16), pin);
 227 }
 228
 229 int fpga_gpio_get(int pin)
 230 {
 231         return in_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x14)) & pin;
 232 }