board/gdsys/405ep/iocon.c

   1 /*
   2  * (C) Copyright 2010
   3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <command.h>
  10 #include <asm/processor.h>
  11 #include <asm/io.h>
  12 #include <asm/ppc4xx-gpio.h>
  13
  14 #include "405ep.h"
  15 #include <gdsys_fpga.h>
  16
  17 #include "../common/osd.h"
  18
  19 #define LATCH0_BASE (CONFIG_SYS_LATCH_BASE)
  20 #define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
  21 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
  22
  23 enum {
  24         UNITTYPE_MAIN_SERVER = 0,
  25         UNITTYPE_MAIN_USER = 1,
  26         UNITTYPE_VIDEO_SERVER = 2,
  27         UNITTYPE_VIDEO_USER = 3,
  28 };
  29
  30 enum {
  31         HWVER_100 = 0,
  32         HWVER_104 = 1,
  33         HWVER_110 = 2,
  34 };
  35
  36 enum {
  37         COMPRESSION_NONE = 0,
  38         COMPRESSION_TYPE1_DELTA,
  39 };
  40
  41 enum {
  42         AUDIO_NONE = 0,
  43         AUDIO_TX = 1,
  44         AUDIO_RX = 2,
  45         AUDIO_RXTX = 3,
  46 };
  47
  48 enum {
  49         SYSCLK_147456 = 0,
  50 };
  51
  52 enum {
  53         RAM_DDR2_32 = 0,
  54 };
  55
  56 /*
  57  * Check Board Identity:
  58  */
  59 int checkboard(void)
  60 {
  61         char *s = getenv("serial#");
  62
  63         puts("Board: ");
  64
  65         puts("IoCon");
  66
  67         if (s != NULL) {
  68                 puts(", serial# ");
  69                 puts(s);
  70         }
  71
  72         puts("\n");
  73
  74         return 0;
  75 }
  76
  77 static void print_fpga_info(void)
  78 {
  79         struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
  80         u16 versions = in_le16(&fpga->versions);
  81         u16 fpga_version = in_le16(&fpga->fpga_version);
  82         u16 fpga_features = in_le16(&fpga->fpga_features);
  83         unsigned unit_type;
  84         unsigned hardware_version;
  85         unsigned feature_compression;
  86         unsigned feature_osd;
  87         unsigned feature_audio;
  88         unsigned feature_sysclock;
  89         unsigned feature_ramconfig;
  90         unsigned feature_carriers;
  91         unsigned feature_video_channels;
  92
  93         unit_type = (versions & 0xf000) >> 12;
  94         hardware_version = versions & 0x000f;
  95         feature_compression = (fpga_features & 0xe000) >> 13;
  96         feature_osd = fpga_features & (1<<11);
  97         feature_audio = (fpga_features & 0x0600) >> 9;
  98         feature_sysclock = (fpga_features & 0x0180) >> 7;
  99         feature_ramconfig = (fpga_features & 0x0060) >> 5;
 100         feature_carriers = (fpga_features & 0x000c) >> 2;
 101         feature_video_channels = fpga_features & 0x0003;
 102
 103         switch (unit_type) {
 104         case UNITTYPE_MAIN_USER:
 105                 printf("Mainchannel");
 106                 break;
 107
 108         case UNITTYPE_VIDEO_USER:
 109                 printf("Videochannel");
 110                 break;
 111
 112         default:
 113                 printf("UnitType %d(not supported)", unit_type);
 114                 break;
 115         }
 116
 117         switch (hardware_version) {
 118         case HWVER_100:
 119                 printf(" HW-Ver 1.00\n");
 120                 break;
 121
 122         case HWVER_104:
 123                 printf(" HW-Ver 1.04\n");
 124                 break;
 125
 126         case HWVER_110:
 127                 printf(" HW-Ver 1.10\n");
 128                 break;
 129
 130         default:
 131                 printf(" HW-Ver %d(not supported)\n",
 132                        hardware_version);
 133                 break;
 134         }
 135
 136         printf("       FPGA V %d.%02d, features:",
 137                 fpga_version / 100, fpga_version % 100);
 138
 139
 140         switch (feature_compression) {
 141         case COMPRESSION_NONE:
 142                 printf(" no compression");
 143                 break;
 144
 145         case COMPRESSION_TYPE1_DELTA:
 146                 printf(" type1-deltacompression");
 147                 break;
 148
 149         default:
 150                 printf(" compression %d(not supported)", feature_compression);
 151                 break;
 152         }
 153
 154         printf(", %sosd", feature_osd ? "" : "no ");
 155
 156         switch (feature_audio) {
 157         case AUDIO_NONE:
 158                 printf(", no audio");
 159                 break;
 160
 161         case AUDIO_TX:
 162                 printf(", audio tx");
 163                 break;
 164
 165         case AUDIO_RX:
 166                 printf(", audio rx");
 167                 break;
 168
 169         case AUDIO_RXTX:
 170                 printf(", audio rx+tx");
 171                 break;
 172
 173         default:
 174                 printf(", audio %d(not supported)", feature_audio);
 175                 break;
 176         }
 177
 178         puts(",\n       ");
 179
 180         switch (feature_sysclock) {
 181         case SYSCLK_147456:
 182                 printf("clock 147.456 MHz");
 183                 break;
 184
 185         default:
 186                 printf("clock %d(not supported)", feature_sysclock);
 187                 break;
 188         }
 189
 190         switch (feature_ramconfig) {
 191         case RAM_DDR2_32:
 192                 printf(", RAM 32 bit DDR2");
 193                 break;
 194
 195         default:
 196                 printf(", RAM %d(not supported)", feature_ramconfig);
 197                 break;
 198         }
 199
 200         printf(", %d carrier(s)", feature_carriers);
 201
 202         printf(", %d video channel(s)\n", feature_video_channels);
 203 }
 204
 205 int last_stage_init(void)
 206 {
 207         print_fpga_info();
 208
 209         return osd_probe(0);
 210 }
 211
 212 /*
 213  * provide access to fpga gpios (for I2C bitbang)
 214  */
 215 void fpga_gpio_set(int pin)
 216 {
 217         out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x18), pin);
 218 }
 219
 220 void fpga_gpio_clear(int pin)
 221 {
 222         out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x16), pin);
 223 }
 224
 225 int fpga_gpio_get(int pin)
 226 {
 227         return in_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x14)) & pin;
 228 }
 229
 230 void gd405ep_init(void)
 231 {
 232 }
 233
 234 void gd405ep_set_fpga_reset(unsigned state)
 235 {
 236         if (state) {
 237                 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET);
 238                 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET);
 239         } else {
 240                 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
 241                 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
 242         }
 243 }
 244
 245 void gd405ep_setup_hw(void)
 246 {
 247         /*
 248          * set "startup-finished"-gpios
 249          */
 250         gpio_write_bit(21, 0);
 251         gpio_write_bit(22, 1);
 252 }
 253
 254 int gd405ep_get_fpga_done(unsigned fpga)
 255 {
 256         return in_le16((void *)LATCH2_BASE) & CONFIG_SYS_FPGA_DONE(fpga);
 257 }