board/highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the Free
   6  * Software Foundation; either version 2 of the License, or (at your option)
   7  * any later version.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <common.h>
  19 #include <ahci.h>
  20 #include <netdev.h>
  21 #include <scsi.h>
  22
  23 #include <asm/sizes.h>
  24 #include <asm/io.h>
  25
  26 #define HB_AHCI_BASE                    0xffe08000
  27
  28 #define HB_SREG_A9_PWR_REQ              0xfff3cf00
  29 #define HB_SREG_A9_BOOT_SRC_STAT        0xfff3cf04
  30 #define HB_SREG_A9_PWRDOM_STAT          0xfff3cf20
  31
  32 #define HB_PWR_SUSPEND                  0
  33 #define HB_PWR_SOFT_RESET               1
  34 #define HB_PWR_HARD_RESET               2
  35 #define HB_PWR_SHUTDOWN                 3
  36
  37 #define PWRDOM_STAT_SATA                0x80000000
  38 #define PWRDOM_STAT_PCI                 0x40000000
  39 #define PWRDOM_STAT_EMMC                0x20000000
  40
  41 DECLARE_GLOBAL_DATA_PTR;
  42
  43 /*
  44  * Miscellaneous platform dependent initialisations
  45  */
  46 int board_init(void)
  47 {
  48         icache_enable();
  49
  50         return 0;
  51 }
  52
  53 /* We know all the init functions have been run now */
  54 int board_eth_init(bd_t *bis)
  55 {
  56         int rc = 0;
  57
  58 #ifdef CONFIG_CALXEDA_XGMAC
  59         rc += calxedaxgmac_initialize(0, 0xfff50000);
  60         rc += calxedaxgmac_initialize(1, 0xfff51000);
  61 #endif
  62         return rc;
  63 }
  64
  65 int misc_init_r(void)
  66 {
  67         char envbuffer[16];
  68         u32 boot_choice;
  69         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  70
  71         if (reg & PWRDOM_STAT_SATA) {
  72                 ahci_init(HB_AHCI_BASE);
  73                 scsi_scan(1);
  74         }
  75
  76         boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
  77         sprintf(envbuffer, "bootcmd%d", boot_choice);
  78         if (getenv(envbuffer)) {
  79                 sprintf(envbuffer, "run bootcmd%d", boot_choice);
  80                 setenv("bootcmd", envbuffer);
  81         } else
  82                 setenv("bootcmd", "");
  83
  84         return 0;
  85 }
  86
  87 int dram_init(void)
  88 {
  89         gd->ram_size = SZ_512M;
  90         return 0;
  91 }
  92
  93 void dram_init_banksize(void)
  94 {
  95         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  96         gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
  97 }
  98
  99 #if defined(CONFIG_OF_BOARD_SETUP)
 100 void ft_board_setup(void *fdt, bd_t *bd)
 101 {
 102         static const char disabled[] = "disabled";
 103         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
 104
 105         if (!(reg & PWRDOM_STAT_SATA))
 106                 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
 107                         disabled, sizeof(disabled), 1);
 108
 109         if (!(reg & PWRDOM_STAT_EMMC))
 110                 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
 111                         disabled, sizeof(disabled), 1);
 112 }
 113 #endif
 114
 115 void reset_cpu(ulong addr)
 116 {
 117         writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
 118
 119         wfi();
 120 }