board/linkstation/linkstation.c

   1 /*
   2  * linkstation.c
   3  *
   4  * Misc LinkStation specific functions
   5  *
   6  * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <version.h>
  13 #include <mpc824x.h>
  14 #include <asm/io.h>
  15 #include <ns16550.h>
  16 #include <netdev.h>
  17
  18 #ifdef CONFIG_PCI
  19 #include <pci.h>
  20 #endif
  21
  22 DECLARE_GLOBAL_DATA_PTR;
  23
  24 extern void init_AVR_DUART(void);
  25
  26 int checkboard (void)
  27 {
  28         char *p;
  29         bd_t *bd = gd->bd;
  30
  31         init_AVR_DUART();
  32
  33         if ((p = getenv ("console_nr")) != NULL) {
  34                 unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
  35
  36                 bd->bi_baudrate &= ~3;
  37                 bd->bi_baudrate |= con_nr & 3;
  38         }
  39         return 0;
  40 }
  41
  42 phys_size_t initdram (int board_type)
  43 {
  44         return (get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE));
  45 }
  46
  47 /*
  48  * Initialize PCI Devices
  49  */
  50 #ifdef CONFIG_PCI
  51
  52 #ifndef CONFIG_PCI_PNP
  53
  54 static struct pci_config_table pci_linkstation_config_table[] = {
  55         /* vendor, device, class */
  56         /* bus, dev, func */
  57         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  58           PCI_ANY_ID, 0x0b, 0,          /* AN983B or RTL8110S  */
  59                                                                 /* ethernet controller */
  60           pci_cfgfunc_config_device, { PCI_ETH_IOADDR,
  61                                        PCI_ETH_MEMADDR,
  62                                        PCI_COMMAND_IO |
  63                                        PCI_COMMAND_MEMORY |
  64                                        PCI_COMMAND_MASTER }},
  65         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  66           PCI_ANY_ID, 0x0c, 0,          /* SII680 or IT8211AF */
  67                                                                 /* ide controller     */
  68           pci_cfgfunc_config_device, { PCI_IDE_IOADDR,
  69                                        PCI_IDE_MEMADDR,
  70                                        PCI_COMMAND_IO |
  71                                        PCI_COMMAND_MEMORY |
  72                                        PCI_COMMAND_MASTER }},
  73         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  74           PCI_ANY_ID, 0x0e, 0,          /* D720101 USB controller, 1st USB 1.1 */
  75           pci_cfgfunc_config_device, { PCI_USB0_IOADDR,
  76                                        PCI_USB0_MEMADDR,
  77                                        PCI_COMMAND_MEMORY |
  78                                        PCI_COMMAND_MASTER }},
  79         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  80           PCI_ANY_ID, 0x0e, 1,          /* D720101 USB controller, 2nd USB 1.1 */
  81           pci_cfgfunc_config_device, { PCI_USB1_IOADDR,
  82                                        PCI_USB1_MEMADDR,
  83                                        PCI_COMMAND_MEMORY |
  84                                        PCI_COMMAND_MASTER }},
  85         { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  86           PCI_ANY_ID, 0x0e, 2,          /* D720101 USB controller, USB 2.0 */
  87           pci_cfgfunc_config_device, { PCI_USB2_IOADDR,
  88                                        PCI_USB2_MEMADDR,
  89                                        PCI_COMMAND_MEMORY |
  90                                        PCI_COMMAND_MASTER }},
  91         { }
  92 };
  93 #endif
  94
  95 struct pci_controller hose = {
  96 #ifndef CONFIG_PCI_PNP
  97         config_table:pci_linkstation_config_table,
  98 #endif
  99 };
 100
 101 void pci_init_board (void)
 102 {
 103         pci_mpc824x_init (&hose);
 104
 105         /* Reset USB 1.1 */
 106         /* Haven't seen any change without these on a HG, maybe it is
 107          * needed on other models */
 108         out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1);
 109         out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1);
 110 }
 111 #endif /* CONFIG_PCI */
 112
 113 #define UART_DCR       0x80004511
 114 int board_early_init_f (void)
 115 {
 116         /* set DUART mode */
 117         out_8((volatile u8*)UART_DCR, 1);
 118         return 0;
 119 }
 120
 121 int board_eth_init(bd_t *bis)
 122 {
 123         return pci_eth_init(bis);
 124 }