board/samsung/smdk5250/exynos5-dt.c

   1 /*
   2  * Copyright (C) 2012 Samsung Electronics
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <fdtdec.h>
   9 #include <asm/io.h>
  10 #include <errno.h>
  11 #include <i2c.h>
  12 #include <netdev.h>
  13 #include <spi.h>
  14 #include <asm/arch/cpu.h>
  15 #include <asm/arch/dwmmc.h>
  16 #include <asm/arch/gpio.h>
  17 #include <asm/arch/mmc.h>
  18 #include <asm/arch/pinmux.h>
  19 #include <asm/arch/power.h>
  20 #include <asm/arch/sromc.h>
  21 #include <power/pmic.h>
  22 #include <power/max77686_pmic.h>
  23 #include <tmu.h>
  24
  25 DECLARE_GLOBAL_DATA_PTR;
  26
  27 #ifdef CONFIG_SOUND_MAX98095
  28 static void board_enable_audio_codec(void)
  29 {
  30         /* Enable MAX98095 Codec */
  31         gpio_direction_output(EXYNOS5_GPIO_X17, 1);
  32         gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
  33 }
  34 #endif
  35
  36 int exynos_init(void)
  37 {
  38 #ifdef CONFIG_SOUND_MAX98095
  39         board_enable_audio_codec();
  40 #endif
  41         return 0;
  42 }
  43
  44 #if defined(CONFIG_POWER)
  45 #ifdef CONFIG_POWER_MAX77686
  46 static int pmic_reg_update(struct pmic *p, int reg, uint regval)
  47 {
  48         u32 val;
  49         int ret = 0;
  50
  51         ret = pmic_reg_read(p, reg, &val);
  52         if (ret) {
  53                 debug("%s: PMIC %d register read failed\n", __func__, reg);
  54                 return -1;
  55         }
  56         val |= regval;
  57         ret = pmic_reg_write(p, reg, val);
  58         if (ret) {
  59                 debug("%s: PMIC %d register write failed\n", __func__, reg);
  60                 return -1;
  61         }
  62         return 0;
  63 }
  64
  65 static int max77686_init(void)
  66 {
  67         struct pmic *p;
  68
  69         if (pmic_init(I2C_PMIC))
  70                 return -1;
  71
  72         p = pmic_get("MAX77686_PMIC");
  73         if (!p)
  74                 return -ENODEV;
  75
  76         if (pmic_probe(p))
  77                 return -1;
  78
  79         if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
  80                 return -1;
  81
  82         if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
  83                             MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
  84                 return -1;
  85
  86         /* VDD_MIF */
  87         if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
  88                            MAX77686_BUCK1OUT_1V)) {
  89                 debug("%s: PMIC %d register write failed\n", __func__,
  90                       MAX77686_REG_PMIC_BUCK1OUT);
  91                 return -1;
  92         }
  93
  94         if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
  95                             MAX77686_BUCK1CTRL_EN))
  96                 return -1;
  97
  98         /* VDD_ARM */
  99         if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
 100                            MAX77686_BUCK2DVS1_1_3V)) {
 101                 debug("%s: PMIC %d register write failed\n", __func__,
 102                       MAX77686_REG_PMIC_BUCK2DVS1);
 103                 return -1;
 104         }
 105
 106         if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
 107                             MAX77686_BUCK2CTRL_ON))
 108                 return -1;
 109
 110         /* VDD_INT */
 111         if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
 112                            MAX77686_BUCK3DVS1_1_0125V)) {
 113                 debug("%s: PMIC %d register write failed\n", __func__,
 114                       MAX77686_REG_PMIC_BUCK3DVS1);
 115                 return -1;
 116         }
 117
 118         if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
 119                             MAX77686_BUCK3CTRL_ON))
 120                 return -1;
 121
 122         /* VDD_G3D */
 123         if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
 124                            MAX77686_BUCK4DVS1_1_2V)) {
 125                 debug("%s: PMIC %d register write failed\n", __func__,
 126                       MAX77686_REG_PMIC_BUCK4DVS1);
 127                 return -1;
 128         }
 129
 130         if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
 131                             MAX77686_BUCK3CTRL_ON))
 132                 return -1;
 133
 134         /* VDD_LDO2 */
 135         if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
 136                             MAX77686_LD02CTRL1_1_5V | EN_LDO))
 137                 return -1;
 138
 139         /* VDD_LDO3 */
 140         if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
 141                             MAX77686_LD03CTRL1_1_8V | EN_LDO))
 142                 return -1;
 143
 144         /* VDD_LDO5 */
 145         if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
 146                             MAX77686_LD05CTRL1_1_8V | EN_LDO))
 147                 return -1;
 148
 149         /* VDD_LDO10 */
 150         if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
 151                             MAX77686_LD10CTRL1_1_8V | EN_LDO))
 152                 return -1;
 153
 154         return 0;
 155 }
 156 #endif  /* CONFIG_POWER_MAX77686 */
 157
 158 int exynos_power_init(void)
 159 {
 160         int ret = 0;
 161
 162 #ifdef CONFIG_POWER_MAX77686
 163         ret = max77686_init();
 164 #endif
 165         return ret;
 166 }
 167 #endif  /* CONFIG_POWER */
 168
 169 #ifdef CONFIG_LCD
 170 void exynos_cfg_lcd_gpio(void)
 171 {
 172         /* For Backlight */
 173         gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT);
 174         gpio_set_value(EXYNOS5_GPIO_B20, 1);
 175
 176         /* LCD power on */
 177         gpio_cfg_pin(EXYNOS5_GPIO_X15, S5P_GPIO_OUTPUT);
 178         gpio_set_value(EXYNOS5_GPIO_X15, 1);
 179
 180         /* Set Hotplug detect for DP */
 181         gpio_cfg_pin(EXYNOS5_GPIO_X07, S5P_GPIO_FUNC(0x3));
 182 }
 183
 184 void exynos_set_dp_phy(unsigned int onoff)
 185 {
 186         set_dp_phy_ctrl(onoff);
 187 }
 188 #endif