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exynos5: Add DT based driver for SMC911X ethernet
[karo-tx-uboot.git] / board / samsung / smdk5250 / smdk5250.c
1 /*
2  * Copyright (C) 2012 Samsung Electronics
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22
23 #include <common.h>
24 #include <fdtdec.h>
25 #include <asm/io.h>
26 #include <i2c.h>
27 #include <netdev.h>
28 #include <spi.h>
29 #include <asm/arch/cpu.h>
30 #include <asm/arch/gpio.h>
31 #include <asm/arch/mmc.h>
32 #include <asm/arch/pinmux.h>
33 #include <asm/arch/sromc.h>
34 #include <power/pmic.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 int board_init(void)
39 {
40         gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
41 #ifdef CONFIG_EXYNOS_SPI
42         spi_init();
43 #endif
44         return 0;
45 }
46
47 int dram_init(void)
48 {
49         gd->ram_size    = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
50                         + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
51                         + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
52                         + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
53                         + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
54                         + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
55                         + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
56                         + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
57         return 0;
58 }
59
60 #if defined(CONFIG_POWER)
61 int power_init_board(void)
62 {
63         if (pmic_init(I2C_PMIC))
64                 return -1;
65         else
66                 return 0;
67 }
68 #endif
69
70 void dram_init_banksize(void)
71 {
72         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
73         gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
74                                                         PHYS_SDRAM_1_SIZE);
75         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
76         gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
77                                                         PHYS_SDRAM_2_SIZE);
78         gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
79         gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
80                                                         PHYS_SDRAM_3_SIZE);
81         gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
82         gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
83                                                         PHYS_SDRAM_4_SIZE);
84         gd->bd->bi_dram[4].start = PHYS_SDRAM_5;
85         gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
86                                                         PHYS_SDRAM_5_SIZE);
87         gd->bd->bi_dram[5].start = PHYS_SDRAM_6;
88         gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
89                                                         PHYS_SDRAM_6_SIZE);
90         gd->bd->bi_dram[6].start = PHYS_SDRAM_7;
91         gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
92                                                         PHYS_SDRAM_7_SIZE);
93         gd->bd->bi_dram[7].start = PHYS_SDRAM_8;
94         gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
95                                                         PHYS_SDRAM_8_SIZE);
96 }
97
98 #ifdef CONFIG_OF_CONTROL
99 static int decode_sromc(const void *blob, struct fdt_sromc *config)
100 {
101         int err;
102         int node;
103
104         node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
105         if (node < 0) {
106                 debug("Could not find SROMC node\n");
107                 return node;
108         }
109
110         config->bank = fdtdec_get_int(blob, node, "bank", 0);
111         config->width = fdtdec_get_int(blob, node, "width", 2);
112
113         err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
114                         FDT_SROM_TIMING_COUNT);
115         if (err < 0) {
116                 debug("Could not decode SROMC configuration\n");
117                 return -FDT_ERR_NOTFOUND;
118         }
119
120         return 0;
121 }
122 #endif
123
124 int board_eth_init(bd_t *bis)
125 {
126 #ifdef CONFIG_SMC911X
127         u32 smc_bw_conf, smc_bc_conf;
128         struct fdt_sromc config;
129         fdt_addr_t base_addr;
130         int node;
131
132 #ifdef CONFIG_OF_CONTROL
133         node = decode_sromc(gd->fdt_blob, &config);
134         if (node < 0) {
135                 debug("%s: Could not find sromc configuration\n", __func__);
136                 return 0;
137         }
138         node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
139         if (node < 0) {
140                 debug("%s: Could not find lan9215 configuration\n", __func__);
141                 return 0;
142         }
143
144         /* We now have a node, so any problems from now on are errors */
145         base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
146         if (base_addr == FDT_ADDR_T_NONE) {
147                 debug("%s: Could not find lan9215 address\n", __func__);
148                 return -1;
149         }
150 #else
151         /* Non-FDT configuration - bank number and timing parameters*/
152         config.bank = CONFIG_ENV_SROM_BANK;
153         config.width = 2;
154
155         config.timing[FDT_SROM_TACS] = 0x01;
156         config.timing[FDT_SROM_TCOS] = 0x01;
157         config.timing[FDT_SROM_TACC] = 0x06;
158         config.timing[FDT_SROM_TCOH] = 0x01;
159         config.timing[FDT_SROM_TAH] = 0x0C;
160         config.timing[FDT_SROM_TACP] = 0x09;
161         config.timing[FDT_SROM_PMC] = 0x01;
162         base_addr = CONFIG_SMC911X_BASE;
163 #endif
164
165         /* Ethernet needs data bus width of 16 bits */
166         if (config.width != 2) {
167                 debug("%s: Unsupported bus width %d\n", __func__,
168                         config.width);
169                 return -1;
170         }
171         smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
172                         | SROMC_BYTE_ENABLE(config.bank);
173
174         smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS])   |\
175                         SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
176                         SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
177                         SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
178                         SROMC_BC_TAH(config.timing[FDT_SROM_TAH])   |\
179                         SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
180                         SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
181
182         /* Select and configure the SROMC bank */
183         exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
184         s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
185         return smc911x_initialize(0, base_addr);
186 #endif
187         return 0;
188 }
189
190 #ifdef CONFIG_DISPLAY_BOARDINFO
191 int checkboard(void)
192 {
193         printf("\nBoard: SMDK5250\n");
194
195         return 0;
196 }
197 #endif
198
199 #ifdef CONFIG_GENERIC_MMC
200 int board_mmc_init(bd_t *bis)
201 {
202         int err;
203
204         err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
205         if (err) {
206                 debug("SDMMC0 not configured\n");
207                 return err;
208         }
209
210         err = s5p_mmc_init(0, 8);
211         return err;
212 }
213 #endif
214
215 static int board_uart_init(void)
216 {
217         int err;
218
219         err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
220         if (err) {
221                 debug("UART0 not configured\n");
222                 return err;
223         }
224
225         err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
226         if (err) {
227                 debug("UART1 not configured\n");
228                 return err;
229         }
230
231         err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
232         if (err) {
233                 debug("UART2 not configured\n");
234                 return err;
235         }
236
237         err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
238         if (err) {
239                 debug("UART3 not configured\n");
240                 return err;
241         }
242
243         return 0;
244 }
245
246 #ifdef CONFIG_SYS_I2C_INIT_BOARD
247 static int board_i2c_init(void)
248 {
249         int i, err;
250
251         for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
252                 err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
253                                                 PINMUX_FLAG_NONE);
254                 if (err) {
255                         debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
256                         return err;
257                 }
258         }
259         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
260         return 0;
261 }
262 #endif
263
264 #ifdef CONFIG_BOARD_EARLY_INIT_F
265 int board_early_init_f(void)
266 {
267         int err;
268         err = board_uart_init();
269         if (err) {
270                 debug("UART init failed\n");
271                 return err;
272         }
273 #ifdef CONFIG_SYS_I2C_INIT_BOARD
274         err = board_i2c_init();
275 #endif
276         return err;
277 }
278 #endif