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SMDK5250: Enable VBus for USB 2.0 controller
[karo-tx-uboot.git] / board / samsung / smdk5250 / smdk5250.c
1 /*
2  * Copyright (C) 2012 Samsung Electronics
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22
23 #include <common.h>
24 #include <fdtdec.h>
25 #include <asm/io.h>
26 #include <i2c.h>
27 #include <netdev.h>
28 #include <spi.h>
29 #include <asm/arch/cpu.h>
30 #include <asm/arch/gpio.h>
31 #include <asm/arch/mmc.h>
32 #include <asm/arch/pinmux.h>
33 #include <asm/arch/sromc.h>
34 #include <power/pmic.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 #ifdef CONFIG_USB_EHCI_EXYNOS
39 int board_usb_vbus_init(void)
40 {
41         struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
42                                                 samsung_get_base_gpio_part1();
43
44         /* Enable VBUS power switch */
45         s5p_gpio_direction_output(&gpio1->x2, 6, 1);
46
47         /* VBUS turn ON time */
48         mdelay(3);
49
50         return 0;
51 }
52 #endif
53
54 int board_init(void)
55 {
56         gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
57 #ifdef CONFIG_EXYNOS_SPI
58         spi_init();
59 #endif
60 #ifdef CONFIG_USB_EHCI_EXYNOS
61         board_usb_vbus_init();
62 #endif
63         return 0;
64 }
65
66 int dram_init(void)
67 {
68         gd->ram_size    = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
69                         + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
70                         + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
71                         + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
72                         + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
73                         + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
74                         + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
75                         + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
76         return 0;
77 }
78
79 #if defined(CONFIG_POWER)
80 int power_init_board(void)
81 {
82         if (pmic_init(I2C_PMIC))
83                 return -1;
84         else
85                 return 0;
86 }
87 #endif
88
89 void dram_init_banksize(void)
90 {
91         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
92         gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
93                                                         PHYS_SDRAM_1_SIZE);
94         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
95         gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
96                                                         PHYS_SDRAM_2_SIZE);
97         gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
98         gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
99                                                         PHYS_SDRAM_3_SIZE);
100         gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
101         gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
102                                                         PHYS_SDRAM_4_SIZE);
103         gd->bd->bi_dram[4].start = PHYS_SDRAM_5;
104         gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
105                                                         PHYS_SDRAM_5_SIZE);
106         gd->bd->bi_dram[5].start = PHYS_SDRAM_6;
107         gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
108                                                         PHYS_SDRAM_6_SIZE);
109         gd->bd->bi_dram[6].start = PHYS_SDRAM_7;
110         gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
111                                                         PHYS_SDRAM_7_SIZE);
112         gd->bd->bi_dram[7].start = PHYS_SDRAM_8;
113         gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
114                                                         PHYS_SDRAM_8_SIZE);
115 }
116
117 #ifdef CONFIG_OF_CONTROL
118 static int decode_sromc(const void *blob, struct fdt_sromc *config)
119 {
120         int err;
121         int node;
122
123         node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
124         if (node < 0) {
125                 debug("Could not find SROMC node\n");
126                 return node;
127         }
128
129         config->bank = fdtdec_get_int(blob, node, "bank", 0);
130         config->width = fdtdec_get_int(blob, node, "width", 2);
131
132         err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
133                         FDT_SROM_TIMING_COUNT);
134         if (err < 0) {
135                 debug("Could not decode SROMC configuration\n");
136                 return -FDT_ERR_NOTFOUND;
137         }
138
139         return 0;
140 }
141 #endif
142
143 int board_eth_init(bd_t *bis)
144 {
145 #ifdef CONFIG_SMC911X
146         u32 smc_bw_conf, smc_bc_conf;
147         struct fdt_sromc config;
148         fdt_addr_t base_addr;
149         int node;
150
151 #ifdef CONFIG_OF_CONTROL
152         node = decode_sromc(gd->fdt_blob, &config);
153         if (node < 0) {
154                 debug("%s: Could not find sromc configuration\n", __func__);
155                 return 0;
156         }
157         node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
158         if (node < 0) {
159                 debug("%s: Could not find lan9215 configuration\n", __func__);
160                 return 0;
161         }
162
163         /* We now have a node, so any problems from now on are errors */
164         base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
165         if (base_addr == FDT_ADDR_T_NONE) {
166                 debug("%s: Could not find lan9215 address\n", __func__);
167                 return -1;
168         }
169 #else
170         /* Non-FDT configuration - bank number and timing parameters*/
171         config.bank = CONFIG_ENV_SROM_BANK;
172         config.width = 2;
173
174         config.timing[FDT_SROM_TACS] = 0x01;
175         config.timing[FDT_SROM_TCOS] = 0x01;
176         config.timing[FDT_SROM_TACC] = 0x06;
177         config.timing[FDT_SROM_TCOH] = 0x01;
178         config.timing[FDT_SROM_TAH] = 0x0C;
179         config.timing[FDT_SROM_TACP] = 0x09;
180         config.timing[FDT_SROM_PMC] = 0x01;
181         base_addr = CONFIG_SMC911X_BASE;
182 #endif
183
184         /* Ethernet needs data bus width of 16 bits */
185         if (config.width != 2) {
186                 debug("%s: Unsupported bus width %d\n", __func__,
187                         config.width);
188                 return -1;
189         }
190         smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
191                         | SROMC_BYTE_ENABLE(config.bank);
192
193         smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS])   |\
194                         SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
195                         SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
196                         SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
197                         SROMC_BC_TAH(config.timing[FDT_SROM_TAH])   |\
198                         SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
199                         SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
200
201         /* Select and configure the SROMC bank */
202         exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
203         s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
204         return smc911x_initialize(0, base_addr);
205 #endif
206         return 0;
207 }
208
209 #ifdef CONFIG_DISPLAY_BOARDINFO
210 int checkboard(void)
211 {
212         printf("\nBoard: SMDK5250\n");
213
214         return 0;
215 }
216 #endif
217
218 #ifdef CONFIG_GENERIC_MMC
219 int board_mmc_init(bd_t *bis)
220 {
221         int err;
222
223         err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
224         if (err) {
225                 debug("SDMMC0 not configured\n");
226                 return err;
227         }
228
229         err = s5p_mmc_init(0, 8);
230         return err;
231 }
232 #endif
233
234 static int board_uart_init(void)
235 {
236         int err;
237
238         err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
239         if (err) {
240                 debug("UART0 not configured\n");
241                 return err;
242         }
243
244         err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
245         if (err) {
246                 debug("UART1 not configured\n");
247                 return err;
248         }
249
250         err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
251         if (err) {
252                 debug("UART2 not configured\n");
253                 return err;
254         }
255
256         err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
257         if (err) {
258                 debug("UART3 not configured\n");
259                 return err;
260         }
261
262         return 0;
263 }
264
265 #ifdef CONFIG_BOARD_EARLY_INIT_F
266 int board_early_init_f(void)
267 {
268         int err;
269         err = board_uart_init();
270         if (err) {
271                 debug("UART init failed\n");
272                 return err;
273         }
274 #ifdef CONFIG_SYS_I2C_INIT_BOARD
275         board_i2c_init(gd->fdt_blob);
276 #endif
277         return err;
278 }
279 #endif