2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
19 #include <power/pmic.h>
21 #include <usb/s3c_udc.h>
22 #include <asm/arch/cpu.h>
23 #include <power/max8998_pmic.h>
25 #include <samsung/misc.h>
26 #include <usb_mass_storage.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 unsigned int board_rev;
32 u32 get_board_rev(void)
37 static int get_hwrev(void)
39 return board_rev & 0xFF;
42 static void init_pmic_lcd(void);
44 int exynos_power_init(void)
49 * For PMIC the I2C bus is named as I2C5, but it is connected
50 * to logical I2C adapter 0
52 ret = pmic_init(I2C_0);
61 static unsigned short get_adc_value(int channel)
63 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
64 unsigned short ret = 0;
66 unsigned int loop = 0;
68 writel(channel & 0xF, &adc->adcmux);
69 writel((1 << 14) | (49 << 6), &adc->adccon);
70 writel(1000 & 0xffff, &adc->adcdly);
71 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
73 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
78 reg = readl(&adc->adccon);
79 } while (!(reg & (1 << 15)) && (loop++ < 1000));
81 ret = readl(&adc->adcdat0) & 0xFFF;
86 static int adc_power_control(int on)
89 struct pmic *p = pmic_get("MAX8998_PMIC");
96 ret = pmic_set_output(p,
103 static unsigned int get_hw_revision(void)
105 int hwrev, mode0, mode1;
107 adc_power_control(1);
109 mode0 = get_adc_value(1); /* HWREV_MODE0 */
110 mode1 = get_adc_value(2); /* HWREV_MODE1 */
113 * XXX Always set the default hwrev as the latest board
114 * ADC = (voltage) / 3.3 * 4096
118 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
119 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
120 hwrev = 0x0; /* 0.01V 0.01V */
121 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x1; /* 610mV 0.01V */
123 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
124 hwrev = 0x2; /* 1.16V 0.01V */
125 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
126 hwrev = 0x3; /* 1.79V 0.01V */
129 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
131 adc_power_control(0);
136 static void check_hw_revision(void)
140 hwrev = get_hw_revision();
145 #ifdef CONFIG_USB_GADGET
146 static int s5pc210_phy_control(int on)
149 struct pmic *p = pmic_get("MAX8998_PMIC");
157 ret |= pmic_set_output(p,
158 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
159 MAX8998_SAFEOUT1, LDO_ON);
160 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
161 MAX8998_LDO3, LDO_ON);
162 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
163 MAX8998_LDO8, LDO_ON);
166 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
167 MAX8998_LDO8, LDO_OFF);
168 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
169 MAX8998_LDO3, LDO_OFF);
170 ret |= pmic_set_output(p,
171 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
172 MAX8998_SAFEOUT1, LDO_OFF);
176 puts("MAX8998 LDO setting error!\n");
183 struct s3c_plat_otg_data s5pc210_otg_data = {
184 .phy_control = s5pc210_phy_control,
185 .regs_phy = EXYNOS4_USBPHY_BASE,
186 .regs_otg = EXYNOS4_USBOTG_BASE,
187 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
188 .usb_flags = PHY0_SLEEP,
192 int board_usb_init(int index, enum usb_init_type init)
194 debug("USB_udc_probe\n");
195 return s3c_udc_probe(&s5pc210_otg_data);
198 #ifdef CONFIG_USB_CABLE_CHECK
199 int usb_cable_connected(void)
205 int exynos_early_init_f(void)
212 #ifdef CONFIG_SOFT_SPI
213 static void soft_spi_init(void)
215 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
216 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
217 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
218 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
219 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
220 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
223 void spi_cs_activate(struct spi_slave *slave)
225 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
226 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
228 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
229 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
232 void spi_cs_deactivate(struct spi_slave *slave)
234 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
235 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
238 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
240 return bus == 0 && cs == 0;
243 void universal_spi_scl(int bit)
245 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
248 void universal_spi_sda(int bit)
250 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
253 int universal_spi_read(void)
255 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
259 static void init_pmic_lcd(void)
264 struct pmic *p = pmic_get("MAX8998_PMIC");
273 val = 0x02; /* (1800 - 1600) / 100; */
274 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
277 val = 0xe; /* (3000 - 1600) / 100; */
278 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
280 /* Disable unneeded regulators */
283 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
284 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
287 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
290 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
291 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
294 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
297 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
298 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
301 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
304 puts("LCD pmic initialisation error!\n");
307 void exynos_cfg_lcd_gpio(void)
309 unsigned int i, f3_end = 4;
311 for (i = 0; i < 8; i++) {
312 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
313 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
314 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
315 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
316 /* pull-up/down disable */
317 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
318 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
319 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
321 /* drive strength to max (24bit) */
322 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
323 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
324 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
325 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
326 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
327 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
330 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
331 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
332 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
333 /* pull-up/down disable */
334 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
335 /* drive strength to max (24bit) */
336 gpio_set_drv(i, S5P_GPIO_DRV_4X);
337 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
340 /* gpio pad configuration for LCD reset. */
341 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
351 void exynos_reset_lcd(void)
353 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
355 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
357 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
361 void exynos_lcd_power_on(void)
363 struct pmic *p = pmic_get("MAX8998_PMIC");
371 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
372 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
375 void exynos_cfg_ldo(void)
380 void exynos_enable_ldo(unsigned int onoff)
382 ld9040_enable_ldo(onoff);
385 int exynos_init(void)
387 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
389 switch (get_hwrev()) {
392 * Set the low to enable LDO_EN
393 * But when you use the test board for eMMC booting
394 * you should set it HIGH since it removes the inverter
396 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
397 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
401 * Default reset state is High and there's no inverter
402 * But set it as HIGH to ensure
404 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
405 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
409 #ifdef CONFIG_SOFT_SPI
413 printf("HW Revision:\t0x%x\n", board_rev);
418 void exynos_lcd_misc_init(vidinfo_t *vid)
421 get_tizen_logo_info(vid);
425 vid->pclk_name = 1; /* MPLL */
428 setenv("lcdinfo", "lcd=ld9040");