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1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated, <www.ti.com>
4  * Aneesh V       <aneesh@ti.com>
5  * Steve Sakoman  <steve@sakoman.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 #include <common.h>
10 #include <palmas.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/arch/mmc_host_def.h>
13 #include <tca642x.h>
14
15 #include "mux_data.h"
16
17 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
18 #include <sata.h>
19 #include <usb.h>
20 #include <asm/gpio.h>
21 #include <asm/arch/clock.h>
22 #include <asm/arch/ehci.h>
23 #include <asm/ehci-omap.h>
24 #include <asm/arch/sata.h>
25
26 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
27 #define DIE_ID_REG_OFFSET       0x200
28
29 #endif
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 const struct omap_sysinfo sysinfo = {
34         "Board: OMAP5432 uEVM\n"
35 };
36
37 /**
38  * @brief tca642x_init - uEVM default values for the GPIO expander
39  * input reg, output reg, polarity reg, configuration reg
40  */
41 struct tca642x_bank_info tca642x_init[] = {
42         { .input_reg = 0x00,
43           .output_reg = 0x04,
44           .polarity_reg = 0x00,
45           .configuration_reg = 0x80 },
46         { .input_reg = 0x00,
47           .output_reg = 0x00,
48           .polarity_reg = 0x00,
49           .configuration_reg = 0xff },
50         { .input_reg = 0x00,
51           .output_reg = 0x00,
52           .polarity_reg = 0x00,
53           .configuration_reg = 0x40 },
54 };
55
56 /**
57  * @brief board_init
58  *
59  * @return 0
60  */
61 int board_init(void)
62 {
63         gpmc_init();
64         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
65         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
66
67         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
68
69         return 0;
70 }
71
72 int board_eth_init(bd_t *bis)
73 {
74         return 0;
75 }
76
77 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
78 static void enable_host_clocks(void)
79 {
80         int auxclk;
81         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
82                                 OPTFCLKEN_HSIC480M_P3_CLK |
83                                 OPTFCLKEN_HSIC60M_P2_CLK |
84                                 OPTFCLKEN_HSIC480M_P2_CLK |
85                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
86
87         /* Enable port 2 and 3 clocks*/
88         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
89
90         /* Enable port 2 and 3 usb host ports tll clocks*/
91         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
92                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
93 #ifdef CONFIG_USB_XHCI_OMAP
94         /* Enable the USB OTG Super speed clocks */
95         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
96                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
97 #endif
98
99         auxclk = readl((*prcm)->scrm_auxclk1);
100         /* Request auxilary clock */
101         auxclk |= AUXCLK_ENABLE_MASK;
102         writel(auxclk, (*prcm)->scrm_auxclk1);
103 }
104 #endif
105
106 /**
107  * @brief misc_init_r - Configure EVM board specific configurations
108  * such as power configurations, ethernet initialization as phase2 of
109  * boot sequence
110  *
111  * @return 0
112  */
113 int misc_init_r(void)
114 {
115         int reg;
116         u32 id[4];
117
118 #ifdef CONFIG_PALMAS_POWER
119         palmas_init_settings();
120 #endif
121
122         reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
123
124         id[0] = readl(reg);
125         id[1] = readl(reg + 0x8);
126         id[2] = readl(reg + 0xC);
127         id[3] = readl(reg + 0x10);
128         usb_fake_mac_from_die_id(id);
129
130         return 0;
131 }
132
133 void set_muxconf_regs_essential(void)
134 {
135         do_set_mux((*ctrl)->control_padconf_core_base,
136                    core_padconf_array_essential,
137                    sizeof(core_padconf_array_essential) /
138                    sizeof(struct pad_conf_entry));
139
140         do_set_mux((*ctrl)->control_padconf_wkup_base,
141                    wkup_padconf_array_essential,
142                    sizeof(wkup_padconf_array_essential) /
143                    sizeof(struct pad_conf_entry));
144 }
145
146 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
147 int board_mmc_init(bd_t *bis)
148 {
149         omap_mmc_init(0, 0, 0, -1, -1);
150         omap_mmc_init(1, 0, 0, -1, -1);
151         return 0;
152 }
153 #endif
154
155 #ifdef CONFIG_USB_EHCI
156 static struct omap_usbhs_board_data usbhs_bdata = {
157         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
158         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
159         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
160 };
161
162 int ehci_hcd_init(int index, enum usb_init_type init,
163                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
164 {
165         int ret;
166
167         enable_host_clocks();
168
169         ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
170         if (ret < 0) {
171                 puts("Failed to initialize ehci\n");
172                 return ret;
173         }
174
175         return 0;
176 }
177
178 int ehci_hcd_stop(void)
179 {
180         int ret;
181
182         ret = omap_ehci_hcd_stop();
183         return ret;
184 }
185
186 void usb_hub_reset_devices(int port)
187 {
188         /* The LAN9730 needs to be reset after the port power has been set. */
189         if (port == 3) {
190                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
191                 udelay(10);
192                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
193         }
194 }
195 #endif
196
197 #ifdef CONFIG_USB_XHCI_OMAP
198 /**
199  * @brief board_usb_init - Configure EVM board specific configurations
200  * for the LDO's and clocks for the USB blocks.
201  *
202  * @return 0
203  */
204 int board_usb_init(int index, enum usb_init_type init)
205 {
206         int ret;
207 #ifdef CONFIG_PALMAS_USB_SS_PWR
208         ret = palmas_enable_ss_ldo();
209 #endif
210
211         enable_host_clocks();
212
213         return 0;
214 }
215 #endif