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Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
[karo-tx-uboot.git] / board / vpac270 / vpac270.c
1 /*
2  * Voipac PXA270 Support
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 #include <common.h>
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/regs-mmc.h>
25 #include <asm/arch/pxa.h>
26 #include <netdev.h>
27 #include <serial.h>
28 #include <asm/io.h>
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 /*
33  * Miscelaneous platform dependent initialisations
34  */
35 int board_init(void)
36 {
37         /* We have RAM, disable cache */
38         dcache_disable();
39         icache_disable();
40
41         /* memory and cpu-speed are setup before relocation */
42         /* so we do _nothing_ here */
43
44         /* Arch number of vpac270 */
45         gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
46
47         /* adress of boot parameters */
48         gd->bd->bi_boot_params = 0xa0000100;
49
50         return 0;
51 }
52
53 struct serial_device *default_serial_console(void)
54 {
55         return &serial_ffuart_device;
56 }
57
58 int dram_init(void)
59 {
60 #ifndef CONFIG_ONENAND
61         pxa2xx_dram_init();
62 #endif
63         gd->ram_size = PHYS_SDRAM_1_SIZE;
64         return 0;
65 }
66
67 void dram_init_banksize(void)
68 {
69         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
70         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
71
72 #ifdef  CONFIG_RAM_256M
73         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
74         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
75 #endif
76 }
77
78 #ifdef  CONFIG_CMD_MMC
79 int board_mmc_init(bd_t *bis)
80 {
81         pxa_mmc_register(0);
82         return 0;
83 }
84 #endif
85
86 #ifdef  CONFIG_CMD_USB
87 int usb_board_init(void)
88 {
89         writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
90                 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
91                 UHCHR);
92
93         writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
94
95         while (readl(UHCHR) & UHCHR_FSBIR)
96                 ;
97
98         writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
99         writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
100
101         /* Clear any OTG Pin Hold */
102         if (readl(PSSR) & PSSR_OTGPH)
103                 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
104
105         writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
106         writel(readl(UHCRHDA) | 0x100, UHCRHDA);
107
108         /* Set port power control mask bits, only 3 ports. */
109         writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
110
111         /* enable port 2 */
112         writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
113                 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
114
115         return 0;
116 }
117
118 void usb_board_init_fail(void)
119 {
120         return;
121 }
122
123 void usb_board_stop(void)
124 {
125         writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
126         udelay(11);
127         writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
128
129         writel(readl(UHCCOMS) | 1, UHCCOMS);
130         udelay(10);
131
132         writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
133
134         return;
135 }
136 #endif
137
138 #ifdef CONFIG_DRIVER_DM9000
139 int board_eth_init(bd_t *bis)
140 {
141         return dm9000_initialize(bis);
142 }
143 #endif