board/xes/common/actl_nand.c

   1 /*
   2  * Copyright 2008 Extreme Engineering Solutions, Inc.
   3  *
   4  * This driver support NAND devices which have address lines
   5  * connected as ALE and CLE inputs.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <nand.h>
  28 #include <asm/io.h>
  29
  30 /*
  31  * Hardware specific access to control-lines
  32  */
  33 static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
  34 {
  35         struct nand_chip *this = mtd->priv;
  36         ulong IO_ADDR_W;
  37
  38         if (ctrl & NAND_CTRL_CHANGE) {
  39                 IO_ADDR_W = (ulong)this->IO_ADDR_W;
  40
  41                 IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE |
  42                                 CONFIG_SYS_NAND_ACTL_ALE |
  43                                 CONFIG_SYS_NAND_ACTL_NCE);
  44                 if (ctrl & NAND_CLE)
  45                         IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE;
  46                 if (ctrl & NAND_ALE)
  47                         IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE;
  48                 if (ctrl & NAND_NCE)
  49                         IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE;
  50
  51                 this->IO_ADDR_W = (void *)IO_ADDR_W;
  52         }
  53
  54         if (cmd != NAND_CMD_NONE)
  55                 writeb(cmd, this->IO_ADDR_W);
  56 }
  57
  58 int board_nand_init(struct nand_chip *nand)
  59 {
  60         nand->ecc.mode = NAND_ECC_SOFT;
  61         nand->cmd_ctrl = nand_addr_hwcontrol;
  62         nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY;
  63
  64         return 0;
  65 }