drivers/i2c/bfin-twi_i2c.c

   1 /*
   2  * i2c.c - driver for Blackfin on-chip TWI/I2C
   3  *
   4  * Copyright (c) 2006-2008 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <i2c.h>
  11
  12 #include <asm/blackfin.h>
  13 #include <asm/mach-common/bits/twi.h>
  14
  15 #ifdef DEBUG
  16 # define dmemset(s, c, n) memset(s, c, n)
  17 #else
  18 # define dmemset(s, c, n)
  19 #endif
  20 #define debugi(fmt, args...) \
  21         debug( \
  22                 "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t" \
  23                 "%-20s:%-3i: " fmt "\n", \
  24                 bfin_read_TWI_MASTER_STAT(), bfin_read_TWI_FIFO_STAT(), bfin_read_TWI_INT_STAT(), \
  25                 __func__, __LINE__, ## args)
  26
  27 #ifdef TWI0_CLKDIV
  28 #define bfin_write_TWI_CLKDIV(val)           bfin_write_TWI0_CLKDIV(val)
  29 #define bfin_read_TWI_CLKDIV(val)            bfin_read_TWI0_CLKDIV(val)
  30 #define bfin_write_TWI_CONTROL(val)          bfin_write_TWI0_CONTROL(val)
  31 #define bfin_read_TWI_CONTROL(val)           bfin_read_TWI0_CONTROL(val)
  32 #define bfin_write_TWI_MASTER_ADDR(val)      bfin_write_TWI0_MASTER_ADDR(val)
  33 #define bfin_write_TWI_XMT_DATA8(val)        bfin_write_TWI0_XMT_DATA8(val)
  34 #define bfin_read_TWI_RCV_DATA8()            bfin_read_TWI0_RCV_DATA8()
  35 #define bfin_read_TWI_INT_STAT()             bfin_read_TWI0_INT_STAT()
  36 #define bfin_write_TWI_INT_STAT(val)         bfin_write_TWI0_INT_STAT(val)
  37 #define bfin_read_TWI_MASTER_STAT()          bfin_read_TWI0_MASTER_STAT()
  38 #define bfin_write_TWI_MASTER_STAT(val)      bfin_write_TWI0_MASTER_STAT(val)
  39 #define bfin_read_TWI_MASTER_CTL()           bfin_read_TWI0_MASTER_CTL()
  40 #define bfin_write_TWI_MASTER_CTL(val)       bfin_write_TWI0_MASTER_CTL(val)
  41 #define bfin_write_TWI_INT_MASK(val)         bfin_write_TWI0_INT_MASK(val)
  42 #define bfin_write_TWI_FIFO_CTL(val)         bfin_write_TWI0_FIFO_CTL(val)
  43 #endif
  44
  45 #ifdef CONFIG_TWICLK_KHZ
  46 # error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
  47 #endif
  48
  49 /*
  50  * The way speed is changed into duty often results in integer truncation
  51  * with 50% duty, so we'll force rounding up to the next duty by adding 1
  52  * to the max.  In practice this will get us a speed of something like
  53  * 385 KHz.  The other limit is easy to handle as it is only 8 bits.
  54  */
  55 #define I2C_SPEED_MAX             400000
  56 #define I2C_SPEED_TO_DUTY(speed)  (5000000 / (speed))
  57 #define I2C_DUTY_MAX              (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1)
  58 #define I2C_DUTY_MIN              0xff  /* 8 bit limited */
  59 #define SYS_I2C_DUTY              I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
  60 /* Note: duty is inverse of speed, so the comparisons below are correct */
  61 #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
  62 # error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
  63 #endif
  64
  65 /* All transfers are described by this data structure */
  66 struct i2c_msg {
  67         u8 flags;
  68 #define I2C_M_COMBO             0x4
  69 #define I2C_M_STOP              0x2
  70 #define I2C_M_READ              0x1
  71         int len;                /* msg length */
  72         u8 *buf;                /* pointer to msg data */
  73         int alen;               /* addr length */
  74         u8 *abuf;               /* addr buffer */
  75 };
  76
  77 /* Allow msec timeout per ~byte transfer */
  78 #define I2C_TIMEOUT 10
  79
  80 /**
  81  * wait_for_completion - manage the actual i2c transfer
  82  *      @msg: the i2c msg
  83  */
  84 static int wait_for_completion(struct i2c_msg *msg)
  85 {
  86         uint16_t int_stat;
  87         ulong timebase = get_timer(0);
  88
  89         do {
  90                 int_stat = bfin_read_TWI_INT_STAT();
  91
  92                 if (int_stat & XMTSERV) {
  93                         debugi("processing XMTSERV");
  94                         bfin_write_TWI_INT_STAT(XMTSERV);
  95                         SSYNC();
  96                         if (msg->alen) {
  97                                 bfin_write_TWI_XMT_DATA8(*(msg->abuf++));
  98                                 --msg->alen;
  99                         } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
 100                                 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
 101                                 --msg->len;
 102                         } else {
 103                                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() |
 104                                         (msg->flags & I2C_M_COMBO ? RSTART | MDIR : STOP));
 105                                 SSYNC();
 106                         }
 107                 }
 108                 if (int_stat & RCVSERV) {
 109                         debugi("processing RCVSERV");
 110                         bfin_write_TWI_INT_STAT(RCVSERV);
 111                         SSYNC();
 112                         if (msg->len) {
 113                                 *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
 114                                 --msg->len;
 115                         } else if (msg->flags & I2C_M_STOP) {
 116                                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | STOP);
 117                                 SSYNC();
 118                         }
 119                 }
 120                 if (int_stat & MERR) {
 121                         debugi("processing MERR");
 122                         bfin_write_TWI_INT_STAT(MERR);
 123                         SSYNC();
 124                         return msg->len;
 125                 }
 126                 if (int_stat & MCOMP) {
 127                         debugi("processing MCOMP");
 128                         bfin_write_TWI_INT_STAT(MCOMP);
 129                         SSYNC();
 130                         if (msg->flags & I2C_M_COMBO && msg->len) {
 131                                 bfin_write_TWI_MASTER_CTL((bfin_read_TWI_MASTER_CTL() & ~RSTART) |
 132                                         (min(msg->len, 0xff) << 6) | MEN | MDIR);
 133                                 SSYNC();
 134                         } else
 135                                 break;
 136                 }
 137
 138                 /* If we were able to do something, reset timeout */
 139                 if (int_stat)
 140                         timebase = get_timer(0);
 141
 142         } while (get_timer(timebase) < I2C_TIMEOUT);
 143
 144         return msg->len;
 145 }
 146
 147 /**
 148  * i2c_transfer - setup an i2c transfer
 149  *      @return: 0 if things worked, non-0 if things failed
 150  *
 151  *      Here we just get the i2c stuff all prepped and ready, and then tail off
 152  *      into wait_for_completion() for all the bits to go.
 153  */
 154 static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len, u8 flags)
 155 {
 156         uchar addr_buffer[] = {
 157                 (addr >>  0),
 158                 (addr >>  8),
 159                 (addr >> 16),
 160         };
 161         struct i2c_msg msg = {
 162                 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
 163                 .buf   = buffer,
 164                 .len   = len,
 165                 .abuf  = addr_buffer,
 166                 .alen  = alen,
 167         };
 168         int ret;
 169
 170         dmemset(buffer, 0xff, len);
 171         debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i flags=0x%02x[%s] ",
 172                 chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
 173
 174         /* wait for things to settle */
 175         while (bfin_read_TWI_MASTER_STAT() & BUSBUSY)
 176                 if (ctrlc())
 177                         return 1;
 178
 179         /* Set Transmit device address */
 180         bfin_write_TWI_MASTER_ADDR(chip);
 181
 182         /* Clear the FIFO before starting things */
 183         bfin_write_TWI_FIFO_CTL(XMTFLUSH | RCVFLUSH);
 184         SSYNC();
 185         bfin_write_TWI_FIFO_CTL(0);
 186         SSYNC();
 187
 188         /* prime the pump */
 189         if (msg.alen) {
 190                 len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
 191                 debugi("first byte=0x%02x", *msg.abuf);
 192                 bfin_write_TWI_XMT_DATA8(*(msg.abuf++));
 193                 --msg.alen;
 194         } else if (!(msg.flags & I2C_M_READ) && msg.len) {
 195                 debugi("first byte=0x%02x", *msg.buf);
 196                 bfin_write_TWI_XMT_DATA8(*(msg.buf++));
 197                 --msg.len;
 198         }
 199
 200         /* clear int stat */
 201         bfin_write_TWI_MASTER_STAT(-1);
 202         bfin_write_TWI_INT_STAT(-1);
 203         bfin_write_TWI_INT_MASK(0);
 204         SSYNC();
 205
 206         /* Master enable */
 207         bfin_write_TWI_MASTER_CTL(
 208                         (bfin_read_TWI_MASTER_CTL() & FAST) |
 209                         (min(len, 0xff) << 6) | MEN |
 210                         ((msg.flags & I2C_M_READ) ? MDIR : 0)
 211         );
 212         SSYNC();
 213         debugi("CTL=0x%04x", bfin_read_TWI_MASTER_CTL());
 214
 215         /* process the rest */
 216         ret = wait_for_completion(&msg);
 217         debugi("ret=%d", ret);
 218
 219         if (ret) {
 220                 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & ~MEN);
 221                 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA);
 222                 SSYNC();
 223                 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
 224                 SSYNC();
 225         }
 226
 227         return ret;
 228 }
 229
 230 /**
 231  * i2c_set_bus_speed - set i2c bus speed
 232  *      @speed: bus speed (in HZ)
 233  */
 234 int i2c_set_bus_speed(unsigned int speed)
 235 {
 236         u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
 237
 238         /* Set TWI interface clock */
 239         if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
 240                 return -1;
 241         bfin_write_TWI_CLKDIV((clkdiv << 8) | (clkdiv & 0xff));
 242
 243         /* Don't turn it on */
 244         bfin_write_TWI_MASTER_CTL(speed > 100000 ? FAST : 0);
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * i2c_get_bus_speed - get i2c bus speed
 251  *      @speed: bus speed (in HZ)
 252  */
 253 unsigned int i2c_get_bus_speed(void)
 254 {
 255         /* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
 256         return 5000000 / (bfin_read_TWI_CLKDIV() & 0xff);
 257 }
 258
 259 /**
 260  * i2c_init - initialize the i2c bus
 261  *      @speed: bus speed (in HZ)
 262  *      @slaveaddr: address of device in slave mode (0 - not slave)
 263  *
 264  *      Slave mode isn't actually implemented.  It'll stay that way until
 265  *      we get a real request for it.
 266  */
 267 void i2c_init(int speed, int slaveaddr)
 268 {
 269         uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
 270
 271         /* Set TWI internal clock as 10MHz */
 272         bfin_write_TWI_CONTROL(prescale);
 273
 274         /* Set TWI interface clock as specified */
 275         i2c_set_bus_speed(speed);
 276
 277         /* Enable it */
 278         bfin_write_TWI_CONTROL(TWI_ENA | prescale);
 279         SSYNC();
 280
 281         debugi("CONTROL:0x%04x CLKDIV:0x%04x",
 282                 bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
 283
 284 #if CONFIG_SYS_I2C_SLAVE
 285 # error I2C slave support not tested/supported
 286         /* If they want us as a slave, do it */
 287         if (slaveaddr) {
 288                 bfin_write_TWI_SLAVE_ADDR(slaveaddr);
 289                 bfin_write_TWI_SLAVE_CTL(SEN);
 290         }
 291 #endif
 292 }
 293
 294 /**
 295  * i2c_probe - test if a chip exists at a given i2c address
 296  *      @chip: i2c chip addr to search for
 297  *      @return: 0 if found, non-0 if not found
 298  */
 299 int i2c_probe(uchar chip)
 300 {
 301         u8 byte;
 302         return i2c_read(chip, 0, 0, &byte, 1);
 303 }
 304
 305 /**
 306  * i2c_read - read data from an i2c device
 307  *      @chip: i2c chip addr
 308  *      @addr: memory (register) address in the chip
 309  *      @alen: byte size of address
 310  *      @buffer: buffer to store data read from chip
 311  *      @len: how many bytes to read
 312  *      @return: 0 on success, non-0 on failure
 313  */
 314 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 315 {
 316         return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
 317 }
 318
 319 /**
 320  * i2c_write - write data to an i2c device
 321  *      @chip: i2c chip addr
 322  *      @addr: memory (register) address in the chip
 323  *      @alen: byte size of address
 324  *      @buffer: buffer holding data to write to chip
 325  *      @len: how many bytes to write
 326  *      @return: 0 on success, non-0 on failure
 327  */
 328 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 329 {
 330         return i2c_transfer(chip, addr, alen, buffer, len, 0);
 331 }