]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - drivers/i2c/omap24xx_i2c.c
Merge branch 'next' of ../next
[karo-tx-uboot.git] / drivers / i2c / omap24xx_i2c.c
1 /*
2  * Basic I2C functions
3  *
4  * Copyright (c) 2004 Texas Instruments
5  *
6  * This package is free software;  you can redistribute it and/or
7  * modify it under the terms of the license found in the file
8  * named COPYING that should have accompanied this file.
9  *
10  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
13  *
14  * Author: Jian Zhang jzhang@ti.com, Texas Instruments
15  *
16  * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17  * Rewritten to fit into the current U-Boot framework
18  *
19  * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
20  *
21  */
22
23 #include <common.h>
24
25 #include <asm/arch/i2c.h>
26 #include <asm/io.h>
27
28 #include "omap24xx_i2c.h"
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 #define I2C_TIMEOUT     1000
33
34 static void wait_for_bb (void);
35 static u16 wait_for_pin (void);
36 static void flush_fifo(void);
37
38 static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
39
40 static unsigned int bus_initialized[I2C_BUS_MAX];
41 static unsigned int current_bus;
42
43 void i2c_init (int speed, int slaveadd)
44 {
45         int psc, fsscll, fssclh;
46         int hsscll = 0, hssclh = 0;
47         u32 scll, sclh;
48         int timeout = I2C_TIMEOUT;
49
50         /* Only handle standard, fast and high speeds */
51         if ((speed != OMAP_I2C_STANDARD) &&
52             (speed != OMAP_I2C_FAST_MODE) &&
53             (speed != OMAP_I2C_HIGH_SPEED)) {
54                 printf("Error : I2C unsupported speed %d\n", speed);
55                 return;
56         }
57
58         psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
59         psc -= 1;
60         if (psc < I2C_PSC_MIN) {
61                 printf("Error : I2C unsupported prescalar %d\n", psc);
62                 return;
63         }
64
65         if (speed == OMAP_I2C_HIGH_SPEED) {
66                 /* High speed */
67
68                 /* For first phase of HS mode */
69                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
70                         (2 * OMAP_I2C_FAST_MODE);
71
72                 fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
73                 fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
74                 if (((fsscll < 0) || (fssclh < 0)) ||
75                     ((fsscll > 255) || (fssclh > 255))) {
76                         printf("Error : I2C initializing first phase clock\n");
77                         return;
78                 }
79
80                 /* For second phase of HS mode */
81                 hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
82
83                 hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
84                 hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
85                 if (((fsscll < 0) || (fssclh < 0)) ||
86                     ((fsscll > 255) || (fssclh > 255))) {
87                         printf("Error : I2C initializing second phase clock\n");
88                         return;
89                 }
90
91                 scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
92                 sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh;
93
94         } else {
95                 /* Standard and fast speed */
96                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
97
98                 fsscll -= I2C_FASTSPEED_SCLL_TRIM;
99                 fssclh -= I2C_FASTSPEED_SCLH_TRIM;
100                 if (((fsscll < 0) || (fssclh < 0)) ||
101                     ((fsscll > 255) || (fssclh > 255))) {
102                         printf("Error : I2C initializing clock\n");
103                         return;
104                 }
105
106                 scll = (unsigned int)fsscll;
107                 sclh = (unsigned int)fssclh;
108         }
109
110         if (readw (&i2c_base->con) & I2C_CON_EN) {
111                 writew (0, &i2c_base->con);
112                 udelay (50000);
113         }
114
115         writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */
116         udelay(1000);
117
118         writew(I2C_CON_EN, &i2c_base->con);
119         while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
120                 if (timeout <= 0) {
121                         printf("ERROR: Timeout in soft-reset\n");
122                         return;
123                 }
124                 udelay(1000);
125         }
126
127         writew(0, &i2c_base->con);
128         writew(psc, &i2c_base->psc);
129         writew(scll, &i2c_base->scll);
130         writew(sclh, &i2c_base->sclh);
131
132         /* own address */
133         writew (slaveadd, &i2c_base->oa);
134         writew (I2C_CON_EN, &i2c_base->con);
135
136         /* have to enable intrrupts or OMAP i2c module doesn't work */
137         writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
138                 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
139         udelay (1000);
140         flush_fifo();
141         writew (0xFFFF, &i2c_base->stat);
142         writew (0, &i2c_base->cnt);
143
144         if (gd->flags & GD_FLG_RELOC)
145                 bus_initialized[current_bus] = 1;
146 }
147
148 static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
149 {
150         int i2c_error = 0;
151         u16 status;
152
153         /* wait until bus not busy */
154         wait_for_bb ();
155
156         /* one byte only */
157         writew (1, &i2c_base->cnt);
158         /* set slave address */
159         writew (devaddr, &i2c_base->sa);
160         /* no stop bit needed here */
161         writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, &i2c_base->con);
162
163         /* send register offset */
164         while (1) {
165                 status = wait_for_pin();
166                 if (status == 0 || status & I2C_STAT_NACK) {
167                         i2c_error = 1;
168                         goto read_exit;
169                 }
170                 if (status & I2C_STAT_XRDY) {
171                         /* Important: have to use byte access */
172                         writeb(regoffset, &i2c_base->data);
173                         writew(I2C_STAT_XRDY, &i2c_base->stat);
174                 }
175                 if (status & I2C_STAT_ARDY) {
176                         writew(I2C_STAT_ARDY, &i2c_base->stat);
177                         break;
178                 }
179         }
180
181         /* set slave address */
182         writew(devaddr, &i2c_base->sa);
183         /* read one byte from slave */
184         writew(1, &i2c_base->cnt);
185         /* need stop bit here */
186         writew(I2C_CON_EN | I2C_CON_MST |
187                 I2C_CON_STT | I2C_CON_STP,
188                 &i2c_base->con);
189
190         /* receive data */
191         while (1) {
192                 status = wait_for_pin();
193                 if (status == 0 || status & I2C_STAT_NACK) {
194                         i2c_error = 1;
195                         goto read_exit;
196                 }
197                 if (status & I2C_STAT_RRDY) {
198 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
199     defined(CONFIG_OMAP44XX)
200                         *value = readb(&i2c_base->data);
201 #else
202                         *value = readw(&i2c_base->data);
203 #endif
204                         writew(I2C_STAT_RRDY, &i2c_base->stat);
205                 }
206                 if (status & I2C_STAT_ARDY) {
207                         writew(I2C_STAT_ARDY, &i2c_base->stat);
208                         break;
209                 }
210         }
211
212 read_exit:
213         flush_fifo();
214         writew (0xFFFF, &i2c_base->stat);
215         writew (0, &i2c_base->cnt);
216         return i2c_error;
217 }
218
219 static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
220 {
221         int i2c_error = 0;
222         u16 status;
223
224         /* wait until bus not busy */
225         wait_for_bb ();
226
227         /* two bytes */
228         writew (2, &i2c_base->cnt);
229         /* set slave address */
230         writew (devaddr, &i2c_base->sa);
231         /* stop bit needed here */
232         writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
233                 I2C_CON_STP, &i2c_base->con);
234
235         while (1) {
236                 status = wait_for_pin();
237                 if (status == 0 || status & I2C_STAT_NACK) {
238                         i2c_error = 1;
239                         goto write_exit;
240                 }
241                 if (status & I2C_STAT_XRDY) {
242 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
243     defined(CONFIG_OMAP44XX)
244                         /* send register offset */
245                         writeb(regoffset, &i2c_base->data);
246                         writew(I2C_STAT_XRDY, &i2c_base->stat);
247
248                         while (1) {
249                                 status = wait_for_pin();
250                                 if (status == 0 || status & I2C_STAT_NACK) {
251                                         i2c_error = 1;
252                                         goto write_exit;
253                                 }
254                                 if (status & I2C_STAT_XRDY) {
255                                         /* send data */
256                                         writeb(value, &i2c_base->data);
257                                         writew(I2C_STAT_XRDY, &i2c_base->stat);
258                                 }
259                                 if (status & I2C_STAT_ARDY) {
260                                         writew(I2C_STAT_ARDY, &i2c_base->stat);
261                                         break;
262                                 }
263                         }
264                         break;
265 #else
266                         /* send out two bytes */
267                         writew((value << 8) + regoffset, &i2c_base->data);
268                         writew(I2C_STAT_XRDY, &i2c_base->stat);
269 #endif
270                 }
271                 if (status & I2C_STAT_ARDY) {
272                         writew(I2C_STAT_ARDY, &i2c_base->stat);
273                         break;
274                 }
275         }
276
277         wait_for_bb();
278
279         status = readw(&i2c_base->stat);
280         if (status & I2C_STAT_NACK)
281                 i2c_error = 1;
282
283 write_exit:
284         flush_fifo();
285         writew (0xFFFF, &i2c_base->stat);
286         writew (0, &i2c_base->cnt);
287         return i2c_error;
288 }
289
290 static void flush_fifo(void)
291 {       u16 stat;
292
293         /* note: if you try and read data when its not there or ready
294          * you get a bus error
295          */
296         while(1){
297                 stat = readw(&i2c_base->stat);
298                 if(stat == I2C_STAT_RRDY){
299 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
300     defined(CONFIG_OMAP44XX)
301                         readb(&i2c_base->data);
302 #else
303                         readw(&i2c_base->data);
304 #endif
305                         writew(I2C_STAT_RRDY,&i2c_base->stat);
306                         udelay(1000);
307                 }else
308                         break;
309         }
310 }
311
312 int i2c_probe (uchar chip)
313 {
314         u16 status;
315         int res = 1; /* default = fail */
316
317         if (chip == readw (&i2c_base->oa)) {
318                 return res;
319         }
320
321         /* wait until bus not busy */
322         wait_for_bb ();
323
324         /* try to read one byte */
325         writew (1, &i2c_base->cnt);
326         /* set slave address */
327         writew (chip, &i2c_base->sa);
328         /* stop bit needed here */
329         writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c_base->con);
330
331         while (1) {
332                 status = wait_for_pin();
333                 if (status == 0 || status & I2C_STAT_AL) {
334                         res = 1;
335                         goto probe_exit;
336                 }
337                 if (status & I2C_STAT_NACK) {
338                         res = 1;
339                         writew(0xff, &i2c_base->stat);
340                         writew (readw (&i2c_base->con) | I2C_CON_STP, &i2c_base->con);
341                         wait_for_bb ();
342                         break;
343                 }
344                 if (status & I2C_STAT_ARDY) {
345                         writew(I2C_STAT_ARDY, &i2c_base->stat);
346                         break;
347                 }
348                 if (status & I2C_STAT_RRDY) {
349                         res = 0;
350 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
351     defined(CONFIG_OMAP44XX)
352                         readb(&i2c_base->data);
353 #else
354                         readw(&i2c_base->data);
355 #endif
356                         writew(I2C_STAT_RRDY, &i2c_base->stat);
357                 }
358         }
359
360 probe_exit:
361         flush_fifo();
362         writew (0, &i2c_base->cnt); /* don't allow any more data in...we don't want it.*/
363         writew(0xFFFF, &i2c_base->stat);
364         return res;
365 }
366
367 int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
368 {
369         int i;
370
371         if (alen > 1) {
372                 printf ("I2C read: addr len %d not supported\n", alen);
373                 return 1;
374         }
375
376         if (addr + len > 256) {
377                 printf ("I2C read: address out of range\n");
378                 return 1;
379         }
380
381         for (i = 0; i < len; i++) {
382                 if (i2c_read_byte (chip, addr + i, &buffer[i])) {
383                         printf ("I2C read: I/O error\n");
384                         i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
385                         return 1;
386                 }
387         }
388
389         return 0;
390 }
391
392 int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
393 {
394         int i;
395
396         if (alen > 1) {
397                 printf ("I2C read: addr len %d not supported\n", alen);
398                 return 1;
399         }
400
401         if (addr + len > 256) {
402                 printf ("I2C read: address out of range\n");
403                 return 1;
404         }
405
406         for (i = 0; i < len; i++) {
407                 if (i2c_write_byte (chip, addr + i, buffer[i])) {
408                         printf ("I2C read: I/O error\n");
409                         i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
410                         return 1;
411                 }
412         }
413
414         return 0;
415 }
416
417 static void wait_for_bb (void)
418 {
419         int timeout = I2C_TIMEOUT;
420         u16 stat;
421
422         writew(0xFFFF, &i2c_base->stat);         /* clear current interruts...*/
423         while ((stat = readw (&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
424                 writew (stat, &i2c_base->stat);
425                 udelay(1000);
426         }
427
428         if (timeout <= 0) {
429                 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
430                         readw (&i2c_base->stat));
431         }
432         writew(0xFFFF, &i2c_base->stat);         /* clear delayed stuff*/
433 }
434
435 static u16 wait_for_pin (void)
436 {
437         u16 status;
438         int timeout = I2C_TIMEOUT;
439
440         do {
441                 udelay (1000);
442                 status = readw (&i2c_base->stat);
443         } while (  !(status &
444                    (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
445                     I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
446                     I2C_STAT_AL)) && timeout--);
447
448         if (timeout <= 0) {
449                 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
450                         readw (&i2c_base->stat));
451                 writew(0xFFFF, &i2c_base->stat);
452                 status = 0;
453         }
454
455         return status;
456 }
457
458 int i2c_set_bus_num(unsigned int bus)
459 {
460         if ((bus < 0) || (bus >= I2C_BUS_MAX)) {
461                 printf("Bad bus: %d\n", bus);
462                 return -1;
463         }
464
465 #if I2C_BUS_MAX==3
466         if (bus == 2)
467                 i2c_base = (struct i2c *)I2C_BASE3;
468         else
469 #endif
470         if (bus == 1)
471                 i2c_base = (struct i2c *)I2C_BASE2;
472         else
473                 i2c_base = (struct i2c *)I2C_BASE1;
474
475         current_bus = bus;
476
477         if(!bus_initialized[current_bus])
478                 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
479
480         return 0;
481 }
482
483 int i2c_get_bus_num(void)
484 {
485         return (int) current_bus;
486 }