drivers/mmc/mmc.c

   1 /*
   2  * Copyright 2008, Freescale Semiconductor, Inc
   3  * Andy Fleming
   4  *
   5  * Based vaguely on the Linux code
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <errno.h>
  16 #include <mmc.h>
  17 #include <part.h>
  18 #include <malloc.h>
  19 #include <memalign.h>
  20 #include <linux/list.h>
  21 #include <div64.h>
  22 #include "mmc_private.h"
  23
  24 static const unsigned int sd_au_size[] = {
  25         0,              SZ_16K / 512,           SZ_32K / 512,
  26         SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
  27         SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
  28         SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
  29         SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,   SZ_64M / 512,
  30 };
  31
  32 #ifndef CONFIG_DM_MMC_OPS
  33 __weak int board_mmc_getwp(struct mmc *mmc)
  34 {
  35         return -1;
  36 }
  37
  38 int mmc_getwp(struct mmc *mmc)
  39 {
  40         int wp;
  41
  42         wp = board_mmc_getwp(mmc);
  43
  44         if (wp < 0) {
  45                 if (mmc->cfg->ops->getwp)
  46                         wp = mmc->cfg->ops->getwp(mmc);
  47                 else
  48                         wp = 0;
  49         }
  50
  51         return wp;
  52 }
  53
  54 __weak int board_mmc_getcd(struct mmc *mmc)
  55 {
  56         return -1;
  57 }
  58 #endif
  59
  60 #ifdef CONFIG_MMC_TRACE
  61 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  62 {
  63         printf("CMD_SEND:%d\n", cmd->cmdidx);
  64         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  65 }
  66
  67 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  68 {
  69         int i;
  70         u8 *ptr;
  71
  72         if (ret) {
  73                 printf("\t\tRET\t\t\t %d\n", ret);
  74         } else {
  75                 switch (cmd->resp_type) {
  76                 case MMC_RSP_NONE:
  77                         printf("\t\tMMC_RSP_NONE\n");
  78                         break;
  79                 case MMC_RSP_R1:
  80                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  81                                 cmd->response[0]);
  82                         break;
  83                 case MMC_RSP_R1b:
  84                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  85                                 cmd->response[0]);
  86                         break;
  87                 case MMC_RSP_R2:
  88                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  89                                 cmd->response[0]);
  90                         printf("\t\t          \t\t 0x%08X \n",
  91                                 cmd->response[1]);
  92                         printf("\t\t          \t\t 0x%08X \n",
  93                                 cmd->response[2]);
  94                         printf("\t\t          \t\t 0x%08X \n",
  95                                 cmd->response[3]);
  96                         printf("\n");
  97                         printf("\t\t\t\t\tDUMPING DATA\n");
  98                         for (i = 0; i < 4; i++) {
  99                                 int j;
 100                                 printf("\t\t\t\t\t%03d - ", i*4);
 101                                 ptr = (u8 *)&cmd->response[i];
 102                                 ptr += 3;
 103                                 for (j = 0; j < 4; j++)
 104                                         printf("%02X ", *ptr--);
 105                                 printf("\n");
 106                         }
 107                         break;
 108                 case MMC_RSP_R3:
 109                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
 110                                 cmd->response[0]);
 111                         break;
 112                 default:
 113                         printf("\t\tERROR MMC rsp not supported\n");
 114                         break;
 115                 }
 116         }
 117 }
 118
 119 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 120 {
 121         int status;
 122
 123         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 124         printf("CURR STATE:%d\n", status);
 125 }
 126 #endif
 127
 128 #ifndef CONFIG_DM_MMC_OPS
 129 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 130 {
 131         int ret;
 132
 133         mmmc_trace_before_send(mmc, cmd);
 134         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 135         mmmc_trace_after_send(mmc, cmd, ret);
 136
 137         return ret;
 138 }
 139 #endif
 140
 141 int mmc_send_status(struct mmc *mmc, int timeout)
 142 {
 143         struct mmc_cmd cmd;
 144         int err;
 145         int retries = 0;
 146         const int max_tries = 5000;
 147
 148         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 149         cmd.resp_type = MMC_RSP_R1;
 150         if (!mmc_host_is_spi(mmc))
 151                 cmd.cmdarg = mmc->rca << 16;
 152
 153         do {
 154                 err = mmc_send_cmd(mmc, &cmd, NULL);
 155                 if (!err) {
 156                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 157                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 158                              MMC_STATE_PRG)
 159                                 break;
 160                         else if (cmd.response[0] & MMC_STATUS_MASK) {
 161 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 162                                 printf("Status Error: 0x%08X\n",
 163                                         cmd.response[0]);
 164 #endif
 165                                 return -ECOMM;
 166                         }
 167                 }
 168                 if (err == -EBUSY) {
 169                         if (retries == 0)
 170                                 printf("(e)MMC is busy; please wait... ");
 171                         if (retries++ > max_tries)
 172                                 break;
 173                         udelay(10000);
 174                         continue;
 175                 }
 176
 177                 if (timeout-- <= 0)
 178                         break;
 179
 180                 udelay(1000);
 181         } while (err);
 182         if (retries)
 183                 printf("\n");
 184         mmc_trace_state(mmc, &cmd);
 185         if (err) {
 186 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 187                 printf("Timeout waiting for card ready\n");
 188 #endif
 189                 return err;
 190         }
 191
 192         return 0;
 193 }
 194
 195 int mmc_set_blocklen(struct mmc *mmc, int len)
 196 {
 197         struct mmc_cmd cmd;
 198
 199         if (mmc->ddr_mode)
 200                 return 0;
 201
 202         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 203         cmd.resp_type = MMC_RSP_R1;
 204         cmd.cmdarg = len;
 205
 206         return mmc_send_cmd(mmc, &cmd, NULL);
 207 }
 208
 209 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 210                            lbaint_t blkcnt)
 211 {
 212         struct mmc_cmd cmd;
 213         struct mmc_data data;
 214
 215         if (blkcnt > 1)
 216                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 217         else
 218                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 219
 220         if (mmc->high_capacity)
 221                 cmd.cmdarg = start;
 222         else
 223                 cmd.cmdarg = start * mmc->read_bl_len;
 224
 225         cmd.resp_type = MMC_RSP_R1;
 226
 227         data.dest = dst;
 228         data.blocks = blkcnt;
 229         data.blocksize = mmc->read_bl_len;
 230         data.flags = MMC_DATA_READ;
 231
 232         if (mmc_send_cmd(mmc, &cmd, &data))
 233                 return 0;
 234
 235         if (blkcnt > 1) {
 236                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 237                 cmd.cmdarg = 0;
 238                 cmd.resp_type = MMC_RSP_R1b;
 239                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 240 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 241                         printf("mmc fail to send stop cmd\n");
 242 #endif
 243                         return 0;
 244                 }
 245         }
 246
 247         return blkcnt;
 248 }
 249
 250 #ifdef CONFIG_BLK
 251 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 252 #else
 253 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 254                 void *dst)
 255 #endif
 256 {
 257 #ifdef CONFIG_BLK
 258         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 259 #endif
 260         int dev_num = block_dev->devnum;
 261         int err;
 262         lbaint_t cur, blocks_todo = blkcnt;
 263
 264         if (blkcnt == 0)
 265                 return 0;
 266
 267         struct mmc *mmc = find_mmc_device(dev_num);
 268         if (!mmc)
 269                 return 0;
 270
 271         err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 272         if (err < 0)
 273                 return 0;
 274
 275         if ((start + blkcnt) > block_dev->lba) {
 276 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 277                 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 278                         start + blkcnt, block_dev->lba);
 279 #endif
 280                 return 0;
 281         }
 282
 283         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 284                 debug("%s: Failed to set blocklen\n", __func__);
 285                 return 0;
 286         }
 287
 288         do {
 289                 cur = (blocks_todo > mmc->cfg->b_max) ?
 290                         mmc->cfg->b_max : blocks_todo;
 291                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 292                         debug("%s: Failed to read blocks\n", __func__);
 293                         return 0;
 294                 }
 295                 blocks_todo -= cur;
 296                 start += cur;
 297                 dst += cur * mmc->read_bl_len;
 298         } while (blocks_todo > 0);
 299
 300         return blkcnt;
 301 }
 302
 303 static int mmc_go_idle(struct mmc *mmc)
 304 {
 305         struct mmc_cmd cmd;
 306         int err;
 307
 308         udelay(1000);
 309
 310         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 311         cmd.cmdarg = 0;
 312         cmd.resp_type = MMC_RSP_NONE;
 313
 314         err = mmc_send_cmd(mmc, &cmd, NULL);
 315
 316         if (err)
 317                 return err;
 318
 319         udelay(2000);
 320
 321         return 0;
 322 }
 323
 324 static int sd_send_op_cond(struct mmc *mmc)
 325 {
 326         int timeout = 1000;
 327         int err;
 328         struct mmc_cmd cmd;
 329
 330         while (1) {
 331                 cmd.cmdidx = MMC_CMD_APP_CMD;
 332                 cmd.resp_type = MMC_RSP_R1;
 333                 cmd.cmdarg = 0;
 334
 335                 err = mmc_send_cmd(mmc, &cmd, NULL);
 336
 337                 if (err)
 338                         return err;
 339
 340                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 341                 cmd.resp_type = MMC_RSP_R3;
 342
 343                 /*
 344                  * Most cards do not answer if some reserved bits
 345                  * in the ocr are set. However, Some controller
 346                  * can set bit 7 (reserved for low voltages), but
 347                  * how to manage low voltages SD card is not yet
 348                  * specified.
 349                  */
 350                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 351                         (mmc->cfg->voltages & 0xff8000);
 352
 353                 if (mmc->version == SD_VERSION_2)
 354                         cmd.cmdarg |= OCR_HCS;
 355
 356                 err = mmc_send_cmd(mmc, &cmd, NULL);
 357
 358                 if (err)
 359                         return err;
 360
 361                 if (cmd.response[0] & OCR_BUSY)
 362                         break;
 363
 364                 if (timeout-- <= 0)
 365                         return -EOPNOTSUPP;
 366
 367                 udelay(1000);
 368         }
 369
 370         if (mmc->version != SD_VERSION_2)
 371                 mmc->version = SD_VERSION_1_0;
 372
 373         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 374                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 375                 cmd.resp_type = MMC_RSP_R3;
 376                 cmd.cmdarg = 0;
 377
 378                 err = mmc_send_cmd(mmc, &cmd, NULL);
 379
 380                 if (err)
 381                         return err;
 382         }
 383
 384         mmc->ocr = cmd.response[0];
 385
 386         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 387         mmc->rca = 0;
 388
 389         return 0;
 390 }
 391
 392 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 393 {
 394         struct mmc_cmd cmd;
 395         int err;
 396
 397         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 398         cmd.resp_type = MMC_RSP_R3;
 399         cmd.cmdarg = 0;
 400         if (use_arg && !mmc_host_is_spi(mmc))
 401                 cmd.cmdarg = OCR_HCS |
 402                         (mmc->cfg->voltages &
 403                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 404                         (mmc->ocr & OCR_ACCESS_MODE);
 405
 406         err = mmc_send_cmd(mmc, &cmd, NULL);
 407         if (err)
 408                 return err;
 409         mmc->ocr = cmd.response[0];
 410         return 0;
 411 }
 412
 413 static int mmc_send_op_cond(struct mmc *mmc)
 414 {
 415         int err, i;
 416
 417         /* Some cards seem to need this */
 418         mmc_go_idle(mmc);
 419
 420         /* Asking the card for its capabilities */
 421         for (i = 0; i < 2; i++) {
 422                 err = mmc_send_op_cond_iter(mmc, i != 0);
 423                 if (err)
 424                         return err;
 425
 426                 /* exit if not busy (flag seems to be inverted) */
 427                 if (mmc->ocr & OCR_BUSY)
 428                         break;
 429         }
 430         mmc->op_cond_pending = 1;
 431         return 0;
 432 }
 433
 434 static int mmc_complete_op_cond(struct mmc *mmc)
 435 {
 436         struct mmc_cmd cmd;
 437         int timeout = 10 * CONFIG_SYS_HZ;
 438         uint start;
 439         int err;
 440
 441         mmc->op_cond_pending = 0;
 442         if (!(mmc->ocr & OCR_BUSY)) {
 443                 /* Some cards seem to need this */
 444                 mmc_go_idle(mmc);
 445
 446                 start = get_timer(0);
 447                 while (1) {
 448                         err = mmc_send_op_cond_iter(mmc, 1);
 449                         if (err)
 450                                 return err;
 451                         if (mmc->ocr & OCR_BUSY)
 452                                 break;
 453                         if (get_timer(start) > timeout)
 454                                 return -EOPNOTSUPP;
 455                         udelay(100);
 456                 }
 457         }
 458
 459         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 460                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 461                 cmd.resp_type = MMC_RSP_R3;
 462                 cmd.cmdarg = 0;
 463
 464                 err = mmc_send_cmd(mmc, &cmd, NULL);
 465
 466                 if (err)
 467                         return err;
 468
 469                 mmc->ocr = cmd.response[0];
 470         }
 471
 472         mmc->version = MMC_VERSION_UNKNOWN;
 473
 474         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 475         mmc->rca = 1;
 476
 477         return 0;
 478 }
 479
 480
 481 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 482 {
 483         struct mmc_cmd cmd;
 484         struct mmc_data data;
 485         int err;
 486
 487         /* Get the Card Status Register */
 488         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 489         cmd.resp_type = MMC_RSP_R1;
 490         cmd.cmdarg = 0;
 491
 492         data.dest = (char *)ext_csd;
 493         data.blocks = 1;
 494         data.blocksize = MMC_MAX_BLOCK_LEN;
 495         data.flags = MMC_DATA_READ;
 496
 497         err = mmc_send_cmd(mmc, &cmd, &data);
 498
 499         return err;
 500 }
 501
 502 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 503 {
 504         struct mmc_cmd cmd;
 505         int timeout = 1000;
 506         int ret;
 507
 508         cmd.cmdidx = MMC_CMD_SWITCH;
 509         cmd.resp_type = MMC_RSP_R1b;
 510         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 511                                  (index << 16) |
 512                                  (value << 8);
 513
 514         ret = mmc_send_cmd(mmc, &cmd, NULL);
 515
 516         /* Waiting for the ready status */
 517         if (!ret)
 518                 ret = mmc_send_status(mmc, timeout);
 519
 520         return ret;
 521 }
 522
 523 static int mmc_change_freq(struct mmc *mmc)
 524 {
 525         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 526         char cardtype;
 527         int err;
 528
 529         mmc->card_caps = 0;
 530
 531         if (mmc_host_is_spi(mmc))
 532                 return 0;
 533
 534         /* Only version 4 supports high-speed */
 535         if (mmc->version < MMC_VERSION_4)
 536                 return 0;
 537
 538         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 539
 540         err = mmc_send_ext_csd(mmc, ext_csd);
 541
 542         if (err)
 543                 return err;
 544
 545         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 546
 547         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
 548
 549         if (err)
 550                 return err;
 551
 552         /* Now check to see that it worked */
 553         err = mmc_send_ext_csd(mmc, ext_csd);
 554
 555         if (err)
 556                 return err;
 557
 558         /* No high-speed support */
 559         if (!ext_csd[EXT_CSD_HS_TIMING])
 560                 return 0;
 561
 562         /* High Speed is set, there are two types: 52MHz and 26MHz */
 563         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 564                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
 565                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 566                 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 567         } else {
 568                 mmc->card_caps |= MMC_MODE_HS;
 569         }
 570
 571         return 0;
 572 }
 573
 574 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 575 {
 576         switch (part_num) {
 577         case 0:
 578                 mmc->capacity = mmc->capacity_user;
 579                 break;
 580         case 1:
 581         case 2:
 582                 mmc->capacity = mmc->capacity_boot;
 583                 break;
 584         case 3:
 585                 mmc->capacity = mmc->capacity_rpmb;
 586                 break;
 587         case 4:
 588         case 5:
 589         case 6:
 590         case 7:
 591                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 592                 break;
 593         default:
 594                 return -1;
 595         }
 596
 597         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 598
 599         return 0;
 600 }
 601
 602 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 603 {
 604         int ret;
 605
 606         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 607                          (mmc->part_config & ~PART_ACCESS_MASK)
 608                          | (part_num & PART_ACCESS_MASK));
 609
 610         /*
 611          * Set the capacity if the switch succeeded or was intended
 612          * to return to representing the raw device.
 613          */
 614         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 615                 ret = mmc_set_capacity(mmc, part_num);
 616                 mmc_get_blk_desc(mmc)->hwpart = part_num;
 617         }
 618
 619         return ret;
 620 }
 621
 622 int mmc_hwpart_config(struct mmc *mmc,
 623                       const struct mmc_hwpart_conf *conf,
 624                       enum mmc_hwpart_conf_mode mode)
 625 {
 626         u8 part_attrs = 0;
 627         u32 enh_size_mult;
 628         u32 enh_start_addr;
 629         u32 gp_size_mult[4];
 630         u32 max_enh_size_mult;
 631         u32 tot_enh_size_mult = 0;
 632         u8 wr_rel_set;
 633         int i, pidx, err;
 634         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 635
 636         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 637                 return -EINVAL;
 638
 639         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 640                 printf("eMMC >= 4.4 required for enhanced user data area\n");
 641                 return -EMEDIUMTYPE;
 642         }
 643
 644         if (!(mmc->part_support & PART_SUPPORT)) {
 645                 printf("Card does not support partitioning\n");
 646                 return -EMEDIUMTYPE;
 647         }
 648
 649         if (!mmc->hc_wp_grp_size) {
 650                 printf("Card does not define HC WP group size\n");
 651                 return -EMEDIUMTYPE;
 652         }
 653
 654         /* check partition alignment and total enhanced size */
 655         if (conf->user.enh_size) {
 656                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 657                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 658                         printf("User data enhanced area not HC WP group "
 659                                "size aligned\n");
 660                         return -EINVAL;
 661                 }
 662                 part_attrs |= EXT_CSD_ENH_USR;
 663                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 664                 if (mmc->high_capacity) {
 665                         enh_start_addr = conf->user.enh_start;
 666                 } else {
 667                         enh_start_addr = (conf->user.enh_start << 9);
 668                 }
 669         } else {
 670                 enh_size_mult = 0;
 671                 enh_start_addr = 0;
 672         }
 673         tot_enh_size_mult += enh_size_mult;
 674
 675         for (pidx = 0; pidx < 4; pidx++) {
 676                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
 677                         printf("GP%i partition not HC WP group size "
 678                                "aligned\n", pidx+1);
 679                         return -EINVAL;
 680                 }
 681                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
 682                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
 683                         part_attrs |= EXT_CSD_ENH_GP(pidx);
 684                         tot_enh_size_mult += gp_size_mult[pidx];
 685                 }
 686         }
 687
 688         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
 689                 printf("Card does not support enhanced attribute\n");
 690                 return -EMEDIUMTYPE;
 691         }
 692
 693         err = mmc_send_ext_csd(mmc, ext_csd);
 694         if (err)
 695                 return err;
 696
 697         max_enh_size_mult =
 698                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
 699                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
 700                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
 701         if (tot_enh_size_mult > max_enh_size_mult) {
 702                 printf("Total enhanced size exceeds maximum (%u > %u)\n",
 703                        tot_enh_size_mult, max_enh_size_mult);
 704                 return -EMEDIUMTYPE;
 705         }
 706
 707         /* The default value of EXT_CSD_WR_REL_SET is device
 708          * dependent, the values can only be changed if the
 709          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
 710          * changed only once and before partitioning is completed. */
 711         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
 712         if (conf->user.wr_rel_change) {
 713                 if (conf->user.wr_rel_set)
 714                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
 715                 else
 716                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
 717         }
 718         for (pidx = 0; pidx < 4; pidx++) {
 719                 if (conf->gp_part[pidx].wr_rel_change) {
 720                         if (conf->gp_part[pidx].wr_rel_set)
 721                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
 722                         else
 723                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
 724                 }
 725         }
 726
 727         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
 728             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
 729                 puts("Card does not support host controlled partition write "
 730                      "reliability settings\n");
 731                 return -EMEDIUMTYPE;
 732         }
 733
 734         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
 735             EXT_CSD_PARTITION_SETTING_COMPLETED) {
 736                 printf("Card already partitioned\n");
 737                 return -EPERM;
 738         }
 739
 740         if (mode == MMC_HWPART_CONF_CHECK)
 741                 return 0;
 742
 743         /* Partitioning requires high-capacity size definitions */
 744         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
 745                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 746                                  EXT_CSD_ERASE_GROUP_DEF, 1);
 747
 748                 if (err)
 749                         return err;
 750
 751                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
 752
 753                 /* update erase group size to be high-capacity */
 754                 mmc->erase_grp_size =
 755                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
 756
 757         }
 758
 759         /* all OK, write the configuration */
 760         for (i = 0; i < 4; i++) {
 761                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 762                                  EXT_CSD_ENH_START_ADDR+i,
 763                                  (enh_start_addr >> (i*8)) & 0xFF);
 764                 if (err)
 765                         return err;
 766         }
 767         for (i = 0; i < 3; i++) {
 768                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 769                                  EXT_CSD_ENH_SIZE_MULT+i,
 770                                  (enh_size_mult >> (i*8)) & 0xFF);
 771                 if (err)
 772                         return err;
 773         }
 774         for (pidx = 0; pidx < 4; pidx++) {
 775                 for (i = 0; i < 3; i++) {
 776                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 777                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
 778                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
 779                         if (err)
 780                                 return err;
 781                 }
 782         }
 783         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 784                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
 785         if (err)
 786                 return err;
 787
 788         if (mode == MMC_HWPART_CONF_SET)
 789                 return 0;
 790
 791         /* The WR_REL_SET is a write-once register but shall be
 792          * written before setting PART_SETTING_COMPLETED. As it is
 793          * write-once we can only write it when completing the
 794          * partitioning. */
 795         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
 796                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 797                                  EXT_CSD_WR_REL_SET, wr_rel_set);
 798                 if (err)
 799                         return err;
 800         }
 801
 802         /* Setting PART_SETTING_COMPLETED confirms the partition
 803          * configuration but it only becomes effective after power
 804          * cycle, so we do not adjust the partition related settings
 805          * in the mmc struct. */
 806
 807         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 808                          EXT_CSD_PARTITION_SETTING,
 809                          EXT_CSD_PARTITION_SETTING_COMPLETED);
 810         if (err)
 811                 return err;
 812
 813         return 0;
 814 }
 815
 816 #ifndef CONFIG_DM_MMC_OPS
 817 int mmc_getcd(struct mmc *mmc)
 818 {
 819         int cd;
 820
 821         cd = board_mmc_getcd(mmc);
 822
 823         if (cd < 0) {
 824                 if (mmc->cfg->ops->getcd)
 825                         cd = mmc->cfg->ops->getcd(mmc);
 826                 else
 827                         cd = 1;
 828         }
 829
 830         return cd;
 831 }
 832 #endif
 833
 834 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
 835 {
 836         struct mmc_cmd cmd;
 837         struct mmc_data data;
 838
 839         /* Switch the frequency */
 840         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
 841         cmd.resp_type = MMC_RSP_R1;
 842         cmd.cmdarg = (mode << 31) | 0xffffff;
 843         cmd.cmdarg &= ~(0xf << (group * 4));
 844         cmd.cmdarg |= value << (group * 4);
 845
 846         data.dest = (char *)resp;
 847         data.blocksize = 64;
 848         data.blocks = 1;
 849         data.flags = MMC_DATA_READ;
 850
 851         return mmc_send_cmd(mmc, &cmd, &data);
 852 }
 853
 854
 855 static int sd_change_freq(struct mmc *mmc)
 856 {
 857         int err;
 858         struct mmc_cmd cmd;
 859         ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
 860         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
 861         struct mmc_data data;
 862         int timeout;
 863
 864         mmc->card_caps = 0;
 865
 866         if (mmc_host_is_spi(mmc))
 867                 return 0;
 868
 869         /* Read the SCR to find out if this card supports higher speeds */
 870         cmd.cmdidx = MMC_CMD_APP_CMD;
 871         cmd.resp_type = MMC_RSP_R1;
 872         cmd.cmdarg = mmc->rca << 16;
 873
 874         err = mmc_send_cmd(mmc, &cmd, NULL);
 875
 876         if (err)
 877                 return err;
 878
 879         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
 880         cmd.resp_type = MMC_RSP_R1;
 881         cmd.cmdarg = 0;
 882
 883         timeout = 3;
 884
 885 retry_scr:
 886         data.dest = (char *)scr;
 887         data.blocksize = 8;
 888         data.blocks = 1;
 889         data.flags = MMC_DATA_READ;
 890
 891         err = mmc_send_cmd(mmc, &cmd, &data);
 892
 893         if (err) {
 894                 if (timeout--)
 895                         goto retry_scr;
 896
 897                 return err;
 898         }
 899
 900         mmc->scr[0] = __be32_to_cpu(scr[0]);
 901         mmc->scr[1] = __be32_to_cpu(scr[1]);
 902
 903         switch ((mmc->scr[0] >> 24) & 0xf) {
 904         case 0:
 905                 mmc->version = SD_VERSION_1_0;
 906                 break;
 907         case 1:
 908                 mmc->version = SD_VERSION_1_10;
 909                 break;
 910         case 2:
 911                 mmc->version = SD_VERSION_2;
 912                 if ((mmc->scr[0] >> 15) & 0x1)
 913                         mmc->version = SD_VERSION_3;
 914                 break;
 915         default:
 916                 mmc->version = SD_VERSION_1_0;
 917                 break;
 918         }
 919
 920         if (mmc->scr[0] & SD_DATA_4BIT)
 921                 mmc->card_caps |= MMC_MODE_4BIT;
 922
 923         /* Version 1.0 doesn't support switching */
 924         if (mmc->version == SD_VERSION_1_0)
 925                 return 0;
 926
 927         timeout = 4;
 928         while (timeout--) {
 929                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
 930                                 (u8 *)switch_status);
 931
 932                 if (err)
 933                         return err;
 934
 935                 /* The high-speed function is busy.  Try again */
 936                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
 937                         break;
 938         }
 939
 940         /* If high-speed isn't supported, we return */
 941         if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
 942                 return 0;
 943
 944         /*
 945          * If the host doesn't support SD_HIGHSPEED, do not switch card to
 946          * HIGHSPEED mode even if the card support SD_HIGHSPPED.
 947          * This can avoid furthur problem when the card runs in different
 948          * mode between the host.
 949          */
 950         if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
 951                 (mmc->cfg->host_caps & MMC_MODE_HS)))
 952                 return 0;
 953
 954         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
 955
 956         if (err)
 957                 return err;
 958
 959         if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
 960                 mmc->card_caps |= MMC_MODE_HS;
 961
 962         return 0;
 963 }
 964
 965 static int sd_read_ssr(struct mmc *mmc)
 966 {
 967         int err, i;
 968         struct mmc_cmd cmd;
 969         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
 970         struct mmc_data data;
 971         int timeout = 3;
 972         unsigned int au, eo, et, es;
 973
 974         cmd.cmdidx = MMC_CMD_APP_CMD;
 975         cmd.resp_type = MMC_RSP_R1;
 976         cmd.cmdarg = mmc->rca << 16;
 977
 978         err = mmc_send_cmd(mmc, &cmd, NULL);
 979         if (err)
 980                 return err;
 981
 982         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
 983         cmd.resp_type = MMC_RSP_R1;
 984         cmd.cmdarg = 0;
 985
 986 retry_ssr:
 987         data.dest = (char *)ssr;
 988         data.blocksize = 64;
 989         data.blocks = 1;
 990         data.flags = MMC_DATA_READ;
 991
 992         err = mmc_send_cmd(mmc, &cmd, &data);
 993         if (err) {
 994                 if (timeout--)
 995                         goto retry_ssr;
 996
 997                 return err;
 998         }
 999
1000         for (i = 0; i < 16; i++)
1001                 ssr[i] = be32_to_cpu(ssr[i]);
1002
1003         au = (ssr[2] >> 12) & 0xF;
1004         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1005                 mmc->ssr.au = sd_au_size[au];
1006                 es = (ssr[3] >> 24) & 0xFF;
1007                 es |= (ssr[2] & 0xFF) << 8;
1008                 et = (ssr[3] >> 18) & 0x3F;
1009                 if (es && et) {
1010                         eo = (ssr[3] >> 16) & 0x3;
1011                         mmc->ssr.erase_timeout = (et * 1000) / es;
1012                         mmc->ssr.erase_offset = eo * 1000;
1013                 }
1014         } else {
1015                 debug("Invalid Allocation Unit Size.\n");
1016         }
1017
1018         return 0;
1019 }
1020
1021 /* frequency bases */
1022 /* divided by 10 to be nice to platforms without floating point */
1023 static const int fbase[] = {
1024         10000,
1025         100000,
1026         1000000,
1027         10000000,
1028 };
1029
1030 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1031  * to platforms without floating point.
1032  */
1033 static const u8 multipliers[] = {
1034         0,      /* reserved */
1035         10,
1036         12,
1037         13,
1038         15,
1039         20,
1040         25,
1041         30,
1042         35,
1043         40,
1044         45,
1045         50,
1046         55,
1047         60,
1048         70,
1049         80,
1050 };
1051
1052 #ifndef CONFIG_DM_MMC_OPS
1053 static void mmc_set_ios(struct mmc *mmc)
1054 {
1055         if (mmc->cfg->ops->set_ios)
1056                 mmc->cfg->ops->set_ios(mmc);
1057 }
1058 #endif
1059
1060 void mmc_set_clock(struct mmc *mmc, uint clock)
1061 {
1062         if (clock > mmc->cfg->f_max)
1063                 clock = mmc->cfg->f_max;
1064
1065         if (clock < mmc->cfg->f_min)
1066                 clock = mmc->cfg->f_min;
1067
1068         mmc->clock = clock;
1069
1070         mmc_set_ios(mmc);
1071 }
1072
1073 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1074 {
1075         mmc->bus_width = width;
1076
1077         mmc_set_ios(mmc);
1078 }
1079
1080 static int mmc_startup(struct mmc *mmc)
1081 {
1082         int err, i;
1083         uint mult, freq;
1084         u64 cmult, csize, capacity;
1085         struct mmc_cmd cmd;
1086         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1087         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1088         int timeout = 1000;
1089         bool has_parts = false;
1090         bool part_completed;
1091         struct blk_desc *bdesc;
1092
1093 #ifdef CONFIG_MMC_SPI_CRC_ON
1094         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1095                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1096                 cmd.resp_type = MMC_RSP_R1;
1097                 cmd.cmdarg = 1;
1098                 err = mmc_send_cmd(mmc, &cmd, NULL);
1099
1100                 if (err)
1101                         return err;
1102         }
1103 #endif
1104
1105         /* Put the Card in Identify Mode */
1106         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1107                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1108         cmd.resp_type = MMC_RSP_R2;
1109         cmd.cmdarg = 0;
1110
1111         err = mmc_send_cmd(mmc, &cmd, NULL);
1112
1113         if (err)
1114                 return err;
1115
1116         memcpy(mmc->cid, cmd.response, 16);
1117
1118         /*
1119          * For MMC cards, set the Relative Address.
1120          * For SD cards, get the Relatvie Address.
1121          * This also puts the cards into Standby State
1122          */
1123         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1124                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1125                 cmd.cmdarg = mmc->rca << 16;
1126                 cmd.resp_type = MMC_RSP_R6;
1127
1128                 err = mmc_send_cmd(mmc, &cmd, NULL);
1129
1130                 if (err)
1131                         return err;
1132
1133                 if (IS_SD(mmc))
1134                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1135         }
1136
1137         /* Get the Card-Specific Data */
1138         cmd.cmdidx = MMC_CMD_SEND_CSD;
1139         cmd.resp_type = MMC_RSP_R2;
1140         cmd.cmdarg = mmc->rca << 16;
1141
1142         err = mmc_send_cmd(mmc, &cmd, NULL);
1143         if (err)
1144                 return err;
1145
1146         /* Waiting for the ready status */
1147         err = mmc_send_status(mmc, timeout);
1148         if (err)
1149                 return err;
1150
1151         mmc->csd[0] = cmd.response[0];
1152         mmc->csd[1] = cmd.response[1];
1153         mmc->csd[2] = cmd.response[2];
1154         mmc->csd[3] = cmd.response[3];
1155
1156         if (mmc->version == MMC_VERSION_UNKNOWN) {
1157                 int version = (cmd.response[0] >> 26) & 0xf;
1158
1159                 switch (version) {
1160                 case 0:
1161                         mmc->version = MMC_VERSION_1_2;
1162                         break;
1163                 case 1:
1164                         mmc->version = MMC_VERSION_1_4;
1165                         break;
1166                 case 2:
1167                         mmc->version = MMC_VERSION_2_2;
1168                         break;
1169                 case 3:
1170                         mmc->version = MMC_VERSION_3;
1171                         break;
1172                 case 4:
1173                         mmc->version = MMC_VERSION_4;
1174                         break;
1175                 default:
1176                         mmc->version = MMC_VERSION_1_2;
1177                         break;
1178                 }
1179         }
1180
1181         /* divide frequency by 10, since the mults are 10x bigger */
1182         freq = fbase[(cmd.response[0] & 0x7)];
1183         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1184
1185         mmc->tran_speed = freq * mult;
1186
1187         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1188         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1189
1190         if (IS_SD(mmc))
1191                 mmc->write_bl_len = mmc->read_bl_len;
1192         else
1193                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1194
1195         if (mmc->high_capacity) {
1196                 csize = (mmc->csd[1] & 0x3f) << 16
1197                         | (mmc->csd[2] & 0xffff0000) >> 16;
1198                 cmult = 8;
1199         } else {
1200                 csize = (mmc->csd[1] & 0x3ff) << 2
1201                         | (mmc->csd[2] & 0xc0000000) >> 30;
1202                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1203         }
1204
1205         mmc->capacity_user = (csize + 1) << (cmult + 2);
1206         mmc->capacity_user *= mmc->read_bl_len;
1207         mmc->capacity_boot = 0;
1208         mmc->capacity_rpmb = 0;
1209         for (i = 0; i < 4; i++)
1210                 mmc->capacity_gp[i] = 0;
1211
1212         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1213                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1214
1215         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1216                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1217
1218         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1219                 cmd.cmdidx = MMC_CMD_SET_DSR;
1220                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1221                 cmd.resp_type = MMC_RSP_NONE;
1222                 if (mmc_send_cmd(mmc, &cmd, NULL))
1223                         printf("MMC: SET_DSR failed\n");
1224         }
1225
1226         /* Select the card, and put it into Transfer Mode */
1227         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1228                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1229                 cmd.resp_type = MMC_RSP_R1;
1230                 cmd.cmdarg = mmc->rca << 16;
1231                 err = mmc_send_cmd(mmc, &cmd, NULL);
1232
1233                 if (err)
1234                         return err;
1235         }
1236
1237         /*
1238          * For SD, its erase group is always one sector
1239          */
1240         mmc->erase_grp_size = 1;
1241         mmc->part_config = MMCPART_NOAVAILABLE;
1242         if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1243                 /* check  ext_csd version and capacity */
1244
1245                 err = mmc_send_ext_csd(mmc, ext_csd);
1246                 if (err)
1247                         return err;
1248                 if (ext_csd[EXT_CSD_REV] >= 2) {
1249                         /*
1250                          * According to the JEDEC Standard, the value of
1251                          * ext_csd's capacity is valid if the value is more
1252                          * than 2GB
1253                          */
1254                         capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1255                                         | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1256                                         | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1257                                         | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1258                         capacity *= MMC_MAX_BLOCK_LEN;
1259                         if ((capacity >> 20) > 2 * 1024)
1260                                 mmc->capacity_user = capacity;
1261                 }
1262
1263                 switch (ext_csd[EXT_CSD_REV]) {
1264                 case 1:
1265                         mmc->version = MMC_VERSION_4_1;
1266                         break;
1267                 case 2:
1268                         mmc->version = MMC_VERSION_4_2;
1269                         break;
1270                 case 3:
1271                         mmc->version = MMC_VERSION_4_3;
1272                         break;
1273                 case 5:
1274                         mmc->version = MMC_VERSION_4_41;
1275                         break;
1276                 case 6:
1277                         mmc->version = MMC_VERSION_4_5;
1278                         break;
1279                 case 7:
1280                         mmc->version = MMC_VERSION_5_0;
1281                         break;
1282                 case 8:
1283                         mmc->version = MMC_VERSION_5_1;
1284                         break;
1285                 }
1286
1287                 /* The partition data may be non-zero but it is only
1288                  * effective if PARTITION_SETTING_COMPLETED is set in
1289                  * EXT_CSD, so ignore any data if this bit is not set,
1290                  * except for enabling the high-capacity group size
1291                  * definition (see below). */
1292                 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1293                                     EXT_CSD_PARTITION_SETTING_COMPLETED);
1294
1295                 /* store the partition info of emmc */
1296                 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1297                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1298                     ext_csd[EXT_CSD_BOOT_MULT])
1299                         mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1300                 if (part_completed &&
1301                     (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1302                         mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1303
1304                 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1305
1306                 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1307
1308                 for (i = 0; i < 4; i++) {
1309                         int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1310                         uint mult = (ext_csd[idx + 2] << 16) +
1311                                 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1312                         if (mult)
1313                                 has_parts = true;
1314                         if (!part_completed)
1315                                 continue;
1316                         mmc->capacity_gp[i] = mult;
1317                         mmc->capacity_gp[i] *=
1318                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1319                         mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1320                         mmc->capacity_gp[i] <<= 19;
1321                 }
1322
1323                 if (part_completed) {
1324                         mmc->enh_user_size =
1325                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1326                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1327                                 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1328                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1329                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1330                         mmc->enh_user_size <<= 19;
1331                         mmc->enh_user_start =
1332                                 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1333                                 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1334                                 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1335                                 ext_csd[EXT_CSD_ENH_START_ADDR];
1336                         if (mmc->high_capacity)
1337                                 mmc->enh_user_start <<= 9;
1338                 }
1339
1340                 /*
1341                  * Host needs to enable ERASE_GRP_DEF bit if device is
1342                  * partitioned. This bit will be lost every time after a reset
1343                  * or power off. This will affect erase size.
1344                  */
1345                 if (part_completed)
1346                         has_parts = true;
1347                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1348                     (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1349                         has_parts = true;
1350                 if (has_parts) {
1351                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1352                                 EXT_CSD_ERASE_GROUP_DEF, 1);
1353
1354                         if (err)
1355                                 return err;
1356                         else
1357                                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1358                 }
1359
1360                 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1361                         /* Read out group size from ext_csd */
1362                         mmc->erase_grp_size =
1363                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1364                         /*
1365                          * if high capacity and partition setting completed
1366                          * SEC_COUNT is valid even if it is smaller than 2 GiB
1367                          * JEDEC Standard JESD84-B45, 6.2.4
1368                          */
1369                         if (mmc->high_capacity && part_completed) {
1370                                 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1371                                         (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1372                                         (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1373                                         (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1374                                 capacity *= MMC_MAX_BLOCK_LEN;
1375                                 mmc->capacity_user = capacity;
1376                         }
1377                 } else {
1378                         /* Calculate the group size from the csd value. */
1379                         int erase_gsz, erase_gmul;
1380                         erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1381                         erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1382                         mmc->erase_grp_size = (erase_gsz + 1)
1383                                 * (erase_gmul + 1);
1384                 }
1385
1386                 mmc->hc_wp_grp_size = 1024
1387                         * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1388                         * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1389
1390                 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1391         }
1392
1393         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1394         if (err)
1395                 return err;
1396
1397         if (IS_SD(mmc))
1398                 err = sd_change_freq(mmc);
1399         else
1400                 err = mmc_change_freq(mmc);
1401
1402         if (err)
1403                 return err;
1404
1405         /* Restrict card's capabilities by what the host can do */
1406         mmc->card_caps &= mmc->cfg->host_caps;
1407
1408         if (IS_SD(mmc)) {
1409                 if (mmc->card_caps & MMC_MODE_4BIT) {
1410                         cmd.cmdidx = MMC_CMD_APP_CMD;
1411                         cmd.resp_type = MMC_RSP_R1;
1412                         cmd.cmdarg = mmc->rca << 16;
1413
1414                         err = mmc_send_cmd(mmc, &cmd, NULL);
1415                         if (err)
1416                                 return err;
1417
1418                         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1419                         cmd.resp_type = MMC_RSP_R1;
1420                         cmd.cmdarg = 2;
1421                         err = mmc_send_cmd(mmc, &cmd, NULL);
1422                         if (err)
1423                                 return err;
1424
1425                         mmc_set_bus_width(mmc, 4);
1426                 }
1427
1428                 err = sd_read_ssr(mmc);
1429                 if (err)
1430                         return err;
1431
1432                 if (mmc->card_caps & MMC_MODE_HS)
1433                         mmc->tran_speed = 50000000;
1434                 else
1435                         mmc->tran_speed = 25000000;
1436         } else if (mmc->version >= MMC_VERSION_4) {
1437                 /* Only version 4 of MMC supports wider bus widths */
1438                 int idx;
1439
1440                 /* An array of possible bus widths in order of preference */
1441                 static unsigned ext_csd_bits[] = {
1442                         EXT_CSD_DDR_BUS_WIDTH_8,
1443                         EXT_CSD_DDR_BUS_WIDTH_4,
1444                         EXT_CSD_BUS_WIDTH_8,
1445                         EXT_CSD_BUS_WIDTH_4,
1446                         EXT_CSD_BUS_WIDTH_1,
1447                 };
1448
1449                 /* An array to map CSD bus widths to host cap bits */
1450                 static unsigned ext_to_hostcaps[] = {
1451                         [EXT_CSD_DDR_BUS_WIDTH_4] =
1452                                 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1453                         [EXT_CSD_DDR_BUS_WIDTH_8] =
1454                                 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1455                         [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1456                         [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1457                 };
1458
1459                 /* An array to map chosen bus width to an integer */
1460                 static unsigned widths[] = {
1461                         8, 4, 8, 4, 1,
1462                 };
1463
1464                 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1465                         unsigned int extw = ext_csd_bits[idx];
1466                         unsigned int caps = ext_to_hostcaps[extw];
1467
1468                         /*
1469                          * If the bus width is still not changed,
1470                          * don't try to set the default again.
1471                          * Otherwise, recover from switch attempts
1472                          * by switching to 1-bit bus width.
1473                          */
1474                         if (extw == EXT_CSD_BUS_WIDTH_1 &&
1475                                         mmc->bus_width == 1) {
1476                                 err = 0;
1477                                 break;
1478                         }
1479
1480                         /*
1481                          * Check to make sure the card and controller support
1482                          * these capabilities
1483                          */
1484                         if ((mmc->card_caps & caps) != caps)
1485                                 continue;
1486
1487                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1488                                         EXT_CSD_BUS_WIDTH, extw);
1489
1490                         if (err)
1491                                 continue;
1492
1493                         mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1494                         mmc_set_bus_width(mmc, widths[idx]);
1495
1496                         err = mmc_send_ext_csd(mmc, test_csd);
1497
1498                         if (err)
1499                                 continue;
1500
1501                         /* Only compare read only fields */
1502                         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1503                                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1504                             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1505                                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1506                             ext_csd[EXT_CSD_REV]
1507                                 == test_csd[EXT_CSD_REV] &&
1508                             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1509                                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1510                             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1511                                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1512                                 break;
1513                         else
1514                                 err = -EBADMSG;
1515                 }
1516
1517                 if (err)
1518                         return err;
1519
1520                 if (mmc->card_caps & MMC_MODE_HS) {
1521                         if (mmc->card_caps & MMC_MODE_HS_52MHz)
1522                                 mmc->tran_speed = 52000000;
1523                         else
1524                                 mmc->tran_speed = 26000000;
1525                 }
1526         }
1527
1528         mmc_set_clock(mmc, mmc->tran_speed);
1529
1530         /* Fix the block length for DDR mode */
1531         if (mmc->ddr_mode) {
1532                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1533                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1534         }
1535
1536         /* fill in device description */
1537         bdesc = mmc_get_blk_desc(mmc);
1538         bdesc->lun = 0;
1539         bdesc->hwpart = 0;
1540         bdesc->type = 0;
1541         bdesc->blksz = mmc->read_bl_len;
1542         bdesc->log2blksz = LOG2(bdesc->blksz);
1543         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1544 #if !defined(CONFIG_SPL_BUILD) || \
1545                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1546                 !defined(CONFIG_USE_TINY_PRINTF))
1547         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1548                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1549                 (mmc->cid[3] >> 16) & 0xffff);
1550         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1551                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1552                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1553                 (mmc->cid[2] >> 24) & 0xff);
1554         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1555                 (mmc->cid[2] >> 16) & 0xf);
1556 #else
1557         bdesc->vendor[0] = 0;
1558         bdesc->product[0] = 0;
1559         bdesc->revision[0] = 0;
1560 #endif
1561 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1562         part_init(bdesc);
1563 #endif
1564
1565         return 0;
1566 }
1567
1568 static int mmc_send_if_cond(struct mmc *mmc)
1569 {
1570         struct mmc_cmd cmd;
1571         int err;
1572
1573         cmd.cmdidx = SD_CMD_SEND_IF_COND;
1574         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1575         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1576         cmd.resp_type = MMC_RSP_R7;
1577
1578         err = mmc_send_cmd(mmc, &cmd, NULL);
1579
1580         if (err)
1581                 return err;
1582
1583         if ((cmd.response[0] & 0xff) != 0xaa)
1584                 return -EOPNOTSUPP;
1585         else
1586                 mmc->version = SD_VERSION_2;
1587
1588         return 0;
1589 }
1590
1591 /* board-specific MMC power initializations. */
1592 __weak void board_mmc_power_init(void)
1593 {
1594 }
1595
1596 int mmc_start_init(struct mmc *mmc)
1597 {
1598         bool no_card;
1599         int err;
1600
1601         /* we pretend there's no card when init is NULL */
1602         no_card = mmc_getcd(mmc) == 0;
1603 #ifndef CONFIG_DM_MMC_OPS
1604         no_card = no_card || (mmc->cfg->ops->init == NULL);
1605 #endif
1606         if (no_card) {
1607                 mmc->has_init = 0;
1608 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1609                 printf("MMC: no card present\n");
1610 #endif
1611                 return -ENOMEDIUM;
1612         }
1613
1614         if (mmc->has_init)
1615                 return 0;
1616
1617 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1618         mmc_adapter_card_type_ident();
1619 #endif
1620         board_mmc_power_init();
1621
1622 #ifdef CONFIG_DM_MMC_OPS
1623         /* The device has already been probed ready for use */
1624 #else
1625         /* made sure it's not NULL earlier */
1626         err = mmc->cfg->ops->init(mmc);
1627         if (err)
1628                 return err;
1629 #endif
1630         mmc->ddr_mode = 0;
1631         mmc_set_bus_width(mmc, 1);
1632         mmc_set_clock(mmc, 1);
1633
1634         /* Reset the Card */
1635         err = mmc_go_idle(mmc);
1636
1637         if (err)
1638                 return err;
1639
1640         /* The internal partition reset to user partition(0) at every CMD0*/
1641         mmc_get_blk_desc(mmc)->hwpart = 0;
1642
1643         /* Test for SD version 2 */
1644         err = mmc_send_if_cond(mmc);
1645
1646         /* Now try to get the SD card's operating condition */
1647         err = sd_send_op_cond(mmc);
1648
1649         /* If the command timed out, we check for an MMC card */
1650         if (err == -ETIMEDOUT) {
1651                 err = mmc_send_op_cond(mmc);
1652
1653                 if (err) {
1654 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1655                         printf("Card did not respond to voltage select!\n");
1656 #endif
1657                         return -EOPNOTSUPP;
1658                 }
1659         }
1660
1661         if (!err)
1662                 mmc->init_in_progress = 1;
1663
1664         return err;
1665 }
1666
1667 static int mmc_complete_init(struct mmc *mmc)
1668 {
1669         int err = 0;
1670
1671         mmc->init_in_progress = 0;
1672         if (mmc->op_cond_pending)
1673                 err = mmc_complete_op_cond(mmc);
1674
1675         if (!err)
1676                 err = mmc_startup(mmc);
1677         if (err)
1678                 mmc->has_init = 0;
1679         else
1680                 mmc->has_init = 1;
1681         return err;
1682 }
1683
1684 int mmc_init(struct mmc *mmc)
1685 {
1686         int err = 0;
1687         unsigned start;
1688 #ifdef CONFIG_DM_MMC
1689         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
1690
1691         upriv->mmc = mmc;
1692 #endif
1693         if (mmc->has_init)
1694                 return 0;
1695
1696         start = get_timer(0);
1697
1698         if (!mmc->init_in_progress)
1699                 err = mmc_start_init(mmc);
1700
1701         if (!err)
1702                 err = mmc_complete_init(mmc);
1703         debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1704         return err;
1705 }
1706
1707 int mmc_set_dsr(struct mmc *mmc, u16 val)
1708 {
1709         mmc->dsr = val;
1710         return 0;
1711 }
1712
1713 /* CPU-specific MMC initializations */
1714 __weak int cpu_mmc_init(bd_t *bis)
1715 {
1716         return -1;
1717 }
1718
1719 /* board-specific MMC initializations. */
1720 __weak int board_mmc_init(bd_t *bis)
1721 {
1722         return -1;
1723 }
1724
1725 void mmc_set_preinit(struct mmc *mmc, int preinit)
1726 {
1727         mmc->preinit = preinit;
1728 }
1729
1730 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1731 static int mmc_probe(bd_t *bis)
1732 {
1733         return 0;
1734 }
1735 #elif defined(CONFIG_DM_MMC)
1736 static int mmc_probe(bd_t *bis)
1737 {
1738         int ret, i;
1739         struct uclass *uc;
1740         struct udevice *dev;
1741
1742         ret = uclass_get(UCLASS_MMC, &uc);
1743         if (ret)
1744                 return ret;
1745
1746         /*
1747          * Try to add them in sequence order. Really with driver model we
1748          * should allow holes, but the current MMC list does not allow that.
1749          * So if we request 0, 1, 3 we will get 0, 1, 2.
1750          */
1751         for (i = 0; ; i++) {
1752                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1753                 if (ret == -ENODEV)
1754                         break;
1755         }
1756         uclass_foreach_dev(dev, uc) {
1757                 ret = device_probe(dev);
1758                 if (ret)
1759                         printf("%s - probe failed: %d\n", dev->name, ret);
1760         }
1761
1762         return 0;
1763 }
1764 #else
1765 static int mmc_probe(bd_t *bis)
1766 {
1767         if (board_mmc_init(bis) < 0)
1768                 cpu_mmc_init(bis);
1769
1770         return 0;
1771 }
1772 #endif
1773
1774 int mmc_initialize(bd_t *bis)
1775 {
1776         static int initialized = 0;
1777         int ret;
1778         if (initialized)        /* Avoid initializing mmc multiple times */
1779                 return 0;
1780         initialized = 1;
1781
1782 #ifndef CONFIG_BLK
1783         mmc_list_init();
1784 #endif
1785         ret = mmc_probe(bis);
1786         if (ret)
1787                 return ret;
1788
1789 #ifndef CONFIG_SPL_BUILD
1790         print_mmc_devices(',');
1791 #endif
1792
1793         mmc_do_preinit();
1794         return 0;
1795 }