2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <dm/device-internal.h>
20 #include <linux/list.h>
22 #include "mmc_private.h"
24 __weak int board_mmc_getwp(struct mmc *mmc)
29 int mmc_getwp(struct mmc *mmc)
33 wp = board_mmc_getwp(mmc);
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
45 __weak int board_mmc_getcd(struct mmc *mmc)
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
54 #ifdef CONFIG_MMC_TRACE
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
62 printf("\t\tRET\t\t\t %d\n", ret);
64 switch (cmd->resp_type) {
66 printf("\t\tMMC_RSP_NONE\n");
69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
79 printf("\t\t \t\t 0x%08X \n",
81 printf("\t\t \t\t 0x%08X \n",
83 printf("\t\t \t\t 0x%08X \n",
86 printf("\t\t\t\t\tDUMPING DATA\n");
87 for (i = 0; i < 4; i++) {
89 printf("\t\t\t\t\t%03d - ", i*4);
90 ptr = (u8 *)&cmd->response[i];
92 for (j = 0; j < 4; j++)
93 printf("%02X ", *ptr--);
98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 printf("\t\tERROR MMC rsp not supported\n");
107 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
112 int mmc_send_status(struct mmc *mmc, int timeout)
115 int err, retries = 5;
116 #ifdef CONFIG_MMC_TRACE
120 cmd.cmdidx = MMC_CMD_SEND_STATUS;
121 cmd.resp_type = MMC_RSP_R1;
122 if (!mmc_host_is_spi(mmc))
123 cmd.cmdarg = mmc->rca << 16;
126 err = mmc_send_cmd(mmc, &cmd, NULL);
128 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
129 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
132 else if (cmd.response[0] & MMC_STATUS_MASK) {
133 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
134 printf("Status Error: 0x%08X\n",
139 } else if (--retries < 0)
148 #ifdef CONFIG_MMC_TRACE
149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150 printf("CURR STATE:%d\n", status);
153 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
154 printf("Timeout waiting card ready\n");
162 int mmc_set_blocklen(struct mmc *mmc, int len)
169 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
170 cmd.resp_type = MMC_RSP_R1;
173 return mmc_send_cmd(mmc, &cmd, NULL);
176 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
180 struct mmc_data data;
183 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
185 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
187 if (mmc->high_capacity)
190 cmd.cmdarg = start * mmc->read_bl_len;
192 cmd.resp_type = MMC_RSP_R1;
195 data.blocks = blkcnt;
196 data.blocksize = mmc->read_bl_len;
197 data.flags = MMC_DATA_READ;
199 if (mmc_send_cmd(mmc, &cmd, &data))
203 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
205 cmd.resp_type = MMC_RSP_R1b;
206 if (mmc_send_cmd(mmc, &cmd, NULL)) {
207 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
208 printf("mmc fail to send stop cmd\n");
218 static ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
221 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
222 lbaint_t blkcnt, void *dst)
226 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
228 int dev_num = block_dev->devnum;
230 lbaint_t cur, blocks_todo = blkcnt;
235 struct mmc *mmc = find_mmc_device(dev_num);
239 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
243 if ((start + blkcnt) > block_dev->lba) {
244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
246 start + blkcnt, block_dev->lba);
251 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
252 debug("%s: Failed to set blocklen\n", __func__);
257 cur = (blocks_todo > mmc->cfg->b_max) ?
258 mmc->cfg->b_max : blocks_todo;
259 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
260 debug("%s: Failed to read blocks\n", __func__);
265 dst += cur * mmc->read_bl_len;
266 } while (blocks_todo > 0);
271 static int mmc_go_idle(struct mmc *mmc)
278 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
280 cmd.resp_type = MMC_RSP_NONE;
282 err = mmc_send_cmd(mmc, &cmd, NULL);
292 static int sd_send_op_cond(struct mmc *mmc)
299 cmd.cmdidx = MMC_CMD_APP_CMD;
300 cmd.resp_type = MMC_RSP_R1;
303 err = mmc_send_cmd(mmc, &cmd, NULL);
308 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
309 cmd.resp_type = MMC_RSP_R3;
312 * Most cards do not answer if some reserved bits
313 * in the ocr are set. However, Some controller
314 * can set bit 7 (reserved for low voltages), but
315 * how to manage low voltages SD card is not yet
318 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
319 (mmc->cfg->voltages & 0xff8000);
321 if (mmc->version == SD_VERSION_2)
322 cmd.cmdarg |= OCR_HCS;
324 err = mmc_send_cmd(mmc, &cmd, NULL);
329 if (cmd.response[0] & OCR_BUSY)
338 if (mmc->version != SD_VERSION_2)
339 mmc->version = SD_VERSION_1_0;
341 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
342 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
343 cmd.resp_type = MMC_RSP_R3;
346 err = mmc_send_cmd(mmc, &cmd, NULL);
352 mmc->ocr = cmd.response[0];
354 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
360 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
365 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
366 cmd.resp_type = MMC_RSP_R3;
368 if (use_arg && !mmc_host_is_spi(mmc))
369 cmd.cmdarg = OCR_HCS |
370 (mmc->cfg->voltages &
371 (mmc->ocr & OCR_VOLTAGE_MASK)) |
372 (mmc->ocr & OCR_ACCESS_MODE);
374 err = mmc_send_cmd(mmc, &cmd, NULL);
377 mmc->ocr = cmd.response[0];
381 static int mmc_send_op_cond(struct mmc *mmc)
385 /* Some cards seem to need this */
388 /* Asking to the card its capabilities */
389 for (i = 0; i < 2; i++) {
390 err = mmc_send_op_cond_iter(mmc, i != 0);
394 /* exit if not busy (flag seems to be inverted) */
395 if (mmc->ocr & OCR_BUSY)
398 mmc->op_cond_pending = 1;
402 static int mmc_complete_op_cond(struct mmc *mmc)
409 mmc->op_cond_pending = 0;
410 if (!(mmc->ocr & OCR_BUSY)) {
411 start = get_timer(0);
413 err = mmc_send_op_cond_iter(mmc, 1);
416 if (mmc->ocr & OCR_BUSY)
418 if (get_timer(start) > timeout)
424 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
425 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
426 cmd.resp_type = MMC_RSP_R3;
429 err = mmc_send_cmd(mmc, &cmd, NULL);
434 mmc->ocr = cmd.response[0];
437 mmc->version = MMC_VERSION_UNKNOWN;
439 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
446 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
449 struct mmc_data data;
452 /* Get the Card Status Register */
453 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
454 cmd.resp_type = MMC_RSP_R1;
457 data.dest = (char *)ext_csd;
459 data.blocksize = MMC_MAX_BLOCK_LEN;
460 data.flags = MMC_DATA_READ;
462 err = mmc_send_cmd(mmc, &cmd, &data);
468 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
474 cmd.cmdidx = MMC_CMD_SWITCH;
475 cmd.resp_type = MMC_RSP_R1b;
476 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
480 ret = mmc_send_cmd(mmc, &cmd, NULL);
482 /* Waiting for the ready status */
484 ret = mmc_send_status(mmc, timeout);
490 static int mmc_change_freq(struct mmc *mmc)
492 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
498 if (mmc_host_is_spi(mmc))
501 /* Only version 4 supports high-speed */
502 if (mmc->version < MMC_VERSION_4)
505 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
507 err = mmc_send_ext_csd(mmc, ext_csd);
512 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
514 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
519 /* Now check to see that it worked */
520 err = mmc_send_ext_csd(mmc, ext_csd);
525 /* No high-speed support */
526 if (!ext_csd[EXT_CSD_HS_TIMING])
529 /* High Speed is set, there are two types: 52MHz and 26MHz */
530 if (cardtype & EXT_CSD_CARD_TYPE_52) {
531 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
532 mmc->card_caps |= MMC_MODE_DDR_52MHz;
533 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
535 mmc->card_caps |= MMC_MODE_HS;
541 static int mmc_set_capacity(struct mmc *mmc, int part_num)
545 mmc->capacity = mmc->capacity_user;
549 mmc->capacity = mmc->capacity_boot;
552 mmc->capacity = mmc->capacity_rpmb;
558 mmc->capacity = mmc->capacity_gp[part_num - 4];
564 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
569 static int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
573 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
574 (mmc->part_config & ~PART_ACCESS_MASK)
575 | (part_num & PART_ACCESS_MASK));
578 * Set the capacity if the switch succeeded or was intended
579 * to return to representing the raw device.
581 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
582 ret = mmc_set_capacity(mmc, part_num);
583 mmc_get_blk_desc(mmc)->hwpart = part_num;
590 static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
592 struct udevice *mmc_dev = dev_get_parent(bdev);
593 struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
594 struct blk_desc *desc = dev_get_uclass_platdata(bdev);
597 if (desc->hwpart == hwpart)
600 if (mmc->part_config == MMCPART_NOAVAILABLE)
603 ret = mmc_switch_part(mmc, hwpart);
610 static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
612 struct mmc *mmc = find_mmc_device(desc->devnum);
618 if (mmc->block_dev.hwpart == hwpart)
621 if (mmc->part_config == MMCPART_NOAVAILABLE)
624 ret = mmc_switch_part(mmc, hwpart);
632 int mmc_hwpart_config(struct mmc *mmc,
633 const struct mmc_hwpart_conf *conf,
634 enum mmc_hwpart_conf_mode mode)
640 u32 max_enh_size_mult;
641 u32 tot_enh_size_mult = 0;
644 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
646 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
649 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
650 printf("eMMC >= 4.4 required for enhanced user data area\n");
654 if (!(mmc->part_support & PART_SUPPORT)) {
655 printf("Card does not support partitioning\n");
659 if (!mmc->hc_wp_grp_size) {
660 printf("Card does not define HC WP group size\n");
664 /* check partition alignment and total enhanced size */
665 if (conf->user.enh_size) {
666 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
667 conf->user.enh_start % mmc->hc_wp_grp_size) {
668 printf("User data enhanced area not HC WP group "
672 part_attrs |= EXT_CSD_ENH_USR;
673 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
674 if (mmc->high_capacity) {
675 enh_start_addr = conf->user.enh_start;
677 enh_start_addr = (conf->user.enh_start << 9);
683 tot_enh_size_mult += enh_size_mult;
685 for (pidx = 0; pidx < 4; pidx++) {
686 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
687 printf("GP%i partition not HC WP group size "
688 "aligned\n", pidx+1);
691 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
692 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
693 part_attrs |= EXT_CSD_ENH_GP(pidx);
694 tot_enh_size_mult += gp_size_mult[pidx];
698 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
699 printf("Card does not support enhanced attribute\n");
703 err = mmc_send_ext_csd(mmc, ext_csd);
708 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
709 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
710 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
711 if (tot_enh_size_mult > max_enh_size_mult) {
712 printf("Total enhanced size exceeds maximum (%u > %u)\n",
713 tot_enh_size_mult, max_enh_size_mult);
717 /* The default value of EXT_CSD_WR_REL_SET is device
718 * dependent, the values can only be changed if the
719 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
720 * changed only once and before partitioning is completed. */
721 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
722 if (conf->user.wr_rel_change) {
723 if (conf->user.wr_rel_set)
724 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
726 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
728 for (pidx = 0; pidx < 4; pidx++) {
729 if (conf->gp_part[pidx].wr_rel_change) {
730 if (conf->gp_part[pidx].wr_rel_set)
731 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
733 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
737 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
738 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
739 puts("Card does not support host controlled partition write "
740 "reliability settings\n");
744 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
745 EXT_CSD_PARTITION_SETTING_COMPLETED) {
746 printf("Card already partitioned\n");
750 if (mode == MMC_HWPART_CONF_CHECK)
753 /* Partitioning requires high-capacity size definitions */
754 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
755 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
756 EXT_CSD_ERASE_GROUP_DEF, 1);
761 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
763 /* update erase group size to be high-capacity */
764 mmc->erase_grp_size =
765 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
769 /* all OK, write the configuration */
770 for (i = 0; i < 4; i++) {
771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
772 EXT_CSD_ENH_START_ADDR+i,
773 (enh_start_addr >> (i*8)) & 0xFF);
777 for (i = 0; i < 3; i++) {
778 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
779 EXT_CSD_ENH_SIZE_MULT+i,
780 (enh_size_mult >> (i*8)) & 0xFF);
784 for (pidx = 0; pidx < 4; pidx++) {
785 for (i = 0; i < 3; i++) {
786 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
787 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
788 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
793 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
794 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
798 if (mode == MMC_HWPART_CONF_SET)
801 /* The WR_REL_SET is a write-once register but shall be
802 * written before setting PART_SETTING_COMPLETED. As it is
803 * write-once we can only write it when completing the
805 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
806 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
807 EXT_CSD_WR_REL_SET, wr_rel_set);
812 /* Setting PART_SETTING_COMPLETED confirms the partition
813 * configuration but it only becomes effective after power
814 * cycle, so we do not adjust the partition related settings
815 * in the mmc struct. */
817 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
818 EXT_CSD_PARTITION_SETTING,
819 EXT_CSD_PARTITION_SETTING_COMPLETED);
826 int mmc_getcd(struct mmc *mmc)
830 cd = board_mmc_getcd(mmc);
833 if (mmc->cfg->ops->getcd)
834 cd = mmc->cfg->ops->getcd(mmc);
842 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
845 struct mmc_data data;
847 /* Switch the frequency */
848 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
849 cmd.resp_type = MMC_RSP_R1;
850 cmd.cmdarg = (mode << 31) | 0xffffff;
851 cmd.cmdarg &= ~(0xf << (group * 4));
852 cmd.cmdarg |= value << (group * 4);
854 data.dest = (char *)resp;
857 data.flags = MMC_DATA_READ;
859 return mmc_send_cmd(mmc, &cmd, &data);
863 static int sd_change_freq(struct mmc *mmc)
867 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
868 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
869 struct mmc_data data;
874 if (mmc_host_is_spi(mmc))
877 /* Read the SCR to find out if this card supports higher speeds */
878 cmd.cmdidx = MMC_CMD_APP_CMD;
879 cmd.resp_type = MMC_RSP_R1;
880 cmd.cmdarg = mmc->rca << 16;
882 err = mmc_send_cmd(mmc, &cmd, NULL);
887 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
888 cmd.resp_type = MMC_RSP_R1;
894 data.dest = (char *)scr;
897 data.flags = MMC_DATA_READ;
899 err = mmc_send_cmd(mmc, &cmd, &data);
908 mmc->scr[0] = __be32_to_cpu(scr[0]);
909 mmc->scr[1] = __be32_to_cpu(scr[1]);
911 switch ((mmc->scr[0] >> 24) & 0xf) {
913 mmc->version = SD_VERSION_1_0;
916 mmc->version = SD_VERSION_1_10;
919 mmc->version = SD_VERSION_2;
920 if ((mmc->scr[0] >> 15) & 0x1)
921 mmc->version = SD_VERSION_3;
924 mmc->version = SD_VERSION_1_0;
928 if (mmc->scr[0] & SD_DATA_4BIT)
929 mmc->card_caps |= MMC_MODE_4BIT;
931 /* Version 1.0 doesn't support switching */
932 if (mmc->version == SD_VERSION_1_0)
937 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
938 (u8 *)switch_status);
943 /* The high-speed function is busy. Try again */
944 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
948 /* If high-speed isn't supported, we return */
949 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
953 * If the host doesn't support SD_HIGHSPEED, do not switch card to
954 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
955 * This can avoid furthur problem when the card runs in different
956 * mode between the host.
958 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
959 (mmc->cfg->host_caps & MMC_MODE_HS)))
962 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
967 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
968 mmc->card_caps |= MMC_MODE_HS;
973 /* frequency bases */
974 /* divided by 10 to be nice to platforms without floating point */
975 static const int fbase[] = {
982 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
983 * to platforms without floating point.
985 static const u8 multipliers[] = {
1004 static void mmc_set_ios(struct mmc *mmc)
1006 if (mmc->cfg->ops->set_ios)
1007 mmc->cfg->ops->set_ios(mmc);
1010 void mmc_set_clock(struct mmc *mmc, uint clock)
1012 if (clock > mmc->cfg->f_max)
1013 clock = mmc->cfg->f_max;
1015 if (clock < mmc->cfg->f_min)
1016 clock = mmc->cfg->f_min;
1023 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1025 mmc->bus_width = width;
1030 static int mmc_startup(struct mmc *mmc)
1034 u64 cmult, csize, capacity;
1036 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1037 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1039 bool has_parts = false;
1040 bool part_completed;
1041 struct blk_desc *bdesc;
1043 #ifdef CONFIG_MMC_SPI_CRC_ON
1044 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1045 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1046 cmd.resp_type = MMC_RSP_R1;
1048 err = mmc_send_cmd(mmc, &cmd, NULL);
1055 /* Put the Card in Identify Mode */
1056 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1057 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1058 cmd.resp_type = MMC_RSP_R2;
1061 err = mmc_send_cmd(mmc, &cmd, NULL);
1066 memcpy(mmc->cid, cmd.response, 16);
1069 * For MMC cards, set the Relative Address.
1070 * For SD cards, get the Relatvie Address.
1071 * This also puts the cards into Standby State
1073 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1074 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1075 cmd.cmdarg = mmc->rca << 16;
1076 cmd.resp_type = MMC_RSP_R6;
1078 err = mmc_send_cmd(mmc, &cmd, NULL);
1084 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1087 /* Get the Card-Specific Data */
1088 cmd.cmdidx = MMC_CMD_SEND_CSD;
1089 cmd.resp_type = MMC_RSP_R2;
1090 cmd.cmdarg = mmc->rca << 16;
1092 err = mmc_send_cmd(mmc, &cmd, NULL);
1094 /* Waiting for the ready status */
1095 mmc_send_status(mmc, timeout);
1100 mmc->csd[0] = cmd.response[0];
1101 mmc->csd[1] = cmd.response[1];
1102 mmc->csd[2] = cmd.response[2];
1103 mmc->csd[3] = cmd.response[3];
1105 if (mmc->version == MMC_VERSION_UNKNOWN) {
1106 int version = (cmd.response[0] >> 26) & 0xf;
1110 mmc->version = MMC_VERSION_1_2;
1113 mmc->version = MMC_VERSION_1_4;
1116 mmc->version = MMC_VERSION_2_2;
1119 mmc->version = MMC_VERSION_3;
1122 mmc->version = MMC_VERSION_4;
1125 mmc->version = MMC_VERSION_1_2;
1130 /* divide frequency by 10, since the mults are 10x bigger */
1131 freq = fbase[(cmd.response[0] & 0x7)];
1132 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1134 mmc->tran_speed = freq * mult;
1136 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1137 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1140 mmc->write_bl_len = mmc->read_bl_len;
1142 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1144 if (mmc->high_capacity) {
1145 csize = (mmc->csd[1] & 0x3f) << 16
1146 | (mmc->csd[2] & 0xffff0000) >> 16;
1149 csize = (mmc->csd[1] & 0x3ff) << 2
1150 | (mmc->csd[2] & 0xc0000000) >> 30;
1151 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1154 mmc->capacity_user = (csize + 1) << (cmult + 2);
1155 mmc->capacity_user *= mmc->read_bl_len;
1156 mmc->capacity_boot = 0;
1157 mmc->capacity_rpmb = 0;
1158 for (i = 0; i < 4; i++)
1159 mmc->capacity_gp[i] = 0;
1161 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1162 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1164 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1165 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1167 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1168 cmd.cmdidx = MMC_CMD_SET_DSR;
1169 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1170 cmd.resp_type = MMC_RSP_NONE;
1171 if (mmc_send_cmd(mmc, &cmd, NULL))
1172 printf("MMC: SET_DSR failed\n");
1175 /* Select the card, and put it into Transfer Mode */
1176 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1177 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1178 cmd.resp_type = MMC_RSP_R1;
1179 cmd.cmdarg = mmc->rca << 16;
1180 err = mmc_send_cmd(mmc, &cmd, NULL);
1187 * For SD, its erase group is always one sector
1189 mmc->erase_grp_size = 1;
1190 mmc->part_config = MMCPART_NOAVAILABLE;
1191 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1192 /* check ext_csd version and capacity */
1193 err = mmc_send_ext_csd(mmc, ext_csd);
1196 if (ext_csd[EXT_CSD_REV] >= 2) {
1198 * According to the JEDEC Standard, the value of
1199 * ext_csd's capacity is valid if the value is more
1202 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1203 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1204 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1205 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1206 capacity *= MMC_MAX_BLOCK_LEN;
1207 if ((capacity >> 20) > 2 * 1024)
1208 mmc->capacity_user = capacity;
1211 switch (ext_csd[EXT_CSD_REV]) {
1213 mmc->version = MMC_VERSION_4_1;
1216 mmc->version = MMC_VERSION_4_2;
1219 mmc->version = MMC_VERSION_4_3;
1222 mmc->version = MMC_VERSION_4_41;
1225 mmc->version = MMC_VERSION_4_5;
1228 mmc->version = MMC_VERSION_5_0;
1231 mmc->version = MMC_VERSION_5_1;
1235 /* The partition data may be non-zero but it is only
1236 * effective if PARTITION_SETTING_COMPLETED is set in
1237 * EXT_CSD, so ignore any data if this bit is not set,
1238 * except for enabling the high-capacity group size
1239 * definition (see below). */
1240 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1241 EXT_CSD_PARTITION_SETTING_COMPLETED);
1243 /* store the partition info of emmc */
1244 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1245 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1246 ext_csd[EXT_CSD_BOOT_MULT])
1247 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1248 if (part_completed &&
1249 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1250 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1252 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1254 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1256 for (i = 0; i < 4; i++) {
1257 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1258 uint mult = (ext_csd[idx + 2] << 16) +
1259 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1262 if (!part_completed)
1264 mmc->capacity_gp[i] = mult;
1265 mmc->capacity_gp[i] *=
1266 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1267 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1268 mmc->capacity_gp[i] <<= 19;
1271 if (part_completed) {
1272 mmc->enh_user_size =
1273 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1274 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1275 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1276 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1277 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1278 mmc->enh_user_size <<= 19;
1279 mmc->enh_user_start =
1280 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1281 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1282 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1283 ext_csd[EXT_CSD_ENH_START_ADDR];
1284 if (mmc->high_capacity)
1285 mmc->enh_user_start <<= 9;
1289 * Host needs to enable ERASE_GRP_DEF bit if device is
1290 * partitioned. This bit will be lost every time after a reset
1291 * or power off. This will affect erase size.
1295 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1296 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1299 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1300 EXT_CSD_ERASE_GROUP_DEF, 1);
1305 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1308 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1309 /* Read out group size from ext_csd */
1310 mmc->erase_grp_size =
1311 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1313 * if high capacity and partition setting completed
1314 * SEC_COUNT is valid even if it is smaller than 2 GiB
1315 * JEDEC Standard JESD84-B45, 6.2.4
1317 if (mmc->high_capacity && part_completed) {
1318 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1319 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1320 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1321 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1322 capacity *= MMC_MAX_BLOCK_LEN;
1323 mmc->capacity_user = capacity;
1326 /* Calculate the group size from the csd value. */
1327 int erase_gsz, erase_gmul;
1328 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1329 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1330 mmc->erase_grp_size = (erase_gsz + 1)
1334 mmc->hc_wp_grp_size = 1024
1335 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1336 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1338 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1341 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1346 err = sd_change_freq(mmc);
1348 err = mmc_change_freq(mmc);
1353 /* Restrict card's capabilities by what the host can do */
1354 mmc->card_caps &= mmc->cfg->host_caps;
1357 if (mmc->card_caps & MMC_MODE_4BIT) {
1358 cmd.cmdidx = MMC_CMD_APP_CMD;
1359 cmd.resp_type = MMC_RSP_R1;
1360 cmd.cmdarg = mmc->rca << 16;
1362 err = mmc_send_cmd(mmc, &cmd, NULL);
1366 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1367 cmd.resp_type = MMC_RSP_R1;
1369 err = mmc_send_cmd(mmc, &cmd, NULL);
1373 mmc_set_bus_width(mmc, 4);
1376 if (mmc->card_caps & MMC_MODE_HS)
1377 mmc->tran_speed = 50000000;
1379 mmc->tran_speed = 25000000;
1380 } else if (mmc->version >= MMC_VERSION_4) {
1381 /* Only version 4 of MMC supports wider bus widths */
1384 /* An array of possible bus widths in order of preference */
1385 static unsigned ext_csd_bits[] = {
1386 EXT_CSD_DDR_BUS_WIDTH_8,
1387 EXT_CSD_DDR_BUS_WIDTH_4,
1388 EXT_CSD_BUS_WIDTH_8,
1389 EXT_CSD_BUS_WIDTH_4,
1390 EXT_CSD_BUS_WIDTH_1,
1393 /* An array to map CSD bus widths to host cap bits */
1394 static unsigned ext_to_hostcaps[] = {
1395 [EXT_CSD_DDR_BUS_WIDTH_4] =
1396 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1397 [EXT_CSD_DDR_BUS_WIDTH_8] =
1398 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1399 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1400 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1403 /* An array to map chosen bus width to an integer */
1404 static unsigned widths[] = {
1408 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1409 unsigned int extw = ext_csd_bits[idx];
1410 unsigned int caps = ext_to_hostcaps[extw];
1413 * If the bus width is still not changed,
1414 * don't try to set the default again.
1415 * Otherwise, recover from switch attempts
1416 * by switching to 1-bit bus width.
1418 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1419 mmc->bus_width == 1) {
1425 * Check to make sure the card and controller support
1426 * these capabilities
1428 if ((mmc->card_caps & caps) != caps)
1431 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1432 EXT_CSD_BUS_WIDTH, extw);
1437 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1438 mmc_set_bus_width(mmc, widths[idx]);
1440 err = mmc_send_ext_csd(mmc, test_csd);
1445 /* Only compare read only fields */
1446 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1447 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1448 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1449 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1450 ext_csd[EXT_CSD_REV]
1451 == test_csd[EXT_CSD_REV] &&
1452 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1453 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1454 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1455 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1464 if (mmc->card_caps & MMC_MODE_HS) {
1465 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1466 mmc->tran_speed = 52000000;
1468 mmc->tran_speed = 26000000;
1472 mmc_set_clock(mmc, mmc->tran_speed);
1474 /* Fix the block length for DDR mode */
1475 if (mmc->ddr_mode) {
1476 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1477 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1480 /* fill in device description */
1481 bdesc = mmc_get_blk_desc(mmc);
1485 bdesc->blksz = mmc->read_bl_len;
1486 bdesc->log2blksz = LOG2(bdesc->blksz);
1487 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1488 #if !defined(CONFIG_SPL_BUILD) || \
1489 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1490 !defined(CONFIG_USE_TINY_PRINTF))
1491 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1492 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1493 (mmc->cid[3] >> 16) & 0xffff);
1494 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1495 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1496 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1497 (mmc->cid[2] >> 24) & 0xff);
1498 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1499 (mmc->cid[2] >> 16) & 0xf);
1501 bdesc->vendor[0] = 0;
1502 bdesc->product[0] = 0;
1503 bdesc->revision[0] = 0;
1505 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1512 static int mmc_send_if_cond(struct mmc *mmc)
1517 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1518 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1519 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1520 cmd.resp_type = MMC_RSP_R7;
1522 err = mmc_send_cmd(mmc, &cmd, NULL);
1527 if ((cmd.response[0] & 0xff) != 0xaa)
1528 return UNUSABLE_ERR;
1530 mmc->version = SD_VERSION_2;
1536 int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
1538 struct blk_desc *bdesc;
1539 struct udevice *bdev;
1542 ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, -1, 512,
1545 debug("Cannot create block device\n");
1548 bdesc = dev_get_uclass_platdata(bdev);
1552 /* the following chunk was from mmc_register() */
1554 /* Setup dsr related values */
1556 mmc->dsr = 0xffffffff;
1557 /* Setup the universal parts of the block interface just once */
1558 bdesc->removable = 1;
1560 /* setup initial part type */
1561 bdesc->part_type = cfg->part_type;
1567 int mmc_unbind(struct udevice *dev)
1569 struct udevice *bdev;
1571 device_find_first_child(dev, &bdev);
1573 device_remove(bdev);
1574 device_unbind(bdev);
1581 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1583 struct blk_desc *bdesc;
1586 /* quick validation */
1587 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1588 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1591 mmc = calloc(1, sizeof(*mmc));
1598 /* the following chunk was mmc_register() */
1600 /* Setup dsr related values */
1602 mmc->dsr = 0xffffffff;
1603 /* Setup the universal parts of the block interface just once */
1604 bdesc = mmc_get_blk_desc(mmc);
1605 bdesc->if_type = IF_TYPE_MMC;
1606 bdesc->removable = 1;
1607 bdesc->devnum = mmc_get_next_devnum();
1608 bdesc->block_read = mmc_bread;
1609 bdesc->block_write = mmc_bwrite;
1610 bdesc->block_erase = mmc_berase;
1612 /* setup initial part type */
1613 bdesc->part_type = mmc->cfg->part_type;
1619 void mmc_destroy(struct mmc *mmc)
1621 /* only freeing memory for now */
1627 static int mmc_get_dev(int dev, struct blk_desc **descp)
1629 struct mmc *mmc = find_mmc_device(dev);
1634 ret = mmc_init(mmc);
1638 *descp = &mmc->block_dev;
1644 /* board-specific MMC power initializations. */
1645 __weak void board_mmc_power_init(void)
1649 int mmc_start_init(struct mmc *mmc)
1653 /* we pretend there's no card when init is NULL */
1654 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1656 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1657 printf("MMC: no card present\n");
1665 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1666 mmc_adapter_card_type_ident();
1668 board_mmc_power_init();
1670 /* made sure it's not NULL earlier */
1671 err = mmc->cfg->ops->init(mmc);
1677 mmc_set_bus_width(mmc, 1);
1678 mmc_set_clock(mmc, 1);
1680 /* Reset the Card */
1681 err = mmc_go_idle(mmc);
1686 /* The internal partition reset to user partition(0) at every CMD0*/
1687 mmc_get_blk_desc(mmc)->hwpart = 0;
1689 /* Test for SD version 2 */
1690 err = mmc_send_if_cond(mmc);
1692 /* Now try to get the SD card's operating condition */
1693 err = sd_send_op_cond(mmc);
1695 /* If the command timed out, we check for an MMC card */
1696 if (err == TIMEOUT) {
1697 err = mmc_send_op_cond(mmc);
1700 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1701 printf("Card did not respond to voltage select!\n");
1703 return UNUSABLE_ERR;
1708 mmc->init_in_progress = 1;
1713 static int mmc_complete_init(struct mmc *mmc)
1717 mmc->init_in_progress = 0;
1718 if (mmc->op_cond_pending)
1719 err = mmc_complete_op_cond(mmc);
1722 err = mmc_startup(mmc);
1730 int mmc_init(struct mmc *mmc)
1734 #ifdef CONFIG_DM_MMC
1735 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
1742 start = get_timer(0);
1744 if (!mmc->init_in_progress)
1745 err = mmc_start_init(mmc);
1748 err = mmc_complete_init(mmc);
1749 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1753 int mmc_set_dsr(struct mmc *mmc, u16 val)
1759 /* CPU-specific MMC initializations */
1760 __weak int cpu_mmc_init(bd_t *bis)
1765 /* board-specific MMC initializations. */
1766 __weak int board_mmc_init(bd_t *bis)
1771 void mmc_set_preinit(struct mmc *mmc, int preinit)
1773 mmc->preinit = preinit;
1776 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1777 static int mmc_probe(bd_t *bis)
1781 #elif defined(CONFIG_DM_MMC)
1782 static int mmc_probe(bd_t *bis)
1786 struct udevice *dev;
1788 ret = uclass_get(UCLASS_MMC, &uc);
1793 * Try to add them in sequence order. Really with driver model we
1794 * should allow holes, but the current MMC list does not allow that.
1795 * So if we request 0, 1, 3 we will get 0, 1, 2.
1797 for (i = 0; ; i++) {
1798 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1802 uclass_foreach_dev(dev, uc) {
1803 ret = device_probe(dev);
1805 printf("%s - probe failed: %d\n", dev->name, ret);
1811 static int mmc_probe(bd_t *bis)
1813 if (board_mmc_init(bis) < 0)
1820 int mmc_initialize(bd_t *bis)
1822 static int initialized = 0;
1824 if (initialized) /* Avoid initializing mmc multiple times */
1831 ret = mmc_probe(bis);
1835 #ifndef CONFIG_SPL_BUILD
1836 print_mmc_devices(',');
1843 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1845 * This function changes the size of boot partition and the size of rpmb
1846 * partition present on EMMC devices.
1849 * struct *mmc: pointer for the mmc device strcuture
1850 * bootsize: size of boot partition
1851 * rpmbsize: size of rpmb partition
1853 * Returns 0 on success.
1856 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1857 unsigned long rpmbsize)
1862 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1863 cmd.cmdidx = MMC_CMD_RES_MAN;
1864 cmd.resp_type = MMC_RSP_R1b;
1865 cmd.cmdarg = MMC_CMD62_ARG1;
1867 err = mmc_send_cmd(mmc, &cmd, NULL);
1869 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1873 /* Boot partition changing mode */
1874 cmd.cmdidx = MMC_CMD_RES_MAN;
1875 cmd.resp_type = MMC_RSP_R1b;
1876 cmd.cmdarg = MMC_CMD62_ARG2;
1878 err = mmc_send_cmd(mmc, &cmd, NULL);
1880 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1883 /* boot partition size is multiple of 128KB */
1884 bootsize = (bootsize * 1024) / 128;
1886 /* Arg: boot partition size */
1887 cmd.cmdidx = MMC_CMD_RES_MAN;
1888 cmd.resp_type = MMC_RSP_R1b;
1889 cmd.cmdarg = bootsize;
1891 err = mmc_send_cmd(mmc, &cmd, NULL);
1893 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1896 /* RPMB partition size is multiple of 128KB */
1897 rpmbsize = (rpmbsize * 1024) / 128;
1898 /* Arg: RPMB partition size */
1899 cmd.cmdidx = MMC_CMD_RES_MAN;
1900 cmd.resp_type = MMC_RSP_R1b;
1901 cmd.cmdarg = rpmbsize;
1903 err = mmc_send_cmd(mmc, &cmd, NULL);
1905 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1912 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1913 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1916 * Returns 0 on success.
1918 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1922 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1923 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1924 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1925 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1933 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1934 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1937 * Returns 0 on success.
1939 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1943 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1944 EXT_CSD_BOOT_ACK(ack) |
1945 EXT_CSD_BOOT_PART_NUM(part_num) |
1946 EXT_CSD_PARTITION_ACCESS(access));
1954 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1955 * for enable. Note that this is a write-once field for non-zero values.
1957 * Returns 0 on success.
1959 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1961 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1967 static const struct blk_ops mmc_blk_ops = {
1969 .write = mmc_bwrite,
1970 .select_hwpart = mmc_select_hwpart,
1973 U_BOOT_DRIVER(mmc_blk) = {
1976 .ops = &mmc_blk_ops,
1979 U_BOOT_LEGACY_BLK(mmc) = {
1980 .if_typename = "mmc",
1981 .if_type = IF_TYPE_MMC,
1983 .get_dev = mmc_get_dev,
1984 .select_hwpart = mmc_select_hwpartp,