drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <malloc.h>
  13 #include <spi.h>
  14 #include <spi_flash.h>
  15 #include <watchdog.h>
  16
  17 #include "sf_internal.h"
  18
  19 static void spi_flash_addr(u32 addr, u8 *cmd)
  20 {
  21         /* cmd[0] is actual command */
  22         cmd[1] = addr >> 16;
  23         cmd[2] = addr >> 8;
  24         cmd[3] = addr >> 0;
  25 }
  26
  27 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  28 {
  29         int ret;
  30         u8 cmd;
  31
  32         cmd = CMD_READ_STATUS;
  33         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  34         if (ret < 0) {
  35                 debug("SF: fail to read status register\n");
  36                 return ret;
  37         }
  38
  39         return 0;
  40 }
  41
  42 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  43 {
  44         u8 cmd;
  45         int ret;
  46
  47         cmd = CMD_WRITE_STATUS;
  48         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  49         if (ret < 0) {
  50                 debug("SF: fail to write status register\n");
  51                 return ret;
  52         }
  53
  54         return 0;
  55 }
  56
  57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  58 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  59 {
  60         int ret;
  61         u8 cmd;
  62
  63         cmd = CMD_READ_CONFIG;
  64         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  65         if (ret < 0) {
  66                 debug("SF: fail to read config register\n");
  67                 return ret;
  68         }
  69
  70         return 0;
  71 }
  72
  73 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  74 {
  75         u8 data[2];
  76         u8 cmd;
  77         int ret;
  78
  79         ret = spi_flash_cmd_read_status(flash, &data[0]);
  80         if (ret < 0)
  81                 return ret;
  82
  83         cmd = CMD_WRITE_STATUS;
  84         data[1] = wc;
  85         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
  86         if (ret) {
  87                 debug("SF: fail to write config register\n");
  88                 return ret;
  89         }
  90
  91         return 0;
  92 }
  93 #endif
  94
  95 #ifdef CONFIG_SPI_FLASH_BAR
  96 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  97 {
  98         u8 cmd;
  99         int ret;
 100
 101         if (flash->bank_curr == bank_sel) {
 102                 debug("SF: not require to enable bank%d\n", bank_sel);
 103                 return 0;
 104         }
 105
 106         cmd = flash->bank_write_cmd;
 107         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 108         if (ret < 0) {
 109                 debug("SF: fail to write bank register\n");
 110                 return ret;
 111         }
 112         flash->bank_curr = bank_sel;
 113
 114         return 0;
 115 }
 116
 117 static int spi_flash_bank(struct spi_flash *flash, u32 offset)
 118 {
 119         u8 bank_sel;
 120         int ret;
 121
 122         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 123
 124         ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 125         if (ret) {
 126                 debug("SF: fail to set bank%d\n", bank_sel);
 127                 return ret;
 128         }
 129
 130         return bank_sel;
 131 }
 132 #endif
 133
 134 #ifdef CONFIG_SF_DUAL_FLASH
 135 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 136 {
 137         switch (flash->dual_flash) {
 138         case SF_DUAL_STACKED_FLASH:
 139                 if (*addr >= (flash->size >> 1)) {
 140                         *addr -= flash->size >> 1;
 141                         flash->spi->flags |= SPI_XFER_U_PAGE;
 142                 } else {
 143                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 144                 }
 145                 break;
 146         case SF_DUAL_PARALLEL_FLASH:
 147                 *addr >>= flash->shift;
 148                 break;
 149         default:
 150                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 151                 break;
 152         }
 153 }
 154 #endif
 155
 156 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 157 {
 158         struct spi_slave *spi = flash->spi;
 159         unsigned long timebase;
 160         unsigned long flags = SPI_XFER_BEGIN;
 161         int ret;
 162         u8 status;
 163         u8 check_status = 0x0;
 164         u8 poll_bit = STATUS_WIP;
 165         u8 cmd = flash->poll_cmd;
 166
 167         if (cmd == CMD_FLAG_STATUS) {
 168                 poll_bit = STATUS_PEC;
 169                 check_status = poll_bit;
 170         }
 171
 172 #ifdef CONFIG_SF_DUAL_FLASH
 173         if (spi->flags & SPI_XFER_U_PAGE)
 174                 flags |= SPI_XFER_U_PAGE;
 175 #endif
 176         ret = spi_xfer(spi, 8, &cmd, NULL, flags);
 177         if (ret) {
 178                 debug("SF: fail to read %s status register\n",
 179                       cmd == CMD_READ_STATUS ? "read" : "flag");
 180                 return ret;
 181         }
 182
 183         timebase = get_timer(0);
 184         do {
 185                 WATCHDOG_RESET();
 186
 187                 ret = spi_xfer(spi, 8, NULL, &status, 0);
 188                 if (ret)
 189                         return -1;
 190
 191                 if ((status & poll_bit) == check_status)
 192                         break;
 193
 194         } while (get_timer(timebase) < timeout);
 195
 196         spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
 197
 198         if ((status & poll_bit) == check_status)
 199                 return 0;
 200
 201         /* Timed out */
 202         debug("SF: time out!\n");
 203         return -1;
 204 }
 205
 206 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 207                 size_t cmd_len, const void *buf, size_t buf_len)
 208 {
 209         struct spi_slave *spi = flash->spi;
 210         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 211         int ret;
 212
 213         if (buf == NULL)
 214                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 215
 216         ret = spi_claim_bus(flash->spi);
 217         if (ret) {
 218                 debug("SF: unable to claim SPI bus\n");
 219                 return ret;
 220         }
 221
 222         ret = spi_flash_cmd_write_enable(flash);
 223         if (ret < 0) {
 224                 debug("SF: enabling write failed\n");
 225                 return ret;
 226         }
 227
 228         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 229         if (ret < 0) {
 230                 debug("SF: write cmd failed\n");
 231                 return ret;
 232         }
 233
 234         ret = spi_flash_cmd_wait_ready(flash, timeout);
 235         if (ret < 0) {
 236                 debug("SF: write %s timed out\n",
 237                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 238                         "program" : "page erase");
 239                 return ret;
 240         }
 241
 242         spi_release_bus(spi);
 243
 244         return ret;
 245 }
 246
 247 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 248 {
 249         u32 erase_size, erase_addr;
 250         u8 cmd[SPI_FLASH_CMD_LEN];
 251         int ret = -1;
 252
 253         erase_size = flash->erase_size;
 254         if (offset % erase_size || len % erase_size) {
 255                 debug("SF: Erase offset/length not multiple of erase size\n");
 256                 return -1;
 257         }
 258
 259         cmd[0] = flash->erase_cmd;
 260         while (len) {
 261                 erase_addr = offset;
 262
 263 #ifdef CONFIG_SF_DUAL_FLASH
 264                 if (flash->dual_flash > SF_SINGLE_FLASH)
 265                         spi_flash_dual_flash(flash, &erase_addr);
 266 #endif
 267 #ifdef CONFIG_SPI_FLASH_BAR
 268                 ret = spi_flash_bank(flash, erase_addr);
 269                 if (ret < 0)
 270                         return ret;
 271 #endif
 272                 spi_flash_addr(erase_addr, cmd);
 273
 274                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 275                       cmd[2], cmd[3], erase_addr);
 276
 277                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 278                 if (ret < 0) {
 279                         debug("SF: erase failed\n");
 280                         break;
 281                 }
 282
 283                 offset += erase_size;
 284                 len -= erase_size;
 285         }
 286
 287         return ret;
 288 }
 289
 290 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 291                 size_t len, const void *buf)
 292 {
 293         unsigned long byte_addr, page_size;
 294         u32 write_addr;
 295         size_t chunk_len, actual;
 296         u8 cmd[SPI_FLASH_CMD_LEN];
 297         int ret = -1;
 298
 299         page_size = flash->page_size;
 300
 301         cmd[0] = flash->write_cmd;
 302         for (actual = 0; actual < len; actual += chunk_len) {
 303                 write_addr = offset;
 304
 305 #ifdef CONFIG_SF_DUAL_FLASH
 306                 if (flash->dual_flash > SF_SINGLE_FLASH)
 307                         spi_flash_dual_flash(flash, &write_addr);
 308 #endif
 309 #ifdef CONFIG_SPI_FLASH_BAR
 310                 ret = spi_flash_bank(flash, write_addr);
 311                 if (ret < 0)
 312                         return ret;
 313 #endif
 314                 byte_addr = offset % page_size;
 315                 chunk_len = min(len - actual, page_size - byte_addr);
 316
 317                 if (flash->spi->max_write_size)
 318                         chunk_len = min(chunk_len, flash->spi->max_write_size);
 319
 320                 spi_flash_addr(write_addr, cmd);
 321
 322                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 323                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 324
 325                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 326                                         buf + actual, chunk_len);
 327                 if (ret < 0) {
 328                         debug("SF: write failed\n");
 329                         break;
 330                 }
 331
 332                 offset += chunk_len;
 333         }
 334
 335         return ret;
 336 }
 337
 338 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 339                 size_t cmd_len, void *data, size_t data_len)
 340 {
 341         struct spi_slave *spi = flash->spi;
 342         int ret;
 343
 344         ret = spi_claim_bus(flash->spi);
 345         if (ret) {
 346                 debug("SF: unable to claim SPI bus\n");
 347                 return ret;
 348         }
 349
 350         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 351         if (ret < 0) {
 352                 debug("SF: read cmd failed\n");
 353                 return ret;
 354         }
 355
 356         spi_release_bus(spi);
 357
 358         return ret;
 359 }
 360
 361 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 362                 size_t len, void *data)
 363 {
 364         u8 *cmd, cmdsz;
 365         u32 remain_len, read_len, read_addr;
 366         int bank_sel = 0;
 367         int ret = -1;
 368
 369         /* Handle memory-mapped SPI */
 370         if (flash->memory_map) {
 371                 ret = spi_claim_bus(flash->spi);
 372                 if (ret) {
 373                         debug("SF: unable to claim SPI bus\n");
 374                         return ret;
 375                 }
 376                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 377                 memcpy(data, flash->memory_map + offset, len);
 378                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 379                 spi_release_bus(flash->spi);
 380                 return 0;
 381         }
 382
 383         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 384         cmd = malloc(cmdsz);
 385         memset(cmd, 0, cmdsz);
 386
 387         cmd[0] = flash->read_cmd;
 388         while (len) {
 389                 read_addr = offset;
 390
 391 #ifdef CONFIG_SF_DUAL_FLASH
 392                 if (flash->dual_flash > SF_SINGLE_FLASH)
 393                         spi_flash_dual_flash(flash, &read_addr);
 394 #endif
 395 #ifdef CONFIG_SPI_FLASH_BAR
 396                 bank_sel = spi_flash_bank(flash, read_addr);
 397                 if (bank_sel < 0)
 398                         return ret;
 399 #endif
 400                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 401                                 (bank_sel + 1)) - offset;
 402                 if (len < remain_len)
 403                         read_len = len;
 404                 else
 405                         read_len = remain_len;
 406
 407                 spi_flash_addr(read_addr, cmd);
 408
 409                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 410                 if (ret < 0) {
 411                         debug("SF: read failed\n");
 412                         break;
 413                 }
 414
 415                 offset += read_len;
 416                 len -= read_len;
 417                 data += read_len;
 418         }
 419
 420         return ret;
 421 }
 422
 423 #ifdef CONFIG_SPI_FLASH_SST
 424 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 425 {
 426         int ret;
 427         u8 cmd[4] = {
 428                 CMD_SST_BP,
 429                 offset >> 16,
 430                 offset >> 8,
 431                 offset,
 432         };
 433
 434         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 435               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 436
 437         ret = spi_flash_cmd_write_enable(flash);
 438         if (ret)
 439                 return ret;
 440
 441         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 442         if (ret)
 443                 return ret;
 444
 445         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 446 }
 447
 448 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 449                 const void *buf)
 450 {
 451         size_t actual, cmd_len;
 452         int ret;
 453         u8 cmd[4];
 454
 455         ret = spi_claim_bus(flash->spi);
 456         if (ret) {
 457                 debug("SF: Unable to claim SPI bus\n");
 458                 return ret;
 459         }
 460
 461         /* If the data is not word aligned, write out leading single byte */
 462         actual = offset % 2;
 463         if (actual) {
 464                 ret = sst_byte_write(flash, offset, buf);
 465                 if (ret)
 466                         goto done;
 467         }
 468         offset += actual;
 469
 470         ret = spi_flash_cmd_write_enable(flash);
 471         if (ret)
 472                 goto done;
 473
 474         cmd_len = 4;
 475         cmd[0] = CMD_SST_AAI_WP;
 476         cmd[1] = offset >> 16;
 477         cmd[2] = offset >> 8;
 478         cmd[3] = offset;
 479
 480         for (; actual < len - 1; actual += 2) {
 481                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 482                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 483                       cmd[0], offset);
 484
 485                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 486                                         buf + actual, 2);
 487                 if (ret) {
 488                         debug("SF: sst word program failed\n");
 489                         break;
 490                 }
 491
 492                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 493                 if (ret)
 494                         break;
 495
 496                 cmd_len = 1;
 497                 offset += 2;
 498         }
 499
 500         if (!ret)
 501                 ret = spi_flash_cmd_write_disable(flash);
 502
 503         /* If there is a single trailing byte, write it out */
 504         if (!ret && actual != len)
 505                 ret = sst_byte_write(flash, offset, buf + actual);
 506
 507  done:
 508         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 509               ret ? "failure" : "success", len, offset - actual);
 510
 511         spi_release_bus(flash->spi);
 512         return ret;
 513 }
 514 #endif