2 * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
17 * @brief This file contains the NAND Flash Controller register information.
23 #ifndef __MXC_NAND_H__
24 #define __MXC_NAND_H__
26 #include <asm/arch/mx51.h>
28 #define IS_2K_PAGE_NAND ((mtd->writesize / info->num_of_intlv) \
30 #define IS_4K_PAGE_NAND ((mtd->writesize / info->num_of_intlv) \
32 #define IS_LARGE_PAGE_NAND ((mtd->writesize / info->num_of_intlv) > 512)
34 #define GET_NAND_OOB_SIZE (mtd->oobsize / info->num_of_intlv)
35 #define GET_NAND_PAGE_SIZE (mtd->writesize / info->num_of_intlv)
38 * main area for bad block marker is in the last data section
39 * the spare area for swapped bad block marker is the second
40 * byte of last spare section
42 #define NAND_SECTIONS (GET_NAND_PAGE_SIZE >> 9)
43 #define NAND_OOB_PER_SECTION (((GET_NAND_OOB_SIZE / NAND_SECTIONS) >> 1) << 1)
44 #define NAND_CHUNKS (GET_NAND_PAGE_SIZE / (512 + NAND_OOB_PER_SECTION))
46 #define BAD_BLK_MARKER_MAIN_OFFS \
47 (GET_NAND_PAGE_SIZE - NAND_CHUNKS * NAND_OOB_PER_SECTION)
49 #define BAD_BLK_MARKER_SP_OFFS (NAND_CHUNKS * SPARE_LEN)
51 #define BAD_BLK_MARKER_OOB_OFFS (NAND_CHUNKS * NAND_OOB_PER_SECTION)
53 #define BAD_BLK_MARKER_MAIN \
54 ((u32)MAIN_AREA0 + BAD_BLK_MARKER_MAIN_OFFS)
56 #define BAD_BLK_MARKER_SP \
57 ((u32)SPARE_AREA0 + BAD_BLK_MARKER_SP_OFFS)
59 #define NAND_PAGESIZE_2KB 2048
60 #define NAND_PAGESIZE_4KB 4096
62 #define NFC_AXI_BASE_ADDR NFC_BASE_ADDR_AXI
63 #define NFC_IP_BASE_ADDR NFC_BASE_ADDR
64 #define MXC_INT_NANDFC MXC_INT_NFC
65 #define CONFIG_MXC_NFC_SP_AUTO
66 #define NFC_FLASH_CMD (NFC_AXI_BASE_ADDR + 0x1E00)
67 #define NFC_FLASH_ADDR0 (NFC_AXI_BASE_ADDR + 0x1E04)
68 #define NFC_FLASH_ADDR8 (NFC_AXI_BASE_ADDR + 0x1E24)
69 #define NFC_CONFIG1 (NFC_AXI_BASE_ADDR + 0x1E34)
70 #define NFC_ECC_STATUS_RESULT (NFC_AXI_BASE_ADDR + 0x1E38)
71 #define NFC_ECC_STATUS_SUM (NFC_AXI_BASE_ADDR + 0x1E3C)
72 #define LAUNCH_NFC (NFC_AXI_BASE_ADDR + 0x1E40)
73 #define NFC_WRPROT (NFC_IP_BASE_ADDR + 0x00)
74 #define NFC_WRPROT_UNLOCK_BLK_ADD0 (NFC_IP_BASE_ADDR + 0x04)
75 #define NFC_CONFIG2 (NFC_IP_BASE_ADDR + 0x24)
76 #define NFC_CONFIG3 (NFC_IP_BASE_ADDR + 0x28)
77 #define NFC_IPC (NFC_IP_BASE_ADDR + 0x2C)
80 * Addresses for NFC RAM BUFFER Main area 0
82 #define MAIN_AREA0 ((u16 *)(NFC_AXI_BASE_ADDR + 0x000))
83 #define MAIN_AREA1 ((u16 *)(NFC_AXI_BASE_ADDR + 0x200))
86 * Addresses for NFC SPARE BUFFER Spare area 0
88 #define SPARE_AREA0 ((u16 *)(NFC_AXI_BASE_ADDR + 0x1000))
91 #define SPARE_SIZE (SPARE_LEN * SPARE_COUNT)
93 #define NFC_SPAS_WIDTH 8
94 #define NFC_SPAS_SHIFT 16
98 is_soc_rev(CHIP_REV_2_0) >= 0 ? \
99 !((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) : \
100 ((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) \
103 #define NFC_SET_SPAS(v) \
104 raw_write((((raw_read(NFC_CONFIG2) & \
105 NFC_FIELD_RESET(NFC_SPAS_WIDTH, NFC_SPAS_SHIFT)) | ((v) << 16))), \
108 #define NFC_SET_ECC_MODE(v) \
110 if (is_soc_rev(CHIP_REV_2_0) >= 0) { \
111 if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \
112 raw_write(((raw_read(NFC_CONFIG2) & \
113 NFC_ECC_MODE_MASK) | \
114 NFC_ECC_MODE_4), NFC_CONFIG2); \
116 raw_write(((raw_read(NFC_CONFIG2) & \
117 NFC_ECC_MODE_MASK) & \
118 NFC_ECC_MODE_8), NFC_CONFIG2); \
120 if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \
121 raw_write(((raw_read(NFC_CONFIG2) & \
122 NFC_ECC_MODE_MASK) & \
123 NFC_ECC_MODE_8), NFC_CONFIG2); \
125 raw_write(((raw_read(NFC_CONFIG2) & \
126 NFC_ECC_MODE_MASK) | \
127 NFC_ECC_MODE_4), NFC_CONFIG2); \
131 #define WRITE_NFC_IP_REG(val, reg) \
133 raw_write(NFC_IPC_CREQ, NFC_IPC); \
134 while (!((raw_read(NFC_IPC) & NFC_IPC_ACK)>>1)) \
136 raw_write(val, reg); \
137 raw_write(0, NFC_IPC); \
140 #define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT);
143 * Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for
148 #define NFC_INPUT 0x4
149 #define NFC_OUTPUT 0x8
151 #define NFC_STATUS 0x20
152 #define NFC_AUTO_PROG 0x40
153 #define NFC_AUTO_READ 0x80
154 #define NFC_AUTO_ERASE 0x200
155 #define NFC_COPY_BACK_0 0x400
156 #define NFC_COPY_BACK_1 0x800
157 #define NFC_AUTO_STATE 0x1000
159 /* Bit Definitions for NFC_IPC*/
160 #define NFC_OPS_STAT (1 << 31)
161 #define NFC_OP_DONE (1 << 30)
162 #define NFC_RB (1 << 28)
163 #define NFC_PS_WIDTH 2
164 #define NFC_PS_SHIFT 0
170 #define NFC_ONE_CYCLE (1 << 2)
171 #define NFC_INT_MSK (1 << 15)
172 #define NFC_AUTO_PROG_DONE_MSK (1 << 14)
173 #define NFC_NUM_ADDR_PHASE1_WIDTH 2
174 #define NFC_NUM_ADDR_PHASE1_SHIFT 12
175 #define NFC_NUM_ADDR_PHASE0_WIDTH 1
176 #define NFC_NUM_ADDR_PHASE0_SHIFT 5
177 #define NFC_ONE_LESS_PHASE1 0
178 #define NFC_TWO_LESS_PHASE1 1
179 #define NFC_FLASH_ADDR_SHIFT 0
180 #define NFC_UNLOCK_END_ADDR_SHIFT 16
182 /* Bit definition for NFC_CONFIGRATION_1 */
183 #define NFC_SP_EN (1 << 0)
184 #define NFC_CE (1 << 1)
185 #define NFC_RST (1 << 2)
186 #define NFC_ECC_EN (1 << 3)
188 #define NFC_FIELD_RESET(width, shift) (~(((1 << (width)) - 1) << (shift)))
190 #define NFC_RBA_SHIFT 4
191 #define NFC_RBA_WIDTH 3
193 #define NFC_ITERATION_SHIFT 8
194 #define NFC_ITERATION_WIDTH 4
195 #define NFC_ACTIVE_CS_SHIFT 12
196 #define NFC_ACTIVE_CS_WIDTH 3
197 /* bit definition for CONFIGRATION3 */
198 #define NFC_NO_SDMA (1 << 20)
199 #define NFC_FMP_SHIFT 16
200 #define NFC_FMP_WIDTH 4
201 #define NFC_RBB_MODE (1 << 15)
202 #define NFC_NUM_OF_DEVICES_SHIFT 12
203 #define NFC_NUM_OF_DEVICES_WIDTH 4
204 #define NFC_DMA_MODE_SHIFT 11
205 #define NFC_DMA_MODE_WIDTH 1
206 #define NFC_SBB_SHIFT 8
207 #define NFC_SBB_WIDTH 3
208 #define NFC_BIG (1 << 7)
209 #define NFC_SB2R_SHIFT 4
210 #define NFC_SB2R_WIDTH 3
211 #define NFC_FW_SHIFT 3
212 #define NFC_FW_WIDTH 1
213 #define NFC_TOO (1 << 2)
214 #define NFC_ADD_OP_SHIFT 0
215 #define NFC_ADD_OP_WIDTH 2
218 #define NFC_ST_CMD_SHITF 24
219 #define NFC_ST_CMD_WIDTH 8
221 #define NFC_PPB_32 (0 << 7)
222 #define NFC_PPB_64 (1 << 7)
223 #define NFC_PPB_128 (2 << 7)
224 #define NFC_PPB_256 (3 << 7)
225 #define NFC_PPB_RESET (~(3 << 7))
227 #define NFC_BLS_LOCKED (0 << 6)
228 #define NFC_BLS_LOCKED_DEFAULT (1 << 6)
229 #define NFC_BLS_UNLCOKED (2 << 6)
230 #define NFC_BLS_RESET (~(3 << 16))
231 #define NFC_WPC_LOCK_TIGHT 1
232 #define NFC_WPC_LOCK (1 << 1)
233 #define NFC_WPC_UNLOCK (1 << 2)
234 #define NFC_WPC_RESET (~(7))
235 #define NFC_ECC_MODE_4 (1 << 6)
236 #define NFC_ECC_MODE_8 (~(1 << 6))
237 #define NFC_ECC_MODE_MASK (~(1 << 6))
238 #define NFC_SPAS_16 8
239 #define NFC_SPAS_64 32
240 #define NFC_SPAS_128 64
241 #define NFC_SPAS_112 56
242 #define NFC_SPAS_218 109
243 #define NFC_IPC_CREQ (1 << 0)
244 #define NFC_IPC_ACK (1 << 1)
246 #define REG_NFC_OPS_STAT NFC_IPC
247 #define REG_NFC_INTRRUPT NFC_CONFIG2
248 #define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR0
249 #define REG_NFC_FLASH_CMD NFC_FLASH_CMD
250 #define REG_NFC_OPS LAUNCH_NFC
251 #define REG_NFC_SET_RBA NFC_CONFIG1
252 #define REG_NFC_RB NFC_IPC
253 #define REG_NFC_ECC_EN NFC_CONFIG2
254 #define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT
255 #define REG_NFC_CE NFC_CONFIG1
256 #define REG_NFC_RST NFC_CONFIG1
257 #define REG_NFC_PPB NFC_CONFIG2
258 #define REG_NFC_SP_EN NFC_CONFIG1
259 #define REG_NFC_BLS NFC_WRPROT
260 #define REG_UNLOCK_BLK_ADD0 NFC_WRPROT_UNLOCK_BLK_ADD0
261 #define REG_UNLOCK_BLK_ADD1 NFC_WRPROT_UNLOCK_BLK_ADD1
262 #define REG_UNLOCK_BLK_ADD2 NFC_WRPROT_UNLOCK_BLK_ADD2
263 #define REG_UNLOCK_BLK_ADD3 NFC_WRPROT_UNLOCK_BLK_ADD3
264 #define REG_NFC_WPC NFC_WRPROT
265 #define REG_NFC_ONE_CYCLE NFC_CONFIG2
267 /* NFC V3 Specific MACRO functions definitions */
268 #define raw_write(v, a) __raw_writel(v, a)
269 #define raw_read(a) __raw_readl(a)
271 /* Explcit ack ops status (if any), before issue of any command */
273 raw_write((raw_read(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \
276 /* Set RBA buffer id*/
277 #define NFC_SET_RBA(val) \
278 raw_write((raw_read(REG_NFC_SET_RBA) & \
279 (NFC_FIELD_RESET(NFC_RBA_WIDTH, NFC_RBA_SHIFT))) | \
280 ((val) << NFC_RBA_SHIFT), REG_NFC_SET_RBA);
282 #define NFC_SET_PS(val) \
283 raw_write((raw_read(NFC_CONFIG2) & \
284 (NFC_FIELD_RESET(NFC_PS_WIDTH, NFC_PS_SHIFT))) | \
285 ((val) << NFC_PS_SHIFT), NFC_CONFIG2);
287 #define UNLOCK_ADDR(start_addr, end_addr) \
290 for (; i < NAND_MAX_CHIPS; i++) \
291 raw_write(start_addr | \
292 (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), \
293 REG_UNLOCK_BLK_ADD0 + (i << 2)); \
296 #define NFC_SET_NFC_ACTIVE_CS(val) \
297 raw_write((raw_read(NFC_CONFIG1) & \
298 (NFC_FIELD_RESET(NFC_ACTIVE_CS_WIDTH, NFC_ACTIVE_CS_SHIFT))) | \
299 ((val) << NFC_ACTIVE_CS_SHIFT), NFC_CONFIG1);
301 #define NFC_GET_MAXCHIP_SP() 8
303 #define NFC_SET_BLS(val) ((raw_read(REG_NFC_BLS) & NFC_BLS_RESET) | val)
304 #define NFC_SET_WPC(val) ((raw_read(REG_NFC_WPC) & NFC_WPC_RESET) | val)
305 #define CHECK_NFC_RB (raw_read(REG_NFC_RB) & NFC_RB)
307 #define NFC_SET_NFC_NUM_ADDR_PHASE1(val) \
308 raw_write((raw_read(NFC_CONFIG2) & \
309 (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE1_WIDTH, \
310 NFC_NUM_ADDR_PHASE1_SHIFT))) | \
311 ((val) << NFC_NUM_ADDR_PHASE1_SHIFT), NFC_CONFIG2);
313 #define NFC_SET_NFC_NUM_ADDR_PHASE0(val) \
314 raw_write((raw_read(NFC_CONFIG2) & \
315 (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE0_WIDTH, \
316 NFC_NUM_ADDR_PHASE0_SHIFT))) | \
317 ((val) << NFC_NUM_ADDR_PHASE0_SHIFT), NFC_CONFIG2);
319 #define NFC_SET_NFC_ITERATION(val) \
320 raw_write((raw_read(NFC_CONFIG1) & \
321 (NFC_FIELD_RESET(NFC_ITERATION_WIDTH, NFC_ITERATION_SHIFT))) | \
322 ((val) << NFC_ITERATION_SHIFT), NFC_CONFIG1);
324 #define NFC_SET_FW(val) \
325 raw_write((raw_read(NFC_CONFIG3) & \
326 (NFC_FIELD_RESET(NFC_FW_WIDTH, NFC_FW_SHIFT))) | \
327 ((val) << NFC_FW_SHIFT), NFC_CONFIG3);
329 #define NFC_SET_NUM_OF_DEVICE(val) \
330 raw_write((raw_read(NFC_CONFIG3) & \
331 (NFC_FIELD_RESET(NFC_NUM_OF_DEVICES_WIDTH, \
332 NFC_NUM_OF_DEVICES_SHIFT))) | \
333 ((val) << NFC_NUM_OF_DEVICES_SHIFT), NFC_CONFIG3);
335 #define NFC_SET_ADD_OP_MODE(val) \
336 raw_write((raw_read(NFC_CONFIG3) & \
337 (NFC_FIELD_RESET(NFC_ADD_OP_WIDTH, NFC_ADD_OP_SHIFT))) | \
338 ((val) << NFC_ADD_OP_SHIFT), NFC_CONFIG3);
340 #define NFC_SET_ADD_CS_MODE(val) \
342 NFC_SET_ADD_OP_MODE(val); \
343 NFC_SET_NUM_OF_DEVICE(this->numchips - 1); \
346 #define NFC_SET_ST_CMD(val) \
347 raw_write((raw_read(NFC_CONFIG2) & \
348 (NFC_FIELD_RESET(NFC_ST_CMD_WIDTH, \
349 NFC_ST_CMD_SHITF))) | \
350 ((val) << NFC_ST_CMD_SHITF), NFC_CONFIG2);
352 #define NFMS_NF_DWIDTH 0
353 #define NFMS_NF_PG_SZ 1
354 #define NFC_CMD_1_SHIFT 8
356 #define NUM_OF_ADDR_CYCLE ((ffs(~(info->page_mask)) - 1) >> 3)
358 /*should set the fw,ps,spas,ppb*/
359 #define NFC_SET_NFMS(v) \
362 NFC_SET_FW(NFC_FW_8); \
363 if (((v) & (1 << NFMS_NF_DWIDTH))) \
364 NFC_SET_FW(NFC_FW_16); \
365 if (((v) & (1 << NFMS_NF_PG_SZ))) { \
366 if (IS_2K_PAGE_NAND) { \
367 NFC_SET_PS(NFC_PS_2K); \
368 NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \
369 NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \
370 } else if (IS_4K_PAGE_NAND) { \
371 NFC_SET_PS(NFC_PS_4K); \
372 NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \
373 NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \
375 NFC_SET_PS(NFC_PS_512); \
376 NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE - 1); \
377 NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_ONE_LESS_PHASE1); \
379 NFC_SET_ADD_CS_MODE(1); \
380 NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1); \
381 NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \
382 NFC_SET_ST_CMD(0x70); \
383 raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \
384 raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \
388 #define READ_PAGE() send_read_page(0)
389 #define PROG_PAGE() send_prog_page(0)
391 #endif /* __MXC_NAND_H__ */