include/configs/XPEDITE5370.h

   1 /*
   2  * Copyright 2008 Extreme Engineering Solutions, Inc.
   3  * Copyright 2007-2008 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * xpedite5370 board configuration file
  26  */
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * High Level Configuration Options
  32  */
  33 #define CONFIG_BOOKE            1       /* BOOKE */
  34 #define CONFIG_E500             1       /* BOOKE e500 family */
  35 #define CONFIG_MPC85xx          1       /* MPC8540/60/55/41/48 */
  36 #define CONFIG_MPC8572          1
  37 #define CONFIG_XPEDITE5370      1
  38 #define CONFIG_SYS_BOARD_NAME   "XPedite5370"
  39 #define CONFIG_NUM_CPUS         2       /* 2 Cores */
  40 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
  41 #define CONFIG_RELOC_FIXUP_WORKS        /* Fully relocate to SDRAM */
  42
  43 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
  44 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
  45 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  46 #define CONFIG_PCIE1            1       /* PCIE controler 1 */
  47 #define CONFIG_PCIE2            1       /* PCIE controler 2 */
  48 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  49 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  50 #define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
  51 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
  52
  53 /*
  54  * DDR config
  55  */
  56 #define CONFIG_FSL_DDR2
  57 #undef CONFIG_FSL_DDR_INTERACTIVE
  58 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  59 #define CONFIG_DDR_SPD
  60 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  61 #define SPD_EEPROM_ADDRESS1             0x54    /* Both channels use the */
  62 #define SPD_EEPROM_ADDRESS2             0x54    /* same SPD data         */
  63 #define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
  64 #define CONFIG_NUM_DDR_CONTROLLERS      2
  65 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
  66 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
  67 #define CONFIG_DDR_ECC
  68 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  69 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
  70 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  71 #define CONFIG_VERY_BIG_RAM
  72
  73 #ifndef __ASSEMBLY__
  74 extern unsigned long get_board_sys_clk(unsigned long dummy);
  75 extern unsigned long get_board_ddr_clk(unsigned long dummy);
  76 #endif
  77
  78 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
  79 #define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
  80
  81 /*
  82  * These can be toggled for performance analysis, otherwise use default.
  83  */
  84 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
  85 #define CONFIG_BTB                      /* toggle branch predition */
  86 #define CONFIG_ENABLE_36BIT_PHYS        1
  87
  88 /*
  89  * Base addresses -- Note these are effective addresses where the
  90  * actual resources get mapped (not physical addresses)
  91  */
  92 #define CONFIG_SYS_CCSRBAR_DEFAULT      0xff700000      /* CCSRBAR Default */
  93 #define CONFIG_SYS_CCSRBAR              0xef000000      /* relocated CCSRBAR */
  94 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
  95 #define CONFIG_SYS_IMMR         CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
  96 #define CONFIG_SYS_PCIE1_ADDR           (CONFIG_SYS_CCSRBAR + 0xa000)
  97 #define CONFIG_SYS_PCIE2_ADDR           (CONFIG_SYS_CCSRBAR + 0x9000)
  98
  99 /*
 100  * Diagnostics
 101  */
 102 #define CONFIG_SYS_ALT_MEMTEST
 103 #define CONFIG_SYS_MEMTEST_START        0x10000000
 104 #define CONFIG_SYS_MEMTEST_END          0x20000000
 105
 106 /*
 107  * Memory map
 108  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
 109  * 0x8000_0000  0xbfff_ffff     PCIe1 Mem               1G non-cacheable
 110  * 0xc000_0000  0xcfff_ffff     PCIe2 Mem               256M non-cacheable
 111  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
 112  * 0xe800_0000  0xe87f_ffff     PCIe1 IO                8M non-cacheable
 113  * 0xe880_0000  0xe8ff_ffff     PCIe2 IO                8M non-cacheable
 114  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
 115  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
 116  * 0xf000_0000  0xf7ff_ffff     NOR Flash 2             128M non-cacheable
 117  * 0xf800_0000  0xffff_ffff     NOR Flash 1             128M non-cacheable
 118  */
 119
 120 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_4 | LCRR_EADC_3)
 121
 122 /*
 123  * NAND flash configuration
 124  */
 125 #define CONFIG_SYS_NAND_BASE            0xef800000
 126 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 127 #define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
 128                                          CONFIG_SYS_NAND_BASE2}
 129 #define CONFIG_SYS_MAX_NAND_DEVICE      2
 130 #define CONFIG_MTD_NAND_VERIFY_WRITE
 131 #define CONFIG_SYS_NAND_QUIET_TEST      /* 2nd NAND flash not always populated */
 132 #define CONFIG_NAND_FSL_ELBC
 133
 134 /*
 135  * NOR flash configuration
 136  */
 137 #define CONFIG_SYS_FLASH_BASE           0xf8000000
 138 #define CONFIG_SYS_FLASH_BASE2          0xf0000000
 139 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 140 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 141 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 142 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 143 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 144 #define CONFIG_FLASH_CFI_DRIVER
 145 #define CONFIG_SYS_FLASH_CFI
 146 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 147 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 148                                                   {0xf7f40000, 0xc0000} }
 149 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE       /* start of monitor */
 150
 151 /*
 152  * Chip select configuration
 153  */
 154 /* NOR Flash 0 on CS0 */
 155 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 156                                  BR_PS_16               | \
 157                                  BR_V)
 158 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
 159                                  OR_GPCM_CSNT           | \
 160                                  OR_GPCM_XACS           | \
 161                                  OR_GPCM_ACS_DIV2       | \
 162                                  OR_GPCM_SCY_8          | \
 163                                  OR_GPCM_TRLX           | \
 164                                  OR_GPCM_EHTR           | \
 165                                  OR_GPCM_EAD)
 166
 167 /* NOR Flash 1 on CS1 */
 168 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 169                                  BR_PS_16               | \
 170                                  BR_V)
 171 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 172
 173 /* NAND flash on CS2 */
 174 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 175                                  (2<<BR_DECC_SHIFT)     | \
 176                                  BR_PS_8                | \
 177                                  BR_MS_FCM              | \
 178                                  BR_V)
 179
 180 /* NAND flash on CS2 */
 181 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
 182                                  OR_FCM_PGS     | \
 183                                  OR_FCM_CSCT    | \
 184                                  OR_FCM_CST     | \
 185                                  OR_FCM_CHT     | \
 186                                  OR_FCM_SCY_1   | \
 187                                  OR_FCM_TRLX    | \
 188                                  OR_FCM_EHTR)
 189
 190 /* NAND flash on CS3 */
 191 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 192                                  (2<<BR_DECC_SHIFT)     | \
 193                                  BR_PS_8                | \
 194                                  BR_MS_FCM              | \
 195                                  BR_V)
 196 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 197
 198 /*
 199  * Use L1 as initial stack
 200  */
 201 #define CONFIG_SYS_INIT_RAM_LOCK        1
 202 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 203 #define CONFIG_SYS_INIT_RAM_END         0x00004000
 204
 205 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* num bytes initial data */
 206 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 207 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 208
 209 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 210 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 211
 212 /*
 213  * Serial Port
 214  */
 215 #define CONFIG_CONS_INDEX               1
 216 #define CONFIG_SYS_NS16550
 217 #define CONFIG_SYS_NS16550_SERIAL
 218 #define CONFIG_SYS_NS16550_REG_SIZE     1
 219 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 220 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 221 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 222 #define CONFIG_SYS_BAUDRATE_TABLE       \
 223         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 224 #define CONFIG_BAUDRATE                 115200
 225 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 226 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 227
 228 /*
 229  * Use the HUSH parser
 230  */
 231 #define CONFIG_SYS_HUSH_PARSER
 232 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 233
 234 /*
 235  * Pass open firmware flat tree
 236  */
 237 #define CONFIG_OF_LIBFDT                1
 238 #define CONFIG_OF_BOARD_SETUP           1
 239 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
 240
 241 #define CONFIG_SYS_64BIT_VSPRINTF       1
 242 #define CONFIG_SYS_64BIT_STRTOUL        1
 243
 244 /*
 245  * I2C
 246  */
 247 #define CONFIG_FSL_I2C                          /* Use FSL common I2C driver */
 248 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
 249 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address */
 250 #define CONFIG_SYS_I2C_SLAVE            0x7F
 251 #define CONFIG_SYS_I2C_OFFSET           0x3000
 252 #define CONFIG_SYS_I2C2_OFFSET          0x3100
 253 #define CONFIG_I2C_MULTI_BUS
 254
 255 /* PEX8518 slave I2C interface */
 256 #define CONFIG_SYS_I2C_PEX8518_ADDR     0x70
 257
 258 /* I2C DS1631 temperature sensor */
 259 #define CONFIG_SYS_I2C_DS1621_ADDR      0x48
 260 #define CONFIG_DTT_DS1621
 261 #define CONFIG_DTT_SENSORS              { 0 }
 262
 263 /* I2C EEPROM - AT24C128B */
 264 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 265 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 266 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 267 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 268
 269 /* I2C RTC */
 270 #define CONFIG_RTC_M41T11               1
 271 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 272 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
 273
 274 /* GPIO/EEPROM/SRAM */
 275 #define CONFIG_DS4510
 276 #define CONFIG_SYS_I2C_DS4510_ADDR      0x51
 277
 278 /* GPIO */
 279 #define CONFIG_PCA953X
 280 #define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
 281 #define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
 282 #define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
 283 #define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
 284 #define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
 285
 286 /*
 287  * PU = pulled high, PD = pulled low
 288  * I = input, O = output, IO = input/output
 289  */
 290 /* PCA9557 @ 0x18*/
 291 #define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
 292 #define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select */
 293 #define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
 294 #define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select */
 295 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
 296 #define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Set to 0 to enable NVM writing */
 297 #define CONFIG_SYS_PCA953X_C0_VCORE_VID2        0x40 /* VID2 of ISL6262 */
 298 #define CONFIG_SYS_PCA953X_C0_VCORE_VID3        0x80 /* VID3 of ISL6262 */
 299
 300 /* PCA9557 @ 0x1c*/
 301 #define CONFIG_SYS_PCA953X_XMC0_ROOT0           0x01 /* PU; Low if XMC is RC */
 302 #define CONFIG_SYS_PCA953X_XMC0_MVMR0           0x02 /* XMC EEPROM write protect */
 303 #define CONFIG_SYS_PCA953X_XMC0_WAKE            0x04 /* PU; XMC wake */
 304 #define CONFIG_SYS_PCA953X_XMC0_BIST            0x08 /* PU; XMC built in self test */
 305 #define CONFIG_SYS_PCA953X_XMC_PRESENT          0x10 /* PU; Low if XMC module installed */
 306 #define CONFIG_SYS_PCA953X_PMC_PRESENT          0x20 /* PU; Low if PMC module installed */
 307 #define CONFIG_SYS_PCA953X_PMC0_MONARCH         0x40 /* PMC monarch mode enable */
 308 #define CONFIG_SYS_PCA953X_PMC0_EREADY          0x80 /* PU; PMC PCI eready */
 309
 310 /* PCA9557 @ 0x1e*/
 311 #define CONFIG_SYS_PCA953X_P0_GA0               0x01 /* PU; VPX Geographical address */
 312 #define CONFIG_SYS_PCA953X_P0_GA1               0x02 /* PU; VPX Geographical address */
 313 #define CONFIG_SYS_PCA953X_P0_GA2               0x04 /* PU; VPX Geographical address */
 314 #define CONFIG_SYS_PCA953X_P0_GA3               0x08 /* PU; VPX Geographical address */
 315 #define CONFIG_SYS_PCA953X_P0_GA4               0x10 /* PU; VPX Geographical address */
 316 #define CONFIG_SYS_PCA953X_P0_GAP               0x20 /* PU; tied to VPX P0.GAP */
 317 #define CONFIG_SYS_PCA953X_P1_SYSEN             0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */
 318
 319 /* PCA9557 @ 0x1f */
 320 #define CONFIG_SYS_PCA953X_GPIO_VPX0            0x01 /* PU */
 321 #define CONFIG_SYS_PCA953X_GPIO_VPX1            0x02 /* PU */
 322 #define CONFIG_SYS_PCA953X_GPIO_VPX2            0x04 /* PU */
 323 #define CONFIG_SYS_PCA953X_GPIO_VPX3            0x08 /* PU */
 324 #define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL        0x10 /* PD; I2C master source for FRU SEEPROM */
 325
 326 /*
 327  * General PCI
 328  * Memory space is mapped 1-1, but I/O space must start from 0.
 329  */
 330 /* PCIE1 - VPX P1 */
 331 #define CONFIG_SYS_PCIE1_MEM_BASE       0x80000000
 332 #define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BASE
 333 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
 334 #define CONFIG_SYS_PCIE1_IO_BASE        0x00000000
 335 #define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
 336 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
 337
 338 /* PCIE2 - PEX8518 */
 339 #define CONFIG_SYS_PCIE2_MEM_BASE       0xc0000000
 340 #define CONFIG_SYS_PCIE2_MEM_PHYS       CONFIG_SYS_PCIE2_MEM_BASE
 341 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x10000000      /* 256M */
 342 #define CONFIG_SYS_PCIE2_IO_BASE        0x00000000
 343 #define CONFIG_SYS_PCIE2_IO_PHYS        0xe8800000
 344 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00800000      /* 8M */
 345
 346 /*
 347  * Networking options
 348  */
 349 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
 350 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
 351 #define CONFIG_NET_MULTI        1
 352 #define CONFIG_TSEC_TBI
 353 #define CONFIG_MII              1       /* MII PHY management */
 354 #define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
 355 #define CONFIG_ETHPRIME         "eTSEC2"
 356
 357 #define CONFIG_TSEC1            1
 358 #define CONFIG_TSEC1_NAME       "eTSEC1"
 359 #define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 360 #define TSEC1_PHY_ADDR          1
 361 #define TSEC1_PHYIDX            0
 362 #define CONFIG_HAS_ETH0
 363
 364 #define CONFIG_TSEC2            1
 365 #define CONFIG_TSEC2_NAME       "eTSEC2"
 366 #define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 367 #define TSEC2_PHY_ADDR          2
 368 #define TSEC2_PHYIDX            0
 369 #define CONFIG_HAS_ETH1
 370
 371 /*
 372  * Command configuration.
 373  */
 374 #include <config_cmd_default.h>
 375
 376 #define CONFIG_CMD_ASKENV
 377 #define CONFIG_CMD_DATE
 378 #define CONFIG_CMD_DHCP
 379 #define CONFIG_CMD_DS4510
 380 #define CONFIG_CMD_DS4510_INFO
 381 #define CONFIG_CMD_DTT
 382 #define CONFIG_CMD_EEPROM
 383 #define CONFIG_CMD_ELF
 384 #define CONFIG_CMD_FLASH
 385 #define CONFIG_CMD_I2C
 386 #define CONFIG_CMD_JFFS2
 387 #define CONFIG_CMD_MII
 388 #define CONFIG_CMD_NAND
 389 #define CONFIG_CMD_NET
 390 #define CONFIG_CMD_PCA953X
 391 #define CONFIG_CMD_PCA953X_INFO
 392 #define CONFIG_CMD_PCI
 393 #define CONFIG_CMD_PING
 394 #define CONFIG_CMD_SAVEENV
 395 #define CONFIG_CMD_SNTP
 396
 397 /*
 398  * Miscellaneous configurable options
 399  */
 400 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 401 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 402 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt */
 403 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 404 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 405 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
 406 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 407 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1ms ticks */
 408 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
 409 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 410 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
 411 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
 412 #define CONFIG_PREBOOT                          /* enable preboot variable */
 413 #define CONFIG_FIT              1
 414 #define CONFIG_FIT_VERBOSE      1
 415 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 416
 417 /*
 418  * For booting Linux, the board info and command line data
 419  * have to be in the first 16 MB of memory, since this is
 420  * the maximum mapped by the Linux kernel during initialization.
 421  */
 422 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 423 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 424
 425 /*
 426  * Boot Flags
 427  */
 428 #define BOOTFLAG_COLD           0x01            /* Normal Power-On: Boot from FLASH */
 429 #define BOOTFLAG_WARM           0x02            /* Software reboot */
 430
 431 /*
 432  * Environment Configuration
 433  */
 434 #define CONFIG_ENV_IS_IN_FLASH  1
 435 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 436 #define CONFIG_ENV_SIZE         0x8000
 437 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 438
 439 /*
 440  * Flash memory map:
 441  * fff80000 - ffffffff     Pri U-Boot (512 KB)
 442  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 443  * fff00000 - fff3ffff     Pri FDT (256KB)
 444  * fef00000 - ffefffff     Pri OS image (16MB)
 445  * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
 446  *
 447  * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
 448  * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
 449  * f7f00000 - f7f3ffff     Sec FDT (256KB)
 450  * f6f00000 - f7efffff     Sec OS image (16MB)
 451  * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
 452  */
 453 #define CONFIG_UBOOT1_ENV_ADDR  MK_STR(0xfff80000)
 454 #define CONFIG_UBOOT2_ENV_ADDR  MK_STR(0xf7f80000)
 455 #define CONFIG_FDT1_ENV_ADDR    MK_STR(0xfff00000)
 456 #define CONFIG_FDT2_ENV_ADDR    MK_STR(0xf7f00000)
 457 #define CONFIG_OS1_ENV_ADDR     MK_STR(0xfef00000)
 458 #define CONFIG_OS2_ENV_ADDR     MK_STR(0xf6f00000)
 459
 460 #define CONFIG_PROG_UBOOT1                                              \
 461         "$download_cmd $loadaddr $ubootfile; "                          \
 462         "if test $? -eq 0; then "                                       \
 463                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 464                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 465                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 466                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 467                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 468                 "if test $? -ne 0; then "                               \
 469                         "echo PROGRAM FAILED; "                         \
 470                 "else; "                                                \
 471                         "echo PROGRAM SUCCEEDED; "                      \
 472                 "fi; "                                                  \
 473         "else; "                                                        \
 474                 "echo DOWNLOAD FAILED; "                                \
 475         "fi;"
 476
 477 #define CONFIG_PROG_UBOOT2                                              \
 478         "$download_cmd $loadaddr $ubootfile; "                          \
 479         "if test $? -eq 0; then "                                       \
 480                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 481                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 482                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 483                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 484                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 485                 "if test $? -ne 0; then "                               \
 486                         "echo PROGRAM FAILED; "                         \
 487                 "else; "                                                \
 488                         "echo PROGRAM SUCCEEDED; "                      \
 489                 "fi; "                                                  \
 490         "else; "                                                        \
 491                 "echo DOWNLOAD FAILED; "                                \
 492         "fi;"
 493
 494 #define CONFIG_BOOT_OS_NET                                              \
 495         "$download_cmd $osaddr $osfile; "                               \
 496         "if test $? -eq 0; then "                                       \
 497                 "if test -n $fdtaddr; then "                            \
 498                         "$download_cmd $fdtaddr $fdtfile; "             \
 499                         "if test $? -eq 0; then "                       \
 500                                 "bootm $osaddr - $fdtaddr; "            \
 501                         "else; "                                        \
 502                                 "echo FDT DOWNLOAD FAILED; "            \
 503                         "fi; "                                          \
 504                 "else; "                                                \
 505                         "bootm $osaddr; "                               \
 506                 "fi; "                                                  \
 507         "else; "                                                        \
 508                 "echo OS DOWNLOAD FAILED; "                             \
 509         "fi;"
 510
 511 #define CONFIG_PROG_OS1                                                 \
 512         "$download_cmd $osaddr $osfile; "                               \
 513         "if test $? -eq 0; then "                                       \
 514                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 515                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 516                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 517                 "if test $? -ne 0; then "                               \
 518                         "echo OS PROGRAM FAILED; "                      \
 519                 "else; "                                                \
 520                         "echo OS PROGRAM SUCCEEDED; "                   \
 521                 "fi; "                                                  \
 522         "else; "                                                        \
 523                 "echo OS DOWNLOAD FAILED; "                             \
 524         "fi;"
 525
 526 #define CONFIG_PROG_OS2                                                 \
 527         "$download_cmd $osaddr $osfile; "                               \
 528         "if test $? -eq 0; then "                                       \
 529                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 530                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 531                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 532                 "if test $? -ne 0; then "                               \
 533                         "echo OS PROGRAM FAILED; "                      \
 534                 "else; "                                                \
 535                         "echo OS PROGRAM SUCCEEDED; "                   \
 536                 "fi; "                                                  \
 537         "else; "                                                        \
 538                 "echo OS DOWNLOAD FAILED; "                             \
 539         "fi;"
 540
 541 #define CONFIG_PROG_FDT1                                                \
 542         "$download_cmd $fdtaddr $fdtfile; "                             \
 543         "if test $? -eq 0; then "                                       \
 544                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 545                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 546                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 547                 "if test $? -ne 0; then "                               \
 548                         "echo FDT PROGRAM FAILED; "                     \
 549                 "else; "                                                \
 550                         "echo FDT PROGRAM SUCCEEDED; "                  \
 551                 "fi; "                                                  \
 552         "else; "                                                        \
 553                 "echo FDT DOWNLOAD FAILED; "                            \
 554         "fi;"
 555
 556 #define CONFIG_PROG_FDT2                                                \
 557         "$download_cmd $fdtaddr $fdtfile; "                             \
 558         "if test $? -eq 0; then "                                       \
 559                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 560                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 561                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 562                 "if test $? -ne 0; then "                               \
 563                         "echo FDT PROGRAM FAILED; "                     \
 564                 "else; "                                                \
 565                         "echo FDT PROGRAM SUCCEEDED; "                  \
 566                 "fi; "                                                  \
 567         "else; "                                                        \
 568                 "echo FDT DOWNLOAD FAILED; "                            \
 569         "fi;"
 570
 571 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 572         "autoload=yes\0"                                                \
 573         "download_cmd=tftp\0"                                           \
 574         "console_args=console=ttyS0,115200\0"                           \
 575         "root_args=root=/dev/nfs rw\0"                                  \
 576         "misc_args=ip=on\0"                                             \
 577         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 578         "bootfile=/home/user/file\0"                                    \
 579         "osfile=/home/user/uImage-XPedite5370\0"                        \
 580         "fdtfile=/home/user/xpedite5370.dtb\0"                          \
 581         "ubootfile=/home/user/u-boot.bin\0"                             \
 582         "fdtaddr=c00000\0"                                              \
 583         "osaddr=0x1000000\0"                                            \
 584         "loadaddr=0x1000000\0"                                          \
 585         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 586         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 587         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 588         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 589         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 590         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 591         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 592         "bootcmd_flash1=run set_bootargs; "                             \
 593                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 594         "bootcmd_flash2=run set_bootargs; "                             \
 595                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 596         "bootcmd=run bootcmd_flash1\0"
 597 #endif  /* __CONFIG_H */