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1 /*
2  * (C) Copyright 2007
3  * Michael Schwingen, michael@schwingen.org
4  *
5  * Configuration settings for the AcTux-1 board.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 #define CONFIG_IXP425                   1
14 #define CONFIG_ACTUX1                   1
15
16 #define CONFIG_MACH_TYPE                1479
17
18 #define CONFIG_DISPLAY_CPUINFO          1
19 #define CONFIG_DISPLAY_BOARDINFO        1
20
21 #define CONFIG_IXP_SERIAL
22 #define CONFIG_SYS_IXP425_CONSOLE               IXP425_UART2
23 #define CONFIG_BAUDRATE                 115200
24 #define CONFIG_BOOTDELAY                3
25 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
26 #define CONFIG_BOARD_EARLY_INIT_F       1
27 #define CONFIG_SYS_LDSCRIPT     "board/actux1/u-boot.lds"
28
29 /***************************************************************
30  * U-boot generic defines start here.
31  ***************************************************************/
32 /*
33  * Size of malloc() pool
34  */
35 #define CONFIG_SYS_MALLOC_LEN                   (CONFIG_ENV_SIZE + 128*1024)
36
37 /* allow to overwrite serial and ethaddr */
38 #define CONFIG_ENV_OVERWRITE
39
40 /* Command line configuration. */
41 #include <config_cmd_default.h>
42
43 #define CONFIG_CMD_ELF
44 #ifdef CONFIG_PCI
45 #define CONFIG_CMD_PCI
46 #define CONFIG_PCI_PNP
47 #define CONFIG_IXP_PCI
48 #define CONFIG_PCI_SCAN_SHOW
49 #define CONFIG_CMD_PCI_ENUM
50 #endif
51
52 #define CONFIG_BOOTCOMMAND              "run boot_flash"
53 /* enable passing of ATAGs */
54 #define CONFIG_CMDLINE_TAG              1
55 #define CONFIG_SETUP_MEMORY_TAGS        1
56 #define CONFIG_INITRD_TAG               1
57 #define CONFIG_REVISION_TAG             1
58
59 #if defined(CONFIG_CMD_KGDB)
60 # define CONFIG_KGDB_BAUDRATE           230400
61 /* which serial port to use */
62 # define CONFIG_KGDB_SER_INDEX          1
63 #endif
64
65 /* Miscellaneous configurable options */
66 #define CONFIG_SYS_LONGHELP
67 #define CONFIG_SYS_PROMPT                       "=> "
68 /* Console I/O Buffer Size */
69 #define CONFIG_SYS_CBSIZE                       256
70 /* Print Buffer Size */
71 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
72 /* max number of command args */
73 #define CONFIG_SYS_MAXARGS                      16
74 /* Boot Argument Buffer Size */
75 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
76
77 #define CONFIG_SYS_MEMTEST_START                0x00400000
78 #define CONFIG_SYS_MEMTEST_END                  0x00800000
79
80 /* timer clock - 2* OSC_IN system clock */
81 #define CONFIG_IXP425_TIMER_CLK                 66666666
82 #define CONFIG_SYS_HZ                           1000
83
84 /* default load address */
85 #define CONFIG_SYS_LOAD_ADDR                    0x00010000
86
87 /* valid baudrates */
88 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, 57600,    \
89                                           115200, 230400 }
90 #define CONFIG_SERIAL_RTS_ACTIVE        1
91
92 /* Expansion bus settings */
93 #define CONFIG_SYS_EXP_CS0                      0xbd113842
94
95 /* SDRAM settings */
96 #define CONFIG_NR_DRAM_BANKS            1
97 #define PHYS_SDRAM_1                    0x00000000
98 #define CONFIG_SYS_SDRAM_BASE                   0x00000000
99
100 #ifdef CONFIG_RAM_32MB
101 # define CONFIG_SYS_SDR_CONFIG                  0x18
102 # define PHYS_SDRAM_1_SIZE              0x02000000
103 # define CONFIG_SYS_SDRAM_REFRESH_CNT           0x81a
104 # define CONFIG_SYS_SDR_MODE_CONFIG             0x1
105 # define CONFIG_SYS_DRAM_SIZE                   0x02000000
106 #else /* 16MB SDRAM */
107 # define CONFIG_SYS_SDR_CONFIG                  0x3A
108 # define PHYS_SDRAM_1_SIZE              0x01000000
109 # define CONFIG_SYS_SDRAM_REFRESH_CNT           0x81a
110 # define CONFIG_SYS_SDR_MODE_CONFIG             0x1
111 # define CONFIG_SYS_DRAM_SIZE                   0x01000000
112 #endif
113
114 /* FLASH organization */
115 #define CONFIG_SYS_TEXT_BASE            0x50000000
116 #ifdef CONFIG_FLASH2X2
117 # define CONFIG_SYS_MAX_FLASH_BANKS             2
118 /* max number of sectors on one chip */
119 # define CONFIG_SYS_MAX_FLASH_SECT              40
120 # define PHYS_FLASH_1                   0x50000000
121 # define PHYS_FLASH_2                   0x50200000
122 # define CONFIG_SYS_FLASH_BANKS_LIST            { PHYS_FLASH_1, PHYS_FLASH_2 }
123 #endif
124 #ifdef CONFIG_FLASH1X8
125 # define CONFIG_SYS_MAX_FLASH_BANKS             1
126 /* max number of sectors on one chip */
127 # define CONFIG_SYS_MAX_FLASH_SECT              140
128 # define PHYS_FLASH_1                   0x50000000
129 # define CONFIG_SYS_FLASH_BANKS_LIST            { PHYS_FLASH_1 }
130 #endif
131
132 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
133 #define CONFIG_SYS_MONITOR_BASE         PHYS_FLASH_1
134 #define CONFIG_SYS_MONITOR_LEN                  (256 << 10)
135 #define CONFIG_BOARD_SIZE_LIMIT                 262144
136
137 /* Use common CFI driver */
138 #define CONFIG_SYS_FLASH_CFI
139 #define CONFIG_FLASH_CFI_DRIVER
140 /* no byte writes on IXP4xx */
141 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
142 /* print 'E' for empty sector on flinfo */
143 #define CONFIG_SYS_FLASH_EMPTY_INFO
144
145 /* Ethernet */
146
147 /* include IXP4xx NPE support */
148 #define CONFIG_IXP4XX_NPE               1
149 /* NPE0 PHY address */
150 #define CONFIG_PHY_ADDR                 0
151 /* NPE1 PHY address (HW Release E only) */
152 #define CONFIG_PHY1_ADDR                1
153 /* MII PHY management */
154 #define CONFIG_MII                      1
155 /* Number of ethernet rx buffers & descriptors */
156 #define CONFIG_SYS_RX_ETH_BUFFER                16
157 #define CONFIG_RESET_PHY_R              1
158
159 #define CONFIG_HAS_ETH1                 1
160
161 #define CONFIG_CMD_DHCP
162 #define CONFIG_CMD_NET
163 #define CONFIG_CMD_MII
164 #define CONFIG_CMD_PING
165 #undef  CONFIG_CMD_NFS
166
167 /* BOOTP options */
168 #define CONFIG_BOOTP_BOOTFILESIZE
169 #define CONFIG_BOOTP_BOOTPATH
170 #define CONFIG_BOOTP_GATEWAY
171 #define CONFIG_BOOTP_HOSTNAME
172
173 /* Cache Configuration */
174 #define CONFIG_SYS_CACHELINE_SIZE               32
175
176 /*
177  * environment organization:
178  * one flash sector, embedded in uboot area (bottom bootblock flash)
179  */
180 #define CONFIG_ENV_IS_IN_FLASH          1
181 #define CONFIG_ENV_SIZE                 0x2000
182 #define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x4000)
183 #define CONFIG_SYS_USE_PPCENV                   1
184
185 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
186         "npe_ucode=50040000\0"                                          \
187         "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
188         "kerneladdr=50050000\0"                                         \
189         "kernelfile=actux1/uImage\0"                                    \
190         "rootfile=actux1/rootfs\0"                                      \
191         "rootaddr=50170000\0"                                           \
192         "loadaddr=10000\0"                                              \
193         "updateboot_ser=mw.b 10000 ff 40000;"                           \
194         " loady ${loadaddr};"                                           \
195         " run eraseboot writeboot\0"                                    \
196         "updateboot_net=mw.b 10000 ff 40000;"                           \
197         " tftp ${loadaddr} actux1/u-boot.bin;"                          \
198         " run eraseboot writeboot\0"                                    \
199         "eraseboot=protect off 50000000 50003fff;"                      \
200         " protect off 50006000 5003ffff;"                               \
201         " erase 50000000 50003fff;"                                     \
202         " erase 50006000 5003ffff\0"                                    \
203         "writeboot=cp.b 10000 50000000 4000;"                           \
204         " cp.b 16000 50006000 3a000\0"                                  \
205         "updateucode=loady;"                                            \
206         " era ${npe_ucode} +${filesize};"                               \
207         " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"                  \
208         "updateroot=tftp ${loadaddr} ${rootfile};"                      \
209         " era ${rootaddr} +${filesize};"                                \
210         " cp.b ${loadaddr} ${rootaddr} ${filesize}\0"                   \
211         "updatekern=tftp ${loadaddr} ${kernelfile};"                    \
212         " era ${kerneladdr} +${filesize};"                              \
213         " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"                 \
214         "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
215         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
216         "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"   \
217         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
218         "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
219         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
220         "boot_flash=run flashargs addtty addeth;"                       \
221         " bootm ${kerneladdr}\0"                                        \
222         "boot_net=run netargs addtty addeth;"                           \
223         " tftpboot ${loadaddr} ${kernelfile};"                          \
224         " bootm\0"
225
226 /* additions for new relocation code, must be added to all boards */
227 #define CONFIG_SYS_INIT_SP_ADDR                                         \
228         (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
229
230 #endif /* __CONFIG_H */