include/configs/actux2.h

   1 /*
   2  * (C) Copyright 2007
   3  * Michael Schwingen, michael@schwingen.org
   4  *
   5  * Configuration settings for the AcTux-2 board.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __CONFIG_H
  27 #define __CONFIG_H
  28
  29 #define CONFIG_IXP425                   1
  30 #define CONFIG_ACTUX2                   1
  31
  32 #define CONFIG_DISPLAY_CPUINFO          1
  33 #define CONFIG_DISPLAY_BOARDINFO        1
  34
  35 #define CONFIG_IXP_SERIAL
  36 #define CONFIG_SYS_IXP425_CONSOLE               IXP425_UART2
  37 #define CONFIG_BAUDRATE                 115200
  38 #define CONFIG_BOOTDELAY                5
  39 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
  40
  41 /***************************************************************
  42  * U-boot generic defines start here.
  43  ***************************************************************/
  44 #undef CONFIG_USE_IRQ
  45
  46 /* Size of malloc() pool */
  47 #define CONFIG_SYS_MALLOC_LEN                   (CONFIG_ENV_SIZE + 128*1024)
  48 /* size in bytes reserved for initial data */
  49 #define CONFIG_SYS_GBL_DATA_SIZE                128
  50
  51 /* allow to overwrite serial and ethaddr */
  52 #define CONFIG_ENV_OVERWRITE
  53
  54 /* Command line configuration. */
  55 #include <config_cmd_default.h>
  56
  57 #define CONFIG_CMD_ELF
  58 #undef CONFIG_CMD_PCI
  59 #undef CONFIG_PCI
  60
  61 #define CONFIG_BOOTCOMMAND              "run boot_flash"
  62 /* enable passing of ATAGs */
  63 #define CONFIG_CMDLINE_TAG              1
  64 #define CONFIG_SETUP_MEMORY_TAGS        1
  65 #define CONFIG_INITRD_TAG               1
  66 #define CONFIG_REVISION_TAG             1
  67
  68 #if defined(CONFIG_CMD_KGDB)
  69 # define CONFIG_KGDB_BAUDRATE           230400
  70 /* which serial port to use */
  71 # define CONFIG_KGDB_SER_INDEX          1
  72 #endif
  73
  74 /* Miscellaneous configurable options */
  75 #define CONFIG_SYS_LONGHELP
  76 #define CONFIG_SYS_PROMPT                       "=> "
  77 /* Console I/O Buffer Size */
  78 #define CONFIG_SYS_CBSIZE                       256
  79 /* Print Buffer Size */
  80 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  81 /* max number of command args */
  82 #define CONFIG_SYS_MAXARGS                      16
  83 /* Boot Argument Buffer Size */
  84 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
  85
  86 #define CONFIG_SYS_MEMTEST_START                0x00400000
  87 #define CONFIG_SYS_MEMTEST_END                  0x00800000
  88
  89 /* everything, incl board info, in Hz */
  90 #undef  CONFIG_SYS_CLKS_IN_HZ
  91 /* spec says 66.666 MHz, but it appears to be 33 */
  92 #define CONFIG_SYS_HZ                           3333333
  93
  94 /* default load address */
  95 #define CONFIG_SYS_LOAD_ADDR                    0x00010000
  96
  97 /* valid baudrates */
  98 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, 57600, \
  99                                           115200, 230400 }
 100 #define CONFIG_SERIAL_RTS_ACTIVE        1
 101
 102 /*
 103  * Stack sizes
 104  * The stack sizes are set up in start.S using the settings below
 105  */
 106 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
 107 #ifdef CONFIG_USE_IRQ
 108 # define CONFIG_STACKSIZE_IRQ           (4*1024)        /* IRQ stack */
 109 # define CONFIG_STACKSIZE_FIQ           (4*1024)        /* FIQ stack */
 110 #endif
 111
 112 /* Expansion bus settings */
 113 #define CONFIG_SYS_EXP_CS0                      0xbd113042
 114
 115 /* SDRAM settings */
 116 #define CONFIG_NR_DRAM_BANKS            1
 117 #define PHYS_SDRAM_1                    0x00000000
 118 #define CONFIG_SYS_DRAM_BASE                    0x00000000
 119
 120 /* 16MB SDRAM */
 121 #define CONFIG_SYS_SDR_CONFIG                   0x3A
 122 #define PHYS_SDRAM_1_SIZE               0x01000000
 123 #define CONFIG_SYS_SDRAM_REFRESH_CNT            0x81a
 124 #define CONFIG_SYS_SDR_MODE_CONFIG              0x1
 125 #define CONFIG_SYS_DRAM_SIZE                    0x01000000
 126
 127 /* FLASH organization */
 128 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 129 /* max number of sectors on one chip */
 130 #define CONFIG_SYS_MAX_FLASH_SECT               140
 131 #define PHYS_FLASH_1                    0x50000000
 132 #define CONFIG_SYS_FLASH_BANKS_LIST             { PHYS_FLASH_1 }
 133
 134 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 135 #define CONFIG_SYS_MONITOR_BASE         PHYS_FLASH_1
 136 #define CONFIG_SYS_MONITOR_LEN                  (256 << 10)
 137
 138 /* Use common CFI driver */
 139 #define CONFIG_SYS_FLASH_CFI
 140 #define CONFIG_FLASH_CFI_DRIVER
 141 /* no byte writes on IXP4xx */
 142 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 143
 144 /* print 'E' for empty sector on flinfo */
 145 #define CONFIG_SYS_FLASH_EMPTY_INFO
 146
 147 /* Ethernet */
 148
 149 /* include IXP4xx NPE support */
 150 #define CONFIG_IXP4XX_NPE               1
 151 #define CONFIG_NET_MULTI                1
 152 /* NPE0 PHY address */
 153 #define CONFIG_PHY_ADDR                 0x00
 154 /* MII PHY management */
 155 #define CONFIG_MII                      1
 156 /* Number of ethernet rx buffers & descriptors */
 157 #define CONFIG_SYS_RX_ETH_BUFFER                16
 158 #define CONFIG_RESET_PHY_R              1
 159 /* ethernet switch connected to MII port */
 160 #define CONFIG_MII_ETHSWITCH            1
 161
 162 #define CONFIG_CMD_DHCP
 163 #define CONFIG_CMD_NET
 164 #define CONFIG_CMD_MII
 165 #define CONFIG_CMD_PING
 166 #undef  CONFIG_CMD_NFS
 167
 168 /* BOOTP options */
 169 #define CONFIG_BOOTP_BOOTFILESIZE
 170 #define CONFIG_BOOTP_BOOTPATH
 171 #define CONFIG_BOOTP_GATEWAY
 172 #define CONFIG_BOOTP_HOSTNAME
 173
 174 /* Cache Configuration */
 175 #define CONFIG_SYS_CACHELINE_SIZE               32
 176
 177 /*
 178  * environment organization:
 179  * one flash sector, embedded in uboot area (bottom bootblock flash)
 180  */
 181 #define CONFIG_ENV_IS_IN_FLASH          1
 182 #define CONFIG_ENV_SIZE                 0x2000
 183 #define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x4000)
 184 #define CONFIG_SYS_USE_PPCENV                   1
 185
 186 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 187         "npe_ucode=50040000\0"                                          \
 188         "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
 189         "kerneladdr=50050000\0"                                         \
 190         "rootaddr=50170000\0"                                           \
 191         "loadaddr=10000\0"                                              \
 192         "updateboot_ser=mw.b 10000 ff 40000;"                           \
 193         " loady ${loadaddr};"                                           \
 194         " run eraseboot writeboot\0"                                    \
 195         "updateboot_net=mw.b 10000 ff 40000;"                           \
 196         " tftp ${loadaddr} u-boot.bin;"                                 \
 197         " run eraseboot writeboot\0"                                    \
 198         "eraseboot=protect off 50000000 50003fff;"                      \
 199         " protect off 50006000 5003ffff;"                               \
 200         " erase 50000000 50003fff;"                                     \
 201         " erase 50006000 5003ffff\0"                                    \
 202         "writeboot=cp.b 10000 50000000 4000;"                           \
 203         " cp.b 16000 50006000 3a000\0"                                  \
 204         "eraseenv=protect off 50004000 50005fff;"                       \
 205         " erase 50004000 50005fff\0"                                    \
 206         "updateroot=tftp ${loadaddr} ${rootfile};"                      \
 207         " era ${rootaddr} +${filesize};"                                \
 208         " cp.b ${loadaddr} ${rootaddr} ${filesize}\0"                   \
 209         "updatekern=tftp ${loadaddr} ${kernelfile};"                    \
 210         " era ${kerneladdr} +${filesize};"                              \
 211         " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"                 \
 212         "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
 213         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 214         "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"   \
 215         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 216         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
 217         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
 218         "boot_flash=run flashargs addtty addeth;"                       \
 219         " bootm ${kerneladdr}\0"                                        \
 220         "boot_net=run netargs addtty addeth;"                           \
 221         " tftpboot ${loadaddr} ${kernelfile};"                          \
 222         " bootm\0"
 223
 224 #endif /* __CONFIG_H */