3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * This file contains the configuration parameters for the dbau1x00 board.
15 #define CONFIG_DBAU1X00 1
17 #define CONFIG_SYS_GENERIC_BOARD
18 #define CONFIG_DISPLAY_BOARDINFO
20 #ifdef CONFIG_DBAU1000
21 /* Also known as Merlot */
23 #ifdef CONFIG_DBAU1100
25 #ifdef CONFIG_DBAU1500
27 #ifdef CONFIG_DBAU1550
30 #error "No valid board set"
36 #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
38 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
40 #define CONFIG_BAUDRATE 115200
44 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
45 #undef CONFIG_BOOTARGS
47 #define CONFIG_EXTRA_ENV_SETTINGS \
48 "addmisc=setenv bootargs ${bootargs} " \
49 "console=ttyS0,${baudrate} " \
51 "bootfile=/tftpboot/vmlinux.srec\0" \
52 "load=tftp 80500000 ${u-boot}\0" \
55 #ifdef CONFIG_DBAU1550
56 /* Boot from flash by default, revert to bootp */
57 #define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
58 #else /* CONFIG_DBAU1550 */
59 #define CONFIG_BOOTCOMMAND "bootp;bootm"
60 #endif /* CONFIG_DBAU1550 */
66 #define CONFIG_BOOTP_BOOTFILESIZE
67 #define CONFIG_BOOTP_BOOTPATH
68 #define CONFIG_BOOTP_GATEWAY
69 #define CONFIG_BOOTP_HOSTNAME
73 * Command line configuration.
75 #include <config_cmd_default.h>
78 #undef CONFIG_CMD_BEDBUG
80 #undef CONFIG_CMD_SAVEENV
82 #undef CONFIG_CMD_FPGA
87 #ifdef CONFIG_DBAU1550
89 #define CONFIG_CMD_FLASH
90 #define CONFIG_CMD_LOADB
91 #define CONFIG_CMD_NET
96 #undef CONFIG_CMD_PCMCIA
100 #define CONFIG_CMD_IDE
101 #define CONFIG_CMD_DHCP
103 #undef CONFIG_CMD_FLASH
104 #undef CONFIG_CMD_LOADB
105 #undef CONFIG_CMD_LOADS
111 * Miscellaneous configurable options
113 #define CONFIG_SYS_LONGHELP /* undef to save memory */
115 #define CONFIG_SYS_PROMPT "DbAu1xx0 # " /* Monitor Command Prompt */
117 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
118 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
119 #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
121 #define CONFIG_SYS_MALLOC_LEN 128*1024
123 #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
125 #define CONFIG_SYS_MHZ 396
127 #if (CONFIG_SYS_MHZ % 12) != 0
128 #error "Invalid CPU frequency - must be multiple of 12!"
131 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
133 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
135 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
137 #define CONFIG_SYS_MEMTEST_START 0x80100000
138 #define CONFIG_SYS_MEMTEST_END 0x80800000
140 /*-----------------------------------------------------------------------
141 * FLASH and environment organization
143 #ifdef CONFIG_DBAU1550
145 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
146 #define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */
148 #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
149 #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
151 #else /* CONFIG_DBAU1550 */
153 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
154 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
156 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
157 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
159 #endif /* CONFIG_DBAU1550 */
161 #define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
163 #define CONFIG_SYS_FLASH_CFI 1
164 #define CONFIG_FLASH_CFI_DRIVER 1
166 /* The following #defines are needed to get flash environment right */
167 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
168 #define CONFIG_SYS_MONITOR_LEN (192 << 10)
170 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
172 /* We boot from this flash, selected with dip switch */
173 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
175 /* timeout values are in ticks */
176 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
177 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
179 #define CONFIG_ENV_IS_NOWHERE 1
181 /* Address and size of Primary Environment Sector */
182 #define CONFIG_ENV_ADDR 0xB0030000
183 #define CONFIG_ENV_SIZE 0x10000
185 #define CONFIG_FLASH_16BIT
187 #define CONFIG_NR_DRAM_BANKS 2
190 #ifdef CONFIG_DBAU1550
196 #define CONFIG_MEMSIZE_IN_BYTES
198 #ifndef CONFIG_DBAU1550
199 /*---ATA PCMCIA ------------------------------------*/
200 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
201 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
202 #define CONFIG_PCMCIA_SLOT_A
204 #define CONFIG_ATAPI 1
205 #define CONFIG_MAC_PARTITION 1
207 /* We run CF in "true ide" mode or a harddrive via pcmcia */
208 #define CONFIG_IDE_PCMCIA 1
210 /* We only support one slot for now */
211 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
212 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
214 #undef CONFIG_IDE_LED /* LED for ide not supported */
215 #undef CONFIG_IDE_RESET /* reset for ide not supported */
217 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
219 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
221 /* Offset for data I/O */
222 #define CONFIG_SYS_ATA_DATA_OFFSET 8
224 /* Offset for normal register accesses */
225 #define CONFIG_SYS_ATA_REG_OFFSET 0
227 /* Offset for alternate registers */
228 #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
229 #endif /* CONFIG_DBAU1550 */
231 /*-----------------------------------------------------------------------
232 * Cache Configuration
234 #define CONFIG_SYS_DCACHE_SIZE 16384
235 #define CONFIG_SYS_ICACHE_SIZE 16384
236 #define CONFIG_SYS_CACHELINE_SIZE 32
238 #endif /* __CONFIG_H */