include/configs/dig297.h

   1 /*
   2  * (C) Copyright 2011 Comelit Group SpA
   3  * Luca Ceresoli <luca.ceresoli@comelit.it>
   4  *
   5  * Based on omap3_beagle.h:
   6  * (C) Copyright 2006-2008
   7  * Texas Instruments.
   8  * Richard Woodruff <r-woodruff2@ti.com>
   9  * Syed Mohammed Khasim <x0khasim@ti.com>
  10  *
  11  * Configuration settings for the Comelit DIG297 board.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 #include <asm/mach-types.h>
  36 #ifdef MACH_TYPE_OMAP3_CPS
  37 #error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
  38 #else
  39 #define MACH_TYPE_OMAP3_CPS 2751
  40 #endif
  41 #define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
  42
  43 /*
  44  * High Level Configuration Options
  45  */
  46 #define CONFIG_OMAP             /* in a TI OMAP core */
  47 #define CONFIG_OMAP34XX         /* which is a 34XX */
  48 #define CONFIG_OMAP3430         /* which is in a 3430 */
  49
  50 #define CONFIG_SYS_TEXT_BASE    0x80008000
  51
  52 #define CONFIG_SDRC     /* The chip has SDRC controller */
  53
  54 #include <asm/arch/cpu.h>               /* get chip and board defs */
  55 #include <asm/arch/omap3.h>
  56
  57 /*
  58  * Display CPU and Board information
  59  */
  60 #define CONFIG_DISPLAY_CPUINFO
  61 #define CONFIG_DISPLAY_BOARDINFO
  62
  63 /* Clock Defines */
  64 #define V_OSCK                  26000000        /* Clock output from T2 */
  65 #define V_SCLK                  (V_OSCK >> 1)
  66
  67 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  68 #define CONFIG_MISC_INIT_R
  69
  70 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  71 #define CONFIG_SETUP_MEMORY_TAGS
  72 #define CONFIG_INITRD_TAG
  73 #define CONFIG_REVISION_TAG
  74
  75 /*
  76  * Size of malloc() pool
  77  */
  78 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  79                                                 /* Sector */
  80 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10) /* UBI needs >= 512 kB */
  81
  82 /*
  83  * Hardware drivers
  84  */
  85
  86 /*
  87  * NS16550 Configuration
  88  */
  89 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  90
  91 #define CONFIG_SYS_NS16550
  92 #define CONFIG_SYS_NS16550_SERIAL
  93 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  94 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  95
  96 /*
  97  * select serial console configuration: UART3 (ttyO2)
  98  */
  99 #define CONFIG_CONS_INDEX               3
 100 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
 101 #define CONFIG_SERIAL3                  3
 102
 103 /* allow to overwrite serial and ethaddr */
 104 #define CONFIG_ENV_OVERWRITE
 105 #define CONFIG_BAUDRATE                 115200
 106 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 107                                         115200}
 108 #define CONFIG_GENERIC_MMC              1
 109 #define CONFIG_MMC                      1
 110 #define CONFIG_OMAP_HSMMC               1
 111 #define CONFIG_DOS_PARTITION
 112
 113 /* DDR - I use Micron DDR */
 114 #define CONFIG_OMAP3_MICRON_DDR
 115
 116 /* library portions to compile in */
 117 #define CONFIG_RBTREE
 118 #define CONFIG_MTD_PARTITIONS
 119 #define CONFIG_LZO
 120
 121 /* commands to include */
 122 #include <config_cmd_default.h>
 123
 124 #define CONFIG_CMD_FAT          /* FAT support                  */
 125 #define CONFIG_CMD_UBI          /* UBI Support                  */
 126 #define CONFIG_CMD_UBIFS        /* UBIFS Support                */
 127 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
 128 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 129 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
 130 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:896k(uboot),"\
 131                                 "128k(uboot-env),3m(kernel),252m(ubi)"
 132
 133 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 134 #define CONFIG_CMD_MMC          /* MMC support                  */
 135 #define CONFIG_CMD_NAND         /* NAND support                 */
 136
 137 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 138 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 139 #undef CONFIG_CMD_IMI           /* iminfo                       */
 140 #undef CONFIG_CMD_IMLS          /* List all found images        */
 141 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 142 #undef CONFIG_CMD_NFS           /* NFS support                  */
 143
 144 #define CONFIG_SYS_NO_FLASH
 145 #define CONFIG_HARD_I2C
 146 #define CONFIG_SYS_I2C_SPEED            100000
 147 #define CONFIG_SYS_I2C_SLAVE            1
 148 #define CONFIG_SYS_I2C_BUS              0
 149 #define CONFIG_SYS_I2C_BUS_SELECT       1
 150 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 151
 152 /*
 153  * TWL4030
 154  */
 155 #define CONFIG_TWL4030_POWER
 156 #define CONFIG_TWL4030_LED
 157
 158 /*
 159  * Board NAND Info.
 160  */
 161 #define CONFIG_NAND_OMAP_GPMC
 162 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 163                                                         /* to access nand */
 164 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 165                                                         /* to access nand at */
 166                                                         /* CS0 */
 167 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 168
 169 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 170
 171 #if defined(CONFIG_CMD_NET)
 172 /*
 173  * SMSC9220 Ethernet
 174  */
 175
 176 #define CONFIG_SMC911X
 177 #define CONFIG_SMC911X_32_BIT
 178 #define CONFIG_SMC911X_BASE     0x2C000000
 179
 180 #endif /* (CONFIG_CMD_NET) */
 181
 182 /* Environment information */
 183 #define CONFIG_BOOTDELAY                1
 184
 185 #define CONFIG_EXTRA_ENV_SETTINGS \
 186         "loadaddr=0x82000000\0" \
 187         "console=ttyO2,115200n8\0" \
 188         "mtdids=" MTDIDS_DEFAULT "\0" \
 189         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 190         "partition=nand0,3\0"\
 191         "mmcroot=/dev/mmcblk0p2 rw\0" \
 192         "mmcrootfstype=ext3 rootwait\0" \
 193         "nandroot=ubi0:rootfs ro\0" \
 194         "nandrootfstype=ubifs\0" \
 195         "nfspath=/srv/nfs\0" \
 196         "tftpfilename=uImage\0" \
 197         "gatewayip=0.0.0.0\0" \
 198         "mmcargs=setenv bootargs console=${console} " \
 199                 "${mtdparts} " \
 200                 "root=${mmcroot} " \
 201                 "rootfstype=${mmcrootfstype} " \
 202                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 203                         "${netmask}:${hostname}::off\0" \
 204         "nandargs=setenv bootargs console=${console} " \
 205                 "${mtdparts} " \
 206                 "ubi.mtd=3 " \
 207                 "root=${nandroot} " \
 208                 "rootfstype=${nandrootfstype} " \
 209                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 210                         "${netmask}:${hostname}::off\0" \
 211         "netargs=setenv bootargs console=${console} " \
 212                 "${mtdparts} " \
 213                 "root=/dev/nfs rw " \
 214                 "nfsroot=${serverip}:${nfspath} " \
 215                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 216                         "${netmask}:${hostname}::off\0" \
 217         "mmcboot=echo Booting from mmc ...; " \
 218                 "run mmcargs; " \
 219                 "bootm ${loadaddr}\0" \
 220         "nandboot=echo Booting from nand ...; " \
 221                 "run nandargs; " \
 222                 "nand read ${loadaddr} 100000 300000; " \
 223                 "bootm ${loadaddr}\0" \
 224         "netboot=echo Booting from network ...; " \
 225                 "run netargs; " \
 226                 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
 227                 "bootm ${loadaddr}\0" \
 228         "resetenv=nand erase e0000 20000\0"\
 229
 230 #define CONFIG_BOOTCOMMAND \
 231         "run nandboot"
 232
 233 #define CONFIG_AUTO_COMPLETE
 234 /*
 235  * Miscellaneous configurable options
 236  */
 237 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 238 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 239 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 240 #define CONFIG_SYS_PROMPT               "DIG297# "
 241 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 242 /* Print Buffer Size */
 243 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 244                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 245 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 246 /* Boot Argument Buffer Size */
 247 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 248
 249 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 250                                                                 /* works on */
 251 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 252                                         0x01F00000) /* 31MB */
 253
 254 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 255                                                         /* load address */
 256
 257 /*
 258  * OMAP3 has 12 GP timers, they can be driven by the system clock
 259  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 260  * This rate is divided by a local divisor.
 261  */
 262 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 263 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 264 #define CONFIG_SYS_HZ                   1000
 265
 266 /*-----------------------------------------------------------------------
 267  * Stack sizes
 268  *
 269  * The stack sizes are set up in start.S using the settings below
 270  */
 271 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 272 #ifdef CONFIG_USE_IRQ
 273 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 274 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 275 #endif
 276
 277 /*-----------------------------------------------------------------------
 278  * Physical Memory Map
 279  */
 280 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 281 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 282 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 283 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 284
 285 /* SDRAM Bank Allocation method */
 286 #define SDRC_R_B_C              1
 287
 288 /*-----------------------------------------------------------------------
 289  * FLASH and environment organization
 290  */
 291
 292 /* **** PISMO SUPPORT *** */
 293
 294 /* Configure the PISMO */
 295 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 296
 297 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 298
 299 #define CONFIG_SYS_FLASH_BASE           boot_flash_base
 300
 301 /* Monitor at start of flash */
 302 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 303
 304 #define CONFIG_ENV_IS_IN_NAND
 305 #define SMNAND_ENV_OFFSET               0x0E0000 /* environment starts here */
 306
 307 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 308 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 309 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 310
 311 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 312 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 313 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 314 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 315                                          CONFIG_SYS_INIT_RAM_SIZE - \
 316                                          GENERATED_GBL_DATA_SIZE)
 317
 318 #endif /* __CONFIG_H */