include/configs/digsy_mtc.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2005-2007
   6  * Modified for InterControl digsyMTC MPC5200 board by
   7  * Frank Bodammer, GCD Hard- & Software GmbH,
   8  *                 frank.bodammer@gcd-solutions.de
   9  *
  10  * (C) Copyright 2009 Semihalf
  11  * Optimized for digsyMTC by: Grzegorz Bernacki <gjb@semihalf.com>
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software\; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation\; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY\; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program\; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  */
  31
  32 #ifndef __CONFIG_H
  33 #define __CONFIG_H
  34
  35 /*
  36  * High Level Configuration Options
  37  */
  38
  39 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  40 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  41 #define CONFIG_DIGSY_MTC        1       /* ... on InterControl digsyMTC board */
  42
  43 /*
  44  * Valid values for CONFIG_SYS_TEXT_BASE are:
  45  * 0xFFF00000   boot high (standard configuration)
  46  * 0xFE000000   boot low
  47  * 0x00100000   boot from RAM (for testing only)
  48  */
  49 #ifndef CONFIG_SYS_TEXT_BASE
  50 #define CONFIG_SYS_TEXT_BASE    0xFFF00000      /* Standard: boot high */
  51 #endif
  52
  53 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
  54
  55 #define CONFIG_SYS_CACHELINE_SIZE       32
  56
  57 /*
  58  * Serial console configuration
  59  */
  60 #define CONFIG_PSC_CONSOLE      4       /* console is on PSC4  */
  61 #define CONFIG_BAUDRATE         115200  /* ... at 115200  bps  */
  62 #define CONFIG_SYS_BAUDRATE_TABLE       \
  63         { 9600, 19200, 38400, 57600, 115200, 230400 }
  64
  65 /*
  66  * PCI Mapping:
  67  * 0x40000000 - 0x4fffffff - PCI Memory
  68  * 0x50000000 - 0x50ffffff - PCI IO Space
  69  */
  70 #define CONFIG_PCI              1
  71 #define CONFIG_PCI_PNP          1
  72 #define CONFIG_PCI_SCAN_SHOW    1
  73
  74 #define CONFIG_PCI_MEM_BUS      0x40000000
  75 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  76 #define CONFIG_PCI_MEM_SIZE     0x10000000
  77
  78 #define CONFIG_PCI_IO_BUS       0x50000000
  79 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  80 #define CONFIG_PCI_IO_SIZE      0x01000000
  81
  82 /*
  83  *  Partitions
  84  */
  85 #define CONFIG_DOS_PARTITION
  86 #define CONFIG_BZIP2
  87
  88 /*
  89  * Video
  90  */
  91 #define CONFIG_VIDEO
  92
  93 #ifdef CONFIG_VIDEO
  94 #define CONFIG_VIDEO_MB862xx
  95 #define CONFIG_VIDEO_MB862xx_ACCEL
  96 #define CONFIG_VIDEO_CORALP
  97 #define CONFIG_CFB_CONSOLE
  98 #define CONFIG_VIDEO_LOGO
  99 #define CONFIG_VIDEO_SW_CURSOR
 100 #define CONFIG_VGA_AS_SINGLE_DEVICE
 101 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 102 #define CONFIG_SPLASH_SCREEN
 103 #define CONFIG_VIDEO_BMP_GZIP
 104 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)       /* decompressed img */
 105
 106 /* Coral-PA clock frequency, geo and other both 133MHz */
 107 #define CONFIG_SYS_MB862xx_CCF  0x00050000
 108 /* Video SDRAM parameters */
 109 #define CONFIG_SYS_MB862xx_MMR  0x11d7fa72
 110 #endif
 111
 112 /*
 113  * Command line configuration.
 114  */
 115 #include <config_cmd_default.h>
 116
 117 #ifdef CONFIG_VIDEO
 118 #define CONFIG_CMD_BMP
 119 #endif
 120 #define CONFIG_CMD_DFL
 121 #define CONFIG_CMD_CACHE
 122 #define CONFIG_CMD_DATE
 123 #define CONFIG_CMD_DHCP
 124 #define CONFIG_CMD_DIAG
 125 #define CONFIG_CMD_EEPROM
 126 #define CONFIG_CMD_ELF
 127 #define CONFIG_CMD_EXT2
 128 #define CONFIG_CMD_FAT
 129 #define CONFIG_CMD_I2C
 130 #define CONFIG_CMD_IDE
 131 #define CONFIG_CMD_IRQ
 132 #define CONFIG_CMD_MII
 133 #define CONFIG_CMD_PCI
 134 #define CONFIG_CMD_PING
 135 #define CONFIG_CMD_REGINFO
 136 #define CONFIG_CMD_SAVES
 137 #define CONFIG_CMD_SPI
 138 #define CONFIG_CMD_USB
 139
 140 #if (CONFIG_SYS_TEXT_BASE == 0xFF000000)
 141 #define CONFIG_SYS_LOWBOOT      1
 142 #endif
 143
 144 /*
 145  * Autobooting
 146  */
 147 #define CONFIG_BOOTDELAY        1
 148
 149 #undef  CONFIG_BOOTARGS
 150
 151 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 152         "fw_image=digsyMPC.img\0"                                       \
 153         "mtcb_start=mtc led diag orange; run mtcb_1\0"                  \
 154         "mtcb_clearled=for x in user1 user2 usbpwr usbbusy; "           \
 155                 "do mtc led $x; done\0"                                 \
 156         "mtcb_1=if mtc key; then run mtcb_clearled mtcb_update; "       \
 157                 "else run mtcb_fw; fi\0"                                \
 158         "mtcb_fw=if bootm ff000000; then echo FIRMWARE OK!; "           \
 159                 "else echo BAD FIRMWARE CRC!; mtc led diag red; fi\0"   \
 160         "mtcb_update=mtc led user1 orange;"                             \
 161                 "while mtc key; do ; done; run mtcb_2;\0"               \
 162         "mtcb_2=mtc led user1 green 2; usb reset; run mtcb_usb1;\0"     \
 163         "mtcb_usb1=if fatload usb 0 400000 script.img; "                \
 164                 "then run mtcb_doscript; else run mtcb_usb2; fi\0"      \
 165         "mtcb_usb2=if fatload usb 0 400000 $fw_image; "                 \
 166                 "then run mtcb_dousb; else run mtcb_ide; fi\0"          \
 167         "mtcb_doscript=run mtcb_usbleds; mtc led user2 orange 2; "      \
 168                 "run mtcb_wait_flickr mtcb_ds_1;\0"                     \
 169         "mtcb_ds_1=if imi 400000; then mtc led usbbusy; "               \
 170                 "source 400000; else run mtcb_error; fi\0"              \
 171         "mtcb_dousb=run mtcb_usbleds mtcb_wait_flickr mtcb_du_1;\0"     \
 172         "mtcb_du_1=if imi 400000; then run mtcb_du_2; "                 \
 173                 "else run mtcb_error; fi\0"                             \
 174         "mtcb_du_2=run mtcb_clear mtcb_prog; mtc led usbbusy; "         \
 175                 "run mtcb_checkfw\0"                                    \
 176         "mtcb_checkfw=if imi ff000000; then run mtcb_success; "         \
 177                 "else run mtcb_error; fi\0"                             \
 178         "mtcb_waitkey=mtc key; until test $? -eq 0; do mtc key; done\0" \
 179         "mtcb_wait_flickr=run mtcb_waitkey mtcb_uledflckr\0"            \
 180         "mtcb_usbleds=mtc led usbpwr green; mtc led usbbusy orange 1;\0"\
 181         "mtcb_uledflckr=mtc led user1 orange 11\0"                      \
 182         "mtcb_error=mtc led user1 red\0"                                \
 183         "mtcb_clear=erase ff000000 ff0fffff\0"                          \
 184         "mtcb_prog=cp.b 400000 ff000000 ${filesize}\0"                  \
 185         "mtcb_success=mtc led user1 green\0"                            \
 186         "mtcb_ide=if fatload ide 0 400000 $fw_image;"                   \
 187                 "then run mtcb_doide; else run mtcb_error; fi\0"        \
 188         "mtcb_doide=mtc led user2 green 1;"                             \
 189                 "run mtcb_wait_flickr mtcb_di_1;\0"                     \
 190         "mtcb_di_1=if imi 400000; then run mtcb_di_2;"                  \
 191                 "else run mtcb_error; fi\0"                             \
 192         "mtcb_di_2=run mtcb_clear; run mtcb_prog mtcb_checkfw\0"        \
 193         "ramdisk_num_sector=16\0"                                       \
 194         "flash_base=ff000000\0"                                         \
 195         "flashdisk_size=e00000\0"                                       \
 196         "env_sector=fff60000\0"                                         \
 197         "flashdisk_start=ff100000\0"                                    \
 198         "load_cmd=tftp 400000 digsyMPC.img\0"                           \
 199         "clear_cmd=erase ff000000 ff0fffff\0"                           \
 200         "flash_cmd=cp.b 400000 ff000000 ${filesize}\0"                  \
 201         "update_cmd=run load_cmd; "                                     \
 202         "iminfo 400000; "                                               \
 203         "run clear_cmd flash_cmd; "                                     \
 204         "iminfo ff000000\0"                                             \
 205         "spi_driver=yes\0"                                              \
 206         "spi_watchdog=no\0"                                             \
 207         "ftps_start=yes\0"                                              \
 208         "ftps_user1=admin\0"                                            \
 209         "ftps_pass1=admin\0"                                            \
 210         "ftps_base1=/\0"                                                \
 211         "ftps_home1=/\0"                                                \
 212         "plc_sio_srv=no\0"                                              \
 213         "plc_sio_baud=57600\0"                                          \
 214         "plc_sio_parity=no\0"                                           \
 215         "plc_sio_stop=1\0"                                              \
 216         "plc_sio_com=2\0"                                               \
 217         "plc_eth_srv=yes\0"                                             \
 218         "plc_eth_port=1200\0"                                           \
 219         "plc_root=/ide/\0"                                              \
 220         "diag_level=0\0"                                                \
 221         "webvisu=no\0"                                                  \
 222         "plc_can1_routing=no\0"                                         \
 223         "plc_can1_baudrate=250\0"                                       \
 224         "plc_can2_routing=no\0"                                         \
 225         "plc_can2_baudrate=250\0"                                       \
 226         "plc_can3_routing=no\0"                                         \
 227         "plc_can3_baudrate=250\0"                                       \
 228         "plc_can4_routing=no\0"                                         \
 229         "plc_can4_baudrate=250\0"                                       \
 230         "netdev=eth0\0"                                                 \
 231         "console=ttyPSC0\0"                                             \
 232         "kernel_addr_r=400000\0"                                        \
 233         "fdt_addr_r=600000\0"                                           \
 234         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 235         "nfsroot=${serverip}:${rootpath}\0"                             \
 236         "addip=setenv bootargs ${bootargs} "                            \
 237         "ip=${ipaddr}:${serverip}:${gatewayip}:"                        \
 238         "${netmask}:${hostname}:${netdev}:off panic=1\0"                \
 239         "addcons=setenv bootargs ${bootargs} console=${console},${baudrate}\0"\
 240         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 241         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 242                 "tftp ${fdt_addr_r} ${fdt_file};"                       \
 243                 "run nfsargs addip addcons;"                            \
 244                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 245         "load=tftp 200000 ${u-boot}\0"                                  \
 246         "update=protect off FFF00000 +${filesize};"                     \
 247                 "erase FFF00000 +${filesize};"                          \
 248                 "cp.b 200000 FFF00000 ${filesize};"                     \
 249                 "protect on FFF00000 +${filesize}\0"                    \
 250         ""
 251
 252 #define CONFIG_BOOTCOMMAND      "run mtcb_start"
 253
 254 /*
 255  * SPI configuration
 256  */
 257 #define CONFIG_HARD_SPI         1
 258 #define CONFIG_MPC52XX_SPI      1
 259
 260 /*
 261  * I2C configuration
 262  */
 263 #define CONFIG_HARD_I2C         1
 264 #define CONFIG_SYS_I2C_MODULE   1
 265 #define CONFIG_SYS_I2C_SPEED    100000
 266 #define CONFIG_SYS_I2C_SLAVE    0x7F
 267
 268 /*
 269  * EEPROM configuration
 270  */
 271 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 272 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 273 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 274 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   70
 275
 276 /*
 277  * RTC configuration
 278  */
 279 #if defined(CONFIG_DIGSY_REV5)
 280 #define CONFIG_SYS_I2C_RTC_ADDR 0x56
 281 #define CONFIG_RTC_RV3029
 282 /* Enable 5k Ohm trickle charge resistor */
 283 #define CONFIG_SYS_RV3029_TCR   0x20
 284 #else
 285 #define CONFIG_RTC_DS1337
 286 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 287 #define CONFIG_SYS_DS1339_TCR_VAL       0xAB    /* diode + 4k resistor */
 288 #endif
 289
 290 /*
 291  * Flash configuration
 292  */
 293 #define CONFIG_SYS_FLASH_CFI            1
 294 #define CONFIG_FLASH_CFI_DRIVER 1
 295
 296 #if defined(CONFIG_DIGSY_REV5)
 297 #define CONFIG_SYS_FLASH_BASE           0xFE000000
 298 #define CONFIG_SYS_FLASH_BASE_CS1       0xFC000000
 299 #define CONFIG_SYS_MAX_FLASH_BANKS      2
 300 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE, \
 301                                         CONFIG_SYS_FLASH_BASE_CS1}
 302 #define CONFIG_SYS_UPDATE_FLASH_SIZE
 303 #define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
 304 #else
 305 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 306 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 307 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 308 #endif
 309
 310 #define CONFIG_SYS_MAX_FLASH_SECT       256
 311 #define CONFIG_FLASH_16BIT
 312 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
 313 #define CONFIG_SYS_FLASH_SIZE   0x01000000
 314 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000
 315 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
 316
 317 #define CONFIG_OF_LIBFDT  1
 318 #define CONFIG_OF_BOARD_SETUP   1
 319
 320 #define OF_CPU                  "PowerPC,5200@0"
 321 #define OF_SOC                  "soc5200@f0000000"
 322 #define OF_TBCLK                (bd->bi_busfreq / 4)
 323
 324 #define CONFIG_BOARD_EARLY_INIT_R
 325 #define CONFIG_MISC_INIT_R
 326
 327 /*
 328  * Environment settings
 329  */
 330 #define CONFIG_ENV_IS_IN_FLASH  1
 331 #if defined(CONFIG_LOWBOOT)
 332 #define CONFIG_ENV_ADDR         0xFF060000
 333 #else   /* CONFIG_LOWBOOT */
 334 #define CONFIG_ENV_ADDR         0xFFF60000
 335 #endif  /* CONFIG_LOWBOOT */
 336 #define CONFIG_ENV_SIZE         0x10000
 337 #define CONFIG_ENV_SECT_SIZE    0x20000
 338 #define CONFIG_ENV_OVERWRITE    1
 339
 340 /*
 341  * Memory map
 342  */
 343 #define CONFIG_SYS_MBAR         0xF0000000
 344 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 345 #if !defined(CONFIG_SYS_LOWBOOT)
 346 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 347 #else
 348 #define CONFIG_SYS_DEFAULT_MBAR 0xF0000000
 349 #endif
 350
 351 /*
 352  *  Use SRAM until RAM will be available
 353  */
 354 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 355 #define CONFIG_SYS_INIT_RAM_SIZE                MPC5XXX_SRAM_SIZE
 356
 357 #define CONFIG_SYS_GBL_DATA_OFFSET      \
 358         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 359 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 360
 361 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 362 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 363 #define CONFIG_SYS_RAMBOOT              1
 364 #endif
 365
 366 #define CONFIG_SYS_MONITOR_LEN  (256 << 10)
 367 #define CONFIG_SYS_MALLOC_LEN   (4096 << 10)
 368 #define CONFIG_SYS_BOOTMAPSZ    (8 << 20)
 369
 370 /*
 371  * Ethernet configuration
 372  */
 373 #define CONFIG_MPC5xxx_FEC      1
 374 #define CONFIG_MPC5xxx_FEC_MII100
 375 #if defined(CONFIG_DIGSY_REV5)
 376 #define CONFIG_PHY_ADDR         0x01
 377 #else
 378 #define CONFIG_PHY_ADDR         0x00
 379 #endif
 380 #define CONFIG_PHY_RESET_DELAY  1000
 381
 382 #define CONFIG_NETCONSOLE               /* include NetConsole support   */
 383
 384 /*
 385  * GPIO configuration
 386  * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1)
 387  *  Bit 0   (mask 0x80000000) : 0x1
 388  * SPI on Tmr2/3/4/5 pins
 389  *  Bit 2:3 (mask 0x30000000) : 0x2
 390  * ATA cs0/1 on csb_4/5
 391  *  Bit 6:7 (mask 0x03000000) : 0x2
 392  * Ethernet 100Mbit with MD
 393  *  Bits 12:15 (mask 0x000f0000): 0x5
 394  * USB - Two UARTs
 395  *  Bits 18:19 (mask 0x00003000) : 0x2
 396  * PSC3 - USB2 on PSC3
 397  *  Bits 20:23 (mask 0x00000f00) : 0x1
 398  * PSC2 - CAN1&2 on PSC2 pins
 399  *  Bits 25:27 (mask 0x00000070) : 0x1
 400  * PSC1 - AC97 functionality
 401  *  Bits 29:31 (mask 0x00000007) : 0x2
 402  */
 403 #define CONFIG_SYS_GPS_PORT_CONFIG      0xA2552112
 404
 405 /*
 406  * Miscellaneous configurable options
 407  */
 408 #define CONFIG_SYS_LONGHELP
 409 #define CONFIG_AUTO_COMPLETE    1
 410 #define CONFIG_CMDLINE_EDITING  1
 411 #define CONFIG_SYS_PROMPT       "=> "
 412 #define CONFIG_SYS_HUSH_PARSER
 413 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 414
 415 #define CONFIG_AUTOBOOT_KEYED
 416 #define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
 417 #define CONFIG_AUTOBOOT_DELAY_STR       " "
 418
 419 #define CONFIG_LOOPW            1
 420 #define CONFIG_MX_CYCLIC        1
 421 #define CONFIG_ZERO_BOOTDELAY_CHECK
 422
 423 #define CONFIG_SYS_CBSIZE               1024
 424 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 425 #define CONFIG_SYS_MAXARGS              32
 426 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 427
 428 #define CONFIG_SYS_ALT_MEMTEST
 429 #define CONFIG_SYS_MEMTEST_SCRATCH      0x00001000
 430 #define CONFIG_SYS_MEMTEST_START        0x00010000
 431 #define CONFIG_SYS_MEMTEST_END          0x019fffff
 432
 433 #define CONFIG_SYS_LOAD_ADDR            0x00100000
 434
 435 #define CONFIG_SYS_HZ                   1000
 436
 437 /*
 438  * Various low-level settings
 439  */
 440 #define CONFIG_SYS_SDRAM_CS1            1
 441 #define CONFIG_SYS_XLB_PIPELINING       1
 442
 443 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 444 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 445
 446 #if defined(CONFIG_SYS_LOWBOOT)
 447 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 448 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 449 #define CONFIG_SYS_BOOTCS_CFG           0x0002DD00
 450 #endif
 451
 452 #define CONFIG_SYS_CS4_START            0x60000000
 453 #define CONFIG_SYS_CS4_SIZE             0x1000
 454 #define CONFIG_SYS_CS4_CFG              0x0008FC00
 455
 456 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 457 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 458 #define CONFIG_SYS_CS0_CFG              0x0002DD00
 459
 460 #if defined(CONFIG_DIGSY_REV5)
 461 #define CONFIG_SYS_CS1_START            CONFIG_SYS_FLASH_BASE_CS1
 462 #define CONFIG_SYS_CS1_SIZE             CONFIG_SYS_FLASH_SIZE
 463 #define CONFIG_SYS_CS1_CFG              0x0002DD00
 464 #endif
 465
 466 #define CONFIG_SYS_CS_BURST             0x00000000
 467 #define CONFIG_SYS_CS_DEADCYCLE 0x11111111
 468
 469 #if !defined(CONFIG_SYS_LOWBOOT)
 470 #define CONFIG_SYS_RESET_ADDRESS        0xfff00100
 471 #else
 472 #define CONFIG_SYS_RESET_ADDRESS        0xff000100
 473 #endif
 474
 475 /*
 476  * USB
 477  */
 478 #define CONFIG_USB_OHCI_NEW
 479 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 480 #define CONFIG_USB_STORAGE
 481
 482 #define CONFIG_USB_CLOCK        0x00013333
 483 #define CONFIG_USB_CONFIG       0x00002000
 484
 485 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 486 #define CONFIG_SYS_USB_OHCI_REGS_BASE   MPC5XXX_USB
 487 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "mpc5200"
 488 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 489
 490 /*
 491  * IDE/ATA
 492  */
 493 #define CONFIG_IDE_RESET
 494 #define CONFIG_IDE_PREINIT
 495
 496 #define CONFIG_SYS_ATA_CS_ON_I2C2
 497 #define CONFIG_SYS_IDE_MAXBUS           1
 498 #define CONFIG_SYS_IDE_MAXDEVICE        1
 499
 500 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 501 #define CONFIG_SYS_ATA_BASE_ADDR        MPC5XXX_ATA
 502 #define CONFIG_SYS_ATA_DATA_OFFSET      (0x0060)
 503 #define CONFIG_SYS_ATA_REG_OFFSET       (CONFIG_SYS_ATA_DATA_OFFSET)
 504 #define CONFIG_SYS_ATA_ALT_OFFSET       (0x005C)
 505 #define CONFIG_SYS_ATA_STRIDE           4
 506
 507 #define CONFIG_ATAPI            1
 508 #define CONFIG_LBA48            1
 509
 510 #endif /* __CONFIG_H */