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1 /*
2  * (C) Copyright 2008
3  * Graeme Russ, graeme.russ@gmail.com.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23
24 #include <asm/ibmpc.h>
25 /*
26  * board/config.h - configuration options, board specific
27  */
28
29 #ifndef __CONFIG_H
30 #define __CONFIG_H
31
32 #define CONFIG_RELOC_FIXUP_WORKS
33
34 /*
35  * Stuff still to be dealt with -
36  */
37 #define CONFIG_RTC_MC146818
38
39 /*
40  * High Level Configuration Options
41  * (easy to change)
42  */
43 #define DEBUG_PARSER
44
45 #define CONFIG_X86                      1       /* Intel X86 CPU */
46 #define CONFIG_SYS_SC520                1       /* AMD SC520 */
47 #define CONFIG_SYS_SC520_SSI
48 #define CONFIG_SHOW_BOOT_PROGRESS       1
49 #define CONFIG_LAST_STAGE_INIT          1
50
51 /*
52  * If CONFIG_HW_WATCHDOG is not defined, the watchdog jumper on the
53  * bottom (processor) board MUST be removed!
54  */
55 #undef CONFIG_WATCHDOG
56 #define CONFIG_HW_WATCHDOG
57
58  /*-----------------------------------------------------------------------
59   * Serial Configuration
60   */
61 #define CONFIG_SERIAL_MULTI
62 #undef CONFIG_SERIAL_SOFTWARE_FIFO
63 #define CONFIG_CONS_INDEX               1
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_SERIAL
66 #define CONFIG_SYS_NS16550_REG_SIZE     1
67 #define CONFIG_SYS_NS16550_CLK          1843200
68 #define CONFIG_BAUDRATE                 9600
69 #define CONFIG_SYS_BAUDRATE_TABLE       \
70         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
71
72 #define CONFIG_SYS_NS16550_COM1         UART0_BASE
73 #define CONFIG_SYS_NS16550_COM2         UART1_BASE
74 #define CONFIG_SYS_NS16550_COM3         (0x1000 + UART0_BASE)
75 #define CONFIG_SYS_NS16550_COM4         (0x1000 + UART1_BASE)
76 #define CONFIG_SYS_NS16550_PORT_MAPPED
77
78  /*-----------------------------------------------------------------------
79   * Video Configuration
80   */
81 #undef CONFIG_VIDEO                     /* No Video Hardware */
82 #undef CONFIG_CFB_CONSOLE
83
84 /*
85  * Size of malloc() pool
86  */
87 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 128*1024)
88
89 /*-----------------------------------------------------------------------
90  * Command line configuration.
91  */
92 #include <config_cmd_default.h>
93
94 #define CONFIG_CMD_BDI          /* bdinfo                       */
95 #define CONFIG_CMD_BOOTD        /* bootd                        */
96 #define CONFIG_CMD_CONSOLE      /* coninfo                      */
97 #define CONFIG_CMD_ECHO         /* echo arguments               */
98 #define CONFIG_CMD_FLASH        /* flinfo, erase, protect       */
99 #define CONFIG_CMD_FPGA         /* FPGA configuration Support   */
100 #define CONFIG_CMD_IMI          /* iminfo                       */
101 #define CONFIG_CMD_IMLS         /* List all found images        */
102 #define CONFIG_CMD_IRQ          /* IRQ Information              */
103 #define CONFIG_CMD_ITEST        /* Integer (and string) test    */
104 #define CONFIG_CMD_LOADB        /* loadb                        */
105 #define CONFIG_CMD_LOADS        /* loads                        */
106 #define CONFIG_CMD_MEMORY       /* md mm nm mw cp cmp crc base loop mtest */
107 #define CONFIG_CMD_MISC         /* Misc functions like sleep etc*/
108 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
109 #undef CONFIG_CMD_NFS           /* NFS support                  */
110 #define CONFIG_CMD_PCI          /* PCI support                  */
111 #define CONFIG_CMD_PING         /* ICMP echo support            */
112 #define CONFIG_CMD_RUN          /* run command in env variable  */
113 #define CONFIG_CMD_SAVEENV      /* saveenv                      */
114 #define CONFIG_CMD_SETGETDCR    /* DCR support on 4xx           */
115 #define CONFIG_CMD_SOURCE       /* "source" command Support     */
116 #define CONFIG_CMD_XIMG         /* Load part of Multi Image     */
117
118 #define CONFIG_BOOTDELAY                15
119 #define CONFIG_BOOTARGS                 "root=/dev/mtdblock0 console=ttyS0,9600"
120 /* #define CONFIG_BOOTCOMMAND           "bootm 38000000" */
121
122 #if defined(CONFIG_CMD_KGDB)
123 #define CONFIG_KGDB_BAUDRATE            115200          /* speed to run kgdb serial port */
124 #define CONFIG_KGDB_SER_INDEX           2               /* which serial port to use */
125 #endif
126
127 /*
128  * Miscellaneous configurable options
129  */
130 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
131 #define CONFIG_SYS_PROMPT               "boot > "       /* Monitor Command Prompt       */
132 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
133 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
134                                          sizeof(CONFIG_SYS_PROMPT) + \
135                                          16)            /* Print Buffer Size */
136 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
137 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
138
139 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on     */
140 #define CONFIG_SYS_MEMTEST_END          0x01000000      /* 1 ... 16 MB in DRAM  */
141
142 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
143
144 #define CONFIG_SYS_HZ                   1000            /* incrementer freq: 1kHz */
145
146 /*-----------------------------------------------------------------------
147  * SDRAM Configuration
148  */
149 #define CONFIG_SYS_SDRAM_DRCTMCTL       0x18
150 #define CONFIG_NR_DRAM_BANKS            4
151
152 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
153 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
154 #undef CONFIG_SYS_SDRAM_REFRESH_RATE
155 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
156 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
157 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
158
159 /*-----------------------------------------------------------------------
160  * CPU Features
161  */
162 #define CONFIG_SYS_SC520_HIGH_SPEED     0       /* 100 or 133MHz */
163 #define CONFIG_SYS_SC520_RESET                  /* use SC520 MMCR's to reset cpu */
164 #define CONFIG_SYS_SC520_TIMER                  /* use SC520 swtimers */
165 #undef  CONFIG_SYS_GENERIC_TIMER                /* use the i8254 PIT timers */
166 #undef  CONFIG_SYS_TSC_TIMER                    /* use the Pentium TSC timers */
167 #define CONFIG_SYS_USE_SIO_UART         0       /* prefer the uarts on the SIO to those
168                                          * in the SC520 on the CDP */
169 #define CONFIG_SYS_PCAT_INTERRUPTS
170 #define CONFIG_SYS_NUM_IRQS             16
171
172 /*-----------------------------------------------------------------------
173  * Memory organization
174  */
175 #define CONFIG_SYS_STACK_SIZE           0x8000          /* Size of bootloader stack */
176 #define CONFIG_SYS_BL_START_FLASH       0x38040000      /* Address of relocated code */
177 #define CONFIG_SYS_BL_START_RAM         0x03fd0000      /* Address of relocated code */
178 #define CONFIG_SYS_MONITOR_BASE         TEXT_BASE
179 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256 kB for Mon       */
180 #define CONFIG_SYS_FLASH_BASE           0x38000000      /* Boot Flash */
181 #define CONFIG_SYS_FLASH_BASE_1         0x10000000      /* StrataFlash 1 */
182 #define CONFIG_SYS_FLASH_BASE_2         0x11000000      /* StrataFlash 2 */
183
184 /* timeout values are in ticks */
185 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
186 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
187
188 /* allow to overwrite serial and ethaddr */
189 #define CONFIG_ENV_OVERWRITE
190
191  /*-----------------------------------------------------------------------
192   * FLASH configuration
193   */
194 #define CONFIG_FLASH_CFI_DRIVER                         /* Use the common driver */
195 #define CONFIG_FLASH_CFI_LEGACY
196 #define CONFIG_SYS_FLASH_CFI                            /* Flash is CFI conformant */
197 #define CONFIG_SYS_MAX_FLASH_BANKS      3       /* max number of memory banks */
198 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE,   \
199                                          CONFIG_SYS_FLASH_BASE_1, \
200                                          CONFIG_SYS_FLASH_BASE_2}
201 #define CONFIG_SYS_FLASH_EMPTY_INFO
202 #undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
203 #define CONFIG_SYS_MAX_FLASH_SECT       128     /* max number of sectors on one chip */
204 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
205 #define CONFIG_SYS_FLASH_LEGACY_512Kx8
206
207  /*-----------------------------------------------------------------------
208   * Environment configuration
209   */
210 #define CONFIG_ENV_IS_IN_FLASH          1
211 #define CONFIG_ENV_SECT_SIZE            0x20000 /* Total Size of Environment Sector */
212 #define CONFIG_ENV_SIZE                 CONFIG_ENV_SECT_SIZE
213 #define CONFIG_ENV_ADDR                 CONFIG_SYS_FLASH_BASE_1
214 /* Redundant Copy */
215 #define CONFIG_ENV_ADDR_REDUND          (CONFIG_SYS_FLASH_BASE_1 + \
216                                          CONFIG_ENV_SECT_SIZE)
217 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SECT_SIZE
218
219
220  /*-----------------------------------------------------------------------
221   * PCI configuration
222   */
223 #define CONFIG_PCI                                /* include pci support */
224 #define CONFIG_PCI_PNP                            /* pci plug-and-play */
225 #define CONFIG_SYS_FIRST_PCI_IRQ   10
226 #define CONFIG_SYS_SECOND_PCI_IRQ  9
227 #define CONFIG_SYS_THIRD_PCI_IRQ   11
228 #define CONFIG_SYS_FORTH_PCI_IRQ   15
229
230  /*
231  * Network device (TRL8100B) support
232  */
233 #define CONFIG_NET_MULTI
234 #define CONFIG_RTL8139
235
236 /*-----------------------------------------------------------------------
237  * FPGA configuration
238  */
239 #define CONFIG_SYS_FPGA_PROGRAM_PIO_BIT         0x2000
240 #define CONFIG_SYS_FPGA_INIT_PIO_BIT            0x4000
241 #define CONFIG_SYS_FPGA_DONE_PIO_BIT            0x8000
242 #define CONFIG_SYS_FPGA_PIO_DATA                SC520_PIODATA31_16
243 #define CONFIG_SYS_FPGA_PIO_DIRECTION           SC520_PIODIR31_16
244 #define CONFIG_SYS_FPGA_PIO_CLR                 SC520_PIOCLR31_16
245 #define CONFIG_SYS_FPGA_PIO_SET                 SC520_PIOSET31_16
246 #define CONFIG_SYS_FPGA_PROGRAM_BIT_DROP_TIME   1       /* milliseconds */
247 #define CONFIG_SYS_FPGA_MAX_INIT_TIME           10      /* milliseconds */
248 #define CONFIG_SYS_FPGA_MAX_FINALISE_TIME       10      /* milliseconds */
249 #define CONFIG_SYS_FPGA_SSI_DATA_RATE           8333    /* kHz (33.3333MHz xtal) */
250
251 #ifndef __ASSEMBLER__
252 extern unsigned long ip;
253
254 #define PRINTIP                         asm ("call 0\n" \
255                                             "0:\n" \
256                                             "pop %%eax\n" \
257                                             "movl %%eax, %0\n" \
258                                             :"=r"(ip) \
259                                             : /* No Input Registers */ \
260                                             :"%eax"); \
261                                             printf("IP: 0x%08lx (File: %s, Line: %d)\n", ip, __FILE__, __LINE__);
262
263 #endif
264 #endif  /* __CONFIG_H */