include/configs/h2200.h

   1 /*
   2  * iPAQ h2200 board configuration
   3  *
   4  * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #ifndef __CONFIG_H
  22 #define __CONFIG_H
  23
  24 #define MACH_TYPE_H2200                 341
  25 #define CONFIG_MACH_TYPE                MACH_TYPE_H2200
  26
  27 #define CONFIG_CPU_PXA25X               1
  28 #define CONFIG_BOARD_H2200
  29
  30 #define CONFIG_SYS_NO_FLASH
  31
  32 #define CONFIG_SYS_HZ                   1000
  33
  34 #define CONFIG_NR_DRAM_BANKS            1
  35 #define PHYS_SDRAM_1                    0xa0000000 /* SDRAM Bank #1 */
  36 #define PHYS_SDRAM_1_SIZE               0x04000000 /* 64 MB */
  37
  38 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  39 #define CONFIG_SYS_SDRAM_SIZE           PHYS_SDRAM_1_SIZE
  40
  41 #define CONFIG_SYS_INIT_SP_ADDR         0xfffff800
  42
  43 #define CONFIG_ENV_SIZE                 0x00040000
  44 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  45
  46 #define CONFIG_ENV_IS_NOWHERE
  47 #define CONFIG_SYS_MAXARGS              16
  48 #define CONFIG_SYS_LOAD_ADDR            0xa3000000 /* default load address */
  49
  50 /*
  51  * iPAQ 1st stage bootloader loads 2nd stage bootloader
  52  * at address 0xa0040000 but bootloader requires header
  53  * which is 0x1000 long.
  54  *
  55  * --- Header begin ---
  56  *      .word 0xea0003fe ; b 0x1000
  57  *
  58  *      .org 0x40
  59  *      .ascii "ECEC"
  60  *
  61  *      .org 0x1000
  62  * --- Header end ---
  63  */
  64
  65 #define CONFIG_SYS_TEXT_BASE            0xa0041000
  66
  67 /*
  68  * Static chips
  69  */
  70
  71 #define CONFIG_SYS_MSC0_VAL             0x246c7ffc
  72 #define CONFIG_SYS_MSC1_VAL             0x7ff07ff0
  73 #define CONFIG_SYS_MSC2_VAL             0x7ff07ff0
  74
  75 /*
  76  * PCMCIA and CF Interfaces
  77  */
  78
  79 #define CONFIG_SYS_MECR_VAL             0x00000000
  80 #define CONFIG_SYS_MCMEM0_VAL           0x00000000
  81 #define CONFIG_SYS_MCMEM1_VAL           0x00000000
  82 #define CONFIG_SYS_MCATT0_VAL           0x00000000
  83 #define CONFIG_SYS_MCATT1_VAL           0x00000000
  84 #define CONFIG_SYS_MCIO0_VAL            0x00000000
  85 #define CONFIG_SYS_MCIO1_VAL            0x00000000
  86
  87 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
  88 #define CONFIG_SYS_SXCNFG_VAL           0x00040004
  89
  90 #define CONFIG_SYS_MDREFR_VAL           0x0099E018
  91 #define CONFIG_SYS_MDCNFG_VAL           0x01C801CB
  92 #define CONFIG_SYS_MDMRS_VAL            0x00220022
  93
  94 #define CONFIG_SYS_PSSR_VAL             0x00000000
  95 #define CONFIG_SYS_CKEN                 0x00004840
  96 #define CONFIG_SYS_CCCR                 0x00000161
  97
  98 /*
  99  * GPIOs
 100  */
 101
 102 #define CONFIG_SYS_GPSR0_VAL            0x01000000
 103 #define CONFIG_SYS_GPSR1_VAL            0x00000000
 104 #define CONFIG_SYS_GPSR2_VAL            0x00010000
 105
 106 #define CONFIG_SYS_GPCR0_VAL            0x00000000
 107 #define CONFIG_SYS_GPCR1_VAL            0x00000000
 108 #define CONFIG_SYS_GPCR2_VAL            0x00000000
 109
 110 #define CONFIG_SYS_GPDR0_VAL            0xF7E38C00
 111 #define CONFIG_SYS_GPDR1_VAL            0xBCFFBF83
 112 #define CONFIG_SYS_GPDR2_VAL            0x000157FF
 113
 114 #define CONFIG_SYS_GAFR0_L_VAL          0x80401000
 115 #define CONFIG_SYS_GAFR0_U_VAL          0x00000112
 116 #define CONFIG_SYS_GAFR1_L_VAL          0x600A9550
 117 #define CONFIG_SYS_GAFR1_U_VAL          0x0005AAAA
 118 #define CONFIG_SYS_GAFR2_L_VAL          0x20000000
 119 #define CONFIG_SYS_GAFR2_U_VAL          0x00000000
 120
 121 /*
 122  * Serial port
 123  */
 124
 125 #define CONFIG_PXA_SERIAL
 126 #define CONFIG_FFUART
 127 #define CONFIG_CONS_INDEX               3
 128
 129 #define CONFIG_BAUDRATE                 115200
 130 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 38400, 115200 }
 131
 132 #define CONFIG_CMD_IMPORTENV            1
 133 #define CONFIG_CMD_LOADB
 134 #define CONFIG_CMD_SOURCE
 135 #define CONFIG_CMD_RUN
 136 #define CONFIG_CMD_IMI
 137
 138 #define CONFIG_FIT
 139 #define CONFIG_SETUP_MEMORY_TAGS
 140 #define CONFIG_CMDLINE_TAG
 141 #define CONFIG_INITRD_TAG
 142
 143 /* Monitor Command Prompt */
 144 #define CONFIG_SYS_PROMPT               "> "
 145 #define CONFIG_SYS_HUSH_PARSER
 146 #define CONFIG_SYS_PROMPT_HUSH_PS2      "$ "
 147
 148 /* Console I/O Buffer Size */
 149 #define CONFIG_SYS_CBSIZE               256
 150
 151 /* Print Buffer Size */
 152 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 153                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 154
 155 #define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
 156
 157 #endif /* __CONFIG_H */