include/configs/imx31_phycore.h

   1 /*
   2  * (C) Copyright 2004
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Kshitij Gupta <kshitij@ti.com>
   6  *
   7  * Configuration settings for the phyCORE-i.MX31 board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #include <asm/arch/imx-regs.h>
  32
  33 /* High Level Configuration Options */
  34 #define CONFIG_ARM1136                  /* This is an arm1136 CPU core */
  35 #define CONFIG_MX31                     /* in a mx31 */
  36 #define CONFIG_MX31_HCLK_FREQ   26000000
  37 #define CONFIG_MX31_CLK32       32000
  38
  39 #define CONFIG_DISPLAY_CPUINFO
  40 #define CONFIG_DISPLAY_BOARDINFO
  41
  42 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  43 #define CONFIG_SETUP_MEMORY_TAGS
  44 #define CONFIG_INITRD_TAG
  45
  46 /*
  47  * Size of malloc() pool
  48  */
  49 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 512 * 1024)
  50
  51 /*
  52  * Hardware drivers
  53  */
  54
  55 #define CONFIG_HARD_I2C
  56 #define CONFIG_I2C_MXC
  57 #define CONFIG_SYS_I2C_BASE             I2C2_BASE_ADDR
  58 #define CONFIG_SYS_I2C_CLK_OFFSET       I2C2_CLK_OFFSET
  59 #define CONFIG_SYS_I2C_SPEED            100000
  60
  61 #define CONFIG_MXC_UART
  62 #define CONFIG_MXC_UART_BASE            UART1_BASE
  63
  64 /* allow to overwrite serial and ethaddr */
  65 #define CONFIG_ENV_OVERWRITE
  66 #define CONFIG_CONS_INDEX       1
  67 #define CONFIG_BAUDRATE         115200
  68
  69 /***********************************************************
  70  * Command definition
  71  ***********************************************************/
  72
  73 #include <config_cmd_default.h>
  74
  75 #define CONFIG_CMD_PING
  76 #define CONFIG_CMD_EEPROM
  77 #define CONFIG_CMD_I2C
  78
  79 #define CONFIG_BOOTDELAY        3
  80
  81 #define MTDPARTS_DEFAULT        "mtdparts=physmap-flash.0:128k(uboot)ro," \
  82                                         "1536k(kernel),-(root)"
  83
  84 #define CONFIG_NETMASK          255.255.255.0
  85 #define CONFIG_IPADDR           192.168.23.168
  86 #define CONFIG_SERVERIP         192.168.23.2
  87
  88 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  89         "bootargs_base=setenv bootargs console=ttySMX0,115200\0"        \
  90         "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "       \
  91                 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"     \
  92         "bootargs_flash=setenv bootargs $(bootargs) "                   \
  93                 "root=/dev/mtdblock2 rootfstype=jffs2\0"                \
  94         "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0"        \
  95         "bootcmd=run bootcmd_net\0"                                     \
  96         "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;"      \
  97                 "tftpboot 0x80000000 $(uimage);bootm\0"                 \
  98         "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;"  \
  99                 "bootm 0x80000000\0"                                    \
 100         "unlock=yes\0"                                                  \
 101         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 102         "prg_uboot=tftpboot 0x80000000 $(uboot);"                       \
 103                 "protect off 0xa0000000 +0x20000;"                      \
 104                 "erase 0xa0000000 +0x20000;"                            \
 105                 "cp.b 0x80000000 0xa0000000 $(filesize)\0"              \
 106         "prg_kernel=tftpboot 0x80000000 $(uimage);"                     \
 107                 "erase 0xa0040000 +0x180000;"                           \
 108                 "cp.b 0x80000000 0xa0040000 $(filesize)\0"              \
 109         "prg_jffs2=tftpboot 0x80000000 $(jffs2);"                       \
 110                 "erase 0xa01c0000 0xa1ffffff;"                          \
 111                 "cp.b 0x80000000 0xa01c0000 $(filesize)\0"              \
 112         "videomode=video=ctfb:x:240,y:320,depth:16,mode:0,"             \
 113                 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,"          \
 114                 "sync:1241513985,vmode:0\0"
 115
 116
 117 #define CONFIG_SMC911X
 118 #define CONFIG_SMC911X_BASE     0xa8000000
 119 #define CONFIG_SMC911X_32_BIT
 120
 121 /*
 122  * Miscellaneous configurable options
 123  */
 124 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 125 #define CONFIG_SYS_PROMPT               "uboot> "
 126 /* Console I/O Buffer Size */
 127 #define CONFIG_SYS_CBSIZE               256
 128 /* Print Buffer Size */
 129 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 130                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 131 /* max number of command args */
 132 #define CONFIG_SYS_MAXARGS              16
 133 /* Boot Argument Buffer Size */
 134 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 135
 136 #define CONFIG_SYS_MEMTEST_START        0  /* memtest works on */
 137 #define CONFIG_SYS_MEMTEST_END          0x10000
 138
 139 #define CONFIG_SYS_LOAD_ADDR            0 /* default load address */
 140
 141 #define CONFIG_SYS_HZ                   1000
 142
 143 #define CONFIG_CMDLINE_EDITING
 144
 145 /*
 146  * Stack sizes
 147  *
 148  * The stack sizes are set up in start.S using the settings below
 149  */
 150 #define CONFIG_STACKSIZE        (128 * 1024) /* regular stack */
 151
 152 /*
 153  * Physical Memory Map
 154  */
 155 #define CONFIG_NR_DRAM_BANKS            1
 156 #define PHYS_SDRAM_1                    0x80000000
 157 #define PHYS_SDRAM_1_SIZE               (128 * 1024 * 1024)
 158 #define CONFIG_BOARD_EARLY_INIT_F
 159 #define CONFIG_SYS_TEXT_BASE            0xA0000000
 160
 161 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 162 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 163 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 164 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 165                                                 GENERATED_GBL_DATA_SIZE)
 166 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 167                                                 CONFIG_SYS_GBL_DATA_OFFSET)
 168
 169 /*
 170  * FLASH and environment organization
 171  */
 172 #define CONFIG_SYS_FLASH_BASE           0xa0000000
 173 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max # of memory banks */
 174 #define CONFIG_SYS_MAX_FLASH_SECT       259     /* max # of sectors/chip */
 175 /* Monitor at beginning of flash */
 176 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 177
 178 #define CONFIG_ENV_IS_IN_EEPROM
 179 #define CONFIG_ENV_OFFSET                       0x00    /* env. starts here */
 180 #define CONFIG_ENV_SIZE                         4096
 181 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x52
 182 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       5       /* 5 bits = 32 octets */
 183 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* 10 ms delay */
 184 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2       /* byte addr. lenght */
 185
 186 /*
 187  * CFI FLASH driver setup
 188  */
 189 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
 190 #define CONFIG_FLASH_CFI_DRIVER         /* Use drivers/mtd/cfi_flash.c */
 191 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
 192 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
 193
 194 /*
 195  * Timeout for Flash Erase and Flash Write
 196  * timeout values are in ticks
 197  */
 198 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100*CONFIG_SYS_HZ)
 199 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100*CONFIG_SYS_HZ)
 200
 201 /*
 202  * JFFS2 partitions
 203  */
 204 #undef CONFIG_CMD_MTDPARTS
 205 #define CONFIG_JFFS2_DEV        "nor0"
 206
 207 /* EET platform additions */
 208 #ifdef CONFIG_IMX31_PHYCORE_EET
 209 #define CONFIG_BOARD_LATE_INIT
 210
 211 #define CONFIG_MXC_GPIO
 212
 213 #define CONFIG_HARD_SPI
 214 #define CONFIG_MXC_SPI
 215 #define CONFIG_CMD_SPI
 216
 217 #define CONFIG_S6E63D6
 218
 219 #define CONFIG_VIDEO
 220 #define CONFIG_CFB_CONSOLE
 221 #define CONFIG_VIDEO_MX3
 222 #define CONFIG_VIDEO_LOGO
 223 #define CONFIG_VIDEO_SW_CURSOR
 224 #define CONFIG_VGA_AS_SINGLE_DEVICE
 225 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 226 #define CONFIG_SPLASH_SCREEN
 227 #define CONFIG_CMD_BMP
 228 #define CONFIG_BMP_16BPP
 229 #endif
 230
 231 #endif /* __CONFIG_H */